A method for improving the thermal expansion and contraction problems in the thermocompression bonding of a sapphire substrate and a silicon substrate

The thermal expansion coefficient of the sapphire substrate is reduced through high-energy ion implantation and rapid annealing technology, so that it is close to the CTE value of the silicon substrate, and the thermal compression bonding is carried out by combining gold-tin bonding and glue bonding, which solves the problem of poor bonding effect caused by inconsistent thermal expansion coefficients of sapphire and silicon substrates, and achieves higher mechanical strength and thermal stability.

CN119812021BActive Publication Date: 2025-06-27HANGZHOU XINJU SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202411953654.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-27
Publication Date
2025-06-27
Estimated Expiration
2044-12-27

AI Technical Summary

Technical Problem

The thermal expansion coefficients of the sapphire substrate and the silicon substrate are inconsistent, resulting in poor thermal compression bonding effect.

Method used

The sapphire substrate is deeply doped through high-energy ion implantation technology to reduce its thermal expansion coefficient, so that it is close to the CTE value of the silicon substrate, and eliminates the defects and stresses introduced by the implant through rapid annealing. Finally, the thermal bonding is carried out by gold-tin bonding and glue bonding.

Benefits of technology

It effectively improves the bonding and shrinking problem between sapphire and silicon substrate, so that the shrinking ratios of the two are almost consistent, reduces interface stress, and improves the mechanical strength and thermal stability of the bonding.

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Abstract

The present invention relates to the technical field of semiconductor material processing, and discloses a method for improving the expansion and contraction problems in the thermocompression bonding of a sapphire substrate and a silicon substrate, comprising the following steps: S1, cleaning and dust removal: soaking the sapphire substrate in a solution using an organic cleaning table first; S2, doping: performing deep doping using a high-energy ion implanter; S3, annealing: annealing using an RTP rapid annealing furnace to eliminate the defects and stresses introduced by the implantation. According to different implantation depths, the CTE of Al2O3 at this time can be tested using a PCY series thermal expansion coefficient measuring instrument; S4, bonding: performing metal bonding on the Chip on the upper substrate of the Al2O3 substrate and the circuit metal on the lower substrate of the Si substrate using a thermocompression bonding device. By improving the problem of relatively large expansion and contraction in the bonding of the original heterogeneous materials of the sapphire substrate and the silicon substrate, the expansion and contraction distances of the two are made approximately the same. After rapid annealing, the lattice defects on the surface layer of the implanted sapphire material are repaired and the internal stress of the material can be reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor material processing, and specifically to a method for improving the thermal compression bonding expansion and contraction problems between a sapphire substrate and a silicon substrate. Background Art

[0002] Aluminum oxide is a common ceramic material with good chemical stability and mechanical strength, and is widely used in the fields of aviation, aerospace, electronics, etc. However, the thermal expansion coefficient of aluminum oxide (5.8×10^-6 / °C to 8.5×10^-6 / °C) is relatively large, which easily causes the material to deform or crack due to temperature changes.

[0003] Silicon material is a common semiconductor substrate material, and the application of silicon in semiconductors is very extensive. It is the core material for the manufacture of current integrated circuits and electronic devices. Silicon semiconductors dominate the electronics industry, and more than 95% of integrated circuits use silicon semiconductors, but its thermal expansion coefficient is relatively small (2.6x10^-6 / °C to 3.5x10^-6 / °C).

[0004] When they are applied in metal bonding, due to the inconsistent CTE (thermal expansion coefficient), the expansion speeds are different during the welding of heterogeneous materials, resulting in stress at the welding site and reducing the mechanical strength of the material. Therefore, an intermediate expansion value needs to be adopted in the system, so that one material generates compressive stress and the other material generates tensile stress of equal magnitude. Appropriately utilizing this characteristic to improve the strength of the product is the research direction of this article.

[0005] In the prior art, two substrates are required for bonding. One is a silicon substrate with a circuit, and the other can also be a silicon substrate, but the flatness of this material is not that high. Under high-precision requirements, a sapphire substrate will be used, but due to different thermal expansion coefficients, the bonding effect will be poor. Summary of the Invention

[0006] In view of the deficiencies of the prior art, the present invention provides a method for improving the thermal compression bonding expansion and contraction problems between a sapphire substrate and a silicon substrate, which solves the problem that the flatness of the material is not that high. Under high-precision requirements, a sapphire substrate will be used, but due to different thermal expansion coefficients, the bonding effect will be poor.

[0007] To achieve the above objectives, the present invention is realized through the following technical solutions: A method for improving the thermal compression bonding expansion and contraction problems between a sapphire substrate and a silicon substrate, comprising the following steps:

[0008] S1. Cleaning and dust removal: First, soak the sapphire substrate in a solution using an organic cleaning table. The soaking is used to clean the sapphire substrate to remove surface dirt and metal ions;

[0009] S2. Doping: By using a high-energy ion implanter for deep doping, first place the sapphire substrate on the indoor pedestal in a vacuum environment. The temperature of the sapphire substrate is at room temperature. Then, perform implantation through the ion source and heat through the ion source to make the ion source in an ionic state and accelerate it through the accelerator to reach the critical dose of material damage.

[0010] S3. Annealing: Use an RTP rapid annealing furnace to anneal to eliminate the defects and stress introduced by implantation. After cleaning the sapphire substrate, place it inside the cavity for heating, and then take out the substrate material after fully cooling to room temperature.

[0011] S4. Bonding: Use a thermocompression bonding device to perform metal bonding on the Chip wafer on the sapphire substrate and the circuit on the silicon substrate. Specifically, bond the sapphire substrate and the Chip wafer to obtain the upper substrate. Place the upper substrate at the corresponding upper loading platform position, place the silicon substrate with the circuit on the lower substrate loading platform, heat the bonding head, and then perform bonding to obtain the finished product.

[0012] Furthermore: In S1, the solution includes but is not limited to inorganic solvents, acid solutions, or 511 solutions. The 511 solution includes H2SO4, H2O2, and H2O, and the ratio of the solution is H2SO4:H2O2:H2O = 5:1:1. The soaking time is 30 - 60 min.

[0013] Furthermore: In S2, the heating temperature of the ion source is above 1000 °C, the energy range of the accelerator is between 1.0M ± 5% eV, and the ion source implantation materials include but are not limited to Y 3+ , Cd 2+ or Mg 2+ , and the implantation dose is implanted according to 1E13 ± 5% ions / cm 2 , the implantation time is more than 3H, and the critical dose of material damage is the implantation dose threshold before severe lattice damage, and the implantation depth is greater than 1 um.

[0014] Furthermore: In S2, during the operation of the high-energy ion implanter, the ion beam is focused and directed by the magnetic field and vertically implanted onto the surface of the sapphire substrate. The implanted ions drift in the sapphire substrate and stop at fixed positions, forming a peak of the ion concentration distribution, which is obtained through data simulation and simulation of the ion implantation equipment.

[0015] Furthermore: In S3, the temperature of the annealing furnace is above 600 °C, the maximum heating rate is above 180 °C / s, and the annealing heating time is within 5 s. At this time, introduce N2 at 100 sccm, and the holding time is within 5 - 10 min.

[0016] Further: In S3, the CTE of the sapphire substrate is tested using a PCY series thermal expansion coefficient measuring instrument. When the requirements are met, proceed to the next step; when the requirements are not met, execute step S1.

[0017] Further: In S4, the bonding method is AuSn bonding, and the bonding method between the sapphire substrate and the Chip wafer is adhesive bonding. The reduction of the CTE coefficient of the ion-implanted sapphire substrate is used to make the expansion and contraction ratio of the sapphire substrate and the silicon substrate close to 1.

[0018] Further: The CTE coefficient of the ion-implanted sapphire substrate is reduced to 2.3 times the original CTE coefficient.

[0019] Further: In S4, the expansion and contraction ratio of heterogeneous material bonding = CTE of sapphire material × △T × L / CTE of silicon material × △T × L material. AuSn bonding is used, and the bonding temperature is 340 - 360 °C. The overall size of the sapphire substrate heated by the bonding head becomes 8.0×10^-6 / °C × (350 - 25 °C) × 100 mm times that at room temperature, and the overall size of the silicon substrate becomes 3.4×10^-6 / °C × (350 - 25 °C) × 100 mm at room temperature.

[0020] The present invention provides a method for improving the expansion and contraction problem in the thermocompression bonding of a sapphire substrate and a silicon substrate.

[0021] It has the following beneficial effects:

[0022] 1. The present invention improves the problem of large expansion and contraction in the bonding of the original heterogeneous materials of the sapphire substrate and the silicon substrate, making their expansion and contraction distances approximately the same. After rapid annealing, the lattice defects on the surface layer of the ion-implanted sapphire material are repaired and the internal stress of the material can be reduced, thereby changing the lattice structure and reducing the CTE of Al2O3. At the same time, through the annealing process, the doped Al2O3 is heat-treated, and the lattice defects on the surface of the doped Al2O3 material are eliminated, and the material stress is reduced.

[0023] 2. The present invention can improve the EOS ability of the material through a large amount of ion implantation on the sapphire surface layer. When the device reduces its ability and service life due to overheating or other reasons, metal ions can physically and chemically interact with atoms or molecules in the material, gradually lose energy and stay in the material, that is, reduce the thermal effect generated after the bonding of the substrate material and the wafer. Description of the Drawings

[0024] Figure 1 It is a method flow chart of a method for improving the expansion and contraction problem in the thermocompression bonding of a sapphire substrate and a silicon substrate according to the present invention;

[0025] Figure 2Soaking schematic diagram of an improvement method for the thermal compression bonding expansion and contraction problem between a sapphire substrate and a silicon substrate according to the present invention;

[0026] Figure 3 Side schematic diagram of the Al2O3 substrate metal ion implantation method of an improvement method for the thermal compression bonding expansion and contraction problem between a sapphire substrate and a silicon substrate according to the present invention;

[0027] Figure 4 Schematic diagram after particle implantation of an improvement method for the thermal compression bonding expansion and contraction problem between a sapphire substrate and a silicon substrate according to the present invention;

[0028] Figure 5 Annealing schematic diagram of implantation of an improvement method for the thermal compression bonding expansion and contraction problem between a sapphire substrate and a silicon substrate according to the present invention;

[0029] Figure 6 Thermal compression stacking schematic diagram of an improvement method for the thermal compression bonding expansion and contraction problem between a sapphire substrate and a silicon substrate according to the present invention. Specific implementation manners

[0030] Next, the technical solutions of the present invention will be clearly and completely described in conjunction with the accompanying drawings of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.

[0031] Embodiment:

[0032] Please refer to the attached Figure 1 - Attached Figure 6 , an embodiment of the present invention provides an improvement method for the thermal compression bonding expansion and contraction problem between a sapphire substrate and a silicon substrate, including the following steps:

[0033] S1. Cleaning and dust removal: First, soak the sapphire substrate with a solution using an organic cleaning table. The soaking is used to clean the sapphire substrate to remove surface dirt and metal ions;

[0034] S2. Doping: Through deep doping using a high-energy ion implanter, first place the sapphire substrate on the indoor pedestal in a vacuum environment. The temperature of the sapphire substrate is at room temperature. Then, perform implantation through the ion source and heat the ion source to make the ion source in an ionic state and accelerate it through the accelerator to reach the critical dose of material damage. During the process, the ion beam is focused and directed by the magnetic field and then vertically implanted onto the surface of the sapphire substrate. The implanted ions drift in the material and stop at fixed positions, forming a peak of ion concentration distribution, which is obtained through data simulation of the ion implantation equipment. Among them, the heating temperature of the ion source is above 1000 °C, the energy range of the accelerator is between 1.0M ± 5% eV, and the ion source implantation materials include but are not limited to Y 3+ 、Cd 2+ or Mg 2+ , the implantation dose is carried out according to the 4-inch specification of 1E13 ± 5% ions / cm 2 , the implantation time is more than 3H, the critical dose of material damage is the implantation dose threshold before severe lattice damage, and the required implantation depth of the implantation equipment is greater than 1um.

[0035] Specifically, through the ion implantation technology, deep doping of the sapphire substrate is carried out. By using a high-energy ion source and an accelerator, the internal performance of the material is optimized and regulated. The heating temperature of the ion source is set above 1000 °C. When the ions are in a highly energetic active state, they have sufficient kinetic energy to penetrate the material surface and be implanted deeply during the implantation process. The energy range of the accelerator is set at 1.0M ± 5% eV to provide stable and accurate acceleration conditions, enabling the ion beam to maintain high directivity and stability. The implantation materials include but are not limited to Y 3+ 、Cd 2+ or Mg 2+ , by selecting different ion sources, the adaptation and optimization of different characteristic requirements of the substrate can be achieved. Through the implantation of Mg 2+ , the thermal expansion coefficient (CTE) of the sapphire can be effectively reduced;

[0036] The implantation dose is designed according to the 4-inch specification as 1E13 ± 5% ions / cm 2, enabling the ion implantation concentration to reach an ideal distribution peak in the material while avoiding severe lattice damage to the material caused by excessive doses; the damage critical dose of the material serves as the upper limit standard for the implantation dose, and by precisely controlling the dose, severe damage to the lattice structure can be effectively avoided. The implantation time is set to be more than 3 hours to ensure sufficient ion beam accumulation and implantation depth. The device requires an implantation depth greater than 1 μm. By adjusting the accelerator energy and implantation parameters, the ions can be implanted to a specific depth position inside the material, forming a uniform ion concentration distribution. Thus, during the use process, not only does the deep ion implantation optimize the thermal expansion coefficient of the material, significantly reducing the dimensional shrinkage mismatch caused by the CTE difference between sapphire and silicon substrate during the thermocompression bonding process; but also, the stability and uniformity of the ion concentration peak during the implantation process provide an excellent performance basis for subsequent material processing, while avoiding the decline in the mechanical properties of the material caused by lattice damage.

[0037] S3. Annealing: Use an RTP rapid thermal annealing furnace to anneal to eliminate the defects and stress introduced by implantation. According to the different implantation depths, after the material is cleaned, it is placed inside the cavity for heating, and then the material is taken out after cooling down to room temperature sufficiently. At this time, the CTE of Al2O3 can be tested with a PCY series thermal expansion coefficient measuring instrument;

[0038] S4. Bonding: Use a thermocompression bonding device to perform metal bonding on the Chip wafer on the sapphire substrate and the circuit on the silicon substrate; specifically, bond the sapphire substrate and the Chip wafer to obtain an upper substrate. Place the upper substrate at the corresponding upper loading platform position, place the silicon substrate with the circuit on the lower substrate loading platform, heat up the bonding head, and then perform bonding to obtain the finished product. Mg 2+ The CTE coefficient of the implanted sapphire material decreases. Through Mg 2+ The CTE coefficient of the sapphire substrate is reduced by implanting, reducing the CTE coefficient of the sapphire substrate to 2.3 times the original value. At this time, the expansion and contraction distances of the sapphire substrate and the silicon substrate are approximately the same.

[0039] In S1, the solution includes but is not limited to inorganic solvents, acid solutions, or 511 solutions. The 511 solution includes H2SO4, H2O2, and H2O, and the ratio of the solution is H2SO4:H2O2:H2O = 5:1:1. The soaking time is 30 - 60 min.

[0040] Specifically, by using a cleaning solution, in combination with mechanical stirring or ultrasonic-assisted technology, and subsequent rinsing with deionized water and drying with high-purity nitrogen, it plays a role in deeply cleaning the surface of the sapphire substrate, thereby achieving the removal of organic pollutants, particulate matter, and metal ions. At the same time, it significantly improves the cleanliness and flatness of the substrate surface, providing a high-quality surface environment for subsequent processes. Among them, the strong acidic effect of H2SO4 in the "511 solution" can quickly dissolve organic matter and particulate pollutants on the substrate surface, and the strong oxidizing property of H2O2 effectively removes metal ions and oxide layers on the substrate surface. Rinsing with deionized water can eliminate the chemical residues of the cleaning solution, and drying with high-purity nitrogen prevents secondary pollution of water stains and other pollutants from forming on the surface. Mechanical stirring or ultrasonic assistance enhances the contact efficiency between the cleaning solution and the substrate surface through these devices, further improving the removal efficiency of pollutants. Thus, during the use process, it not only plays a role in deep surface cleaning but also significantly reduces the defect rate of the substrate surface, making the subsequent ion implantation more uniform and precise, and the peak distribution of ion concentration more stable. At the same time, it also provides an interface with high cleanliness and high flatness for thermocompression bonding, effectively reducing the defects at the bonding interface, improving the metal adhesion, optimizing the size expansion and contraction problems caused by the difference in thermal expansion coefficients between sapphire and silicon substrates, and ultimately improving the consistency of the process products, improving the bonding quality, and increasing the yield rate of the products.

[0041] In S3, the temperature of the annealing furnace is above 600 °C, the maximum heating rate is above 180 °C / s, and the annealing heating time is within 5 s. At this time, N2 is introduced at 100 sccm, and the heat preservation duration is within 5 - 10 min.

[0042] Specifically, a rapid thermal annealing furnace (RTP) is used to perform rapid annealing on the sapphire substrate to eliminate the lattice defects and residual stress introduced during the ion implantation process, thereby optimizing the internal structural properties of the material. The temperature of the annealing furnace is set above 600 °C, and the high-temperature condition promotes lattice recombination in the substrate and repairs the lattice damage generated during the ion implantation process. The maximum heating rate is set above 180 °C / s, and the annealing heating time is controlled within 5 seconds, so as to quickly reach the target temperature and reduce the accumulation of material thermal stress caused by the temperature transition process, ensuring the efficiency and uniformity of the annealing treatment.

[0043] During the annealing process, by introducing high-purity nitrogen gas (N2) with a flow rate of 100 sccm into the cavity, an inert protective atmosphere can be provided in the annealing environment to prevent oxidation or chemical reactions on the material surface under high-temperature conditions. At the same time, the holding time is controlled between 5 and 10 minutes to provide sufficient time for the lattice defects induced by ion implantation to be fully repaired and for the stress release to reach an ideal state. After the holding is completed, the material is slowly cooled to room temperature to avoid thermal stress problems caused by rapid cooling, thereby having the effect of maintaining the mechanical properties and structural integrity of the substrate. During use, not only the local stress concentration and defect structure introduced during the ion implantation process are effectively eliminated, making the internal lattice of the substrate more stable, providing a high-reliability guarantee for the interface quality of subsequent thermocompression bonding, but also the sapphire substrate after annealing treatment has a more uniform coefficient of thermal expansion (CTE), which helps to further reduce the shrinkage and expansion problems caused by the CTE difference with the silicon substrate during thermocompression.

[0044] In S4, the bonding method is AuSn bonding, and the bonding method between the sapphire substrate and the Chip wafer is adhesive bonding, Mg 2+ The reduction of the CTE coefficient of the Mg-implanted sapphire substrate is used to make the shrinkage and expansion ratio of the upper and lower substrates close to 1.

[0045] Specifically, by optimizing the bonding method, efficient thermocompression bonding between the sapphire substrate and the silicon substrate is achieved to solve the size shrinkage and expansion problems caused by the difference in the coefficient of thermal expansion (CTE). By using gold-tin alloy (AuSn) for the metal bonding of the upper and lower substrates, and at the same time using an adhesive for the adhesive bonding between the sapphire substrate and the Chip wafer, the combination of the two different bonding methods plays a role in strengthening the thermocompression bonding interface and improving the bonding stability, thereby achieving the precise bonding of heterogeneous materials.

[0046] The sapphire substrate is doped with Mg through ion implantation technology 2+ to reduce the CTE coefficient of sapphire. Compared with untreated sapphire, Mg 2+After injection, the CTE coefficient of the sapphire material decreases significantly, making the expansion and contraction ratio of sapphire to the silicon substrate close to 1. During use, it can reduce the interfacial stress concentration, avoid interfacial cracking or bonding failure caused by mismatched dimensional expansion and contraction. Through the AuSn bonding method, the gold-tin alloy, as the interfacial metal layer, can provide good wettability and fluidity at the bonding temperature, thereby enhancing the bonding strength between metals. The adhesive bonding, through the elastic buffering effect of the polymer adhesive, further reduces the interfacial stress caused by the thermal expansion difference of different materials during the bonding process. During use, it not only achieves precise matching of the dimensional expansion and contraction of sapphire and the silicon substrate during the high-temperature hot pressing process, significantly reducing the risk of bonding failure caused by CTE differences, but also enhances the stress resistance of the bonding interface, improving the thermal stability and long-term reliability of the product during actual use.

[0047] In S4, the expansion and contraction ratio of heterogeneous material bonding = CTE of sapphire material × △T × L / CTE of silicon material × △T × L material. During the 350°C bonding process of AuSn bonding, the upper substrate heated by the bonding head is a sapphire substrate with a diameter D = 100 mm of 4 inches, and the overall size becomes 8.0×10^-6 / °C × (350 - 25°C) × 100 mm times at room temperature. For the 4-inch silicon substrate, the overall size becomes 3.4×10^-6 / °C × (350 - 25°C) × 100 mm times at room temperature.

[0048] Specifically, through calculation, it can be seen that the expansion and contraction ratio between untreated sapphire and the silicon substrate is about 2.35, showing obvious mismatched dimensional expansion and contraction. By using the Mg 2+ ion implantation process to optimize the CTE of sapphire, reducing the CTE of sapphire to about 2.3 times the original value, so that the expansion and contraction of sapphire is close to that of silicon. The optimized CTE of sapphire is close, making its dimensional expansion and contraction more consistent with that of silicon, significantly reducing the interfacial stress caused by mismatched dimensional expansion and contraction, verifying the feasibility and effectiveness of the method of reducing the CTE of sapphire and optimizing the hot pressing bonding matchability in the present invention. During use, it not only significantly relieves the bonding stress of heterogeneous materials, but also improves the bonding reliability and thermal cycle stability.

[0049] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for improving the expansion and contraction problem of thermal compression bonding between a sapphire substrate and a silicon substrate, characterized in that: The following steps are involved: S1. Cleaning and dust removal: Using an organic cleaning station, the sapphire substrate is first soaked in a solution to clean the sapphire substrate to remove surface dirt and metal ions; S2. Doping: Deep doping is performed by using a high-energy ion implanter. The sapphire substrate is first placed on a base in a vacuum environment. The temperature of the sapphire substrate is at room temperature. Then, the ion source is used for implantation and heating. The ion source is placed in an ion state and accelerated by an accelerator to reach the critical dose of material damage. S3, Annealing: Use RTP rapid annealing furnace to anneal to eliminate defects and stress introduced by injection. After cleaning, the sapphire substrate is placed in the cavity for heating, and then the substrate material is taken out after the temperature is fully cooled to room temperature; S4, bonding: using a hot press bonding device to perform metal bonding on the chip wafer on the sapphire substrate and the circuit on the silicon substrate; specifically, the sapphire substrate and the chip wafer are bonded to obtain an upper substrate, the upper substrate is placed at a corresponding upper stage position, the silicon substrate with the circuit is placed on the lower substrate stage, the welding head is heated, and then bonding is performed to obtain a finished product; In S2, the ion source is heated to a temperature above 1000°C, the energy range of the accelerator is between 1.0M±5%eV, and the ion source implantation material includes Y 3+ 、Cd 2+ or Mg 2+ The implantation dose is 1E13±5% ions / cm², the implantation time is more than 3 hours, the critical damage dose of the material is the implantation dose threshold before severe lattice damage, and the implantation depth is greater than 1μm.

2. The method for improving the expansion and shrinkage problem of thermal compression bonding between a sapphire substrate and a silicon substrate according to claim 1, characterized in that: In S1, the solution includes an inorganic solvent or an acid solution.

3. The method for improving the expansion and shrinkage problem of thermal compression bonding between a sapphire substrate and a silicon substrate according to claim 1, characterized in that: In S1, the solution includes a 511 solution, the 511 solution includes H2SO4, H2O2, and H2O, the ratio of the solution is H2SO4:H2O2:H2O=5:1:1, and the soaking time is 30-60min.

4. The method for improving the expansion and contraction problem of thermal compression bonding between a sapphire substrate and a silicon substrate according to claim 1, characterized in that: In S2, during the operation of the high-energy ion implanter, the ion beam is focused and directed by the magnetic field and vertically injected into the surface of the sapphire substrate. The injected ions drift in the sapphire substrate and stop at a fixed position, forming a peak value of the ion concentration distribution, which is obtained through data simulation of the ion implantation equipment.

5. The method for improving the expansion and shrinkage problem of thermal compression bonding between a sapphire substrate and a silicon substrate according to claim 1, characterized in that: In S3, the temperature of the RTP rapid annealing furnace is above 600°C, the maximum heating rate is above 180°C / s, and the annealing heating time is within 5s; at this time, N2 100sccm is introduced and the insulation time is within 5-10min.

6. The method for improving the expansion and contraction problem of thermal compression bonding between a sapphire substrate and a silicon substrate according to claim 1, characterized in that: In S3, the CTE of the sapphire substrate is tested using a PCY series thermal expansion coefficient tester. If the requirements are met, the next step is performed. If the requirements are not met, step S1 is performed.

7. The method for improving the expansion and contraction problem of thermal compression bonding between a sapphire substrate and a silicon substrate according to claim 1, characterized in that: In S4, the metal bonding method is AuSn bonding, the bonding method between the sapphire substrate and the chip wafer is adhesive bonding, and the CTE coefficient of the ion-implanted sapphire substrate is reduced to make the expansion and contraction ratio of the sapphire substrate and the silicon substrate close to 1.

Citation Information

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