Manufacturing method of semiconductor device and semiconductor device
The method of forming grooves and filling the conductive layer by bombarding the inert gas is solved, and the electrical performance of the device is improved.
Patent Information
- Application Number
- CN202411905585.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-04-11
AI Technical Summary
The contact resistance of the contact structure in existing semiconductor devices is relatively large, which affects the electrical performance of the device.
The film layer on the periphery of the top of the contact structure is bombarded by an inert gas to form a groove surrounding the top of the contact structure, and a conductive layer is formed on the contact structure, and the conductive layer fills the grooves to increase the contact area.
The contact resistance of the contact structure is reduced and the electrical performance of semiconductor devices is improved.
Smart Images
Figure CN119812108A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of semiconductor technology, and in particular, relates to a method for manufacturing a semiconductor device and a semiconductor device. Background Art
[0002] The electrical properties of the contact structure in a semiconductor device (such as contact resistance and the electrical differences between contact structures of different densities) are important parameters that affect the electrical properties of the device.
[0003] In the related art, after forming the contact structure, a conductive layer is formed on the contact structure. The conductive layer only contacts the upper surface of the contact structure, and the contact area is small, resulting in a large contact resistance of the contact structure, which affects the electrical performance of the semiconductor device. Summary of the invention
[0004] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a method for manufacturing a semiconductor device and a semiconductor device, which can reduce the contact resistance of a contact structure and improve the electrical performance of the semiconductor device.
[0005] In a first aspect, the present application provides a method for manufacturing a semiconductor device, comprising:
[0006] Providing a substrate and a dielectric layer located on the substrate, wherein the substrate includes a conductive structure;
[0007] forming a contact structure penetrating the dielectric layer, wherein the bottom of the contact structure is connected to the conductive structure;
[0008] Using inert gas to bombard the film layer around the top of the contact structure to obtain a groove around the top of the contact structure;
[0009] A conductive layer is formed on the contact structure, wherein the conductive layer fills the groove and contacts the contact structure.
[0010] According to the manufacturing method of the semiconductor device of the present application, the film layer on the peripheral side of the top of the contact structure is bombarded with an inert gas to obtain a groove arranged around the top of the contact structure to expose more of the contact structure, and a conductive layer is formed on the contact structure, and the conductive layer fills the groove to increase the contact area between the conductive layer and the contact structure, reduce the contact resistance of the contact structure, and improve the electrical performance of the semiconductor device.
[0011] According to one embodiment of the present application, the contact structure includes a metal structure penetrating the dielectric layer;
[0012] The bombarding of the film layer around the top of the contact structure to obtain a groove around the top of the contact structure includes:
[0013] The dielectric layer on the peripheral side of the top of the metal structure is bombarded to obtain a groove arranged around the top of the metal structure, and the conductive layer is in contact with the metal structure.
[0014] According to one embodiment of the present application, the contact structure further includes an adhesion layer, and the adhesion layer is located on the peripheral side and the bottom of the metal structure;
[0015] The bombarding of the film layer on the top peripheral side of the contact structure also includes:
[0016] The adhesion layer on the top peripheral side of the metal structure is bombarded.
[0017] According to an embodiment of the present application, before bombarding the film layer on the top peripheral side of the contact structure, the method further includes:
[0018] The dielectric layer and the contact structure are subjected to chemical mechanical polishing.
[0019] According to one embodiment of the present application, the inert gas includes argon or helium; and / or,
[0020] The bombardment power is 100-2000W; and / or,
[0021] The flow rate of the inert gas is 2-15 Sccm; and / or,
[0022] The depth of the groove is 50-500 angstroms.
[0023] In a second aspect, the present application provides a semiconductor device, comprising:
[0024] a substrate including a conductive structure;
[0025] A dielectric layer, located on the substrate;
[0026] A contact structure, penetrating the dielectric layer, wherein the bottom of the contact structure is connected to the conductive structure;
[0027] The conductive layer is located on the contact structure, is arranged around the circumference of the top of the contact structure, and is in contact with the contact structure.
[0028] According to one embodiment of the present application, the contact structure includes a metal structure penetrating the dielectric layer;
[0029] The conductive layer is located on the metal structure, is arranged around the circumference of the top of the metal structure, and is in contact with the metal structure.
[0030] According to an embodiment of the present application, the contact structure further includes an adhesion layer, wherein the adhesion layer is located at the bottom of the conductive layer and at the peripheral side and bottom of the metal structure.
[0031] According to an embodiment of the present application, the height of the conductive layer on the peripheral side of the contact structure is 50-500 angstroms.
[0032] According to an embodiment of the present application, the conductive structure includes a resistor and any one of a source, a drain, and a gate of a transistor.
[0033] The above one or more technical solutions in the embodiments of the present application have at least one of the following technical effects:
[0034] The film layer on the periphery of the top of the contact structure is bombarded with inert gas to obtain a groove arranged around the top of the contact structure to expose more of the contact structure, and a conductive layer is formed on the contact structure, and the conductive layer fills the groove to increase the contact area between the conductive layer and the contact structure, reduce the contact resistance of the contact structure, and improve the electrical performance of the semiconductor device.
[0035] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0037] Figure 1 It is a schematic flow chart of a method for manufacturing a semiconductor device provided in an embodiment of the present application;
[0038] Figure 2 is a schematic structural diagram of a semiconductor device provided in an embodiment of the present application;
[0039] Figure 3 It is one of the scanning electron microscope (SEM) slice images of the metal structure in the semiconductor device provided in the embodiment of the present application;
[0040] Figure 4 This is the second SEM slice image of the metal structure in the semiconductor device provided in the embodiment of the present application;
[0041] Figure 5 It is a schematic diagram comparing the resistance of the semiconductor device provided in the embodiment of the present application and the contact structure in the related art;
[0042] Figure 6 This is one of the SEM slice images of the conductive layer in the semiconductor device provided in the embodiment of the present application;
[0043] Figure 7 This is the second SEM slice image of the conductive layer in the semiconductor device provided in the embodiment of the present application. DETAILED DESCRIPTION
[0044] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.
[0045] The following describes a method for manufacturing a semiconductor device and a semiconductor device provided in an embodiment of the present application with reference to the accompanying drawings.
[0046] Figure 1 A schematic flow chart of a method for manufacturing a semiconductor device provided in an embodiment of the present application.
[0047] like Figure 1 As shown, the method for manufacturing a semiconductor device provided in an embodiment of the present application includes steps 110 to 140.
[0048] Step 110: providing a substrate and a dielectric layer on the substrate, wherein the substrate includes a conductive structure.
[0049] Combination Figure 2 As shown, a substrate 1 is formed first, and the substrate 1 includes a conductive structure.
[0050] In some embodiments, the conductive structure includes a resistor and any one of a source, a drain, and a gate of a transistor.
[0051] For example Figure 2 As shown, the base 1 may include a substrate 11. The substrate 11 may be a silicon substrate or a semiconductor substrate including other elements.
[0052] Ion doping is performed on a specific region of the substrate 11 to form a resistor 12 , a source electrode 13 , and a drain electrode 14 . The resistor 12 , the source electrode 13 , and the drain electrode 14 are disposed close to the upper surface of the substrate 11 .
[0053] The substrate 1 may further include a gate structure, which is located on the substrate 11 between the source 13 and the drain 14. The gate structure includes a gate oxide layer and a gate 15, wherein the gate oxide layer is located on the substrate 11 between the source 13 and the drain 14, and the gate 15 is located on the gate oxide layer. The source 13, the drain 14 and the gate structure may constitute a transistor. The gate may include polysilicon or the like.
[0054] The conductive structure in the substrate 1 may include a resistor 12 , a source 13 , a drain 14 or a gate 15 .
[0055] In some embodiments, the substrate 1 may further include an ohmic contact layer 16. The ohmic contact layer 16 covers the resistor 12, the source electrode 13, the drain electrode 14 and the gate electrode respectively to form ohmic contacts with the resistor 12, the source electrode 13, the drain electrode 14 and the gate electrode respectively. The ohmic contact layer 16 may include a silicon-metal compound.
[0056] After the substrate 1 is formed, a dielectric layer 2 is formed on the substrate 1 by using a thin film deposition process, and the dielectric layer 2 covers the conductive structure in the substrate 1 .
[0057] In some embodiments, the dielectric layer 2 may include a first dielectric sublayer 21 and a second dielectric sublayer 22 , wherein the first dielectric sublayer 21 covers the conductive structure in the substrate 1 , and the second dielectric sublayer 22 covers the first dielectric sublayer 21 .
[0058] First, a thin film deposition process is used to form a first dielectric sublayer 21 on the substrate 1, and the first dielectric sublayer 21 covers the resistor 12, the source 13, the drain 14 and the gate 15. Then, a thin film deposition process is used to form a second dielectric sublayer 22 on the first dielectric sublayer 21, and the upper surface of the second dielectric sublayer 22 is a plane. The first dielectric sublayer 21 may include silicon nitride, etc., and the second dielectric sublayer 22 may include silicon oxide, etc.
[0059] Step 120 : forming a contact structure penetrating the dielectric layer, wherein the bottom of the contact structure is connected to the conductive structure.
[0060] Combination Figure 2 As shown, a contact hole is first formed through the dielectric layer 2, and the contact hole exposes the conductive structure in the substrate 1. Then, a contact structure 3 is formed in the contact hole, and the bottom of the contact structure 3 is connected to the conductive structure. The bottom of the contact structure 3 can be connected to the resistor 12, the source 13, the drain 14 or the gate 15 in the substrate 1.
[0061] In some embodiments, a plurality of contact structures 3 penetrating the dielectric layer 2 may be formed in step 120 , and the bottoms of the plurality of contact structures 3 may be connected to the resistor 12 , the source 13 , the drain 14 , and the gate 15 , respectively.
[0062] In the case where the substrate 1 further includes an ohmic contact layer 16 , the plurality of contact structures 3 are correspondingly connected to the resistor 12 , the source 13 , the drain 14 , and the gate 15 through the ohmic contact layer 16 .
[0063] In some embodiments, the contact structure 3 includes a metal structure 31, and the metal structure 31 penetrates the dielectric layer 2. After a contact hole penetrating the dielectric layer 2 is formed, the metal structure 31 is filled in the contact hole.
[0064] In some embodiments, the contact structure 3 further includes an adhesion layer 32, that is, the contact structure 3 includes an adhesion layer 32 and a metal structure 31. The adhesion layer 32 is located on the periphery and bottom of the metal structure 31, that is, the adhesion layer 32 is located between the metal structure 31 and the dielectric layer 2. After forming a contact hole penetrating the dielectric layer 2, the adhesion layer 32 is first formed on the inner surface of the contact hole (including the sidewall and bottom of the contact hole). Then, the metal structure 31 is filled in the contact hole.
[0065] The adhesion layer 32 may include a stacked structure of a titanium layer and a titanium nitride layer. The metal structure 31 may include a metal such as tungsten. The adhesion layer 32 is used to prevent the diffusion of metal tungsten.
[0066] In some embodiments, the method for manufacturing the semiconductor device further includes:
[0067] Chemical mechanical polishing of dielectric layers and contact structures.
[0068] Since the dielectric layer 2 and the contact structure 3 (including the adhesion layer 32 and the metal structure 31) are made of different materials, the grinding rates of the dielectric layer 2, the adhesion layer 32 and the metal structure 31 are different. The grinding rates of the dielectric layer 2 and the adhesion layer 32 are greater than the grinding rate of the contact structure 3, resulting in that after chemical mechanical grinding, part of the metal structure 31 protrudes from the upper surface of the dielectric layer 2. Moreover, the heights of the metal structures 31 protruding from the dielectric layer 2 in the contact structures 3 with different distribution densities are different. Figure 3 and Figure 4 As shown, Figure 3 is a slice diagram of a metal structure 31 in a single contact structure 3, Figure 4 is a slice diagram of the metal structure 31 in the densely distributed contact structure 3. It can be seen that the height of the metal structure 31 in the densely distributed contact structure 3 protruding from the dielectric layer 2 is greater than the height of the metal structure 31 in the single contact structure 3 protruding from the dielectric layer 2.
[0069] Step 130 : Use an inert gas to bombard the film layer around the top of the contact structure to obtain a groove arranged around the top of the contact structure.
[0070] Based on the re-sputtering process, an inert gas is used to bombard the film layer around the top of the contact structure, that is, to remove the film layer around the top of the contact structure, and obtain a groove set around the top of the contact structure to expose more contact structures.
[0071] In some embodiments, the inert gas includes argon or helium, among others.
[0072] In some embodiments, the bombardment power is 100-2000W.
[0073] In some embodiments, the flow rate of the inert gas is 2-15 Sccm.
[0074] In some embodiments, the contact structure 3 includes a metal structure 31 penetrating the dielectric layer 2. Step 130 of bombarding the film layer around the top of the contact structure to obtain a groove around the top of the contact structure includes:
[0075] The dielectric layer on the peripheral side of the top of the metal structure is bombarded to obtain a groove arranged around the top of the metal structure.
[0076] The dielectric layer 2 on the top peripheral side of the metal structure 31 can be bombarded by inert gas, that is, the dielectric layer 2 on the top peripheral side of the metal structure 31 can be removed to form a groove. The groove is located in the dielectric layer 2 and is arranged around the top of the metal structure 31 to expose the upper surface and the top peripheral side of the metal structure 31.
[0077] In some embodiments, the contact structure 3 further includes an adhesion layer 32, that is, the contact structure 3 includes a metal structure 31 and an adhesion layer 32. The bombardment of the film layer on the top peripheral side of the contact structure in step 130 also includes:
[0078] The adhesive layer on the top side of the metal structure is bombarded.
[0079] The inert gas can be used to bombard the adhesive layer 32 and the dielectric layer 2 on the top peripheral side of the metal structure 31, that is, to remove the adhesive layer 32 and the dielectric layer 2 on the top peripheral side of the metal structure 31 to form a groove. The groove is located in the adhesive layer 32 and the dielectric layer 2, and is set around the top of the metal structure 31 to expose the upper surface and the top peripheral side of the metal structure 31.
[0080] Compared with the related art that only exposes the upper surface of the metal structure, the present embodiment bombards the film layer on the top side of the metal structure 31, which can expose more metal structures 31 and increase the exposed area of the metal structure. In addition, after chemical mechanical polishing, the metal structures in the contact structures with different distribution densities protrude from the dielectric layer 2 at different heights, resulting in electrical differences in contact resistance between contact structures with different distribution densities. In order to reduce the contact resistance and reduce the electrical difference, the related art increases the degree of grinding of the dielectric layer, increases the duration of the chemical mechanical polishing process, and increases the process cost. However, in the present embodiment, after chemical mechanical polishing, the film layer on the top side of the metal structure 31 is bombarded to reduce the height difference of the metal structure 31 protruding from the dielectric layer 2 in the contact structures 3 with different distribution densities, thereby reducing the electrical difference in contact resistance of the contact structures 3 with different distribution densities, and there is no need to grind the dielectric layer too much, which reduces the process duration of chemical mechanical polishing and thus reduces the process cost.
[0081] In some embodiments, the depth of the groove is 50-500 angstroms, that is, the exposed height of the contact structure 3 is 50-500 angstroms.
[0082] Step 140 : forming a conductive layer on the contact structure, wherein the conductive layer fills the groove and contacts the contact structure.
[0083] First, an insulating layer is formed on the dielectric layer 2 by using a thin film deposition process. Then, an opening is formed through the dielectric layer 2, and the opening corresponds to the position of the contact structure 3, and the opening is connected to the groove. Then, a conductive layer 4 is formed in the opening and the groove. The conductive layer 4 contacts the upper surface of the metal structure 31 in the contact structure 3, and contacts the top peripheral side surface of the metal structure 31. Among them, the insulating layer may include silicon oxide.
[0084] In some embodiments, the conductive layer 4 may include a metal layer and a barrier layer, and the barrier layer is located on the periphery and bottom of the metal layer. After forming an opening penetrating the dielectric layer 2, a barrier layer is first formed on the sidewalls and bottom of the opening and the groove, and then the metal layer is filled in the opening and the groove. The barrier layer may include a stacked structure of a tantalum nitride layer and a tantalum layer, and the metal layer may include a metal such as copper.
[0085] It should be noted that the calculation formula of the resistance R is R=(ρ / t)*(L / W). Where ρ is the resistivity, t is the height, L is the length, and W is the width. The contact resistance R of the contact structure 3 c The calculation formula is R c =R sali +R Ti +R TiN +R W +R barrier +R cu +R interface Among them, R sali is the resistance of the ohmic contact layer 16 connected to the contact structure 3, R Ti is the resistance of the titanium (Ti) layer in the adhesion layer 32 of the contact structure 3, R TiN is the resistance of the titanium nitride (TiN) layer in the adhesion layer 32 of the contact structure 3, R W is the resistance of the metal structure 31 (such as tungsten W) of the contact structure 3, R barrier is the resistance of the barrier layer in the conductive layer 4, R cu is the resistance of the metal layer (such as copper Cu) in the conductive layer 4, R interface is the contact surface resistance at the bottom and top of the contact structure 3.
[0086] It can be seen from the two formulas that, when the length and width of the bottom of the metal structure 31 are fixed, reducing the height of the metal structure 31 has little effect on the contact resistance of the contact structure 3. By reducing the contact surface resistance at the bottom and / or top of the contact structure 3, the contact resistance of the contact structure 3 can be effectively reduced.
[0087] Compared with the related art in which the conductive layer only contacts the upper surface of the metal structure, the conductive layer 4 in this embodiment contacts the upper surface of the metal structure 31 and the surrounding side surfaces of the top of the metal structure 31, thereby increasing the contact area between the conductive layer 4 and the metal structure 31, thereby reducing the contact resistance between the top of the contact structure 3 and the conductive layer 4, thereby reducing the contact resistance of the contact structure 3 and improving the electrical performance of the device.
[0088] like Figure 5 As shown, Figure 5 It is a comparison diagram of the contact resistance of the contact structure in this embodiment and related technology one and related technology two. Among them, the conductive layer 4 in this embodiment is in contact with the upper surface of the metal structure 31 and the top peripheral side of the metal structure 31. The difference between related technology one and this embodiment is that the conductive layer in the related technology is only in contact with the upper surface of the metal structure. The difference between related technology two and related technology one is that the height of the metal structure in related technology two is less than the height of the metal structure in related technology one. For test structures A to test structures H, the resistance of the contact structures in this embodiment, related technology one and related technology two are detected respectively. Among them, the conductive structures connected to the bottom of the contact structures in test structures A to test structures H are different.
[0089] Depend on Figure 5 It can be seen that the contact resistance of the contact structure in Related Technology 1 and Related Technology 2 is greater than the target resistance, and the contact resistance of the contact structure in this embodiment is closest to the target resistance, which effectively reduces the contact resistance of the contact structure compared with Related Technology 1 and Related Technology 2.
[0090] In addition, in order to reduce the contact surface resistance between the contact structure and the conductive layer, the related art uses an inert gas to bombard the opening 40 after forming the opening 40 through the insulating layer, and the bombardment power is high, which easily leads to an uneven bottom of the opening 40, such as Figure 6 As shown, the electrical performance of the device is affected. In this embodiment, in step 130, the film layer around the top of the metal structure 31 is bombarded to increase the contact area between the metal structure 31 and the conductive layer 4 to reduce the contact resistance of the contact structure 3. In step 140, there is no need to use a high power to bombard the opening 40, that is, the power of bombarding the opening 40 is reduced to optimize the morphology of the opening 40, as shown in FIG. Figure 7 As shown, the flatness of the bottom of the opening 40 is improved, thereby improving the electrical performance of the device.
[0091] To summarize, according to the method for manufacturing a semiconductor device provided in an embodiment of the present application, the film layer on the surrounding side of the top of the contact structure 3 is bombarded with an inert gas to obtain a groove arranged around the top of the contact structure 3 to expose more of the contact structure 3, and a conductive layer 4 is formed on the contact structure 3, and the conductive layer 4 fills the groove to increase the contact area between the conductive layer 4 and the contact structure 3, thereby reducing the contact resistance of the contact structure 3 and improving the electrical performance of the semiconductor device.
[0092] Correspondingly, an embodiment of the present application also provides a semiconductor device that can be manufactured using the semiconductor device manufacturing method in the above embodiment.
[0093] like Figure 2 As shown, the semiconductor device provided in the embodiment of the present application includes a substrate 1, a dielectric layer 2, a contact structure 3 and a conductive layer 4.
[0094] The substrate 1 may include a substrate 11, which may be a silicon substrate or a semiconductor substrate including other elements. The substrate 11 may include a resistor 12, a source 13, and a drain 14. The substrate 1 may also include a gate structure, which is located on the substrate 11 between the source 13 and the drain 14. The gate structure includes a gate oxide layer and a gate 15, which is located on the substrate 11 between the source 13 and the drain 14, and the gate 15 is located on the gate oxide layer. The source 13, the drain 14, and the gate structure may constitute a transistor. Among them, the gate may include polysilicon, etc.
[0095] The substrate 1 includes a conductive structure. In some embodiments, the conductive structure includes a resistor 12 and any one of a source 13, a drain 14 and a gate 15 of a transistor.
[0096] In some embodiments, the substrate 1 may further include an ohmic contact layer 16. The ohmic contact layer 16 covers the resistor 12, the source electrode 13, the drain electrode 14 and the gate electrode respectively to form ohmic contacts with the resistor 12, the source electrode 13, the drain electrode 14 and the gate electrode respectively. The ohmic contact layer 16 may include a silicon-metal compound.
[0097] The dielectric layer 2 is located on the substrate 1 and covers the conductive structure in the substrate 1. In some embodiments, the dielectric layer 2 may include a first dielectric sublayer 21 and a second dielectric sublayer 22, wherein the first dielectric sublayer 21 covers the conductive structure in the substrate 1, and the second dielectric sublayer 22 covers the first dielectric sublayer 21. The first dielectric sublayer 21 may include silicon nitride, etc., and the second dielectric sublayer 22 may include silicon oxide, etc.
[0098] The contact structure 3 penetrates the dielectric layer 2 , and the bottom of the contact structure 3 is connected to the conductive structure. The bottom of the contact structure 3 may be connected to the resistor 12 , the source 13 , the drain 14 or the gate 15 in the substrate 1 .
[0099] The number of contact structures 3 may be multiple, and the bottoms of the multiple contact structures 3 may be respectively connected to the resistor 12, the source 13, the drain 14, and the gate 15. When the substrate 1 further includes an ohmic contact layer 16, the multiple contact structures 3 are respectively connected to the resistor 12, the source 13, the drain 14, and the gate 15 through the ohmic contact layer 16.
[0100] The conductive layer 4 is located on the contact structure 3, and is disposed around the circumference of the top of the contact structure 3, and is in contact with the contact structure 3. The conductive layer 4 is in contact with the upper surface of the contact structure 3 and the circumference of the top of the contact structure 3.
[0101] The conductive layer 4 in this embodiment contacts the upper surface of the contact structure 3 and the top peripheral side surface of the contact structure 3, thereby increasing the contact area between the contact structure 3 and the conductive layer 4, reducing the contact resistance between the contact structure 3 and the conductive layer 4, and improving the electrical performance of the device.
[0102] In some embodiments, the conductive layer 4 may include a metal layer and a barrier layer, wherein the barrier layer is located around and at the bottom of the metal layer. The barrier layer may include a stacked structure of a tantalum nitride layer and a tantalum layer, and the metal layer may include metals such as copper.
[0103] In some embodiments, the contact structure 3 includes a metal structure 31 that penetrates the dielectric layer 2. The conductive layer 4 is located on the metal structure 31 and is disposed around the circumference of the top of the metal structure 31 and in contact with the metal structure 31, that is, the conductive layer 4 is in contact with the upper surface of the metal structure 31 and the circumference of the top of the metal structure 31.
[0104] In this embodiment, the conductive layer 4 contacts the upper surface of the metal structure 31 and the top peripheral side surface of the metal structure 31, thereby increasing the contact area between the metal structure 31 and the conductive layer 4, reducing the contact resistance between the contact structure 3 and the conductive layer 4, and improving the electrical performance of the device.
[0105] In some embodiments, the contact structure 3 further includes an adhesive layer 32, that is, the contact structure 3 includes an adhesive layer 32 and a metal structure 31. The adhesive layer 32 is located at the bottom of the conductive layer 4 and at the peripheral side and bottom of the metal structure 31. The conductive layer 4 covers the peripheral side surface of the top of the metal structure 31, the adhesive layer 32 covers part of the peripheral side surface of the metal structure 31 (that is, the remaining peripheral side surface of the metal structure 31 not covered by the conductive layer 4), and the adhesive layer 32 covers the bottom of the metal structure 31.
[0106] The adhesion layer 32 may include a stacked structure of a titanium layer and a titanium nitride layer. The metal structure 31 may include a metal such as tungsten. The adhesion layer 32 is used to prevent the diffusion of metal tungsten.
[0107] In some embodiments, the height of the conductive layer around the contact structure is 50-500 angstroms.
[0108] According to the semiconductor device provided by the embodiment of the present application, the conductive layer 4 is located on the contact structure 3 and is arranged around the circumference of the top of the contact structure 3, so that the conductive layer 4 is in contact with the upper surface of the contact structure 3 and the top circumference side of the contact structure 3, so as to increase the contact area between the conductive layer 4 and the contact structure 3, reduce the contact resistance of the contact structure 3, and improve the electrical performance of the semiconductor device.
[0109] The terms "first", "second", etc. in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more.
[0110] In the description of the present application, “plurality” means two or more.
[0111] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.
[0112] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.
Claims
1. A method for manufacturing a semiconductor device, characterized in that: include: Providing a substrate and a dielectric layer located on the substrate, wherein the substrate includes a conductive structure; forming a contact structure penetrating the dielectric layer, wherein the bottom of the contact structure is connected to the conductive structure; Using inert gas to bombard the film layer around the top of the contact structure to obtain a groove around the top of the contact structure; A conductive layer is formed on the contact structure, wherein the conductive layer fills the groove and contacts the contact structure.
2. The method for manufacturing a semiconductor device according to claim 1, wherein: The contact structure includes a metal structure penetrating the dielectric layer; The bombarding of the film layer around the top of the contact structure to obtain a groove around the top of the contact structure includes: The dielectric layer on the peripheral side of the top of the metal structure is bombarded to obtain a groove arranged around the top of the metal structure, and the conductive layer is in contact with the metal structure.
3. The method for manufacturing a semiconductor device according to claim 2, wherein: The contact structure further comprises an adhesive layer, and the adhesive layer is located on the peripheral side and the bottom of the metal structure; The bombarding of the film layer on the top peripheral side of the contact structure also includes: The adhesion layer on the top peripheral side of the metal structure is bombarded.
4. The method for manufacturing a semiconductor device according to claim 1, wherein: Before bombarding the film layer on the top peripheral side of the contact structure, the method further includes: The dielectric layer and the contact structure are subjected to chemical mechanical polishing.
5. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, characterized in that: The inert gas comprises argon or helium; and / or, The bombardment power is 100-2000W; and / or, The flow rate of the inert gas is 2-15 Sccm; and / or, The depth of the groove is 50-500 angstroms.
6. A semiconductor device, characterized in that: include: a substrate including a conductive structure; A dielectric layer, located on the substrate; A contact structure, penetrating the dielectric layer, wherein the bottom of the contact structure is connected to the conductive structure; The conductive layer is located on the contact structure, is arranged around the circumference of the top of the contact structure, and is in contact with the contact structure.
7. The semiconductor device according to claim 6, characterized in that The contact structure includes a metal structure penetrating the dielectric layer; The conductive layer is located on the metal structure, is arranged around the circumference of the top of the metal structure, and is in contact with the metal structure.
8. The semiconductor device according to claim 7, characterized in that The contact structure further includes an adhesion layer, which is located at the bottom of the conductive layer and at the peripheral side and bottom of the metal structure.
9. The semiconductor device according to claim 6, characterized in that The height of the conductive layer around the contact structure is 50-500 angstroms.
10. The semiconductor device according to any one of claims 6 to 9, characterized in that: The conductive structure includes a resistor and any one of a source, a drain and a gate of a transistor.