Power supply EMC conduction improvement method under HVDC input working condition

Abstract

The invention belongs to the technical field of power supplies, and discloses a power supply EMC (Electro Magnetic Compatibility) conduction improvement method under an HVDC (High Voltage Direct Current) input working condition, which comprises the following steps of: setting a maximum value and a minimum value of DC input VBUS jittering, if a target VBUS is smaller than the maximum value of the VBUS, slowly accumulating to the maximum value in a STEP (Stepped Emission Potential) increasing mode, and then slowly subtracting to the minimum value in a STEP slow subtraction mode after the target VBUS reaches the maximum value, continuously changing the target value of the VBUS in a circulating mode, and continuously changing the target value of the VBUS; the change of the VBUS target value can change the output of the voltage loop and influence the reference current, the change of the reference current can influence the output of the current loop, and finally the duty ratio of the MOS tube is changed, so that the VBUS output waveform jitters. The method has the beneficial effects that a hardware circuit does not need to be changed, only software control is needed to be changed, the cost is extremely low, the EMC under the HVDV input working condition can be improved, and the compatibility of power supply equipment to various input working conditions is higher.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply, and in particular to a method for improving EMC conduction of power supply under HVDC input conditions. Background Art

[0002] With the rapid development of society, electronic technology has been widely used in various fields, and the types of electronic equipment are increasing. Electronic equipment is becoming increasingly closely related to our lives. More importantly, it is inseparable from the support of power supply, and the quality requirements of power supply are getting higher and higher. We hope to obtain high-power power supply equipment with high power density, high efficiency, no grid pollution, and no electromagnetic interference. Therefore, EMC compatible with various input conditions has become a research direction for improving power supply performance. Most of the current power supply equipment has worse EMC under HVDC input conditions than EMC under HVAC input conditions, which is not conducive to improving the performance of power supply equipment.

[0003] Therefore, it is necessary to provide a method for improving the EMC conduction of a power supply under HVDC input conditions, which can improve the EMC under HVDV input conditions and make the power supply equipment more compatible with various input conditions. Summary of the invention

[0004] The invention discloses a method for improving EMC conduction of a power supply under HVDC input conditions, relates to the field of power supply equipment, and in particular to EMC improvement of a power supply, which can effectively solve the technical problems involved in the background technology.

[0005] To achieve the above object, the technical solution of the present invention is:

[0006] A method for improving EMC conduction of a power supply under HVDC input conditions comprises the following steps:

[0007] S1. Determine the target voltage value VBUS;

[0008] S2. Determine the voltage change range according to the target voltage value VBUS;

[0009] S3. Within the voltage change range, continuously change the set value of the target voltage value VBUS.

[0010] As a preferred improvement of the present invention: the method is used for a switching power supply circuit.

[0011] As a preferred improvement of the present invention: the primary side of the switching power supply circuit uses a PFC topology, and the secondary side uses an LLC topology.

[0012] As a preferred improvement of the present invention: the LLC topology includes but is not limited to half-bridge LLC and staggered LLC.

[0013] As a preferred improvement of the present invention: in step S2, the target voltage value VBUS plus the jitter value is the maximum value, the target voltage value VBUS minus the jitter value is the minimum value, and the voltage change range is between the maximum value and the minimum value.

[0014] As a preferred improvement of the present invention: the target voltage value VBUS is 400V, and the jitter value is 10V.

[0015] As a preferred improvement of the present invention: the step S3 is specifically that the setting value of the target voltage value VBUS gradually increases until it is equal to the maximum value, and then gradually decreases until it is equal to the minimum value, and changes in a cycle.

[0016] As a preferred improvement of the present invention: the setting value of the target voltage value VBUS is changed by 1V or 2V each time.

[0017] The beneficial effects of the present invention are as follows:

[0018] The hardware circuit does not need to be changed, only the software control needs to be modified, which is extremely low cost. It can improve the EMC under HVDV input conditions and make the power supply equipment more compatible with various input conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0020] Figure 1 This is a schematic diagram of the totem pole PFC working framework;

[0021] Figure 2 It is a schematic diagram of the working framework of half-bridge LLC;

[0022] Figure 3 The waveform diagram of VBUS under HVAC input conditions is shown below;

[0023] Figure 4 The waveform diagram of VBUS under HVDC input condition;

[0024] Figure 5 Schematic diagram of waveform after using the method of the present invention. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0027] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0028] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0029] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0030] See also Figure 1-Figure 2 As shown, a schematic diagram of a working framework taking a totem pole PFC and a half-bridge LLC as examples is shown. The present invention provides a method for improving the EMC conduction of a power supply under HVDC input conditions, which is applicable to the technical field of switching power supplies and to the EMC conduction improvement of all switching power supplies. The primary side uses a PFC topology and the secondary side uses an LLC topology, including all LLC topologies such as a half-bridge LLC and an interleaved LLC. The method specifically includes the following steps:

[0031] S1. Determine the target voltage value VBUS according to the output and load requirements;

[0032] S2. Determine the voltage change range according to the target voltage value VBUS. The target voltage value VBUS plus the jitter value is the maximum value, and the target voltage value VBUS minus the jitter value is the minimum value. The voltage change range is between the maximum value and the minimum value. In this embodiment, the target voltage value VBUS is 400V and the jitter value is 10V.

[0033] S3. Within the voltage change range, the set value of the target voltage value VBUS is continuously changed. The set value of the target voltage value VBUS is gradually increased until it is equal to the maximum value, and then gradually decreased until it is equal to the minimum value, and the change is cyclic. The set value of the target voltage value VBUS is changed by 1V or 2V each time.

[0034] Figure 1 In the embodiment, the input end is connected to the filter circuit, the positive end of the filter circuit output is connected to the positive end of the diode and one end of the resistor RS2, the other end of the resistor RS2 is connected to one end of the inductor L2, the other end of the inductor L2 is connected to the source of the MOS tube Q1 and a diode, the negative end of the diode D1 is connected to the negative end of the diode D2, the drain of the MOS tube Q1, the drain of the MOS tube Q3, one end of the capacitor C1 and one end of the load R1, which is the output of the PFC, that is, VBUS, the negative end of the filter circuit output is connected to the positive end of the diode D2, the source of the MOS tube Q3 and the drain of the MOS tube Q4, the source of the MOS tube Q2 is connected to the source of the MOS tube Q4, the other end of the capacitor C1 and the other end of the load R1, and the MUC samples the input voltage, input current and output voltage, and controls the MOS tubes Q1-Q4. Figure 2 In the embodiment, the positive input end is connected to the drain of the MOS tube Q11 and the negative end of the diode D11, the negative input end is connected to the source of the MOS tube Q12, the positive end of the diode D12, the pin 2 of the transformer T1 and the port GND, the source of the MOS tube Q11 is connected to the positive end of the diode D11, the drain of the MOS tube Q12, the negative end of the diode D12 and one end of the capacitor Cr, the other end of the capacitor Cr is connected to one end of the inductor Lr, the other end of the inductor Lr is connected to the pin 1 of the transformer T1, the pin 3 of the transformer T1 is connected to the positive end of the diode D14, the pin 4 of the transformer T1 is connected to the pin 5 of the transformer T1, one end of the capacitor C11, one end of the output load R11 and the port AGND, the pin 6 of the transformer T1 is connected to the positive end of the diode D13, the negative end of the diode D13 is connected to the negative end of the diode D14, the other end of the capacitor C11 and the other end of the output load R11. It should be further explained that the use of other components to achieve the above-mentioned effects should all fall within the inventive concept of the present invention and should fall within the protection scope of the present invention.

[0035] Under HVAC input conditions, the PFC output VBUS is a high voltage of about 400V with a sine wave. Figure 3 , and LLC under HVAC input conditions, because VBUS is a high voltage waveform with a sine wave, LLC's operating frequency is variable frequency. Since LLC is variable frequency, it is equivalent to adding a frequency jitter function, and the high-frequency energy is dispersed. The conduction and radiation test results are very good, and the margin is sufficient. Under HVDC input conditions, the waveform of PFC's output VBUS is a high voltage DC of 400V, such as Figure 4 When LLC works under this condition, the operating frequency is relatively fixed, which is equivalent to fixed-frequency operation. The energy of conduction and radiation under high frequency is relatively concentrated and cannot be dispersed, so the EMC test effect is worse than that under HVAC input conditions. In order to allow LLC to work at variable frequency under HVDC input, the output waveform of VBUS under HVAC input conditions can be simulated, that is, a jitter countermeasure is added to VBUS under HVDC, so that VBUS also has a jitter of plus or minus 10V, such as Figure 5 As shown, because the VBUS waveform changes from a high-voltage DC waveform to a high-voltage 400V waveform similar to a sine wave under HVAC, and the LLC operating frequency changes from a fixed frequency to a variable frequency, the high-frequency energy of EMC will be dispersed, and the conduction and radiation will be improved, which can basically be improved by more than 8db. After testing, under HVDC, if the method of the present invention is not used, the worst EMC result is -3db; after the method of the present invention is used, the worst EMC result is -12db.

[0036] Working principle:

[0037] Set the maximum and minimum values ​​of the DC input VBUS jitter. If the target VBUS is smaller than the maximum value of VBUS, slowly accumulate to the maximum value through STEP increase, and then slowly subtract from STEP to the minimum value after reaching the maximum value. Change the target value of VBUS in a continuous cycle. Changing the target value of VBUS will change the output of the voltage loop and affect the reference current. The change of the reference current will affect the output of the current loop, and finally change the duty cycle of the MOS tube, thereby causing the VBUS output waveform to jitter.

[0038] Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and the embodiments. They can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A method for improving EMC conduction of power supply under HVDC input conditions, characterized in that: The following steps are involved: S1. Determine the target voltage value VBUS; S2. Determine the voltage change range according to the target voltage value VBUS; S3. Within the voltage change range, continuously change the set value of the target voltage value VBUS.

2. The method for improving power supply EMC conduction under HVDC input conditions according to claim 1, characterized in that: The method is used in a switching power supply circuit.

3. The method for improving power supply EMC conduction under HVDC input conditions according to claim 2, characterized in that: The switching power supply circuit uses a PFC topology on the primary side and an LLC topology on the secondary side.

4. The method for improving power supply EMC conduction under HVDC input conditions according to claim 3, characterized in that: The LLC topologies include, but are not limited to, half-bridge LLC and interleaved LLC.

5. The method for improving power supply EMC conduction under HVDC input conditions according to claim 1, characterized in that: In step S2, the target voltage value VBUS plus the jitter value is the maximum value, the target voltage value VBUS minus the jitter value is the minimum value, and the voltage change range is between the maximum value and the minimum value.

6. The method for improving EMC conduction of power supply under HVDC input condition according to claim 5, characterized in that: The target voltage value VBUS is 400V, and the jitter value is 10V.

7. The method for improving EMC conduction of power supply under HVDC input condition according to claim 5, characterized in that: Specifically, the step S3 is as follows: the setting value of the target voltage value VBUS is gradually increased until it is equal to the maximum value, and then gradually decreased until it is equal to the minimum value, and the change is repeated.

8. The method for improving power supply EMC conduction under HVDC input conditions according to claim 7, characterized in that: The setting value of the target voltage VBUS is changed by 1V or 2V each time.

Images