High-speed Transmission Stability Control Method and Device for FPC High-performance Computing Chip Interface

Abstract

The present invention relates to a method and device for controlling the high-speed transmission stability of an FPC high-performance computing chip interface. The method includes: performing dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model; dividing the control nodes into regions to obtain a signal modulation region, a signal compensation region, and a signal demodulation region; performing real-time sampling and analysis on signal quality parameters to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data; performing multi-scale analysis to obtain hierarchical control parameters; performing protective edge wrapping and automatic bending on the FPC physical structure to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit to obtain electrical optimization parameters; establishing a performance evaluation model, and performing iterative optimization on the FPC interface coupling model to obtain a control optimization strategy. The present invention effectively solves the problem of stress concentration during the physical deformation of the FPC and prolongs the service life of the interface.

Description

Technical Field

[0001] The present invention relates to the technical field of interface transmission, and particularly relates to a method and device for controlling the high-speed transmission stability of an FPC high-performance computing chip interface. Background Art

[0002] Traditional FPC interfaces face problems such as poor signal integrity, large timing jitter, and severe crosstalk interference during high-speed transmission, which seriously affect the stable operation of high-performance computing chips and the reliability of data transmission.

[0003] Currently, the design of FPC interfaces mainly adopts static compensation and fixed parameter configuration methods, lacking the ability to monitor signal quality in real time and dynamically adjust. At the same time, the existing FPC interfaces often neglect the influence of mechanical stress on signal transmission in the physical structure design, resulting in signal distortion and transmission interruption easily occurring in actual applications. Summary of the Invention

[0004] The main object of the present invention is to provide a method and device for controlling the high-speed transmission stability of an FPC high-performance computing chip interface. The present invention effectively solves the stress concentration problem during the physical deformation of the FPC and extends the service life of the interface.

[0005] To achieve the above object, the present invention provides a method for controlling the high-speed transmission stability of an FPC high-performance computing chip interface, including the following steps:

[0006] Perform dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model;

[0007] Divide the control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region;

[0008] Based on the signal modulation region, the signal compensation region, and the signal demodulation region, perform real-time sampling analysis on signal quality parameters to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data;

[0009] Input the signal integrity data, the timing jitter data, the crosstalk level data, and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters;

[0010] According to the long-term prediction parameters in the hierarchical control parameters, perform protective edge wrapping and automatic bending treatment on the FPC physical structure to obtain mechanical constraint parameters, and perform compensation treatment on the signal transmission circuit according to the medium-term compensation parameters and short-term adjustment parameters to obtain electrical optimization parameters;

[0011] Based on the mechanical constraint parameters and the electrical optimization parameters, a performance evaluation model is established to iteratively optimize the FPC interface coupling model, and a control optimization strategy is obtained.

[0012] The present invention also provides a high-speed transmission stability control device for an FPC high-performance computing chip interface, including:

[0013] A forming module for dynamically bending and three-dimensionally forming the physical transmission layer and the signal control layer to obtain an FPC interface coupling model;

[0014] A partitioning module for partitioning control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region;

[0015] A sampling module for performing real-time sampling and analysis of signal quality parameters based on the signal modulation region, the signal compensation region, and the signal demodulation region to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data;

[0016] An analysis module for inputting the signal integrity data, the timing jitter data, the crosstalk level data, and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters;

[0017] A processing module for performing protective edge wrapping and automatic bending on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit according to the medium-term compensation parameters and short-term adjustment parameters to obtain electrical optimization parameters;

[0018] An optimization module for establishing a performance evaluation model based on the mechanical constraint parameters and the electrical optimization parameters to iteratively optimize the FPC interface coupling model and obtain a control optimization strategy.

[0019] The present invention also provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the steps of the method described in any one of the above are implemented.

[0020] The present invention also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described in any one of the above are implemented.

[0021] In summary, the technical solution provided by the present invention realizes the precise modeling and physical property optimization of the FPC interface by establishing a coupling model between the physical transmission layer and the signal control layer and combining the dynamic bending three-dimensional forming technology, enabling the FPC interface to have better mechanical stability and signal transmission performance during high-speed transmission. By adopting a multi-level random error management model based on the ASIL standard, real-time monitoring and multi-scale analysis of signal quality parameters are carried out, effectively reducing signal distortion and timing jitter during high-speed transmission. A partition control architecture including a signal modulation region, a signal compensation region, and a signal demodulation region is designed, and through collaborative optimization between regions, the integrity and anti-interference ability of signal transmission are significantly improved. Innovatively, physical constraint parameters and electrical optimization parameters are combined to establish a complete performance evaluation system, and through iterative optimization and adaptive adjustment, the long-term stable operation of the FPC interface in a complex working environment is ensured. The parameter optimization strategy based on the genetic algorithm realizes intelligent adjustment of the control parameters of the FPC interface, greatly improving the adaptive ability and control accuracy of the system. By introducing flexible circuit board protective edge wrapping and automatic bending technology, the stress concentration problem during the physical deformation of the FPC is effectively solved, and the service life of the interface is extended. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic diagram of the steps of a method for controlling the high-speed transmission stability of an FPC high-performance computing chip interface in an embodiment of the present invention;

[0023] Figure 2 is a block diagram of the structure of a device for controlling the high-speed transmission stability of an FPC high-performance computing chip interface in an embodiment of the present invention;

[0024] Figure 3 is a schematic block diagram of the structure of a computer device in an embodiment of the present invention.

[0025] The realization, functional features, and advantages of the objectives of the present invention will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] In order to make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0027] Referring to Figure 1 , this embodiment provides a method for controlling the high-speed transmission stability of an FPC high-performance computing chip interface, including the following steps:

[0028] S1, perform dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model;

[0029] Among them, when selecting the FPC base material, the high-temperature-resistant material and the corrosion-resistant material are mixed according to a preset ratio to ensure that the base material has sufficient high-temperature resistance and corrosion resistance. The interface of the high-performance computing chip requires stable performance even in extreme environments. Therefore, the selection of the FPC base material is crucial. The mixed material is precisely formulated to form a base material suitable for high-speed signal transmission and durability. The FPC base material is laminated using a multi-layer alignment lamination process. This lamination process can increase the strength and stability of the material and ensure that the signal transmission between layers is not disturbed, providing a physical guarantee for subsequent signal transmission. The obtained physical transmission layer is the first-layer basic structure of the FPC. The conductive metal material is subjected to HDI (High Density Interconnect) wiring treatment. The HDI wiring technology can effectively increase the density of the circuit, making the signal transmission path more refined, reducing signal loss and delay. HDI wiring requires a high-precision circuit layout and needs to ensure the stability and reliability of signal transmission. The metal mesh material is formed according to a preset mesh size to form an electromagnetic shielding layer. The role of the electromagnetic shielding layer is to suppress external electromagnetic interference and reduce signal crosstalk, ensuring that the signal can remain clear and stable during transmission. The design of the electromagnetic shielding layer needs to consider the mesh size, the conductive performance of the material, and the connection method between layers to provide sufficient protection and isolation effects. The impedance between the physical transmission layer and the signal control layer is calculated for matching. Since impedance mismatch often causes signal reflection and loss during the high-speed signal transmission of the FPC interface, which affects the signal quality, the impedance between the physical transmission layer and the signal control layer is calculated. The impedance matching data obtained through calculation provides a basis for subsequent impedance compensation. This process requires adjusting and optimizing the circuit design parameters, material characteristics, and interlayer structure. The impedance matching data is input into the impedance matching circuit for compensation processing to obtain impedance compensation parameters. Through impedance compensation, signal reflection and loss are effectively reduced, and the signal transmission quality is improved. Based on the impedance compensation parameters, three-dimensional bending treatment is performed on the physical transmission layer and the signal control layer. Due to the flexible characteristics of the FPC interface, it will face different mechanical deformations, such as bending or compression, in actual applications, which will affect the signal transmission performance. The three-dimensional bending treatment simulates the bending state of the FPC interface in the actual environment, so as to perform compensation adjustment in the design stage to ensure that the interface can maintain good signal transmission quality in various environments. The purpose of the three-dimensional bending treatment is to obtain the three-dimensional space positioning parameters of the physical transmission layer and the signal control layer through precise mathematical models and calculations. According to the three-dimensional space positioning parameters, the physical transmission layer, the electromagnetic shielding layer, and the signal control layer are laminated and assembled in a specific order and position to form a complete FPC interface coupling model.During the assembly process, the relative positions, stacking orders, and connection methods of each layer need to be accurately aligned and adjusted according to the aforementioned calculation parameters to ensure that there are no deviations in the signal transmission paths between the layers of the FPC interface, and that external interference can be effectively suppressed, achieving high-stability and high-performance high-speed signal transmission.

[0030] S2, divide the control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region;

[0031] Specifically, the impedance matching parameters are input into the adaptive modulation algorithm for processing. According to the impedance changes that occur during signal transmission, the modulation mode of the signal is adjusted to adapt to different transmission environments and signal characteristics. The adaptive modulation algorithm dynamically adjusts the modulation parameters of the signal based on the input impedance matching parameters. The modulation parameters include the signal amplitude modulation coefficient and the phase modulation coefficient. The amplitude modulation coefficient is used to adjust the amplitude attenuation problem that occurs during signal transmission, while the phase modulation coefficient is used to compensate for the influence brought by signal phase delay. The adjustment of these modulation parameters effectively optimizes the signal transmission effect, enabling the signal to maintain the best transmission quality when passing through different transmission paths. The modulation parameters of the signal modulation region are calculated by a feed-forward equalizer to obtain the first equalization parameter. The role of the feed-forward equalizer is to compensate for the amplitude attenuation of the signal. During high-speed transmission, due to the loss of the signal path, the amplitude of the signal often attenuates. The first equalization parameter obtained through the calculation of the feed-forward equalizer can accurately characterize the amplitude attenuation value of the signal during transmission, thereby appropriately compensating for the amplitude of the signal. The first equalization parameter is input into a decision feedback equalizer for processing to obtain the second equalization parameter. The decision feedback equalizer is used to solve the phase delay problem during signal transmission. When high-speed signals are transmitted, due to the complexity of the transmission path and the influence of interference factors, the signal will experience phase delay, which will seriously affect the signal timing and demodulation accuracy. The second equalization parameter obtained through the calculation of the decision feedback equalizer can compensate for the phase delay in signal transmission and ensure that the signal timing remains accurate. According to the first equalization parameter and the second equalization parameter, the range of the signal compensation region is defined to obtain the compensation boundary data. The compensation boundary data can help the system set an effective compensation range within the signal compensation region to ensure that the signal will not be over-compensated or under-compensated after compensation processing, thereby ensuring the accuracy and effectiveness of the compensation processing. The compensation boundary data is input into the maximum likelihood detection algorithm to divide the signal demodulation region. The maximum likelihood detection algorithm can select the most likely demodulation path from multiple candidate demodulation paths by performing probability analysis on the possible states of the signal, realizing the efficient demodulation of the signal. The role of this algorithm is to automatically select the best demodulation method according to the signal characteristics and transmission environment, thereby ensuring that the signal can be correctly restored during the demodulation process. According to the division of the demodulation region, dynamic compensation processing is performed on the demodulation region parameters to obtain the demodulation compensation coefficient. The demodulation compensation coefficient reflects the adjustment amount required during signal demodulation and can effectively correct the errors that occur during signal demodulation. According to the demodulation compensation coefficient, the wiring path of the high-speed data bus is determined to obtain the bus wiring parameters. The determination of the wiring parameters needs to comprehensively consider factors such as signal transmission characteristics, impedance matching, and signal modulation to ensure that the design of the wiring path can minimize the loss and interference in signal transmission and optimize the signal transmission effect.After optimizing the bus routing parameters, the formed routing structure can ensure that the signal transmission in each area reaches the optimal state, thus effectively guaranteeing the stability and reliability of the FPC interface during high-speed transmission, and obtaining a signal modulation area, a signal compensation area, and a signal demodulation area.

[0032] S3. Based on the signal modulation area, the signal compensation area, and the signal demodulation area, perform real-time sampling and analysis on the signal quality parameters to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data;

[0033] It should be noted that calculate the sampling rate of the output signal in the signal modulation area to obtain the reference sampling frequency data. According to the bandwidth characteristics of the signal, the reference sampling frequency needs to meet more than twice the signal bandwidth, following the requirements of the sampling theorem to ensure that the integrity of the signal is not affected by the sampling rate limitation. By calculating the bandwidth of the signal and determining the upper limit of the sampling frequency, a reliable frequency standard is provided for signal sampling. Based on the reference sampling frequency data, sample the signal waveform to obtain the original sampling data. Through signal integrity analysis of the original sampling data, signal integrity data is obtained. Signal integrity analysis will evaluate whether there are distortion, reflection, or other distortion phenomena in the signal, which will affect the accurate transmission of the signal and the final demodulation result. Perform timing analysis on the rising edge and falling edge of the signal according to the original sampling data to determine the transition time data of the signal, identify the timing error and jitter phenomena in the signal. Especially in the high-speed transmission environment, timing jitter will seriously affect the signal stability and demodulation accuracy. Based on the transition time data, calculate the timing jitter data to reveal the unstable timing situation during signal transmission. Calculate the electromagnetic field coupling strength between adjacent signal lines. Through the coupling coefficient data, analyze the crosstalk level between signal lines. Crosstalk is caused by electromagnetic coupling between signal lines, and too high a crosstalk level will lead to an increase in the signal error rate and a decrease in signal quality. Based on the original sampling data, input the Fourier transform algorithm for spectrum analysis. Through Fourier transform, the signal is converted from the time domain to the frequency domain to obtain the spectrum distribution of the signal. During high-speed signal transmission, the spectrum characteristics of the signal will be affected by the transmission medium and environmental noise. By calculating the signal power spectrum and the noise power spectrum respectively, obtain the ratio of the two, and calculate the signal-to-noise ratio data.

[0034] S4. Input the signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data into the random error management model for multi-scale analysis to obtain hierarchical control parameters;

[0035] Specifically, the random error management model is hierarchically classified. According to different error monitoring requirements and control levels, the model is divided into three different levels: the ASIL D-level error monitoring layer, the ASIL B-level error analysis layer, and the real-time compensation layer. The ASIL D-level error monitoring layer is the core level of the system, mainly responsible for real-time monitoring and classification processing of the most serious errors; the ASIL B-level error analysis layer conducts mid-term error analysis, focusing on predicting and optimizing long-term trends; the real-time compensation layer is the end of the entire control system, responsible for rapid compensation and adjustment of signals based on real-time data. These three levels work together to ensure that the system can respond to changes in signal quality in a hierarchical manner and optimize, achieving control of signal stability on different time scales. Fusion processing is performed on different types of signal quality data. The signal integrity data and the timing jitter data are fused to obtain the first eigenvector according to a ratio of 2:1. The integrity of the signal is combined with the timing stability to comprehensively evaluate the quality change of the signal during transmission. Signal integrity and timing jitter are two key factors affecting signal stability, and the fused first eigenvector can effectively characterize the mutual relationship and overall performance between the two. The crosstalk level data and the signal-to-noise ratio data are fused according to a ratio of 3:2 to obtain the second eigenvector. The mutual interference between signals and their signal-to-noise ratio conditions are comprehensively evaluated to provide data support for further error analysis. The crosstalk level and signal-to-noise ratio of the signal directly affect the transmission quality and bit error rate of the signal, and the fused second eigenvector reflects the quality characteristics of these two aspects. The first eigenvector and the second eigenvector are input into the ASIL D-level error monitoring layer for error classification. The ASIL D-level error monitoring layer adopts a three-layer neural network structure, with the number of nodes in each layer being 96, 48, and 24 respectively. The neural network structure can perform in-depth learning and classification processing on the input eigenvectors through complex non-linear mapping, so as to accurately identify potential error types in signal transmission. In this level, the training and adjustment of the neural network can achieve high-precision error detection and classification, helping the system accurately identify serious errors or distortion phenomena in the signal, and taking different optimization measures according to the classification results. The error feature classification data is input into the ASIL B-level error analysis layer for long-term trend analysis. The ASIL B-level error analysis layer adopts a long short-term memory network (LSTM) structure, which contains 128 memory units and is used to predict and analyze the long-term change trend of signal quality. Through the design of memory units, the LSTM structure can handle long-term dependencies in time series data and achieve long-term prediction of signal quality changes. Through the long-term trend analysis of the error feature classification data, predictions of future signal quality are provided for the system, and the response strategy of the system is adjusted according to these prediction results. The long-term prediction parameters are processed by a sliding window to obtain mid-term compensation parameters.Convert the long-term prediction results into mid-term compensation parameters that can adapt to dynamic changes, effectively avoiding the interference of outdated information caused by too long a time span, and enabling the compensation parameters to maintain high accuracy and practicality in the mid-term. The mid-term compensation parameters provide a compromise compensation scheme for the system, which can both adapt to long-term trend changes and smooth short-term fluctuations, ensuring that the system has good stability and response speed when dealing with mid-term signal quality problems. Input the mid-term compensation parameters into the real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters. The real-time compensation layer adopts a Kalman filter structure for rapid response and dynamic adjustment of signal quality. The Kalman filter can estimate the state of the signal in real time and perform dynamic compensation, quickly correcting the deviation in signal quality by processing data from different time scales. In the real-time compensation layer, the short-term adjustment parameters are continuously adjusted according to real-time data to ensure that the signal quality is corrected and optimized in a timely manner during actual transmission.

[0036] S5. Perform protective edge wrapping and automatic bending on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and perform compensation processing on the signal transmission circuit according to the mid-term compensation parameters and short-term adjustment parameters to obtain electrical optimization parameters;

[0037] Among them, according to the long-term prediction parameters, the edge of the FPC is processed with a flexible circuit board protective edge. The protective edge is an important strengthening step for the physical structure of the FPC, which can effectively improve the mechanical strength of the circuit board and prevent external physical stress from affecting the signal transmission performance. The design of the protective edge needs to consider the future signal transmission change trend provided in the long-term prediction parameters to ensure that the edge treatment can cope with the mechanical pressure and thermal stress changes that will occur in the future. After the edge treatment is completed, the obtained edge mechanical strength parameters are input into a fully automatic FPC bending machine for three-dimensional positioning processing to ensure that the FPC can be accurately aligned during the processing and automatically bent according to the needs of the physical structure to adapt to different usage environments and working conditions. Based on the three-dimensional bending parameters, the FPC physical structure is automatically bent. During the bending process, the FPC undergoes physical deformation, mainly manifested in the change of the bending angle and the generation of deformation stress. The bending angle data and the deformation stress data are important indicators for evaluating the physical characteristics of the FPC. These data will help the system understand the stress distribution that may occur during the bending of the FPC and provide a basis for subsequent mechanical constraint processing. By analyzing these data, a mechanical stress model is established to obtain mechanical constraint parameters, including elastic deformation coefficient and plastic deformation coefficient. The signal transmission circuit is compensated according to the medium-term compensation parameters and short-term adjustment parameters. The medium-term compensation parameters are mainly based on the long-term trend analysis results to compensate the amplitude of the signal and correct the problem of signal amplitude decrease caused by the attenuation phenomenon during the signal transmission process. The amplitude compensation coefficient is accurately calculated and adjusted according to the signal amplitude change in different signal transmission regions. This compensation processing can ensure that the signal maintains a stable strength during transmission and avoid error codes or signal loss caused by attenuation. At the same time, the short-term adjustment parameters are used to compensate the phase of the signal. Phase compensation is to solve the problem of phase shift that occurs during signal transmission, especially in a high-speed transmission environment, where the phase delay of the signal leads to timing errors and signal distortion. By calculating the phase compensation coefficient, dynamic adjustment is performed during signal transmission to correct the phase error and improve the timing accuracy and transmission stability of the signal. The amplitude compensation coefficient and the phase compensation coefficient are input into the signal equalizer, and the equalizer adjusts its parameters according to these coefficients to improve the signal quality. The signal equalizer optimizes the signal as a whole by adjusting the amplitude and phase to ensure that the signal can be transmitted in an optimal state in a complex electrical environment. The equalizer coefficients are adjusted according to the real-time feedback and signal changes to ensure that the signal always maintains the best transmission quality. To cope with the dynamic signal environment changes, the equalizer coefficients are dynamically optimized. By real-time collecting the feedback data of the signal, the equalizer can continuously optimize its processing parameters during signal transmission, adjust the feedforward and feedback equalization strategies, and adapt to different electrical interferences and transmission environments.The optimization process includes two parts: feedforward equalization and feedback equalization. Feedforward equalization compensates in advance by predicting the change trend of the signal; feedback equalization adjusts the equalizer parameters in real time based on the feedback data received during the actual transmission process to quickly respond to changes in signal quality, and obtains the electrical optimization parameters.

[0038] S6. Based on the mechanical constraint parameters and the electrical optimization parameters, establish a performance evaluation model, and perform iterative optimization on the FPC interface coupling model to obtain a control optimization strategy.

[0039] Specifically, mechanical damage analysis of the FPC interface is carried out according to mechanical constraint parameters. By evaluating factors such as mechanical stress, bending, and vibration that the FPC interface encounters during actual use, the degree of physical damage is predicted to obtain damage level parameters, reflecting the damage conditions of the FPC interface under different working conditions. At the same time, signal performance analysis of the FPC interface is carried out based on electrical optimization parameters. Signal performance analysis mainly focuses on the transmission quality of signals, including signal integrity, timing stability, crosstalk situation, etc. Through analysis, performance level parameters are obtained to quantify electrical problems such as distortion and attenuation that occur during signal transmission and evaluate the impact of these problems on the overall system performance. The damage level parameters and performance level parameters are input into the performance evaluation model for comprehensive analysis. The performance evaluation model is a multi-dimensional model that comprehensively considers physical and electrical factors and can integrate the impacts of both mechanical and electrical aspects to obtain a system evaluation score, reflecting the comprehensive performance level of the FPC interface in the actual working environment. Based on the system evaluation score, the performance of the FPC interface is classified to obtain a performance classification matrix. This matrix includes physical performance levels and electrical performance levels, used to intuitively display the comprehensive performance of the FPC interface in the physical and electrical dimensions. According to the performance classification matrix, differential optimization is carried out on the FPC interface coupling model. Different optimization strategies are adopted for FPC interfaces with different performance levels to achieve the optimal system performance. An optimization objective function is constructed, which includes physical optimization terms and electrical optimization terms. The physical optimization terms target the mechanical properties of the FPC interface, such as material selection, structure optimization, adjustment of bending angles, etc.; the electrical optimization terms mainly focus on signal transmission characteristics, such as signal attenuation, timing jitter, crosstalk, etc. By combining these two optimization terms into the optimization objective function and considering the physical and electrical performance of the FPC interface, multi-dimensional optimization of the FPC interface is achieved. The optimization objective function is input into the genetic algorithm for parameter optimization. The genetic algorithm is an optimization algorithm that simulates natural selection and genetic mechanisms. By continuously iterating and selecting, the optimal parameter combination is found. In this process, the genetic algorithm explores the physical and electrical optimization terms and gradually approaches the optimal solution. Through multiple generations of evolution of the genetic algorithm, an optimization coefficient matrix is obtained. This matrix contains various optimization parameters of the FPC interface coupling model, representing the optimal adjustment values in terms of physical and electrical performance. The parameters of the FPC interface coupling model are adjusted according to the optimization coefficient matrix to achieve the optimization of the physical structure and electrical characteristics of the FPC interface. The adjusted FPC interface undergoes a round of iterative optimization to obtain physical parameter optimization values and electrical parameter optimization values, which are used to guide the next round of optimization process. Through continuous parameter adjustment and optimization, the various performances of the FPC interface will be continuously improved to meet the performance standards required by the system. Convergence analysis is carried out on the iterative optimization results to verify whether the optimization algorithm has found the optimal solution within a limited number of iterations, avoiding waste of computing resources or overfitting phenomena caused by excessive iterations.The convergence analysis is judged by calculating the relative error value and the iteration step value. The relative error value reflects the difference between the current optimization result and the target value, while the iteration step value indicates the improvement amplitude brought by each iteration. By analyzing these parameters, it is judged whether the optimization process has converged to the optimal solution, and it is decided whether further adjustment or termination of the optimization is needed. The convergence judgment parameters, the optimized values of physical parameters, and the optimized values of electrical parameters are combined in a strategy to obtain the final control optimization strategy.

[0040] In an example, dynamic bending three-dimensional forming is performed on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model, including:

[0041] The high-temperature resistant material and the corrosion-resistant material are mixed and processed according to a preset ratio to obtain an FPC base material, and the FPC base material is laminated through a multi-layer alignment lamination process to obtain a physical transmission layer;

[0042] The conductive metal material is subjected to HDI wiring processing to obtain a signal control layer, and the metal mesh material is formed according to a preset mesh size to obtain an electromagnetic shielding layer;

[0043] The impedance between the physical transmission layer and the signal control layer is calculated for matching to obtain impedance matching data, and the impedance matching data is input into an impedance matching circuit for compensation processing to obtain impedance compensation parameters;

[0044] Based on the impedance compensation parameters, three-dimensional bending processing is performed on the physical transmission layer and the signal control layer to obtain three-dimensional space positioning parameters, and the physical transmission layer, the electromagnetic shielding layer, and the signal control layer are laminated and assembled according to the three-dimensional space positioning parameters to obtain an FPC interface coupling model.

[0045] In this example, a high-temperature resistant material and a corrosion-resistant material are mixed according to a preset ratio to obtain an FPC base material. The high-temperature resistant material selects some polyimide (PI) materials with good thermal stability, while the corrosion-resistant material is usually a material with excellent chemical corrosion resistance. The mixing of these materials effectively improves the high-temperature resistance and corrosion resistance of the FPC, ensuring the long-term stability of the FPC in high-temperature, high-humidity, or chemically corrosive environments. The mixed FPC base material is laminated through a multi-layer alignment lamination process to obtain a physical transmission layer. The FPC base material is stacked multiple times, and each layer of material is laminated together through high temperature and pressure to form a physical transmission layer with high consistency and stability. The lamination process can provide sufficient mechanical strength and thermal stability to ensure that the FPC can withstand changes in the external environment without affecting the stable transmission of signals. The conductive metal material is subjected to HDI wiring treatment to obtain a signal control layer. HDI wiring is a technology for high-density wiring used to form fine circuit patterns in the FPC. By using laser drilling and photolithography technologies, high-density wiring with extremely small pitch is achieved on the surface of the FPC, enabling the signal control layer to provide a higher circuit density and shorter transmission paths. To ensure that there is no excessive interference during signal transmission, the conductive metal material in the FPC uses a high-conductivity material to ensure low-loss signal transmission and effectively reduce signal delay. The metal mesh material is formed according to a preset mesh size to obtain an electromagnetic shielding layer. The role of the electromagnetic shielding layer is to prevent external electromagnetic interference from affecting the quality of signal transmission. The electromagnetic shielding layer is composed of a metal mesh or a conductive coating, and these materials can effectively shield external noise interference and reduce signal loss during transmission. The impedance between the physical transmission layer and the signal control layer is calculated for matching. During signal transmission, impedance mismatch will cause signal reflection, signal loss, and timing errors. To ensure impedance consistency between the physical transmission layer and the signal control layer, the characteristic impedance of its transmission line is calculated. Assuming that the width of the transmission line between the physical transmission layer and the signal control layer is , the dielectric constant between the two layers is , and considering the material characteristics in the FPC, the characteristic impedance is calculated through the following formula:

[0046] ;

[0047] where is the characteristic impedance, is the height of the transmission line, is the width of the transmission line, is the relative permittivity of the medium. The impedance matching data obtained through calculation is input into the impedance matching circuit for compensation processing. By adjusting the geometric parameters of the circuit or adding adjustment elements (such as capacitors and inductors), the impedance of the transmission line reaches an ideal matching value. After compensation processing, impedance compensation parameters are obtained to ensure the stability of the signal during transmission and avoid signal reflection and loss caused by impedance mismatch. Based on the impedance compensation parameters, three-dimensional bending processing is performed on the physical transmission layer and the signal control layer to obtain three-dimensional space positioning parameters. The three-dimensional bending processing of the FPC is to meet the space requirements for the FPC interface in different working environments. The three-dimensional bending requires considering the shape of the FPC interface during design and also considering the timing error and signal attenuation during signal transmission. The calculation of the three-dimensional space positioning parameters needs to consider multiple factors, including the geometric shape, bending radius, and stress distribution of the FPC interface. By analyzing these factors, the space position and bending angle of each layer structure are calculated, and based on this, precise laminated assembly of the physical transmission layer, electromagnetic shielding layer, and signal control layer is carried out. An FPC interface coupling model is obtained.

[0048] In one example, the control node is regionally divided according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region, including:

[0049] The impedance matching parameters are input into an adaptive modulation algorithm for processing to obtain modulation parameters for the signal modulation region. The modulation parameters include a signal amplitude modulation coefficient and a phase modulation coefficient;

[0050] The modulation parameters of the signal modulation region are calculated by a feed-forward equalizer to obtain a first equalization parameter, and the first equalization parameter characterizes the amplitude attenuation compensation value during signal transmission;

[0051] The first equalization parameter is calculated by a decision feedback equalizer to obtain a second equalization parameter, and the second equalization parameter characterizes the phase delay compensation value during signal transmission;

[0052] Based on the first equalization parameter and the second equalization parameter, the range of the signal compensation region is defined to obtain compensation boundary data;

[0053] The compensation boundary data is input into a maximum likelihood detection algorithm for signal demodulation region division to obtain demodulation region parameters, and dynamic compensation processing is performed on the demodulation region parameters to obtain a demodulation compensation coefficient;

[0054] According to the demodulation compensation coefficient, the wiring path of the high-speed data bus is determined to obtain bus wiring parameters, and the bus wiring parameters are optimized for wiring to obtain the signal modulation region, the signal compensation region, and the signal demodulation region.

[0055] In this example, the impedance matching parameters are input into the adaptive modulation algorithm for processing. The impedance matching parameters describe the impedance consistency between the physical transmission layer and the signal control layer during signal transmission. The adaptive modulation algorithm dynamically adjusts the modulation mode of the signal according to the transmission characteristics of the signal, maximizing the efficiency and quality of signal transmission. Based on the modulation algorithm, the modulation parameters of the signal modulation region are obtained, including the signal amplitude modulation coefficient ( ), and the phase modulation coefficient ( ). The signal amplitude modulation coefficient is used to adjust the amplitude of the signal, while the phase modulation coefficient is used to optimize the phase of the signal. The formulas are as follows:

[0056] ;

[0057] where, and are the maximum and minimum amplitude values of the signal respectively, and are the maximum and minimum phase values of the signal respectively. These modulation coefficients are dynamically adjusted to adapt to the characteristics of different transmission paths, ensuring that the signal is not distorted and maintaining a high signal-to-noise ratio during modulation. The modulation parameters of the signal modulation region are calculated by a feed-forward equalizer to compensate for the amplitude attenuation that occurs during signal transmission. The feed-forward equalizer calculates the amplitude attenuation value on the transmission path and compensates it to improve the integrity of the signal. In the feed-forward equalizer, the first equalization parameter is calculated, which characterizes the amplitude attenuation compensation value during signal transmission. The calculation of this parameter is based on the spectral characteristics of the signal and uses the following formula:

[0058] ;

[0059] where, is the amplitude compensation coefficient, is the amplitude of the input signal, is the amplitude of the output signal. By adjusting the amplitude compensation coefficient , the amplitude attenuation caused by factors such as the length of the transmission line and material loss during signal transmission is effectively offset. The first equalization parameter is calculated by a decision feedback equalizer to compensate for the phase delay that occurs during signal transmission. Phase delay can cause signal distortion or synchronization errors, affecting the stability of the signal. The role of the decision feedback equalizer is to perform feedback processing on the signal and calculate the second equalization parameter, which characterizes the phase delay compensation value during signal transmission. The output of the decision feedback equalizer is calculated by the following formula:

[0060] ;

[0061] where, is the phase compensation coefficient, is the phase of the input signal, is the phase of the output signal. By adjusting the phase compensation coefficient , the phase delay effect caused by different path lengths and physical property differences during signal transmission is eliminated. The signal compensation area is defined based on the first equalization parameter and the second equalization parameter to obtain compensation boundary data. The compensation boundary data is used to describe the compensation situation of the signal in different areas, ensuring that the amplitude and phase of the signal always remain within a reasonable range throughout the transmission process. The calculation of the compensation boundary is based on the real-time change of the equalization parameter. By dynamically sampling and analyzing the signal quality parameter, the real-time compensation boundary data is obtained. The definition of the compensation boundary is carried out through the following formula:

[0062] ;

[0063] where and are the minimum and maximum values of the amplitude compensation coefficient respectively, and are the minimum and maximum values of the phase compensation coefficient respectively. The compensation boundary data is input into the maximum likelihood detection algorithm for signal demodulation area division to obtain demodulation area parameters. The maximum likelihood detection algorithm is used to recover the most likely original signal from the interference and noise of the signal by calculating the maximum likelihood value. This algorithm helps to determine the parameters of the demodulation area and perform dynamic compensation processing on the parameters of the demodulation area to improve the accuracy of signal demodulation. The calculation of the demodulation compensation coefficient is expressed by the following formula:

[0064] ;

[0065] where represents the probability of the original signal under the condition of the given received signal , is the probability of the received signal. By dynamically adjusting the demodulation compensation coefficient, the accuracy of signal demodulation is effectively improved, ensuring that the demodulated signal is not affected by noise or interference. The bus routing path of the high-speed data bus is determined according to the demodulation compensation coefficient to obtain bus routing parameters, and the bus routing parameters are optimized for routing. Bus routing is an important factor affecting signal transmission quality. A reasonable routing path can reduce crosstalk and delay between signals and improve signal transmission efficiency. The optimization process of bus routing includes reasonable planning of routing length, width, number of layers, etc. to obtain an optimized routing path. The routing optimization is carried out by combining simulation calculation and experimental verification. After routing optimization, the signal modulation area, signal compensation area and signal demodulation area form a complete and optimized signal transmission network.

[0066] In one example, based on a signal modulation region, a signal compensation region, and a signal demodulation region, real-time sampling and analysis of signal quality parameters are performed to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data, including:

[0067] Calculate the sampling rate of the output signal of the signal modulation region to obtain reference sampling frequency data, where the reference sampling frequency data is twice the signal bandwidth;

[0068] Sample the signal waveform based on the reference sampling frequency data to obtain original sampling data, and perform signal integrity analysis on the original sampling data to obtain signal integrity data;

[0069] Perform timing analysis on the rising and falling edges of the signal based on the original sampling data to obtain signal transition time data, and calculate the timing jitter data based on the signal transition time data;

[0070] Calculate the electromagnetic field coupling strength between adjacent signal lines to obtain coupling coefficient data, and calculate the crosstalk level data based on the coupling coefficient data;

[0071] Input the original sampling data into the Fourier transform algorithm for spectral analysis to obtain signal power spectrum data and noise power spectrum data, and perform a ratio calculation based on the signal power spectrum data and the noise power spectrum data to obtain the signal-to-noise ratio data.

[0072] In this example, the sampling rate of the output signal of the signal modulation region is calculated. According to the bandwidth characteristics of the signal, the sampling frequency is determined. According to the Nyquist sampling theorem, in order to completely recover the signal and avoid aliasing, the sampling frequency must be at least twice the signal bandwidth. Assume the signal bandwidth is , then the reference sampling frequency ( ) should be:

[0073] ;

[0074] where, represents the reference sampling frequency, represents the signal bandwidth. The larger the bandwidth, the more information the signal contains, and a higher sampling frequency is required to ensure the integrity of the signal. Sample the signal waveform based on the reference sampling frequency to obtain the original sampling data. The sampling process is actually the conversion of a continuous analog signal into a discrete digital signal. By sampling at the reference sampling frequency at each time point, the original sampling data obtained is a set of amplitudes of the signal at specific time points, presented as a series of discrete signal values , where each Represents the amplitude of the signal at the corresponding time point. Perform signal integrity analysis on the original sampled data to identify attenuation, distortion, and distortion problems that occur during signal transmission, and obtain signal integrity data. Signal integrity analysis methods include analyzing the rise time, fall time, amplitude jitter, etc. of the signal. Common signal integrity problems are caused by signal reflection and mismatch of the transmission line. By analyzing the time-domain waveform of the original sampled data, signal integrity data is obtained, which reflects various problems that occur during signal transmission and helps to evaluate the quality of the signal. Perform timing analysis on the original sampled data according to the rising edge and falling edge of the signal. Analyze the data of the signal transition moments, which are the moments when the signal reaches a certain threshold at the rising edge or falling edge. Timing analysis calculates the time for the signal to change from low level to high level (or from high level to low level), and the fluctuations in this period will affect the stability of the signal. To quantify this fluctuation, calculate the timing jitter data. Timing jitter refers to the fluctuation or uncertainty of the signal transition moment, which is represented by the standard deviation ). Assume that the transition moments of the signal are and , then the timing jitter data is calculated by the following formula:

[0075] ;

[0076] where is the moment of each transition, is the average value of the transition moments, is the number of transition moments. Through calculation, the time instability of the signal during the transition is quantified. Calculate the electromagnetic coupling of the signal to obtain the coupling coefficient data. Electromagnetic coupling is a problem during signal transmission. Especially when the signal lines are close, electromagnetic interference will cause signal crosstalk and affect the signal quality. Quantify the coupling strength by calculating the influence degree of the electromagnetic field between adjacent signal lines. The coupling coefficient is a parameter describing this coupling effect and is calculated by the following formula:

[0077] ;

[0078] where is the amplitude of the interference signal caused by the coupling effect, is the amplitude of the original signal. By calculating the coupling coefficient, evaluate the stability of the signal under electromagnetic interference. According to the coupling coefficient data, calculate the crosstalk level data. Crosstalk refers to the interference phenomenon caused by adjacent signal lines during signal transmission. The crosstalk level data can quantify the influence degree of the interference signal on the main signal, and uses the coupling strength between signals as the evaluation criterion. The crosstalk level is calculated by the following formula:

[0079] ;

[0080] Among them, is the noise power caused by interference, is the power of the signal. The higher the crosstalk level data, the greater the interference on the signal and the worse the transmission quality. Perform spectral analysis on the original sampled data. Convert the time-domain signal to the frequency domain through the Fourier transform algorithm to help analyze the frequency components of the signal and its relationship with noise. The formula for the Fourier transform is:

[0081] ;

[0082] Among them, is the spectrum of the signal, is the time-domain waveform of the signal, is the frequency. After obtaining the spectrum of the signal through the Fourier transform, calculate the signal power spectrum data and the noise power spectrum data. These two data sets respectively describe the power distribution of the signal and noise in different frequency ranges. By calculating the ratio of the signal power spectrum data and the noise power spectrum data, the signal-to-noise ratio data is obtained. The signal-to-noise ratio is an important parameter for measuring the signal quality. The formula for calculating the signal-to-noise ratio is:

[0083] ;

[0084] Among them, is the power of the signal, is the power of the noise. The higher the signal-to-noise ratio, the better the signal quality and the smaller the influence of noise on the signal.

[0085] In one example, input the signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data into the random error management model for multi-scale analysis to obtain hierarchical control parameters, including:

[0086] Classify the random error management model to obtain the ASIL D-level error monitoring layer, ASIL B-level error analysis layer, and real-time compensation layer;

[0087] Fuse the signal integrity data and timing jitter data in a ratio of 2:1 to obtain the first eigenvector, and fuse the crosstalk level data and signal-to-noise ratio data in a ratio of 3:2 to obtain the second eigenvector;

[0088] Input the first eigenvector and the second eigenvector into the ASIL D-level error monitoring layer for error classification to obtain error feature classification data. The ASIL D-level error monitoring layer adopts a three-layer neural network structure, and the number of nodes in each layer of the three-layer neural network structure is 96, 48, and 24 respectively;

[0089] Input the error feature classification data into the ASIL B-level error analysis layer for long-term trend analysis to obtain long-term prediction parameters. The ASIL B-level error analysis layer adopts a long short-term memory network structure and contains 128 memory units;

[0090] Perform a sliding window process on the long-term prediction parameters to obtain medium-term compensation parameters;

[0091] Input the medium-term compensation parameters into the real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters. The real-time compensation layer adopts a Kalman filter structure;

[0092] Use the long-term prediction parameters, medium-term compensation parameters, and short-term adjustment parameters as hierarchical control parameters.

[0093] In this example, a hierarchical classification of the random error management model is performed. The error management is divided into different levels to implement more precise control at different levels. According to the ASIL (Automotive Safety Integrity Level) standard, the error management is divided into three main levels, namely the ASIL D-level error monitoring layer, the ASIL B-level error analysis layer, and the real-time compensation layer. The ASIL D-level error monitoring layer is responsible for monitoring and detecting high-risk errors, requiring strict error analysis and control of the system; the ASIL B-level error analysis layer conducts the analysis of medium-risk errors, mainly dealing with system failures based on trend prediction; the real-time compensation layer quickly compensates for the errors occurring in the short term to ensure that the system can resume normal working state in a short time. Data fusion processing is carried out to extract useful information from different signal sources to obtain more accurate characteristic parameters. According to the ratio of 2:1, the signal integrity data and the timing jitter data are fused to obtain the first eigenvector. The signal integrity data includes information such as the amplitude change and waveform distortion of the signal, and the timing jitter data describes the time fluctuation at the signal transition moment. According to the ratio of 3:2, the crosstalk level data and the signal-to-noise ratio data are fused to obtain the second eigenvector. The crosstalk level data describes the electromagnetic interference intensity between adjacent signal lines, and the signal-to-noise ratio data measures the ratio of the useful information to the noise in the signal. The eigenvectors obtained in the above manner can comprehensively consider the influence of different factors, extract the most critical information, and thus improve the accuracy of error detection and compensation. The first eigenvector and the second eigenvector are input into the ASIL D-level error monitoring layer for error classification. The error monitoring layer uses a three-layer neural network structure for processing. The first layer of the neural network contains 96 nodes, the second layer contains 48 nodes, and the third layer contains 24 nodes. The design of the number of nodes in each layer takes into account the balance between computational complexity and accuracy. During the training process of the neural network, the error backpropagation algorithm is used to adjust the weights and biases so that the network can correctly classify different types of errors according to the input eigenvectors. Suppose the input of the neural network is the eigenvector , the weight matrix is , the bias is , and the output is , then the calculation of each layer is represented by the following formula:

[0094] ;

[0095] where is an activation function, and the activation functions include ReLU, Sigmoid, etc. After the classification processing of the neural network, the error feature classification data is obtained, so as to determine the error type of the system in the current state, and decide the next processing measures according to the error type. The error feature classification data is input into the ASIL B-level error analysis layer for long-term trend analysis. The error analysis layer uses the long short-term memory network (LSTM) structure for trend prediction. The LSTM network has strong time series prediction ability and can handle long-term dependence relationships. The core of LSTM lies in its gating mechanism, which can dynamically adjust the memory state of the network according to the historical information of the input data. The calculation formula of LSTM is as follows:

[0096] ;

[0097] ;

[0098] ;

[0099] ;

[0100] ;

[0101] Among them, is the forget gate, is the input gate, is the output gate, is the state of the memory cell, is the output, is the current input data, is the weight matrix, is the bias. After the long-term trend analysis of the error through the LSTM network, the long-term prediction parameters are obtained, which help the system identify the long-term error trend in signal transmission and take preventive measures. The sliding window processing is performed on the long-term prediction parameters to obtain the medium-term compensation parameters. The sliding window processing is a signal smoothing method that can eliminate short-term fluctuations and capture a relatively stable trend. Through the sliding window, the long-term prediction parameters are smoothed to obtain relatively stable medium-term compensation parameters. The medium-term compensation parameters are input into the real-time compensation layer for dynamic response analysis to obtain the short-term adjustment parameters. The real-time compensation layer adopts the Kalman filter structure. The Kalman filter is a recursive filter used for state estimation of dynamic systems. The basic principle of Kalman filtering is to continuously optimize the state estimation of the system by estimating the current state and correcting the previous state. The state update formula of Kalman filtering is:

[0102] ;

[0103] ;

[0104] Among them, is the state estimate at the current moment, is the Kalman gain, is the actual measurement value, is the observation matrix, is the error covariance matrix. The long-term prediction parameter, the mid-term compensation parameter, and the short-term adjustment parameter are used as hierarchical control parameters, combined with the current state of the system, to dynamically adjust the system to achieve the optimal signal transmission stability control strategy.

[0105] In one example, according to the long-term prediction parameter in the hierarchical control parameters, the FPC physical structure is protected and edge-bent to obtain mechanical constraint parameters, and according to the mid-term compensation parameter and the short-term adjustment parameter, the signal transmission circuit is compensated to obtain electrical optimization parameters, including:

[0106] According to the long-term prediction parameter, the edge of the FPC is protected and edge-bent to obtain edge mechanical strength parameters, and the edge mechanical strength parameters are input into a fully automatic FPC bender for three-dimensional positioning to obtain three-dimensional bending parameters;

[0107] Based on the three-dimensional bending parameters, the FPC physical structure is automatically bent to obtain physical deformation data, and the physical deformation data includes bending angle data and deformation stress data;

[0108] According to the physical deformation data, a mechanical stress model is established to obtain mechanical constraint parameters, and the mechanical constraint parameters include elastic deformation coefficient and plastic deformation coefficient;

[0109] According to the mid-term compensation parameter, the signal amplitude of the signal transmission circuit is compensated to obtain an amplitude compensation coefficient, and according to the short-term adjustment parameter, the signal transmission circuit is phase-compensated to obtain a phase compensation coefficient;

[0110] The amplitude compensation coefficient and the phase compensation coefficient are input into a signal equalizer for parameter adjustment to obtain equalizer coefficients, and the equalizer coefficients are dynamically optimized to obtain electrical optimization parameters, and the electrical optimization parameters include feedforward equalization parameters and feedback equalization parameters.

[0111] In this example, the edge of the flexible printed circuit (FPC) is processed with a protective wrap based on long-term prediction parameters to enhance the FPC edge's resistance to mechanical damage. The long-term prediction parameters are obtained through long-term analysis of signal distortion data such as timing jitter and crosstalk during signal transmission. These parameters help predict the forces acting on the edge during transmission. By analyzing these prediction parameters, the required mechanical strength of the FPC edge is determined to avoid unstable signal transmission due to physical damage during subsequent signal transmission. The obtained edge mechanical strength parameters, including the elastic modulus and tensile strength of the edge, are input into a fully automatic FPC bending machine. The bending machine uses these mechanical strength parameters during the processing to perform three-dimensional positioning by precisely controlling the bending angle and position, obtaining three-dimensional bending parameters. The three-dimensional bending parameters refer to the precise angles, bending positions, and bending stress values required during the FPC bending process. These parameters not only determine the shape of the FPC but also have an important impact on its physical properties and signal integrity. For example, if the bending angle is too large or the bending position is unreasonable, it will cause stress concentration in the circuit lines, thus affecting the electrical performance. The calculation of the three-dimensional bending parameters needs to consider factors such as the physical dimensions of the FPC, material properties, and external mechanical loads. The formula is expressed as:

[0112] ;

[0113] where, is the bending angle, is the length of the bending area, is the bending radius. According to these bending parameters, the FPC automatically adjusts the bending angle during the bending process to ensure that the physical deformation meets the design requirements and avoid excessive deformation stress. Based on the physical structure of the FPC after the bending process, an automatic bending process is carried out and the physical deformation data is recorded. The physical deformation data includes the bending angle and deformation stress data, where the bending angle refers to the actual angle of the FPC in the bending area, and the deformation stress data reflects the mechanical stress borne by the FPC in this area. The deformation stress is calculated through the stress-strain relationship, and the formula is as follows:

[0114] ;

[0115] where, is the stress, is the elastic modulus of the material, is the strain (i.e., the relative change in deformation). By analyzing these data, the physical properties of the FPC under different working conditions are obtained, and the mechanical stress model is calculated. The mechanical stress model is a mathematical model established based on physical deformation data, aiming to predict the stress state borne by the FPC under different external environments. The mechanical stress model includes an elastic deformation coefficient and a plastic deformation coefficient. The elastic deformation coefficient is used to describe the deformation ability of the FPC within the elastic range and is determined by the Young's modulus of the material. The plastic deformation coefficient, on the other hand, describes the ability of the FPC to undergo permanent deformation after exceeding the elastic limit. By calculating the relationship between stress and strain, the values of the elastic deformation coefficient and the plastic deformation coefficient are obtained. The formula is expressed as:

[0116] ;

[0117] ;

[0118] where, is the plastic deformation coefficient, is the starting point of plastic deformation. According to the physical deformation data and the mechanical stress model, the mechanical constraint parameters obtained can ensure that the FPC maintains good structural stability under different working environments. According to the mid-term compensation parameters, signal amplitude compensation is performed on the signal transmission circuit to correct the signal strength change caused by transmission line loss or signal attenuation. The amplitude compensation coefficient is determined by analyzing the characteristic impedance of the transmission path and the circuit gain, and the formula is:

[0119] ;

[0120] where, is the gain, is the amplitude of the output signal, is the amplitude of the input signal. The amplitude compensation coefficient is adjusted according to the actual requirements of the system to ensure that the signal does not undergo excessive attenuation during transmission. Phase compensation is used to solve the phase distortion caused by the time delay during signal transmission, especially in high-speed data transmission, where the impact of time delay on the signal is particularly significant. By performing phase compensation processing on the signal transmission circuit through short-term adjustment parameters, the phase compensation coefficient is obtained. The core of phase compensation lies in adjusting the phase delay according to the transmission path and frequency characteristics of the signal to ensure the timing consistency of the signal waveform. The phase compensation formula is as follows:

[0121] ;

[0122] where, is the phase delay, is the signal frequency, is the length of the signal transmission path, It is the propagation speed of the signal in the medium. The amplitude compensation coefficient and the phase compensation coefficient are input into the signal equalizer for parameter adjustment processing. The signal equalizer optimizes the transmission quality of the signal by adjusting the amplitude and phase of the input signal. The coefficients of the signal equalizer include feedforward equalization parameters and feedback equalization parameters, and these two parameters respectively control the relative relationship between the input signal and the output signal. The adjustment formula of the equalizer is as follows:

[0123] ;

[0124] Among them, is the output signal, is the input signal, is the equalizer coefficient, is the delay order. By continuously adjusting the equalizer coefficient, the amplitude and phase of the signal can be optimized, and the integrity of the signal can be improved. Dynamically optimize the equalizer coefficient to obtain electrical optimization parameters. The electrical optimization parameters include feedforward equalization parameters and feedback equalization parameters, and they are adjusted according to the real-time signal changes, so as to achieve efficient control and optimization of the signal. Through intelligent algorithms and feedback mechanisms, continuously optimize the electrical characteristics in the signal transmission process to ensure that the system maintains stable and reliable performance under high-speed transmission conditions.

[0125] In an example, a performance evaluation model is established based on mechanical constraint parameters and electrical optimization parameters, and the FPC interface coupling model is iteratively optimized to obtain a control optimization strategy, including:

[0126] Conduct a mechanical damage analysis on the FPC interface according to the mechanical constraint parameters to obtain damage level parameters, and conduct a signal performance analysis on the FPC interface according to the electrical optimization parameters to obtain performance level parameters;

[0127] Input the damage level parameters and the performance level parameters into the performance evaluation model for comprehensive analysis to obtain a system evaluation score, and conduct a grading process on the FPC interface performance according to the system evaluation score to obtain a performance grading matrix, and the performance grading matrix includes physical performance levels and electrical performance levels;

[0128] Based on the performance grading matrix, conduct differential optimization on the FPC interface coupling model to obtain an optimization objective function, and the optimization objective function includes physical optimization terms and electrical optimization terms;

[0129] Input the optimization objective function into the genetic algorithm for parameter optimization to obtain an optimization coefficient matrix, and adjust the parameters of the FPC interface coupling model according to the optimization coefficient matrix to obtain an iterative optimization result, and the iterative optimization result includes physical parameter optimization values and electrical parameter optimization values;

[0130] Perform a convergence analysis on the iterative optimization results to obtain convergence judgment parameters, which include a relative error value and an iteration step value;

[0131] Combine the convergence judgment parameters, the optimized values of physical parameters, and the optimized values of electrical parameters to obtain a control optimization strategy.

[0132] In this example, perform a mechanical damage analysis of the FPC interface based on mechanical constraint parameters to obtain damage level parameters. This analysis considers factors such as physical stress, external force, and bending deformation that the FPC interface encounters in the working environment. The damage level parameters are quantified by evaluating the durability, load-bearing capacity, and performance of the FPC interface under extreme conditions. For example, if the interface edge of the FPC undergoes fatigue damage due to long-term high temperature or repeated bending, the damage level parameters can accurately reflect this change. The formula is expressed as:

[0133] ;

[0134] where, is the damage level, is the maximum load on the FPC interface, is the yield strength of the material. When the damage level parameter is high, it indicates that the FPC interface has approached or exceeded the design load, and the reliability of the system decreases. While performing the mechanical damage analysis, analyze the signal performance of the FPC interface according to the electrical optimization parameters to obtain performance level parameters. The electrical optimization parameters include amplitude compensation coefficients, phase compensation coefficients, and equalizer coefficients, etc. Adjusting these parameters helps to optimize signal integrity, reduce noise interference, and improve signal quality. The performance level parameters are quantified by evaluating signal transmission efficiency, signal-to-noise ratio, and transmission delay. For example, the signal-to-noise ratio is expressed as:

[0135] ;

[0136] where, is the signal-to-noise ratio, is the signal power, is the noise power. The better the signal quality, the larger the value, indicating that the signal is less interfered during transmission, and the performance level parameter is correspondingly higher. Input the damage level parameters and the performance level parameters into the performance evaluation model for comprehensive analysis to obtain the system evaluation score. The performance evaluation model is a multi-dimensional mathematical model that comprehensively considers the mechanical damage, signal performance, and other environmental factors of the FPC interface to give an overall evaluation score of the system. The comprehensive analysis is carried out by weighted summation, and the formula is as follows:

[0137] ;

[0138] where, is the system evaluation score, and are the weights of the damage level and the performance level, is the damage level, is the performance level. By calculating the system evaluation score, we can better understand the performance of the FPC interface under specific conditions, and based on this result, perform performance grading to obtain a performance grading matrix. The performance grading matrix divides the system evaluation score into different levels, thereby comprehensively grading the physical and electrical performances of the FPC interface. The grading matrix includes physical performance levels (such as low, medium, high, etc.) and electrical performance levels (such as excellent, good, poor, etc.), which helps to clarify the optimization requirements and improvement directions of the FPC interface. Based on the performance grading matrix, the coupling model of the FPC interface is differentially optimized to obtain an optimization objective function. According to the requirements of different performance levels, the physical layer and the electrical layer are optimized separately to achieve the best transmission performance and reliability. The optimization objective function includes physical optimization terms and electrical optimization terms. The physical optimization terms focus on aspects such as material selection, structural design, and bending treatment, while the electrical optimization terms mainly involve signal transmission, signal compensation, and noise suppression. The optimization objective function is expressed as:

[0139] ;

[0140] where, is the optimization objective function, is the physical optimization term, is the electrical optimization term, and are the weights of physical optimization and electrical optimization. The optimization objective function is input into the genetic algorithm for parameter optimization. The genetic algorithm iteratively optimizes the design parameters of the FPC interface by simulating the process of biological evolution to obtain a set of optimization coefficient matrices. The working principle of the genetic algorithm is based on natural selection, crossover, and mutation operations. Through multiple generations of evolution, the genetic algorithm can effectively find the global optimal solution. In this process, the optimization coefficient matrix includes a set of parameters related to the physical and electrical characteristics of the FPC interface, such as bending angle, signal compensation coefficient, and equalizer coefficient. The calculation formula of the optimization coefficient matrix is:

[0141] ;

[0142] where, is the optimization coefficient matrix, is the optimization objective function, is the input parameter vector. After obtaining the optimized coefficient matrix, a convergence analysis is performed on the iterative optimization result to determine whether the algorithm has reached the optimal solution. The convergence analysis is judged by calculating the relative error value and the iteration step size value. When the relative error value approaches zero and the iteration step size value decreases below a certain threshold, the algorithm is considered to have converged and the optimization process is completed. The formula for the convergence analysis is as follows:

[0143] ;

[0144] where, is the relative error value, and are the optimized coefficient matrices of the -th and the -th iterations respectively. When is less than the preset convergence threshold, it indicates that the optimization process has ended. The convergence judgment parameter, the optimized value of the physical parameter, and the optimized value of the electrical parameter are combined in a strategy to obtain the final control optimization strategy. The optimization strategy synthesizes the optimization results of the FPC interface at the physical layer and the electrical layer and can be dynamically adjusted according to environmental changes and requirements in practical applications. For example, in a high-temperature or high-humidity environment, the optimization strategy focuses on improving physical performance, while in the case of a high signal frequency, the optimization strategy focuses on the electrical performance of the signal.

[0145] Referring to Figure 2 , this embodiment provides a high-speed transmission stability control device for an FPC high-performance computing chip interface, including:

[0146] Forming module 1, configured to perform dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model;

[0147] Partitioning module 2, configured to partition the control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region;

[0148] Sampling module 3, configured to perform real-time sampling analysis on the signal quality parameters based on the signal modulation region, the signal compensation region, and the signal demodulation region to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data;

[0149] Analysis module 4, configured to input the signal integrity data, the timing jitter data, the crosstalk level data, and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters;

[0150] A processing module 5 is configured to perform protective edge wrapping and automatic bending processing on the FPC physical structure according to the long-term prediction parameter in the hierarchical control parameter to obtain mechanical constraint parameters, and perform compensation processing on the signal transmission circuit according to the medium-term compensation parameter and the short-term adjustment parameter to obtain electrical optimization parameters;

[0151] An optimization module 6 is configured to establish a performance evaluation model based on the mechanical constraint parameters and the electrical optimization parameters, and perform iterative optimization on the FPC interface coupling model to obtain a control optimization strategy.

[0152] In this embodiment, for the specific implementation of each unit in the above device embodiment, please refer to the description in the above method embodiment, which will not be elaborated here.

[0153] Refer to Figure 3 , in an embodiment of the present invention, a computer device is further provided. The computer device may be a server, and its internal structure may be as Figure 3 shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface, and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above method is implemented.

[0154] Those skilled in the art can understand that Figure 3 the structure shown in

[0155] is only a block diagram of a part of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied.

[0156] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium provided by the present invention and used in the embodiments can include non-volatile and / or volatile memories. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or an external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM, etc.

[0157] It should be noted that in this document, the terms "include", "comprise", or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, apparatus, article, or method that includes a series of elements includes not only those elements but also other elements not expressly listed, or elements that are inherent to such process, apparatus, article, or method. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, apparatus, article, or method that includes the element.

[0158] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent structural or equivalent process transformation made by using the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present invention.

Claims

1. A method for controlling the high-speed transmission stability of an FPC high-performance computing chip interface, characterized in that The steps include: Performing dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model; Dividing the control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region; Based on the signal modulation region, the signal compensation region, and the signal demodulation region, performing real-time sampling analysis on signal quality parameters to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data; Inputting the signal integrity data, the timing jitter data, the crosstalk level data, and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; specifically including: dividing the random error management model into levels to obtain an ASIL D-level error monitoring layer, an ASIL B-level error analysis layer, and a real-time compensation layer; fusing the signal integrity data and the timing jitter data according to a ratio of 2:1 to obtain a first feature vector, and fusing the crosstalk level data and the signal-to-noise ratio data according to a ratio of 3:2 to obtain a second feature vector; inputting the first feature vector and the second feature vector into the ASIL D-level error monitoring layer for error classification to obtain error feature classification data, the ASIL D-level error monitoring layer adopts a three-layer neural network structure, and the number of nodes in each layer of the three-layer neural network structure is 96, 48, and 24 respectively; inputting the error feature classification data into the ASIL B-level error analysis layer for long-term trend analysis to obtain long-term prediction parameters, the ASIL B-level error analysis layer adopts a long short-term memory network structure and contains 128 memory units; performing a sliding window process on the long-term prediction parameters to obtain medium-term compensation parameters; inputting the medium-term compensation parameters into the real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters, the real-time compensation layer adopts a Kalman filter structure; taking the long-term prediction parameters, the medium-term compensation parameters, and the short-term adjustment parameters as hierarchical control parameters; Performing protective edge wrapping and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit according to the medium-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; Based on the mechanical constraint parameters and the electrical optimization parameters, establishing a performance evaluation model to iteratively optimize the FPC interface coupling model to obtain a control optimization strategy.

2. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 1, wherein The performing dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model includes: Mixing high-temperature resistant materials and corrosion-resistant materials according to a preset ratio to obtain an FPC base material, and laminating the FPC base material through a multi-layer alignment lamination process to obtain a physical transmission layer; Performing HDI wiring processing on a conductive metal material to obtain a signal control layer, and forming a metal mesh material according to a preset mesh size to obtain an electromagnetic shielding layer; Perform impedance matching calculation on the impedance between the physical transmission layer and the signal control layer to obtain impedance matching data, and input the impedance matching data into an impedance matching circuit for compensation processing to obtain impedance compensation parameters; Based on the impedance compensation parameters, perform three-dimensional bending processing on the physical transmission layer and the signal control layer to obtain three-dimensional space positioning parameters, and stack and assemble the physical transmission layer, the electromagnetic shielding layer, and the signal control layer according to the three-dimensional space positioning parameters to obtain an FPC interface coupling model.

3. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 2, characterized in that The region division of the control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region includes: Input the impedance matching parameters into an adaptive modulation algorithm for processing to obtain modulation parameters of the signal modulation region, where the modulation parameters include a signal amplitude modulation coefficient and a phase modulation coefficient; Perform a feed-forward equalizer calculation on the modulation parameters of the signal modulation region to obtain a first equalization parameter, where the first equalization parameter represents the amplitude attenuation compensation value during signal transmission; Perform a decision feedback equalizer calculation on the first equalization parameter to obtain a second equalization parameter, where the second equalization parameter represents the phase delay compensation value during signal transmission; Define the range of the signal compensation region according to the first equalization parameter and the second equalization parameter to obtain compensation boundary data; Input the compensation boundary data into a maximum likelihood detection algorithm for signal demodulation region division to obtain demodulation region parameters, and perform dynamic compensation processing on the demodulation region parameters to obtain a demodulation compensation coefficient; Determine the wiring path of the high-speed data bus according to the demodulation compensation coefficient to obtain bus wiring parameters, and perform wiring optimization on the bus wiring parameters to obtain a signal modulation region, a signal compensation region, and a signal demodulation region.

4. The high-speed transmission stability control method for the FPC high-performance computing chip interface according to claim 3, characterized in that Based on the signal modulation region, the signal compensation region, and the signal demodulation region, perform real-time sampling and analysis on signal quality parameters to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data, including: Calculate the sampling rate of the output signal of the signal modulation region to obtain reference sampling frequency data, where the reference sampling frequency data is twice the signal bandwidth; Sample the signal waveform based on the reference sampling frequency data to obtain original sampling data, and perform signal integrity analysis on the original sampling data to obtain signal integrity data; Perform timing analysis on the signal rising edge and falling edge according to the original sampling data to obtain signal transition time data, and calculate timing jitter data according to the signal transition time data; Calculate the electromagnetic field coupling strength between adjacent signal lines to obtain coupling coefficient data, and calculate crosstalk level data according to the coupling coefficient data; Input the original sampling data into a Fourier transform algorithm for spectrum analysis to obtain signal power spectrum data and noise power spectrum data, and perform a ratio calculation according to the signal power spectrum data and the noise power spectrum data to obtain signal-to-noise ratio data.

5. The high-speed transmission stability control method for the FPC high-performance computing chip interface according to claim 1, characterized in that Performing protective edge wrapping and automatic bending processing on the FPC physical structure according to the long-term prediction parameter in the hierarchical control parameter to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit according to the medium-term compensation parameter and the short-term adjustment parameter to obtain electrical optimization parameters, including: Performing flexible circuit board protective edge wrapping processing on the FPC edge according to the long-term prediction parameter to obtain edge mechanical strength parameters, and inputting the edge mechanical strength parameters into a fully automatic FPC bending machine for three-dimensional positioning processing to obtain three-dimensional bending parameters; Performing automatic bending processing on the FPC physical structure based on the three-dimensional bending parameters to obtain physical deformation data, where the physical deformation data includes bending angle data and deformation stress data; Establishing a mechanical stress model according to the physical deformation data to obtain mechanical constraint parameters, where the mechanical constraint parameters include elastic deformation coefficients and plastic deformation coefficients; Performing signal amplitude compensation on the signal transmission circuit according to the medium-term compensation parameter to obtain an amplitude compensation coefficient, and performing phase compensation processing on the signal transmission circuit according to the short-term adjustment parameter to obtain a phase compensation coefficient; Inputting the amplitude compensation coefficient and the phase compensation coefficient into a signal equalizer for parameter adjustment processing to obtain an equalizer coefficient, and performing dynamic optimization processing on the equalizer coefficient to obtain electrical optimization parameters, where the electrical optimization parameters include feedforward equalization parameters and feedback equalization parameters.

6. The high-speed transmission stability control method for the FPC high-performance computing chip interface according to claim 5, characterized in that Based on the mechanical constraint parameters and the electrical optimization parameters, establishing a performance evaluation model to perform iterative optimization on the FPC interface coupling model to obtain a control optimization strategy, including: Performing mechanical damage analysis on the FPC interface according to the mechanical constraint parameters to obtain damage level parameters, and performing signal performance analysis on the FPC interface according to the electrical optimization parameters to obtain performance level parameters; Inputting the damage level parameters and the performance level parameters into the performance evaluation model for comprehensive analysis to obtain a system evaluation score, and performing grading processing on the FPC interface performance according to the system evaluation score to obtain a performance grading matrix, where the performance grading matrix includes physical performance levels and electrical performance levels; Performing differential optimization on the FPC interface coupling model based on the performance grading matrix to obtain an optimization objective function, where the optimization objective function includes physical optimization terms and electrical optimization terms; Inputting the optimization objective function into a genetic algorithm for parameter optimization to obtain an optimization coefficient matrix, and adjusting the parameters of the FPC interface coupling model according to the optimization coefficient matrix to obtain an iterative optimization result, where the iterative optimization result includes physical parameter optimization values and electrical parameter optimization values; Performing convergence analysis on the iterative optimization result to obtain convergence judgment parameters, where the convergence judgment parameters include relative error values and iteration step values; Combining the convergence judgment parameters, the physical parameter optimization values, and the electrical parameter optimization values to obtain a control optimization strategy.

7. A high-speed transmission stability control device for an FPC high-performance computing chip interface, characterized in that, For implementing the steps of the method according to any one of claims 1 to 6, the device includes: A forming module, which is used to perform dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model; A partitioning module, which is used to partition control nodes according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region; A sampling module, which is used to perform real-time sampling analysis on signal quality parameters based on the signal modulation region, the signal compensation region, and the signal demodulation region to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data; An analysis module, which is used to input the signal integrity data, the timing jitter data, the crosstalk level data, and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; A processing module, which is used to perform protective edge wrapping and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and perform compensation processing on the signal transmission circuit according to the medium-term compensation parameters and short-term adjustment parameters to obtain electrical optimization parameters; An optimization module, which is used to establish a performance evaluation model based on the mechanical constraint parameters and the electrical optimization parameters, and perform iterative optimization on the FPC interface coupling model to obtain a control optimization strategy.

8. A computer device, comprising a memory and a processor, wherein a computer program is stored in the memory, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method according to any one of claims 1 to 6.

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