Preparation method of semiconductor device and semiconductor device

Abstract

The invention discloses a preparation method of a semiconductor device and the semiconductor device, and the method comprises the steps: providing a substrate which comprises a first surface; forming a first photoresist layer on the first surface; forming a first opening part in the first photoresist layer, wherein the first opening part exposes a part in the first surface; forming a first metal layer on one side, deviating from the substrate, of the first photoresist layer; forming a second photoresist layer on the surface of one side, deviating from the substrate, of the first metal layer; forming a second opening part penetrating through the second photoresist layer and the first metal layer, wherein the orthographic projection of the second opening part on the substrate covers and exceeds the orthographic projection of the first opening part on the substrate; and forming a first functional layer on the side, deviating from the substrate, of the second photoresist layer, and removing the first photoresist layer, the first metal layer, the second photoresist layer and the part, located on the side, deviating from the substrate, of the second photoresist layer in the first functional layer to form a first functional part. According to the preparation method of the semiconductor device provided by the invention, the semiconductor device with higher yield can be prepared.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular, relates to a method for preparing a semiconductor device and a semiconductor device. Background Art

[0002] Gallium nitride high electron mobility transistors (GaN HEMTs) are widely used in high-frequency power amplifiers, radio frequency and microwave circuits, etc. due to their high electron mobility, high power density and excellent high-frequency performance. However, in the existing GaN HEMTs, the preparation yield of the gate with a "T" structure is low, which seriously affects the performance of the GaN HEMTs. Summary of the invention

[0003] The purpose of this application is to at least solve the problem of low yield rate of semiconductor device manufacturing. This purpose is achieved through the following technical solutions:

[0004] The first aspect of the present application provides a method for preparing a semiconductor device, comprising:

[0005] providing a substrate, the substrate comprising a first surface;

[0006] forming a first photoresist layer on the first surface;

[0007] forming a first opening in the first photoresist layer, wherein the first opening exposes a portion of the first surface;

[0008] forming a first metal layer on a side of the first photoresist layer facing away from the substrate;

[0009] forming a second photoresist layer on a surface of the first metal layer facing away from the substrate;

[0010] forming a second opening portion penetrating the second photoresist layer and the first metal layer, wherein an orthographic projection of the second opening portion on the substrate covers and exceeds an orthographic projection of the first opening portion on the substrate;

[0011] A first functional layer is formed on the side of the second photoresist layer away from the substrate, and the first photoresist layer, the first metal layer, the second photoresist layer and the portion of the first functional layer located on the side of the second photoresist layer away from the substrate are removed to form a first functional portion.

[0012] The preparation method of the semiconductor device provided in the present application is suitable for preparing the first functional part with a "T"-shaped structure. Specifically, by forming a first photoresist layer and forming a first opening in the first photoresist layer, the lower part of the "T"-shaped structure is formed subsequently. By forming a first metal layer, a second photoresist layer and a second opening that penetrates the first metal layer and the second photoresist layer, the upper part of the "T"-shaped structure is formed subsequently. In the preparation method of the semiconductor device provided in the present application, the first metal layer is used as a barrier layer, and the first metal layer is a light-shielding film layer. When the second photoresist layer is exposed, the first photoresist layer can be effectively prevented from being affected, thereby improving the preparation accuracy of the lower part of the "T"-shaped structure. The first metal layer and the first photoresist layer are not easily miscible, which can prevent the morphology of the first photoresist layer from being affected, so as to further ensure the preparation yield and process stability of the first functional part, thereby improving the preparation yield of the semiconductor device.

[0013] The second aspect of the present application also provides a semiconductor device, which is prepared by any semiconductor device preparation method provided by the first aspect of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Moreover, the same reference numerals are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0015] Figure 1 is a flow chart of a method for preparing a semiconductor device provided in an embodiment of the present application;

[0016] Figures 2 to 9 It is a schematic diagram of film layer changes during the preparation process of a semiconductor device provided in an embodiment of the present application;

[0017] Figures 10 to 15 is a schematic diagram of film layer changes during the preparation process of another semiconductor device provided in an embodiment of the present application;

[0018] Figures 16 to 22 This is a schematic diagram of film layer changes during the preparation process of another semiconductor device provided in an embodiment of the present application.

[0019] The reference numerals are as follows:

[0020] 1. semiconductor device; 11. substrate; 111. first surface; 112. substrate; 113. barrier layer; 1131. first groove; 114. source portion; 115. drain portion; 12. first photoresist layer; 121. first opening portion; 13. first metal layer; 14. second photoresist layer; 16. second opening portion; 15. first functional layer; 150. first functional portion. DETAILED DESCRIPTION

[0021] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0022] It should be understood that the terms used in the text are only for the purpose of describing specific example embodiments, and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used in the text may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.

[0023] Although the terms first, second, third, etc. can be used in the text to describe multiple elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms can only be used to distinguish an element, component, region, layer or section from another region, layer or section. Unless the context clearly indicates, terms such as "first", "second" and other numerical terms do not imply order or sequence when used in the text. Therefore, the first element, component, region, layer or section discussed below can be referred to as the second element, component, region, layer or section without departing from the teaching of the example embodiments.

[0024] For ease of description, spatial relative terms may be used herein to describe the relationship of one element or feature relative to another element or feature as shown in the figure, such as "inside", "outside", "inner side", "outer side", "below", "below", "above", "above", etc. Such spatial relative terms are intended to include different orientations of the device in use or operation in addition to the orientation depicted in the figure. For example, if the device in the figure is turned over, then the elements described as "below other elements or features" or "below other elements or features" will subsequently be oriented as "above other elements or features" or "above other elements or features". Therefore, the example term "below..." can include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or in other directions) and the spatial relative descriptors used in the text are interpreted accordingly.

[0025] According to research, in the related technology, the preparation yield of the gate with a "T" structure is low, which seriously affects the performance of the gallium nitride high electron mobility transistor. Specifically, the gate of the "T" structure often uses a first mask layer, a second mask layer and a third mask layer arranged from bottom to top, and the second mask layer and the third mask layer are subjected to an exposure and development process to form a first through hole, so as to form a gate cap in the first through hole, and then the first mask layer is subjected to an exposure and development process to form a second through hole, so as to form a gate foot in the second through hole. The materials of the first mask layer, the second mask layer and the third mask layer are all photoresist layers, and there is a certain mutual solubility between the photoresists. This leads to that after the three layers of photoresist are evenly coated, the interface is not very clear. Therefore, after each exposure, not only is there a problem of poor surface morphology of the gate foot, but also due to the uncertainty of the degree of mutual solubility, the repeatability of the process is deteriorated, and process differences will also occur between different devices, which ultimately leads to uneven performance of the device produced or even unreproducible. When the second mask layer and the third mask layer are exposed and developed, the second mask layer is easily overexposed, thereby affecting the first mask layer, and further affecting the morphology of the gate, resulting in a low preparation yield of the "T"-shaped gate. The present application also provides a method for preparing a semiconductor device and a semiconductor device, which helps to improve the preparation yield of the semiconductor device.

[0026] like Figure 1 As shown, according to an embodiment of the present application, a method for preparing a semiconductor device 1 is proposed, comprising:

[0027] S200, such as Figure 2 As shown, a substrate 11 is provided, and the substrate 11 includes a first surface 111 .

[0028] Specifically, the first surface 111 may be a planar surface or a non-planar surface.

[0029] S400, such as Figure 2 As shown, a first photoresist layer 12 is formed on the first surface 111 .

[0030] Specifically, the first photoresist layer 12 contacts the first surface 111 , and the first photoresist layer 12 covers a part or the whole of the first surface 111 .

[0031] S600, such as Figure 3 As shown, a first opening 121 is formed in the first photoresist layer 12 , and the first opening 121 exposes a portion of the first surface 111 .

[0032] Specifically, the first opening 121 penetrates the first photoresist layer 12 along the thickness direction of the first photoresist layer 12 .

[0033] S800, such as Figure 4 As shown, a first metal layer 13 is formed on a side of the first photoresist layer 12 facing away from the substrate 11 .

[0034] Specifically, the first metal layer 13 is a light shielding film layer.

[0035] S1000, such as Figure 5 As shown, a second photoresist layer 14 is formed on a surface of the first metal layer 13 that is away from the substrate 11 .

[0036] Specifically, the orthographic projection of the second photoresist layer 14 on the substrate 11 covers part or all of the orthographic projection of the first metal layer 13 on the substrate 11 .

[0037] S1200, such as Figure 6 and Figure 7 As shown, a second opening 16 penetrating the second photoresist layer 14 and the first metal layer 13 is formed, and the orthographic projection of the second opening 16 on the substrate 11 covers and exceeds the orthographic projection of the first opening 121 on the substrate 11 .

[0038] S1400, such as Figure 8 As shown, a first functional layer 15 is formed on the side of the second photoresist layer 14 facing away from the substrate 11, as shown in FIG. Fig. 9 As shown, the first photoresist layer 12 , the first metal layer 13 , the second photoresist layer 14 , and the portion of the first functional layer 15 located on the side of the second photoresist layer 14 away from the substrate 11 are removed to form a first functional portion 150 .

[0039] Specifically, only the portion of the first functional layer 15 located in the first opening 121 and the portion located in the second opening 16 are retained, and the first functional portion 150 is disposed in contact with the substrate 11 .

[0040] The preparation method of the semiconductor device 1 provided in the present application is suitable for preparing a first functional portion 150 having a "T"-shaped structure. Specifically, by forming a first photoresist layer 12 and forming a first opening portion 121 in the first photoresist layer 12, the lower region of the "T"-shaped structure is formed subsequently. By forming a first metal layer 13, a second photoresist layer 14, and a second opening portion 16 that penetrates the first metal layer 13 and the second photoresist layer 14, the upper region of the "T"-shaped structure is formed subsequently. In the preparation method of the semiconductor device 1 provided in the present application, the first metal layer 13 is used as a barrier layer, and the first metal layer 13 is a light-shielding film layer, which can effectively prevent the first photoresist layer 12 from being affected when the second photoresist layer 14 is exposed, thereby improving the preparation accuracy of the lower region of the "T"-shaped structure. The first metal layer 13 and the first photoresist layer 12 are not easily miscible, which can prevent the morphology of the first photoresist layer 12 from being affected, so as to further ensure the preparation yield and process stability of the first functional part 150, thereby improving the preparation yield of the semiconductor device.

[0041] Specifically, since the first metal layer 13 can effectively prevent the first photoresist layer 12 from being affected when the first photoresist layer 12 is exposed, the thickness of the first photoresist layer 12 does not need to be set to allow for the first photoresist layer 12 to be mistakenly exposed when the second photoresist layer 14 is exposed, thereby reducing the thickness of the first photoresist layer 12. On the one hand, the material of the first photoresist layer 12 can be saved, and on the other hand, the time for exposing the first photoresist layer 12 can be saved after the thickness of the first photoresist layer 12 is reduced. Furthermore, since the first metal layer 13 can effectively prevent the first photoresist layer 12 from being affected when the first photoresist layer 12 is exposed, the first photoresist layer 12 will not be overexposed when the second photoresist layer 14 is exposed, thereby reducing the control of the exposure accuracy when the second photoresist layer 14 is exposed, reducing the difficulty and experience requirements of the exposure control, thereby simplifying the preparation process, and reducing the risk of rework during the preparation process.

[0042] The above-mentioned preparation method is not only applicable to the preparation of the "T"-shaped structure of the radio frequency device, but also applicable to the preparation of the semiconductor device 1 with the "T"-shaped structure such as the power device. This application takes the "T"-shaped gate as an example for specific description.

[0043] In a possible implementation, Figures 2 to 9 As shown, the substrate 11 includes a substrate 112, a barrier layer 113 formed on one side of the substrate 112, and a source portion 114 and a drain portion 115 located on the side of the barrier layer 113 away from the substrate 112, and the first surface 111 is located on the side of the barrier layer 113 and the source portion 114 and the drain portion 115 away from the substrate 112. The orthographic projection of the first opening 121 on the substrate 11 is located between the source portion 114 and the drain portion 115. Fig. 9As shown, the first functional portion 150 is a gate.

[0044] Specifically, the material of the substrate 112 is not limited to silicon, sapphire, silicon carbide (SiC), and other substrate 112 materials.

[0045] In the above embodiment, a gate having a "T" structure is used, so that the length of the gate along the arrangement direction of the source portion 114 and the drain portion 115 can be reduced, that is, the gate root is narrower, and the contact area between the gate and the barrier layer 113 can be reduced, so that the gate control capability can be improved and the cut-off frequency of the semiconductor device 1 can be improved. The gate cap of the "T"-shaped gate is wider, which can reduce the gate resistance, which is particularly important for high-frequency and high-power semiconductor devices 1, because lower gate resistance can reduce radio frequency losses and improve the efficiency and performance of the semiconductor device 1. It can also increase the current density, that is, at the same gate voltage, a larger current can pass. It can also enhance the electric field distribution and reduce the electric field concentration phenomenon at the gate tip, which helps to improve the breakdown voltage and reliability of the semiconductor device 1, making it more stable under high voltage operation. It can also improve the frequency response. Due to the reduction of gate resistance and the improvement of electric field distribution, the "T"-shaped gate can significantly improve the frequency response characteristics of the semiconductor device 1, so that it can work effectively at a higher frequency. It can also improve thermal management, help to distribute heat more evenly, reduce the formation of hot spots, and thus improve the thermal management performance of the semiconductor device 1. This helps to improve the stability and life of the high-power semiconductor device 1 .

[0046] In a possible implementation, Figure 6 and Figure 7 As shown, step S1200 includes:

[0047] The preset area of ​​the second photoresist layer 14 is exposed, and the preset area is developed with a developer to remove the portion of the second photoresist layer 14 located in the preset area, and the portion of the first metal layer 13 opposite to the preset area is removed with the developer to form a second opening 16, wherein the orthographic projection of the preset area on the substrate 11 covers and exceeds the orthographic projection of the first opening 121 on the substrate 11.

[0048] In the process of forming the second opening 16, the preset area of ​​the second photoresist layer 14 and the area of ​​the first metal layer 13 opposite to the preset area can be removed simultaneously by selecting a suitable developer. Since the first metal layer 13 is a non-transparent film layer, when the second photoresist layer 14 and the first metal layer 13 react with the developer to form the second opening 16, the first metal layer 13 can be used as a basis for judging whether the development is sufficient. By observing whether the area (i.e., the preset area) in the first metal layer 13 used to form the second opening 16 is corroded clean by the developer, it can be judged whether the preparation of the second opening 16 is completed.

[0049] Specifically, the developer first reacts with the preset area to form an opening, which exposes a partial area in the first metal layer 13. The developer continues to react with the first metal layer 13 exposed through the opening, thereby corroding the area of ​​the first metal layer 13 opposite to the preset area to form a second opening 16 that penetrates the first metal layer 13 and the second photoresist layer 14.

[0050] In the above embodiment, the developer will continue to react with the side surface of the first metal layer 13 toward the second opening 16 through the second opening 16, that is, the developer will further react to the first metal layer 13 located between the first photoresist layer 12 and the second photoresist layer 14, so that at the position of the second opening 16, the boundary of the orthographic projection of the first metal layer 13 on the substrate 11 is located outside the boundary of the orthographic projection of the second photoresist layer 14 on the substrate 11. When the first functional layer 15 is formed in thickness, the probability of adhesion between the first metal layer 13 and the first functional layer 15 can be reduced, so that the subsequent first metal layer 13 is easier to remove.

[0051] In a feasible implementation manner, the first metal layer 13 is formed by an evaporation growth process, and the material of the first metal layer 13 includes aluminum.

[0052] In the above embodiment, the first metal layer 13 is prepared by an evaporation growth process with a low preparation temperature, which can reduce the effect of temperature on the morphology of the first photoresist layer 12 , thereby further improving the yield of the first functional portion 150 .

[0053] In the above embodiment, the first metal layer 13 can be made of a metal material that is easily corroded and removed by a developer, so as to simplify the preparation process of the second opening 16 and save the process of patterning the first metal layer 13, thereby reducing the preparation difficulty and cost.

[0054] In a feasible implementation, the material of the developer includes tetramethylammonium hydroxide.

[0055] In the above embodiment, tetramethylammonium hydroxide can simultaneously develop and remove the first metal layer 13 and the second photoresist layer 14, thereby simplifying the preparation process.

[0056] In a possible implementation, Figures 2 to 9 As shown, the first opening 121 is formed before forming the first metal layer 13, or, as shown in FIG. Figures 10 to 15 As shown, the first opening 121 is formed after the second opening 16 is formed.

[0057] In the above embodiment, step S600 is performed between step S400 and step S800, that is, the first photoresist layer 12 is patterned immediately after the first photoresist layer 12 is formed to form a first opening 121, and then the first metal layer 13 is formed on the surface of the first photoresist layer 12 facing away from the substrate 11 and on the side of the first opening 121 facing away from the substrate 11. The first metal layer 13 will partially enter the first opening 121 during the preparation process, but because there is air in the first opening 121, it can fill the first opening 121 to a certain extent, and the first metal layer 13 adopts a growth method with less energy, so the part of the first metal layer 13 entering the first opening 121 is very small, which has little impact on the subsequent removal of the first metal layer 13.

[0058] Specifically, step S600 includes:

[0059] The region of the first photoresist layer 12 for forming the first opening 121 is exposed and developed to form the first opening 121 .

[0060] In the above embodiment, when the first photoresist layer 12 adopts a positive photoresist, the step of exposing the first photoresist layer 12 includes: exposing a preset region of the first photoresist layer 12 for forming the first opening 121. When the first photoresist layer 12 adopts a negative photoresist, the step of exposing a region of the first photoresist layer 12 for forming the first opening 121 includes: exposing a region of the first photoresist layer 12 other than the preset region for forming the first opening 121.

[0061] In the above implementation, step S600 may also be performed between step S1200 and step S1400. In this case, step S600 includes:

[0062] The region of the first photoresist layer 12 for forming the first opening 121 is exposed and developed to form the first opening 121 .

[0063] Since some areas in the first photoresist layer 12 are blocked by the first metal layer 13 and cannot be exposed, the first photoresist layer 12 can only use positive photoresist at this time. The step of exposing the area in the first photoresist layer 12 for forming the first opening 121 includes: exposing a preset area in the first photoresist layer 12.

[0064] Specifically, the preparation process includes: S200, such as Figure 2 As shown, a substrate 11 is provided, and the substrate 11 includes a first surface 111. S400, as Figure 2 As shown, a first photoresist layer 12 is formed on the first surface 111. S800, as shown Fig.10As shown, a first metal layer 13 is formed on the side of the first photoresist layer 12 facing away from the substrate 11. S1000, as shown Fig.11 As shown, a second photoresist layer 14 is formed on a surface of the first metal layer 13 facing away from the substrate 11. S1200, as Fig.12 and Fig.13 As shown, a second opening 16 penetrating the second photoresist layer 14 and the first metal layer 13 is formed, and the orthographic projection of the second opening 16 on the substrate 11 covers and exceeds the orthographic projection of the first opening 121 on the substrate 11. S600, as Fig.14 As shown, a first opening 121 is formed in the first photoresist layer 12, and the first opening 121 exposes a portion of the first surface 111. S1400, as shown Fig.15 As shown, a first functional layer 15 is formed on the side of the second photoresist layer 14 facing away from the substrate 11, as shown in FIG. Fig. 9 As shown, the first photoresist layer 12 , the first metal layer 13 , the second photoresist layer 14 and a portion of the first functional layer 15 located on a side of the second photoresist layer 14 away from the substrate 11 are removed to form a first functional portion 150 .

[0065] In the preparation method of the semiconductor device 1 provided in the present application, a three-layer mask of the first photoresist layer 12, the second photoresist layer 14 and the first metal layer 13 can be used to prepare a "T"-shaped structure, saving the number of masks. A total of two exposures and two development processes are used to form the first opening 121 and the second opening 16, which greatly saves the preparation process and preparation time. At the same time, the first metal layer 13 is used as a barrier layer, and the first metal layer 13 can play a role in shading. When the second photoresist layer 14 is exposed, it can effectively prevent the first photoresist layer 12 from being affected, thereby improving the preparation accuracy of the lower part of the "T"-shaped structure. The first metal layer 13 and the first photoresist layer 12 are not easily miscible, which can prevent the morphology of the first photoresist layer 12 from being affected, so as to further ensure the preparation yield and process stability of the first functional part 150. The first metal layer 13 can also be used as a basis for determining whether the second opening 16 region has been developed. Since the first metal layer 13 is a non-transparent material, it can be determined whether the development is completed by observing whether there is any first metal layer 13 residue in the second opening 16 region. That is, the preparation method of the semiconductor device 1 provided by the present application reduces the complexity of the process, shortens the process time, solves the problems of colloid miscibility and difficulty in judging the degree of development, and can greatly improve the preparation yield, reduce the rework problem caused by uncontrollable process, and further save preparation costs.

[0066] In the method for preparing the semiconductor device 1 provided in the present application, the exposure method may be electron beam exposure or optical exposure.

[0067] In a possible implementation, Fig.16As shown, after step S600, the following steps are further included:

[0068] The substrate 11 is patterned, and a portion of the substrate 11 opposite to the first opening 121 is removed to form a first groove 1131 .

[0069] In the above embodiment, by forming the first groove 1131 in the substrate 11, the first functional part 150 can be subsequently arranged in the first groove 1131, which can improve the electric field distribution between the gate and the source part 114 and the drain part 115. In the process of etching the substrate 11 to form the first groove 1131, a flatter surface can be formed, reducing the electric field concentration between the gate and the barrier layer 113, thereby reducing the breakdown phenomenon caused by excessive electric field. By growing the gate in the first groove 1131, the electric field distribution in the current channel area can be effectively regulated to reduce the influence of the high electric field area. It also helps to improve the gate control ability. Since the gate control efficiency of the GaN HEMT device is usually limited by the distance between the gate and the 2DEG (two-dimensional electron gas), the etching of the first groove 1131 can bring the gate closer to the 2DEG, improve the gate's control ability over the leakage current and the channel current, thereby improving the switching speed of the semiconductor device 1 and reducing the leakage current. The thermal management performance can also be enhanced. By forming the first groove 1131, the thermal conduction path of the GaN HEMT device can be improved, so that heat can be more easily transferred from the active area, thereby improving the thermal management performance of the semiconductor device 1 and avoiding overheating caused by high-power operation and affecting the performance or reliability of the semiconductor device 1. The reliability of the semiconductor device 1 can also be improved. The first groove 1131 helps to reduce the mechanical stress of the gate on other structures, especially the contact pressure between the gate and the barrier layer 113, which can reduce cracks or defects caused by stress and help improve the long-term stability and reliability of the semiconductor device 1.

[0070] Specifically, the first groove 1131 may be formed by a dry etching process.

[0071] Specifically, Figures 16 to 22 As shown, the preparation process includes: S200, such as Figure 2 As shown, a substrate 11 is provided, and the substrate 11 includes a first surface 111. S400, as Figure 2 As shown, a first photoresist layer 12 is formed on the first surface 111. S600, as shown Figure 3 As shown, a first opening 121 is formed in the first photoresist layer 12, and the first opening 121 exposes a portion of the first surface 111. S700, as shown Fig.16 As shown, the substrate 11 is patterned, and a portion of the substrate 11 opposite to the first opening 121 is removed to form a first groove 1131. S800, as shown Fig.17As shown, a first metal layer 13 is formed on the side of the first photoresist layer 12 facing away from the substrate 11. S1000, as shown Fig.18 As shown, a second photoresist layer 14 is formed on a surface of the first metal layer 13 facing away from the substrate 11. S1200, as Fig.19 and Fig. 20 As shown, a second opening 16 is formed through the second photoresist layer 14 and the first metal layer 13, and the orthographic projection of the second opening 16 on the substrate 11 covers and exceeds the orthographic projection of the first opening 121 on the substrate 11. S1400, as Fig.21 As shown, a first functional layer 15 is formed on the side of the second photoresist layer 14 facing away from the substrate 11, as shown in FIG. Fig. 22 As shown, the first photoresist layer 12 , the first metal layer 13 , the second photoresist layer 14 and a portion of the first functional layer 15 located on a side of the second photoresist layer 14 away from the substrate 11 are removed to form a first functional portion 150 .

[0072] In a feasible implementation, the material of the first photoresist layer 12 and the second photoresist layer 14 includes one of ethylene oxide (ZEP), polymethyl methacrylate (PMMA), ultraviolet photoresist (UV), and polymethyl glutarimide (PMGI).

[0073] Specifically, ethylene oxide (ZEP) is a kind of glue with moderate sensitivity to electron beams. The electron beam dosage required for exposure is small and the exposure time is relatively short, thereby saving exposure time. At the same time, during the exposure process, due to its low sensitivity to electron beams, the influence of electron beam scattering on ethylene oxide (ZEP) can be reduced, and a finer pattern can be obtained. The use of ethylene oxide (ZEP) in the first photoresist layer 12 can facilitate the subsequent formation of finer gate pins.

[0074] Ultraviolet photoresist (UV) is sensitive to the exposure electron beam and requires a small dose of the exposure electron beam, so the exposure time is short. Using it as the material of the first photoresist layer 12 and the second photoresist layer 14 can save the preparation time of the semiconductor device 1.

[0075] Polymethyl methacrylate (PMMA) and polymethyl glutarimide (PMGI) are also convenient and readily available photoresist materials.

[0076] Specifically, the first photoresist layer 12 may be made of high-resolution photoresist. Since the gate length of the T-shaped gate to be prepared is less than 20 nm, a shorter gate length can be obtained by using high-resolution photoresist. The second photoresist layer 14 needs to use a photoresist whose developer can remove the first metal layer 13. The second photoresist layer 14 often uses a photoresist that can be developed using a positive photo developer such as tetramethylammonium water that has alkalinity and can corrode the first metal layer 13, such as ultraviolet photoresist.

[0077] The present application also provides a semiconductor device 1, which is prepared by any one of the methods for preparing a semiconductor device 1 provided in the above embodiments of the present application.

[0078] The "T"-shaped structure in the semiconductor device 1 has a higher yield, a simple and controllable manufacturing process, and a shorter manufacturing time.

[0079] Specifically, the semiconductor device 1 in the present application may include a gallium nitride high electron mobility transistor.

[0080] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for preparing a semiconductor device, characterized in that: include: providing a substrate, the substrate comprising a first surface; forming a first photoresist layer on the first surface; forming a first opening in the first photoresist layer, wherein the first opening exposes a portion of the first surface; forming a first metal layer on a side of the first photoresist layer facing away from the substrate; forming a second photoresist layer on a surface of the first metal layer facing away from the substrate; forming a second opening portion penetrating the second photoresist layer and the first metal layer, wherein an orthographic projection of the second opening portion on the substrate covers and exceeds an orthographic projection of the first opening portion on the substrate; A first functional layer is formed on the side of the second photoresist layer away from the substrate, and the first photoresist layer, the first metal layer, the second photoresist layer and the portion of the first functional layer located on the side of the second photoresist layer away from the substrate are removed to form a first functional portion.

2. The method for preparing a semiconductor device according to claim 1, wherein: The step of forming a second opening portion penetrating the second photoresist layer and the first metal layer comprises: Expose a preset area of ​​the second photoresist layer, develop the preset area with a developer, remove a portion of the second photoresist layer located in the preset area, and remove a portion of the first metal layer opposite to the preset area with the developer to form the second opening, wherein the orthographic projection of the preset area on the substrate covers and exceeds the orthographic projection of the first opening on the substrate.

3. The method for preparing a semiconductor device according to claim 2, characterized in that: The material of the developer includes tetramethylammonium hydroxide.

4. The method for preparing a semiconductor device according to claim 1, wherein: The first metal layer is formed by an evaporation growth process, and the material of the first metal layer includes aluminum.

5. The method for preparing a semiconductor device according to claim 1, characterized in that: The first opening is formed before forming the first metal layer, or the first opening is formed after forming the second opening.

6. The method for preparing a semiconductor device according to claim 1, wherein: After the step of forming a first opening in the first photoresist layer, wherein the first opening exposes a portion of the first surface, the step further includes: The substrate is patterned to remove a portion of the substrate opposite to the first opening to form a first groove.

7. The method for preparing a semiconductor device according to claim 1, characterized in that: The step of forming a first opening in the first photoresist layer, wherein the first opening exposes a portion of the first surface, comprises: The region of the first photoresist layer for forming the first opening is exposed and developed to form the first opening.

8. The method for preparing a semiconductor device according to claim 1, wherein: The material of the first photoresist layer and the second photoresist layer includes one of ethylene oxide, polymethyl methacrylate, ultraviolet photoresist, and polymethyl glutarimide.

9. The method for preparing a semiconductor device according to claim 1, wherein: The substrate comprises a substrate, a barrier layer formed on one side of the substrate, and a source portion and a drain portion located on a side of the barrier layer away from the substrate, and the first surface is located on a side of the barrier layer and the source portion and the drain portion away from the substrate; The orthographic projection of the first opening on the substrate is located between the source and the drain; The first functional portion is a gate.

10. A semiconductor device, characterized in that: The semiconductor device is prepared by the method for preparing the semiconductor device according to any one of claims 1 to 9.

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