Light emitting diode and light emitting device
By planning specific areas in the light-emitting diode to avoid conductive vias and setting conductive vias in other areas, combined with the design of the current expansion layer, the problems of uneven current distribution and excessive local current density in vertical light-emitting diodes are solved, and the chip's anti-ESD capability and the quality of the light-emitting diode are improved.
Patent Information
- Application Number
- CN202411990406.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-04-11
AI Technical Summary
Vertical light-emitting diodes have problems such as uneven current distribution and excessive local current density of the chip, which leads to damage to the anti-ESD capability and affects the chip quality.
A light emitting diode is designed, which includes a semiconductor stack, a pad electrode, a current expansion layer and an insulating reflective layer. By planning specific areas, such as the first and third areas, it is avoided to provide conductive vias in these areas, but to provide conductive vias in other areas, and to retain current expansion layers in these areas to improve current distribution and reduce local current density.
It effectively improves the uneven current distribution, reduces the local current density of the chip, and improves the chip's ESD resistance and the quality of the light emitting diode.
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Figure CN119816019A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a light emitting diode and a light emitting device. Background Art
[0002] Light Emitting Diode (LED) is a semiconductor light-emitting element, usually made of semiconductors such as GaN, GaAs, GaP, GaAsP, etc., and its core is a PN junction with light-emitting characteristics. LED has the advantages of high luminous intensity, high efficiency, small size, and long service life, and is considered to be one of the most promising light sources at present. LED has been widely used in lighting, monitoring and command, high-definition broadcasting, high-end cinemas, office displays, conference interaction, virtual reality and other fields.
[0003] Vertical light-emitting diodes are obtained by transferring the semiconductor epitaxial stack to other substrates such as silicon, silicon carbide or metal substrates, and removing the original epitaxially grown substrate. This can effectively improve the technical problems of light absorption, current crowding or poor heat dissipation caused by the epitaxially grown substrate. The transfer of the substrate generally adopts a bonding process, and the bonding is mainly carried out by metal-metal high temperature and high pressure bonding, that is, a metal bonding layer is formed between one side of the semiconductor epitaxial stack and the substrate. The other side of the semiconductor epitaxial stack provides a light-emitting side, and a wire electrode is arranged on the light-emitting side to provide current injection or outflow. The substrate below the semiconductor epitaxial stack provides current outflow or inflow, thereby forming a light-emitting diode in which the current passes vertically through the semiconductor epitaxial stack.
[0004] At present, for vertical light-emitting diodes, the main problems are uneven current distribution and excessive local current density near the chip's electrodes, which damages the chip's ESD resistance and seriously affects the chip quality.
[0005] It should be noted that the information disclosed in this background technology section is only intended to increase the understanding of the overall background of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes prior art already known to a person skilled in the art. Summary of the invention
[0006] The invention provides a light emitting diode, which comprises a semiconductor stack, a pad electrode, a current spreading layer and an insulating reflective layer.
[0007] The semiconductor stack has a first surface and a second surface relative to each other. The pad electrode is arranged on the first surface of the semiconductor stack. The current spreading layer is arranged on the second surface of the semiconductor stack. The insulating reflective layer is arranged on the second surface of the semiconductor stack and covers part of the current spreading layer. The insulating reflective layer has a plurality of conductive through holes, and the conductive through holes are arranged correspondingly below the current spreading layer. Looking down from the top of the light-emitting diode toward the semiconductor stack, a circle with a first radius R1 ranging from 50 to 200 μm and a center point of the pad electrode as the center is defined as a first region, the conductive through holes are all located outside the first region, and part of the current spreading layer is located within the first region.
[0008] The invention provides a light emitting diode, which comprises a semiconductor stack, a pad electrode, a current spreading layer and an insulating reflective layer.
[0009] The semiconductor stack has a first surface and a second surface relative to each other. The pad electrode is arranged on the first surface of the semiconductor stack. The current spreading layer is arranged on the second surface of the semiconductor stack. The insulating reflective layer is arranged on the second surface of the semiconductor stack and covers part of the current spreading layer. The insulating reflective layer has a plurality of conductive through holes, and the conductive through holes are arranged correspondingly under the current spreading layer. Wherein, looking down from the top of the light-emitting diode toward the semiconductor stack, the pad electrode has a first side edge and a second side edge relative to each other, and the direction from the first side edge to the second side edge is defined as the extension direction. The second side edge extends a distance S1 toward the extension direction to form a fourth side edge, and the range of S1 is 50~200μm. The area of the light-emitting diode located between the second side edge and the fourth side edge is the third area, and the conductive through holes are all located outside the third area, and part of the current spreading layer is located within the third area.
[0010] The present invention also provides a light emitting device, which adopts any of the light emitting diodes provided above.
[0011] A light-emitting diode and a light-emitting device provided by the present invention effectively improve the uneven current distribution and solve the problem of excessive local current density of the chip by planning a first area, not setting a conductive through hole in the first area, and having a current expansion layer in the first area, thereby improving the chip's anti-ESD capability and improving the quality of the light-emitting diode.
[0012] Other features and beneficial effects of the present invention will be described in the following description, and some of the technical features and beneficial effects can be obviously derived from the description or understood by implementing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, some of the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0014] Figure 1 is a schematic diagram of a top view of a light emitting diode provided in a first embodiment of the present invention; Figure 2 is along Figure 1 A schematic diagram of a cross-sectional structure taken along the interception line FF; Figure 3 is a schematic diagram of a top view of a light emitting diode provided in a second embodiment of the present invention; Figure 4 is a schematic diagram of a top view of a light emitting diode provided in a third embodiment of the present invention; Figure 5 is a schematic diagram of a top view of a light emitting diode provided in a fourth embodiment of the present invention; Figure 6 is a schematic diagram of a top view of a light emitting diode provided in a fifth embodiment of the present invention; Figure 7 is a schematic diagram of a top view of a light emitting diode provided in a sixth embodiment of the present invention; Figure 8 It is a schematic diagram of the top structure of a light emitting diode provided by the seventh embodiment of the present invention.
[0015] Reference numerals: 10-semiconductor stack; 101-first surface; 102-second surface; 103-first semiconductor layer; 104-light emitting layer; 105-second semiconductor layer; 21-pad electrode; 22-extended electrode; 40-current spreading layer; 41-ohmic contact layer; 42-insulating reflective layer; 422-conductive via; 44-metal reflective layer; 46-substrate; 48-back electrode; 50-bonding layer; 51-first region; 52-second region; 53-third region; 54-fourth region; 61-first side; 62-second side; 63-third side; 64-fourth side; 65-fifth side; L1, L2, L3, L4-distance between two adjacent conductive vias; A-center point; Y-extension direction. DETAILED DESCRIPTION
[0016] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments; the technical features designed in different implementation modes of the present invention described below can be combined with each other as long as they do not conflict with each other; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0017] In the description of the present invention, it should be understood that the terms "center", "lateral", "up", "down", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more. In addition, the term "including" and any variation thereof all mean "at least including".
[0018] See also Figure 1 and Figure 2 , Figure 1 is a schematic diagram of a top view of a light emitting diode provided in a first embodiment of the present invention, Figure 2 is along Figure 1 FF is a cross-sectional structural diagram of the embodiment of the present invention. In order to achieve at least one of the above advantages or other advantages, the first embodiment of the present invention provides a light emitting diode. As shown in the figure, the light emitting diode includes a semiconductor stack 10, a pad electrode 21, a current spreading layer 40 and an insulating reflective layer 42.
[0019] The semiconductor stack 10 has a first surface 101 and a second surface 102 opposite to each other. In this embodiment, the first surface 101 is an upper surface, and the second surface 102 is a lower surface. The first surface 101 can be a light emitting surface. The semiconductor stack 10 includes a first semiconductor layer 103, a light emitting layer 104, and a second semiconductor layer 105 in sequence from the first surface 101 to the second surface 102.
[0020] The first semiconductor layer 103 and the second semiconductor layer 105 can be respectively provided with at least electrons or holes by n-type doping or p-type doping. The first semiconductor layer 103 can be doped with n-type dopants such as Si, Ge or Sn, and the second semiconductor layer 105 can be doped with p-type dopants such as Mg, Zn, Ca, Sr or Ba. The first semiconductor layer 103, the light-emitting layer 104, and the second semiconductor layer 105 can be made of materials such as aluminum gallium indium nitrogen, gallium nitride, aluminum gallium nitrogen, aluminum indium phosphide, aluminum gallium indium phosphide or gallium arsenide or aluminum gallium arsenic or gallium phosphide. The light-emitting layer 104 is a region for providing electrons and holes to recombine and provide light radiation. Different materials can be selected according to different light-emitting wavelengths. The light-emitting layer 104 can be a periodic structure of a single quantum well or multiple quantum wells. By adjusting the composition ratio of the semiconductor material in the light-emitting layer 104, it is expected to radiate light of different wavelengths. Optionally, the semiconductor stack 10 is composed of AlGaInP-based or GaAs-based materials or GaN-based materials.
[0021] The pad electrode 21 is disposed on the first surface 101 of the semiconductor stack 10. The pad electrode 21 can be made of metal materials, such as Cr, Pt, Au, Ni, Ti, Al, etc. The pad electrode 21 can be used for subsequent wire bonding and electrical conduction.
[0022] A current spreading layer 40 may be further disposed below the second semiconductor layer 105, that is, the current spreading layer 40 is disposed on the second surface 102 of the semiconductor stack 10, and the current spreading layer 40 plays a role in diffusing current. The material of the current spreading layer 40 may be the same as the material system of the semiconductor stack 10, such as an AlGaInP system. Figure 2 As shown, the light emitting diode further includes an ohmic contact layer 41 (for clarity of illustration, Figure 1The ohmic contact layer 41 is not shown in the figure), and the ohmic contact layer 41 is arranged under the current spreading layer 40. That is to say, the ohmic contact layer 41 can be arranged under the current spreading layer 40 of GaP material. The ohmic contact layer 41 can be a transparent conductive layer, such as "indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium doped zinc oxide (GZO), tungsten doped indium oxide (IWO) or zinc oxide (ZnO), etc.
[0023] In some embodiments, Figure 1 As shown, the current spreading layer 40 can be patterned to further diffuse the current and reduce light absorption. Optionally, a portion of the current spreading layer 40 is in a strip shape, and a plurality of conductive vias 422 are distributed in the strip-shaped current spreading layer 40, and a portion of the current spreading layer 40 is in a dispersed circular shape, and a conductive via 422 is distributed in each circular current spreading layer 40. Taking this embodiment as an example, the pattern of the current spreading layer 40 is divided into two parts, such as Figure 1 As shown, the current spreading layer 40 in the lower part is in the shape of a long strip, in which a plurality of conductive vias 422 are distributed; the current spreading layer 40 in the upper part is in the shape of a plurality of dispersed circles, in each circle a conductive via 422 is distributed.
[0024] The insulating reflective layer 42 is disposed on the second surface 102 of the semiconductor stack 10 and covers part of the current spreading layer 40. The insulating reflective layer 42 has a plurality of conductive vias 422, which are correspondingly disposed below the current spreading layer 40. The semiconductor stack 10 can be electrically connected to the back electrode below through the conductive vias 422. The material of the insulating reflective layer 42 may include transparent compounds such as silicon nitride, silicon oxide, titanium oxide, and their stacked combinations, for example, a Bragg reflector (DBR) formed by repeatedly stacking two materials with different refractive indices. Looking down from the top of the light-emitting diode toward the semiconductor stack 10, the conductive vias 422 are located in the current spreading layer 40.
[0025] like Figure 1As shown, looking down from the top of the light-emitting diode toward the semiconductor stack 10, the circle with the center point A of the pad electrode 21 as the center and the first radius R1 in the range of 50-200 μm is defined as the first region 51, and the area within the circle with the second radius R2 minus the area of the first region 51 is the second region 52 (that is, the area of the circle R2 minus the area of the circle R1, and the remaining circular portion is the second region 52), R2>R1, the conductive vias 422 are all located outside the first region 51 (that is, no conductive vias 422 are provided in the first region 51), and part of the current spreading layer 40 is located in the first region 51. Conventional light-emitting diodes will have conductive vias 422 in the first region 51. Since the first region 51 is the peripheral region of the pad electrode 21 and is a current congestion region, the provision of conductive vias 422 in the first region 51 will further aggravate the current congestion, resulting in excessive current density in the region, thereby destroying the chip's anti-ESD capability. In comparison, the present invention solves the problem of excessive local current density in the chip by planning a first area 51 without setting a conductive through hole 422 in the first area 51; and the current expansion layer 40 is still retained in the first area 51 to enhance the current expansion performance and effectively improve the uneven current distribution.
[0026] It should be noted that the number of pad electrodes 21 in this embodiment is 2, and each pad electrode 21 can form the above-mentioned first area 51 and second area 52, and the conductive through hole 422 and the current spreading layer 40 conform to the planning for the first area 51 and the second area 52. The figure only illustrates one first area 51 and one second area 52. The pad electrode 21 can be in the shape of a circle, an ellipse, a quasi-circle, a polygon or an irregular figure. When the pad electrode 21 is square or rectangular, the midpoint is the intersection of the diagonal lines; when the pad electrode 21 is elliptical or quasi-circular, the midpoint is the center point of the circle; when the pad electrode 21 is more polygonal, irregular, etc., the midpoint is its center point A. In some embodiments, the pad electrode 21 can be arranged at the side of the semiconductor stack 10, or it can be arranged in the middle of the semiconductor stack 10.
[0027] Preferably, R1 ranges from 80 to 150 μm, which can further solve the problem of excessive local current density of the chip and improve the chip's ESD resistance. In comparison, 80 μm has a larger radius than 50 μm, which makes the conductive via 422 farther from the pad electrode 21, which is conducive to solving the problem of excessive current density; 150 μm has a smaller radius than 200 μm, which can prevent excessive voltage increase and reduce voltage while solving the problem of excessive current density.
[0028] In some embodiments, there are a small number of conductive vias 422 in the second region 52, and a large number of conductive vias 422 outside the second region 52 (i.e., the chip portion with A as the center and radius R>R2, the radius R is not shown in the figure, and R is usually 2 to 10 times of R2). Since there are few conductive vias 422 near the pad electrode 21, the problem of excessive local current density near the electrode 21 can be reduced. Optionally, R2 ranges from 100 to 250 μm. R2 is at least 1.5 times R1, which further improves the uneven current distribution, solves the problem of excessive local current density of the chip, and improves the chip's anti-ESD capability.
[0029] The spacing L1 between two adjacent conductive vias 422 located in the second region 52 may be greater than or equal to the spacing L2 between two adjacent conductive vias 422 located outside the second region 52. The conductive vias 422 in the second region 52 are relatively sparse, and the conductive vias 422 outside the second region 52 are relatively dense, thereby improving the current spreading performance and effectively improving the uneven current distribution. Optionally, the spacing L1 between two adjacent conductive vias 422 located in the second region 52 is at least twice the spacing L2 between two adjacent conductive vias 422 located outside the second region 52, thereby improving the current spreading performance near the pad electrode 21.
[0030] In some embodiments, the distance L2 between two adjacent conductive through holes 422 located outside the second region 52 gradually decreases in the direction away from the pad electrode 21. Since the area outside the second region 52 is far away from the pad electrode 21, the problem of high current density is less likely to exist. Therefore, more conductive through holes 422 can be set, thereby improving the current expansion performance and effectively improving the uneven current distribution.
[0031] In some embodiments, the light emitting diode further includes an extended electrode 22, which is disposed on the first surface 101 of the semiconductor stack 10 and connected to the pad electrode 21, and extends in a direction away from the pad electrode 21. The extended electrode 22 may be a single-layer structure, a double-layer structure, or a multi-layer structure. The material of the extended electrode 22 may be a metal material, such as Cr, Pt, Au, Ni, Ti, Al, or the like. In some embodiments, when looking down from the top of the light emitting diode toward the semiconductor stack 10, the number of the extended electrodes 22 is multiple, and the number of the extended electrodes 22 in this embodiment is 9.
[0032] In some embodiments, the light emitting diode is a vertical light emitting diode. The light emitting diode further includes a substrate 46 , a bonding layer 50 , a metal reflective layer 44 and a back electrode 48 .
[0033] The metal reflective layer 44 is covered and disposed under the insulating reflective layer 42, and is connected to the current spreading layer 40 through the conductive via 422. The metal reflective layer 44 can be made of metal material. The metal reflective layer 44 can have a reflectivity of more than 90%, and can be formed of a metal or alloy containing at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Ti, Cr, Zn, Pt, Au and Hf. The metal reflective layer 44 can reflect the light radiated from the semiconductor stack 10 toward the substrate 46 side back to the semiconductor stack 10, and radiate out from the first surface 101 side as the light emitting surface.
[0034] The bonding layer 50 is disposed under the metal reflective layer 44. The bonding layer 50 bonds the metal reflective layer 44 to the substrate 46. The bonding layer 50 may be a combination of any one or more materials such as gold, tin, titanium, tungsten, nickel, platinum, indium, etc. The bonding layer 50 may be a single-layer structure or a multi-layer structure.
[0035] The substrate 46 is disposed under the bonding layer 50. The substrate 46 is a conductive substrate 46, and the conductive substrate 46 may be silicon, silicon carbide or a metal substrate 46, and the metal substrate 46 is preferably a copper, tungsten, copper tungsten or molybdenum substrate 46. In order to support the semiconductor stack 10 with sufficient mechanical strength, the thickness of the substrate 46 may be greater than 50 μm. In this embodiment, the substrate 46 is a silicon substrate 46 or a CuW substrate 46.
[0036] The back electrode 48 is disposed under the substrate 46. The back electrode 48 can be made of metal material.
[0037] See also Figure 3 , Figure 3 FIG. 1 is a schematic diagram of a top view of a light emitting diode provided in the second embodiment of the present invention. Figure 1 As for the light-emitting diode of the first embodiment shown, the difference of this embodiment lies mainly in that, in a top view, the current spreading layer 40 in the first embodiment is dispersedly distributed as a plurality of circular holes in the area away from the pad electrode 21, while the current spreading layer 40 in the second embodiment is distributed in strips. The morphological distribution of this embodiment can be selected according to different needs.
[0038] See also Figure 4 , Figure 4 FIG. 1 is a schematic diagram of a top view of a light emitting diode provided in the third embodiment of the present invention. Figure 1 As for the light-emitting diode of the first embodiment shown, the difference of this embodiment lies mainly in that, in a top view, the current spreading layer 40 in the first embodiment is dispersedly distributed as a plurality of circular holes in the area away from the pad electrode 21, while the current spreading layer 40 located between two adjacent extension electrodes 22 in the third embodiment is in the shape of a square. The morphological distribution of this embodiment can be selected according to different needs.
[0039] See also Figure 5 , Figure 5 FIG. 4 is a schematic diagram of a top view of a light emitting diode provided in the fourth embodiment of the present invention. Figure 1 As for the light emitting diode of the first embodiment shown, the difference of this embodiment mainly lies in that the two pad electrodes 21 in this embodiment are distributed on the upper and lower sides of the light emitting diode, rather than being located on the same side. In the fourth embodiment, each pad electrode 21 can form a first region 51 and a second region 52, and the distribution of the conductive vias 422 and the current spreading layer 40 conforms to the planning for the first region 51 and the second region 52. The structure of the conductive vias 422 and the current spreading layer 40 is omitted in this figure, and the distribution rules of the conductive vias 422 and the current spreading layer 40 in the first region 51 and the second region 52 can refer to the first embodiment.
[0040] See also Figure 6 , Figure 6 FIG. 5 is a schematic diagram of a top view of a light emitting diode provided in the fifth embodiment of the present invention. Figure 1 As for the light emitting diode of the first embodiment shown, the difference of this embodiment is mainly that: the two pad electrodes 21 in this embodiment are distributed at the midline of the light emitting diode, rather than being located on the same side, in the fifth embodiment, each pad electrode 21 can form a first region 51 and a second region 52, and the distribution of the conductive vias 422 and the current spreading layer 40 are in accordance with the planning for the first region 51 and the second region 52. The structure of the conductive vias 422 and the current spreading layer 40 is omitted in this figure, and the distribution rules of the conductive vias 422 and the current spreading layer 40 in the first region 51 and the second region 52 can refer to the first embodiment.
[0041] See also Figure 7 , Figure 7 FIG. 6 is a schematic diagram of a top view of a light emitting diode provided in the sixth embodiment of the present invention. Figure 1 With respect to the light-emitting diode of the first embodiment shown, the difference of this embodiment mainly lies in that the pad electrode 21 in this embodiment is circular and located at the center of the light-emitting diode. Similarly, the pad electrode 21 can form a first area 51, and the distribution of the conductive through hole 422 and the current expansion layer 40 conforms to the planning for the first area 51.
[0042] See also Figure 8 , Figure 81 is a schematic diagram of a top view of a light emitting diode provided in the seventh embodiment of the present invention. In order to achieve at least one of the above advantages or other advantages, the seventh embodiment of the present invention provides a light emitting diode. As shown in the figure, the light emitting diode includes a semiconductor stack 10, a pad electrode 21, a current spreading layer 40 and an insulating reflective layer 42. The materials and positions of the semiconductor stack 10, the pad electrode 21, the current spreading layer 40 and the insulating reflective layer 42 are the same as those in the first embodiment, and will not be described in detail here.
[0043] In this embodiment, the pad electrode 21 is rectangular and is located on one side of the light emitting diode. Looking down from the top of the light emitting diode toward the semiconductor stack 10, the pad electrode 21 has a first side 61 and a second side 62 opposite to each other. In this embodiment, the first side 61 and the second side 62 are respectively the lower side and the upper side of the pad electrode 21. The light emitting diode has a third side 63 adjacent to the first side 61.
[0044] The direction from the first side 61 to the second side 62 is defined as the extension direction Y, that is, the direction from bottom to top in the figure is the extension direction Y. The second side 62 extends a distance S1 in the extension direction Y to form a fourth side 64, and the second side 62 extends a distance S2 in the extension direction Y to form a fifth side 65. S2>S1, and the range of S1 is 50~200μm. The area between the second side 62 and the fourth side 64 of the light-emitting diode is the third area 53, and the area between the fourth side 64 and the fifth side 65 of the light-emitting diode is the fourth area 54. The conductive through holes 422 are all located outside the third area 53, and part of the current spreading layer 40 is located within the third area 53. Conventional light-emitting diodes also have conductive through holes 422 near the pad electrode 21 (such as the third area 53). Since the third area 53 is the peripheral area of the pad electrode 21, it is easy to cause current congestion. Compared with traditional light-emitting diodes, the present invention solves the problem of excessive local current density in the chip by planning a third area 53, and no longer setting a conductive through hole 422 in the third area 53; and the current expansion layer 40 is still retained in the third area 53 to improve the current expansion performance and effectively improve the uneven current distribution.
[0045] In some embodiments, S2 ranges from 100 to 250 μm. S2 is at least 1.5 times of S1, thereby effectively improving uneven current distribution, solving the problem of excessive local current density in the chip, and improving the chip's ESD resistance.
[0046] In some embodiments, the pad electrode 21 is relatively large, and the length of the first side 61 is at least 50% of the length of the third side 63. Optionally, the first side 61, the second side 62, the third side 63, the fourth side 64 and the fifth side 65 are parallel to each other.
[0047] In some embodiments, the spacing L3 between two adjacent conductive vias 422 in the fourth region 54 may be greater than or equal to the spacing L4 between two adjacent conductive vias 422 outside the fourth region 54, thereby improving the current spreading performance and effectively improving the uneven current distribution. There are more conductive vias 422 in the portion outside the fourth region 54 (i.e., the region of the chip in the Y direction where the distance from the second side 62 is greater than or equal to S2).
[0048] It is additionally noted that, in the above schematic top view structures, the area where the pad electrode 21 is located is indicated by hatching.
[0049] An embodiment of the present invention provides a light emitting device, which includes a light emitting diode, wherein the light emitting diode is a light emitting diode as described in any of the above embodiments. The light emitting diode can be arranged on a circuit board.
[0050] The light-emitting diode and light-emitting device provided by the present invention effectively improve the uneven current distribution and solve the problem of excessive local current density of the chip by planning a first area 51, no conductive through hole 422 is set in the first area 51, and a current expansion layer 40 is present in the first area 51, thereby effectively improving the uneven current distribution and solving the problem of excessive local current density of the chip, improving the chip's ESD resistance, and improving the quality of the light-emitting diode. The third area 53 is planned, no conductive through hole 422 is set in the third area 53, and a current expansion layer 40 is present in the third area 53, thereby effectively improving the uneven current distribution and solving the problem of excessive local current density of the chip, improving the chip's ESD resistance, and improving the quality of the light-emitting diode.
[0051] In addition, those skilled in the art should understand that, although there are many problems in the prior art, each embodiment or technical solution of the present invention can be improved in only one or several aspects, without having to solve all the technical problems listed in the prior art or background technology at the same time. Those skilled in the art should understand that the content not mentioned in a claim should not be used as a limitation on the claim.
[0052] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A light emitting diode, characterized in that: The light emitting diode comprises: A semiconductor stack having opposing first and second surfaces; A pad electrode is disposed on the first surface of the semiconductor stack; A current spreading layer, disposed on the second surface of the semiconductor stack; An insulating reflective layer, disposed on the second surface of the semiconductor stack and covering a portion of the current spreading layer, wherein the insulating reflective layer has a plurality of conductive through holes, and the conductive through holes are correspondingly disposed below the current spreading layer; Among them, looking down from the top of the light-emitting diode toward the semiconductor stack, a circle with a first radius R1 ranging from 50 to 200 μm and a center point of the pad electrode as the center is defined as the first area, the conductive through holes are all located outside the first area, and part of the current spreading layer is located within the first area.
2. The light emitting diode according to claim 1, characterized in that: Looking down toward the semiconductor stack from above the light-emitting diode, define the area excluding the first area within a circle with a second radius R2 with the center point of the pad electrode as the center as the second area, R2>R1, and the spacing between adjacent conductive vias within the second area is greater than or equal to the spacing between adjacent conductive vias outside the second area.
3. The light emitting diode according to claim 2, characterized in that: The spacing between adjacent conductive vias in the second region is at least twice the spacing between adjacent conductive vias outside the second region.
4. The light emitting diode according to claim 2, characterized in that: The spacing between the conductive through holes outside the second region gradually decreases in a direction away from the pad electrode.
5. The light emitting diode according to claim 2, characterized in that: R2 ranges from 100 to 250 μm.
6. The light emitting diode according to claim 2, characterized in that: R2 should be at least 1.5 times greater than R1.
7. The light emitting diode according to claim 1, characterized in that: Looking down toward the semiconductor stack from above the light emitting diode, the conductive vias are all located in the current spreading layer.
8. The light emitting diode according to claim 1, characterized in that: The light emitting diode further includes an extension electrode, which is connected to the pad electrode and extends in a direction away from the pad electrode.
9. The light emitting diode according to claim 1, characterized in that: The light-emitting diode also includes a substrate, a bonding layer, a metal reflective layer and a back electrode. The metal reflective layer is arranged under the insulating reflective layer and is connected to the current spreading layer through the conductive via. The bonding layer is arranged under the metal reflective layer, the substrate is arranged under the bonding layer, and the back electrode is arranged under the substrate.
10. The light emitting diode according to claim 1, characterized in that: R1 ranges from 80 to 150 μm.
11. The light emitting diode according to claim 1, characterized in that: The light emitting diode further includes an ohmic contact layer, and the ohmic contact layer is arranged under the current spreading layer.
12. The light emitting diode according to claim 1, characterized in that: Looking down from the top of the light-emitting diode toward the semiconductor stack, part of the current spreading layer is in the shape of an elongated strip, in which a plurality of the conductive vias are distributed, and part of the current spreading layer is in the shape of a dispersed circle, in which one conductive via is distributed.
13. A light emitting diode, characterized in that: The light emitting diode comprises: A semiconductor stack having opposing first and second surfaces; A pad electrode is disposed on the first surface of the semiconductor stack; A current spreading layer, disposed on the second surface of the semiconductor stack; An insulating reflective layer, disposed on the second surface of the semiconductor stack and covering a portion of the current spreading layer, wherein the insulating reflective layer has a plurality of conductive through holes, and the conductive through holes are correspondingly disposed below the current spreading layer; Among them, looking down toward the semiconductor stack from the top of the light-emitting diode, the pad electrode has a first side and a second side opposite to each other, and the direction from the first side to the second side is defined as an extension direction, and the second side extends a distance S1 in the extension direction to form a fourth side, and the range of S1 is 50~200μm, and the area of the light-emitting diode located between the second side and the fourth side is the third area, the conductive through holes are all located outside the third area, and part of the current spreading layer is located within the third area.
14. The light emitting diode according to claim 13, characterized in that: Looking down toward the semiconductor stack from above the light-emitting diode, the second side extends a distance S2 in the extension direction to form a fifth side, S2>S1, the area of the light-emitting diode located between the fourth side and the fifth side is the fourth area, and the spacing between adjacent conductive through holes located in the fourth area is greater than or equal to the spacing between adjacent conductive through holes located outside the fourth area.
15. The light emitting diode according to claim 14, characterized in that: S2 ranges from 100 to 250 μm.
16. The light emitting diode according to claim 14, characterized in that: S2 is at least 1.5 times greater than S1.
17. A light emitting device, characterized in that: The light emitting device comprises a light emitting diode, and the light emitting diode is a light emitting diode as claimed in any one of claims 1 to 16.
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