Micro-channel pattern for microfluidic process, perovskite transistor and preparation method

Abstract

The invention relates to a micro-channel pattern for a microfluidic process, a perovskite transistor and a preparation method, the micro-channel pattern comprises a main channel and a plurality of branch channels, and the plurality of branch channels are distributed on the side edge of the main channel at intervals; each branch channel comprises a flow guide channel, a buffer area and a crystallization area which are communicated in sequence, and the flow guide channel is communicated with the main channel; in the liquid flowing direction, the width of the flow guide channel is gradually narrowed, the width of the buffer area is gradually narrowed and is in arc transition to the crystallization area, and the area of the buffer area is larger than that of the crystallization area. The micro-channel pattern can realize high-precision positioning growth of the perovskite material on the basis of not reducing the performance of the perovskite material, and has the advantages of high precision, low cost and mass production.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a microchannel pattern, a perovskite transistor and a preparation method for a microfluidic process. Background Art

[0002] Halogen perovskite materials are a very important new type of semiconductor material discovered in the past decade. The material itself has excellent electrical properties such as high carrier mobility and long life. It also has the low-cost advantage of being able to be prepared in solution at room temperature. These advantages make perovskite materials one of the most promising optoelectronic materials. Halogen perovskite materials have broad application prospects, including electronic devices in the traditional microelectronics field, new flexible material devices, photovoltaic industry and water splitting industry in the energy field, photoelectric detectors, light-emitting diodes, lasers, display screens in the optoelectronics field, and high-energy light detection fields such as medical, military, security detection, and cosmic ray detection.

[0003] As the soul of micro-nano processing technology, photolithography technology has been widely used in a variety of semiconductor materials such as silicon, conductive polymers, and metal oxides. However, this process is rarely used in perovskite materials. This is because most semiconductor materials are atomic crystals with high melting and boiling points, and are also very stable in organic solvents such as developers and cleaning solutions (such as acetone). Perovskite materials are ionic crystals and become unstable in organic solvents. In addition, perovskite quantum dots have poor adhesion. These factors determine that perovskite materials are difficult to pattern using traditional photolithography technology.

[0004] In recent years, scholars at home and abroad have conducted research on solutions to bypass the photolithography process to achieve perovskite patterning. Generally speaking, these solutions are divided into indirect patterning technology and direct patterning technology. Among them, indirect patterning refers to constructing perovskite materials on a patterned substrate or template to achieve different micropatterns, which includes template-assisted patterning and indirect substrate patterning; direct patterning is achieved by depositing perovskite into a thin film form, and then processing it through different tools to achieve different micropatterns, including nanoimprint patterning and photopatterning. However, these solutions have problems such as high cost, low precision, difficulty in mass production (high time cost), difficulty in controlling the position and size of perovskite patterning, and reducing the fluorescence efficiency of perovskite during patterning. In addition, since the pattern of the perovskite material cannot be accurately positioned, it is difficult to achieve the positioning deposition of electrodes when preparing devices.

[0005] Therefore, how to achieve high-precision positioning of perovskite material patterns while ensuring the performance of perovskite materials has become a problem that needs to be solved urgently. Summary of the invention

[0006] In order to solve the above problems existing in the prior art, the present invention provides a microchannel pattern, a perovskite transistor and a preparation method for a microfluidic process. The technical problem to be solved by the present invention is achieved by the following technical solutions: The embodiment of the present invention provides a microchannel pattern for microfluidic process, including: a main channel and a plurality of branch channels, wherein: The plurality of branch channels are distributed at intervals on the sides of the main channel; Each of the branch channels comprises a guide channel, a buffer region and a crystallization region, the guide channel, the buffer region and the crystallization region are sequentially connected, and the guide channel is connected to the main channel; Along the liquid flow direction, the width of the guide channel gradually narrows, the width of the buffer region gradually narrows and transitions to the crystallization region in an arc, and the area of ​​the buffer region is larger than that of the crystallization region.

[0007] In one embodiment of the present invention, the shape of the buffer area includes a heart shape.

[0008] In one embodiment of the present invention, the area ratio of the buffer region to the crystallized region is 20:1 to 200:1.

[0009] In one embodiment of the present invention, along the liquid flow direction, the width of the guide channel at the connection point with the main channel is smaller than the width of the main channel.

[0010] Another embodiment of the present invention provides a method for preparing a perovskite transistor, comprising the steps of: sequentially growing a first doping type epitaxial layer and a second doping type epitaxial layer on a surface of a first doping type substrate; forming a second doping type region and a plurality of first doping type regions spaced apart in the second doping type region in a surface layer of the second doping type epitaxial layer, and forming an alignment mark at the same time; Based on the alignment mark, etching is performed in the second doping type region and the plurality of first doping type regions using the microchannel pattern as described in the above embodiment to prepare a groove extending into the first doping type epitaxial layer to form a microchannel, wherein the main channel of the microchannel pattern is formed in the second doping type region, and the crystallization region of each branch channel is formed in the first doping type region; Using a lift-off process to prepare a plurality of metal layers corresponding to the plurality of first doping type regions one by one, to form a plurality of source electrodes, wherein each of the source electrodes covers a portion of the surface of the first doping type region and a portion of the surface of the second doping type region; growing a drain electrode on another surface of the first doping type substrate; The microfluidic process is adopted to prepare perovskite nanocrystals in the crystallization area through the microchannel.

[0011] In one embodiment of the present invention, a microfluidic process is used to prepare perovskite nanocrystals in the crystallization region through the microchannel, comprising: The perovskite solution is introduced into the microchannel through a microfluidic pump. The perovskite solution passes through the main channel, the guide channel, the buffer area in the microchannel in sequence and flows to the crystallization area. The perovskite nanocrystals are formed after the perovskite solution in the crystallization area evaporates and crystallizes.

[0012] In one embodiment of the present invention, the thickness of the first doping type epitaxial layer is 10-50 μm; the thickness of the second doping type epitaxial layer is 1-5 μm; The depth of the microchannel is 2-7 μm.

[0013] Another embodiment of the present invention provides a perovskite transistor, comprising: a first doping type substrate, a first doping type epitaxial layer, a second doping type epitaxial layer, a second doping type region, a plurality of first doping type regions, perovskite nanocrystals, a plurality of source electrodes and a drain electrode, wherein: The drain electrode, the first doping type substrate, the first doping type epitaxial layer, and the second doping type epitaxial layer are stacked in sequence; The second doping type region and the plurality of first doping type regions are formed in a surface layer of the second doping type epitaxial layer, and the plurality of first doping type regions are distributed in the second doping type region at intervals; A microchannel extending to the first doping type epitaxial layer is formed in the first doping type region and the second doping type region, the microchannel having a microchannel pattern as described in the above embodiment, a main channel of the microchannel pattern is formed in the second doping type region, a crystallization region of each branch channel is formed in the first doping type region, and the perovskite nanocrystal is formed in the crystallization region; The plurality of source electrodes correspond one-to-one to the plurality of first doping type regions, and each of the source electrodes covers a portion of the surface of the first doping type region and a portion of the surface of the second doping type region.

[0014] In one embodiment of the present invention, the first doping type is N-type, and the second doping type is P-type; Alternatively, the first doping type is P type, and the second doping type is N type.

[0015] In one embodiment of the present invention, the thickness of the second doping type region is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer; The thickness of the first doping type region is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer.

[0016] Compared with the prior art, the present invention has the following beneficial effects: The microchannel pattern of the present invention is formed by a main channel and a branch channel. The width of the guide channel in each branch channel and the width of the buffer area gradually narrow along the direction of liquid flow. According to the liquid wettability and surface tension, the perovskite solution will move to the narrow end and finally flow to the crystallization area for evaporation and crystallization. This process can accurately locate the perovskite pattern and achieve precise control of the position and size of the perovskite pattern. Therefore, the microchannel pattern can achieve high-precision positioning growth of the perovskite material without reducing the performance of the perovskite material, and has the advantages of high precision, low cost and mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of a microchannel pattern for a microfluidic process provided by an embodiment of the present invention; Figure 2a-2k A schematic diagram of a process of preparing a perovskite transistor provided by an embodiment of the present invention; Figure 3a-3e A schematic diagram of another process of preparing a perovskite transistor provided by an embodiment of the present invention; Figure 4 A schematic diagram of a microfluidic process for introducing a perovskite solution into a microchannel provided in an embodiment of the present invention; Figure 5 A schematic diagram of the structure of a perovskite transistor provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0019] Embodiment 1 See also Figure 1 , Figure 1 A schematic diagram of a microchannel pattern for a microfluidic process provided by an embodiment of the present invention.

[0020] The microchannel pattern for microfluidic process provided in this embodiment is used to prepare patterned perovskite nanocrystals, including: a main channel 11 and a plurality of branch channels 12, wherein the plurality of branch channels 12 are spaced apart on the side of the main channel 11; each branch channel 12 includes a guide channel 121, a buffer area 122 and a crystallization area 123, the guide channel 121, the buffer area 122 and the crystallization area 123 are connected in sequence, and the guide channel 121 is connected to the main channel 11; along the liquid flow direction, the width of the guide channel 121 gradually narrows, the width of the buffer area 122 gradually narrows and transitions to the crystallization area 123 in an arc, and the area of ​​the buffer area 122 is larger than the area of ​​the crystallization area 123.

[0021] Specifically, the width of the main channel 11 can remain unchanged, and several branch channels 12 are respectively connected to the main channel 11, which can be distributed on one side of the main channel 11 or on both sides of the main channel; preferably, several branch channels 12 are evenly distributed on both sides of the main channel 11. The width of the guide channel 121 at the connection point with the main channel 11 is preferably smaller than the width of the main channel 11 to produce a stronger attraction for the solution. The guide channel 121 can transition to the buffer area 122 in a straight line or in an arc. The width of the buffer area 122 is preferably greater than the width of the guide channel 121 to provide a larger area in a shorter length. The width of the crystallization region 123 can remain unchanged or change along the direction of liquid flow (for example, gradually narrowing); preferably, the width of the crystallization region 123 remains unchanged along the direction of liquid flow.

[0022] Specifically, the main channel 11 is used to provide a flow channel for the perovskite solution introduced by the microfluidic process, and the perovskite solution flows from the liquid introduction end of the main channel 11 to the other end of the main channel 11. Since the width of the guide channel 121 and the width of the buffer area 122 gradually narrow along the liquid flow direction, according to the liquid wettability and surface tension, the guide channel 121 will push the perovskite solution to move to its narrow end, so that the perovskite solution flows from the main channel 11 to the buffer area 122, and the buffer area 122 further pushes the solution to the crystallization area 123.

[0023] In addition, the area of ​​the buffer region 122 is larger than that of the crystallization region 123 , and the capacity of the solution stored therein is greater than the capacity of the solution in the crystallization region 123 . When the solution in the crystallization region 123 evaporates and crystallizes, causing the liquid level to drop, the buffer region 122 pushes the solution therein into the crystallization region 123 to compensate for the evaporated solution, thereby continuously forming crystals in the crystallization region 123 .

[0024] Furthermore, if there is a turning point in the buffer region 122, the perovskite solution will gather at the turning point and cannot flow. Therefore, in this embodiment, the buffer region 122 is configured to be in the form of an arc transition, which can greatly reduce the adhesion of the perovskite solution in the buffer region.

[0025] Preferably, the shape of the buffer region 122 includes a heart shape, and the heart-shaped buffer region can provide a larger area on the basis of avoiding the adhesion of the perovskite solution. Specifically, the area ratio of the heart-shaped buffer region 122 to the crystallization region 123 is 20:1 to 200:1. The specific area ratio is selected according to the concentration of the perovskite solution. The lower the concentration, the slower the speed at which the perovskite solution is converted into crystals, and the larger the area ratio. When the perovskite solution is CsBr and PbBr 2 Taking a saturated solution dissolved in dimethyl sulfoxide (DMSO) as an example, the area ratio of the heart-shaped buffer region 122 to the crystal region 123 is 60:1.

[0026] Exemplarily, the maximum width of the main channel 11 and the branch channel 12 may be less than 10 μm, preferably less than 1 μm.

[0027] It should be noted that this embodiment is described using a perovskite solution as an example, and the microchannel pattern can also be applied to other ion solutions that can be evaporated and crystallized.

[0028] The microchannel pattern of this embodiment is formed by a main channel and a branch channel. The width of the guide channel in each branch channel and the width of the buffer area gradually narrow along the direction of liquid flow. According to the liquid wettability and surface tension, the perovskite solution will move to the narrow end and eventually flow to the crystallization area for evaporation and crystallization. This process can accurately position the perovskite pattern and achieve precise control of the position and size of the perovskite pattern. Therefore, the microchannel pattern can achieve high-precision positioning growth of the perovskite material without reducing the performance of the perovskite material, and has the advantages of high precision, low cost and mass production.

[0029] Embodiment 2 Based on Example 1, see Figure 2a-2k and Figure 3a-3e , Figure 2a-2k A schematic diagram of a process of preparing a perovskite transistor provided by an embodiment of the present invention, Figure 3a-3e A schematic diagram of the process of another method for preparing a perovskite transistor provided in an embodiment of the present invention.

[0030] The method for preparing the perovskite transistor of this embodiment comprises the following steps: S1 . Growing a first doping type epitaxial layer 22 and a second doping type epitaxial layer 23 in sequence on a surface of a first doping type substrate 21 .

[0031] See also Figure 2a and Figure 3a A first doping type epitaxial layer 22 and a second doping type epitaxial layer 23 are sequentially grown on a surface of a first doping type substrate 21 by using a chemical vapor deposition method (CVD). The first doping type is N-type and the second doping type is P-type, or the first doping type is P-type and the second doping type is N-type; the materials of the first doping type substrate 21, the first doping type epitaxial layer 22 and the second doping type epitaxial layer 23 all include silicon.

[0032] Taking the first doping type substrate 21 as N-type single crystal silicon, the first doping type epitaxial layer 22 as N-type silicon, and the second doping type epitaxial layer 23 as P-type silicon as an example, step S1 specifically includes: 4~12 inch N-type single crystal silicon is selected as the substrate, and the substrate is cleaned with acetone, isopropanol and deionized water in turn. After drying with nitrogen, the substrate is placed in a CVD reactor for epitaxial growth. Among them, hydrogen is used as the gas transport carrier, SiH 4 、SiH 2 Cl 2 、SiHCl 3 、SiCl 4 Any of the above is used as Si source, and phosphine PH is used for N-type doping. 3 , P-type doping uses diborane B 2 H 6 Or Boron Trichloride BCl 3 , the doping gas source is added to the carrier gas hydrogen in proportion; the flow rate of the carrier gas hydrogen is 20~80L / min, the flow rate of the Si source is 5~50ml / min, and the doping gas source PH 3 or BCl 3 The dosage is 1~10ml / min, doping gas source B 2 H 6 The flow rate is 0.5-5 ml / min, and the growth temperature is maintained at 1000-1280° C. The thickness of the first doping type epitaxial layer 22 obtained by epitaxial growth is 10-50 μm, and the thickness of the second doping type epitaxial layer 23 is 1-5 μm.

[0033] S2 . Form a second doping type region 24 and a plurality of first doping type regions 25 spaced apart in the second doping type region 24 in a surface layer of the second doping type epitaxial layer 23 .

[0034] See also Figure 2b and Figure 3b, a second doping type region 24 and a plurality of first doping type regions 25 are formed in the surface layer of the second doping type epitaxial layer 23 by high temperature diffusion or ion implantation, and a plurality of alignment marks are formed on the surface of the second doping type epitaxial layer 23 by a mask. The second doping type region 24 is a P-type region, and the first doping type region 25 is an N-type region; or the second doping type region 24 is an N-type region, and the first doping type region is a P-type region; and the doping concentration of the second doping type region 24 is greater than the doping concentration of the second doping type epitaxial layer 23, and the doping concentration of the first doping type region 25 is greater than the doping concentration of the first doping type epitaxial layer 22.

[0035] Taking the ion implantation method as an example, the second doping type epitaxial layer 23 is P-type silicon, the second doping type region 24 is a heavily doped P++ region, and the first doping type region 25 is a heavily doped N++ region, step S2 specifically includes: The ion implantation method is adopted, and the metal mask is used for shielding, and the shallow ion implantation is performed in the P-type silicon. The ion implantation depth is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer 23, the implantation energy is 2 to 300 keV, and the implantation amount is kept at 10 14 ~10 16 dose / cm -2 , high temperature implantation is used, the implantation temperature is controlled at 200~500℃, and annealing is performed at 900~1300℃ for 30min after implantation to achieve lattice recovery and improve electrical activation rate, and finally form a P++ region and several N++ regions spaced in the P++ region. At the same time, multiple alignment marks are formed on the P-type silicon surface through a mask, such as Figure 3b shown.

[0036] S3. Based on the alignment mark, the microchannel pattern of Example 1 is used to etch the second doping type region 24 and several first doping type regions 25 to prepare a groove extending into the first doping type epitaxial layer 22 to form a microchannel 26, wherein the main channel 11 of the microchannel pattern is formed in the second doping type region 24, and the crystallization region 123 of each branch channel 12 is formed in the first doping type region 25.

[0037] See also Figure 2c , Figure 2d , Figure 2e and Figure 3c, a layer of photoresist PMMA is spin-coated on the device surface, and PMMA is photolithographically developed using alignment marks to form the microchannel pattern of Example 1, so that the main channel 11 of the microchannel pattern is located in the second doping type region 24, and the crystallization region 123 of each branch channel 12 is located in the first doping type region 25. Then, selective deep etching is performed on the second doping type region 24 and a plurality of first doping type regions 25, and the etching penetrates the first doping type region 25 (or the second doping type region 24), the second doping type epitaxial layer 23 and even the inside of the first doping type epitaxial layer 22 to form a microchannel 26, and the photoresist PMMA on the device surface is removed.

[0038] Exemplarily, the deep etching method is: using cycle etching, each cycle is 12 seconds, and the first 5 seconds are C with a flow rate of 100 sccm. 4 F 8 With 10sccm SF 6 The pattern formed by the photoresist PMMA was passivated and stabilized, and then 5sccm of C 4 F 8 With 100sccm SF 6 Channel etching is performed, and a 1-micron-deep etched channel is formed on the material surface every 10 to 20 cycles.

[0039] Furthermore, according to the depth of the second doping type epitaxial layer 23 being 1-5 μm, the depth of the micro-channel 26 needs to be 1-2 μm deeper than the second doping type epitaxial layer 23 , that is, the depth of the micro-channel is 2-7 μm.

[0040] This embodiment forms a micro-channel pattern using an alignment mark, which can accurately position the micro-channel pattern and reduce overlay errors.

[0041] S4. Prepare a plurality of metal layers corresponding to the plurality of first doping type regions 25 one by one by using a lift-off process to form a plurality of source electrodes 28 , wherein each source electrode 28 covers a portion of the surface of the first doping type region 25 and a portion of the surface of the second doping type region 24 .

[0042] See also Figure 2f , Figure 2g , Figure 2h , Figure 2i and Figure 3dFirst, a layer of photoresist PMMA is spin-coated on the device surface, and PMMA is photolithographically developed to form a source electrode pattern; then, a source metal is deposited on the device surface, and the excess metal on PMMA is removed by lift-off, and the remaining metal portion is the source electrode 28, and the source electrode 28 covers a portion of the surface of the first doping type region 25 and a portion of the surface of the second doping type region 24. Exemplarily, the material of the source electrode 28 is Ni / Au laminated metal, Ni / Ag laminated metal, or Ni / Cu laminated metal, and the thickness is 20-100nm.

[0043] At present, most perovskite display technologies are based on the use of light to excite perovskite quantum dot films to produce new fluorescent radiation. This is because for optoelectronic devices, the electrode deposition is mostly shielded by physical templates, which determines that the resolution is necessarily very low. However, this embodiment uses a lift-off method to achieve electrode deposition, which can ensure the high precision of the metal layer and realize a high-resolution optoelectronic array device.

[0044] S5. A drain electrode 29 is grown on the other surface of the first doping type substrate 21. The thickness of the drain electrode 29 may be 50-100 nm. Figure 2j .

[0045] S6. Using microfluidic technology, prepare perovskite nanocrystals 27 in the crystallization area 123 through microchannels.

[0046] See also Figure 2k , Figure 3e and Figure 4 , Figure 4 A schematic diagram of a microfluidic process for introducing a perovskite solution into a microchannel provided in an embodiment of the present invention.

[0047] First, the device is cleaned to remove the residual photoresist. Then the perovskite solution is introduced into the microchannel 26 through the capillary force of the microfluidic pump. The perovskite solution passes through the main channel 11, the guide channel 121, the buffer area 122 in the microchannel 26 and flows to the crystallization area 123. The perovskite solution in the crystallization area 123 evaporates and crystallizes to form perovskite nanocrystals 27. Among them, the microfluidic pump is formed by filter paper attached to the glass surface; when the perovskite solution is introduced, the filter paper is located on the lower surface of the glass surface, one end is immersed in the perovskite solution, and the other end is in contact with the transistor. When the filter paper is completely wetted, the perovskite solution is introduced into the microchannel 26. Exemplarily, the perovskite solution is composed of CsBr and PbBr 2 Dissolved in dimethyl sulfoxide (DMSO) solvent.

[0048] The process of crystallization of the perovskite solution in the crystallization region 123 is as follows: first, the channels of the crystallization region 123 are filled with the perovskite solution and then the solution is evaporated. The evaporation of the solution will cause the liquid level to drop, and then the buffer region 122 pushes the solution to flow to the crystallization region 123 to compensate for the evaporated solution, thereby continuously forming crystals in the crystallization region 123 until the grooves of the crystallization region 123 are filled, thereby finally forming a perovskite transistor with an array structure.

[0049] It should be noted that according to the micro-channel pattern of this embodiment, the perovskite crystals are finally formed in the crystallization area, and no crystals are formed in other areas. If crystals are formed in other areas due to process errors, it will not affect the normal operation of the device.

[0050] This embodiment adopts the microfluidic process to prepare perovskite nanocrystals. Compared with the use of auxiliary means such as templates and scrapers, the capillary action-driven microfluidic technology does not require special equipment, and only requires filter paper to guide the flow of liquid. The process is gentle, the scheme is simple, and the cost is low. In addition, there is no solution overflow during the microfluidic solution transportation process, which can achieve zero pollution and zero waste.

[0051] In this embodiment, the channel is first prepared, then the electrode is deposited, and finally the microfluidic process is used to achieve the positioned growth of the perovskite nanocrystal array, thereby preventing the perovskite from being destroyed by the organic solvent and achieving the compatibility of the perovskite material with the photolithography technology.

[0052] In the perovskite patterning process of this embodiment, the flow of the perovskite solution is controlled by microfluidic technology, and the perovskite solution is evaporated and crystallized in the crystallization area to achieve the purpose of patterning, thereby avoiding the problem that the perovskite as an ionic crystal is unstable when encountering an organic solution.

[0053] Embodiment 3 On the basis of Example 1 and Example 2, this example provides a perovskite transistor, which is prepared by the preparation method of Example 2.

[0054] See also Figure 5 , Figure 5 A schematic structural diagram of a perovskite transistor provided in an embodiment of the present invention, the perovskite transistor includes: a first doping type substrate 21, a first doping type epitaxial layer 22, a second doping type epitaxial layer 23, a second doping type region 24, a plurality of first doping type regions 25, a perovskite nanocrystal 27, a plurality of source electrodes 28 and a drain electrode 29.

[0055] Among them, the drain electrode 29, the first doping type substrate 21, the first doping type epitaxial layer 22, and the second doping type epitaxial layer 23 are stacked in sequence. The second doping type region 24 and a plurality of first doping type regions 25 are formed in the surface layer of the second doping type epitaxial layer 23, and the plurality of first doping type regions 25 are distributed in the second doping type region 24 at intervals; specifically, the plurality of first doping type regions 25 are periodically and uniformly distributed in the second doping type region 24 to form a perovskite transistor array. A microchannel 26 extending to the inside of the first doping type epitaxial layer 22 is formed in the first doping type region 25 and the second doping type region 24, and the microchannel 26 has the microchannel pattern shown in the first embodiment, and the main channel 11 of the microchannel pattern is formed in the second doping type region 24, and the crystallization region 123 of each branch channel 12 is formed in the first doping type region 25, and the perovskite nanocrystal 27 is formed in the crystallization region 123 as a gate. The plurality of source electrodes 28 correspond to the plurality of first doping type regions 25 one by one, and each source electrode 28 covers a portion of the surface of the first doping type region 25 and a portion of the surface of the second doping type region 24; it can be understood that the perovskite nanocrystal 27 is formed in the crystallization region 123, and the source electrode 28 can be located on one side of the crystallization region 123, such as Figure 3e As shown, it can also be set on opposite sides of the crystallization region 123 at the same time, such as Figure 5 shown.

[0056] In a specific embodiment, the first doping type is N-type and the second doping type is P-type; or, the first doping type is P-type and the second doping type is N-type. The materials of the first doping type substrate 21, the first doping type epitaxial layer 22, and the second doping type epitaxial layer 23 all include silicon. The doping concentration of the second doping type region 24 is greater than the doping concentration of the second doping type epitaxial layer 23, and the doping concentration of the first doping type region 25 is greater than the doping concentration of the first doping type epitaxial layer 22.

[0057] Exemplarily, when the first doping type is N-type and the second doping type is P-type, the first doping type substrate 21 uses N+ single crystal silicon, the first doping type epitaxial layer 22 uses N-type silicon, the second doping type epitaxial layer 23 uses P-type silicon, the second doping type epitaxial layer 23 forms a P-type barrier layer, the second doping type region 24 forms a P++ region, and the first doping type region 25 forms an N++ region.

[0058] When the first doping type is P type and the second doping type is N type, the first doping type substrate 21 uses P type single crystal silicon, the first doping type epitaxial layer 22 uses P type silicon, the second doping type epitaxial layer 23 uses N type silicon, the second doping type region 24 forms an N++ region, and the first doping type region 25 forms a P++ region.

[0059] In a specific embodiment, the thickness of the first doping type epitaxial layer 22 is 10-50 μm; the thickness of the second doping type epitaxial layer 23 is 1-5 μm; the thickness of the perovskite nanocrystal 27 is 2-7 μm. The thickness of the second doping type region 24 is 1 / 4-1 / 2 of the thickness of the second doping type epitaxial layer 23; the thickness of the first doping type region 25 is 1 / 4-1 / 2 of the thickness of the second doping type epitaxial layer 23. The material of the source electrode 28 is Ni / Au laminated metal, Ni / Ag laminated metal or Ni / Cu laminated metal, and the thickness is 20-100 nm. The thickness of the drain electrode 29 can be 50-100 nm.

[0060] Taking the case where the first doping type is N-type and the second doping type is P-type as an example, the working principle of the perovskite transistor in this embodiment is as follows: Under dark conditions, that is, when there is no light, the gate is made of a photosensitive material, namely perovskite, but due to the absence of light, the conductivity of the photosensitive material does not change. At this time, the P-type epitaxial layer plays a role in preventing electrons from flowing from the source to the drain. The presence of the P-type epitaxial layer makes the channel closed when there is no sufficient gate voltage, and it is difficult for current to pass.

[0061] When there is light, the light shines on the photosensitive material in the groove. Under the action of light, the photosensitive material generates a large number of photogenerated carriers, forming a conductive channel in the NPN structure composed of N-type silicon, P-type silicon, and N++ regions, allowing electrons to flow smoothly from the source to the drain, thereby generating a large current. The P++ region still maintains the effect of reducing contact resistance under light conditions, improving the electrical performance and stability of the device and ensuring stable current transmission.

[0062] In summary, by replacing the gate in the trench with a photosensitive material, perovskite, the device can respond to light and realize the function of light-controlled current. The P-type epitaxial layer and the P++ region play an important auxiliary and regulatory role in the performance and working characteristics of the device in different states.

[0063] The perovskite nanocrystals of this embodiment are formed in microchannels, forming an embedded perovskite nanostructure protected by three-sided semiconductor materials, which reduces the impact of light, water, heat and other environments on the perovskite and greatly improves the stability of the perovskite nanostructure.

[0064] Compared with some simple photosensitive elements such as photoresistors, the phototransistor of this embodiment can amplify light signals, respond more sensitively to light signals, detect relatively weak light changes, and has high sensitivity; it can respond to a wider range of spectra, covering common bands from visible light to near-infrared light; it has its own current amplification function (transistor characteristics), and does not require additional complex and expensive amplification circuits to amplify signals; it can process both analog light intensity change signals and digital light control signals under certain conditions, and has compatibility with analog and digital signals; it has a faster response speed than a photodiode; and compared with complex light detection and signal processing systems, it has a lower cost; it integrates light sensing and amplification functions, is relatively concise in circuit design and layout, and has a relatively simple circuit; at the same time, the phototransistor can control the magnitude of the current by controlling the intensity of the light source, and has good controllability and flexibility; it is not affected by electromagnetic interference to a certain extent, and has good reliability; it is suitable for large-scale integration on chips, which is conducive to the development of optoelectronic integration technology.

[0065] The phototransistor of this embodiment can be applied in the field of lighting, such as street light control, indoor intelligent lighting, light-controlled night lights, etc.; in the field of security monitoring, such as surveillance cameras, access control systems, etc.; in the field of industrial automation, such as lighting systems in factory workshops, position detection of materials on production lines, light environment monitoring and control elements, etc.; in the field of consumer electronics, such as automatic exposure control of cameras or mobile phones, opening and closing control of automatic curtains, etc.; in the field of communications, such as serving as the signal receiving and conversion part in optical communication systems, detecting ambient light intensity to optimize equipment performance or protect equipment, etc.; in the field of agriculture, such as intelligent greenhouse control, aquaculture, etc.; in the field of aerospace, such as sensors on the outer surface of spacecraft, control of aircraft interior lighting systems, etc.

[0066] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A microchannel pattern for microfluidic process, characterized in that: include: A main channel (11) and a plurality of branch channels (12), wherein: The plurality of branch channels (12) are distributed at intervals on the sides of the main channel (11); Each of the branch channels (12) comprises a guide channel (121), a buffer region (122) and a crystallization region (123); the guide channel (121), the buffer region (122) and the crystallization region (123) are connected in sequence, and the guide channel (121) is connected to the main channel (11); Along the liquid flow direction, the width of the guide channel (121) gradually narrows, the width of the buffer region (122) gradually narrows and transitions to the crystallization region (123) in an arc, and the area of ​​the buffer region (122) is larger than the area of ​​the crystallization region (123).

2. The microchannel pattern for microfluidic process according to claim 1, characterized in that: The shape of the buffer area (122) includes a heart shape.

3. The microchannel pattern for microfluidic process according to claim 1, characterized in that: The area ratio of the buffer region (122) to the crystallization region (123) is 20:1 to 200:

1.

4. The microchannel pattern for microfluidic process according to claim 1, characterized in that: Along the liquid flow direction, the width of the guide channel (121) at the point where it communicates with the main channel (11) is smaller than the width of the main channel (11).

5. A method for preparing a perovskite transistor, characterized in that: Includes steps: Growing a first doping type epitaxial layer (22) and a second doping type epitaxial layer (23) in sequence on a surface of a first doping type substrate (21); Forming a second doping type region (24) and a plurality of first doping type regions (25) spaced apart in the second doping type region (24) in the surface layer of the second doping type epitaxial layer (23), and forming an alignment mark at the same time; Based on the alignment mark, etching is performed in the second doping type region (24) and the plurality of first doping type regions (25) using the microchannel pattern according to any one of claims 1 to 4 to prepare a groove extending into the first doping type epitaxial layer (22) to form a microchannel (26), wherein the main channel (11) of the microchannel pattern is formed in the second doping type region (24), and the crystallization region (123) of each branch channel (12) is formed in the first doping type region (25); A plurality of metal layers corresponding to the plurality of first doping type regions (25) are prepared by a lift-off process to form a plurality of source electrodes (28), wherein each of the source electrodes (28) covers a portion of the surface of the first doping type region (25) and a portion of the surface of the second doping type region (24); Growing a drain electrode (29) on the other surface of the first doping type substrate (21); The microfluidic process is used to prepare perovskite nanocrystals (27) in the crystallization area (123) through the microchannel.

6. The method for preparing a perovskite transistor according to claim 5, characterized in that: The method adopts a microfluidic process to prepare perovskite nanocrystals (27) in the crystallization region (123) through the microchannel, comprising: The perovskite solution is introduced into the microchannel (26) through a microfluidic pump. The perovskite solution passes through the main channel (11), the flow guide channel (121), the buffer region (122) in the microchannel (26) in sequence and flows to the crystallization region (123). After the perovskite solution in the crystallization region (123) evaporates and crystallizes, the perovskite nanocrystals (27) are formed.

7. The method for preparing a perovskite transistor according to claim 5, characterized in that: The thickness of the first doping type epitaxial layer (22) is 10-50 μm; the thickness of the second doping type epitaxial layer (23) is 1-5 μm; The depth of the microchannel is 2-7 μm.

8. A perovskite transistor, characterized in that: include: A first doping type substrate (21), a first doping type epitaxial layer (22), a second doping type epitaxial layer (23), a second doping type region (24), a plurality of first doping type regions (25), a perovskite nanocrystal (27), a plurality of source electrodes (28) and a drain electrode (29), wherein: The drain electrode (29), the first doping type substrate (21), the first doping type epitaxial layer (22), and the second doping type epitaxial layer (23) are stacked in sequence; The second doping type region (24) and the plurality of first doping type regions (25) are formed in a surface layer of the second doping type epitaxial layer (23), and the plurality of first doping type regions (25) are distributed at intervals in the second doping type region (24); A microchannel (26) extending to the inside of the first doping type epitaxial layer (22) is formed in the first doping type region (25) and the second doping type region (24), the microchannel (26) having a microchannel pattern according to any one of claims 1 to 4, the main channel (11) of the microchannel pattern being formed in the second doping type region (24), the crystallization region (123) of each branch channel (12) being formed in the first doping type region (25), and the perovskite nanocrystal (27) being formed in the crystallization region (123); The plurality of source electrodes (28) correspond one-to-one to the plurality of first doping type regions (25), and each of the source electrodes (28) covers a portion of the surface of the first doping type region (25) and a portion of the surface of the second doping type region (24).

9. The perovskite transistor according to claim 8, characterized in that The first doping type is N-type, and the second doping type is P-type; Alternatively, the first doping type is P type, and the second doping type is N type.

10. The perovskite transistor according to claim 8, characterized in that: The thickness of the second doping type region (24) is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer (23); The thickness of the first doping type region (25) is 1 / 4 to 1 / 2 of the thickness of the second doping type epitaxial layer (23).

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