A method of slicing a silicon wafer and a silicon wafer

Abstract

The application discloses a silicon wafer cutting method and a silicon wafer, relates to the technical field of silicon wafer cutting, and is used for reducing the damage of a cutting line to a silicon wafer in the process of lifting the silicon wafer. The silicon wafer cutting method comprises the following steps: providing a silicon rod and a carrier plate; driving the silicon rod to move downward relative to a cutting line, so that the cutting line cuts the silicon rod to obtain a plurality of silicon wafers; and lifting the silicon wafers upward relative to the cutting line, wherein the movement mode of the cutting line in the carrier plate and the movement mode of the cutting line after the cutting line is separated from the carrier plate are different.

Description

[0001] This application claims priority to Chinese Patent Application No. 202410873767.9, filed on July 1, 2024, entitled "A Method for Cutting Silicon Wafers", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of silicon wafer cutting technology, and more particularly to a silicon wafer cutting method and a silicon wafer. Background Technology

[0003] In the silicon wafer dicing process, a silicon ingot is typically bonded to the lower surface of a carrier substrate, which in turn is bonded to the lower surface of a wafer holder. A drive mechanism usually moves the wafer holder and the silicon ingot from top to bottom relative to the dicing line, causing the dicing line to cut the silicon ingot and form multiple silicon wafers. Afterward, a lifting process is required. Specifically, the drive mechanism moves the wafer holder upward, simultaneously raising the silicon wafers relative to the dicing line. At the same time, the dicing line moves, causing the silicon wafers to detach from the dicing line.

[0004] However, the existing material feeding method has a high rate of wire breakage in the cutting line, and the defect rate of the produced silicon wafers is relatively high. Summary of the Invention

[0005] The purpose of this invention is to provide a silicon wafer cutting method and a silicon wafer, which reduces wire breakage and damage to the silicon wafer during the material handling process.

[0006] To achieve the above objectives, in a first aspect, the present invention provides a silicon wafer dicing method, comprising:

[0007] We provide silicon rods and substrates;

[0008] The silicon rod is driven to move downward relative to the cutting line, so that the cutting line cuts the silicon rod to obtain multiple silicon wafers;

[0009] The movement pattern of the silicon wafer relative to the dicing line is different when the dicing line is inside the carrier plate and when it is detached from the carrier plate.

[0010] When using the above technical solution, the movement mode of the cutting line within the carrier plate and the movement mode after the cutting line leaves the carrier plate are different during the process of lifting the silicon wafer relative to the cutting line. Due to the different materials of the carrier plate and the silicon wafer, as well as the different requirements for the protection quality of the carrier plate and the silicon wafer, a more suitable movement mode of the cutting line is selected according to the actual lifting environment of the cutting line within the carrier plate and between the silicon wafers, so as to ensure that the cutting line reduces damage to the silicon wafer.

[0011] In one possible implementation, the different motion modes of the cutting wire when it is inside the carrier plate and when it is outside the carrier plate include: when the cutting wire is inside the carrier plate, the cutting wire performs either take-up or release motion; when the cutting wire is outside the carrier plate, the cutting wire alternately performs take-up and release motion.

[0012] When the above technical solution is adopted, when the cutting line is located inside the carrier plate, the cutting line only performs unidirectional movement of winding or unwinding. At this time, the cutting line will not swing back and forth in the horizontal direction perpendicular to the silicon wafer surface, so that the cutting line always remains at the position where the carrier plate is cut during the cutting process. That is, the cutting line will not deviate from either of the two adjacent silicon wafers. Thus, when the silicon wafer is lifted upward relative to the cutting line, it is less likely that the cutting line will get caught on the side of the silicon wafer that is bonded to the carrier plate. Furthermore, it effectively reduces the occurrence of the cutting line being pulled off or the silicon wafer falling off as it is lifted. In addition, since the carrier plate does not have high protection requirements, the unidirectional movement method is selected to reduce unnecessary switching of movement direction and improve the lifting efficiency of the cutting line inside the carrier plate. Next, during the process from the moment the dicing wire detaches from the carrier to the moment it is lifted off the silicon wafer, the dicing wire alternately performs take-up and release movements. The side of the dicing wire relative to the silicon wafer changes with the direction of the dicing wire movement. This reduces the large bowing of the dicing wire caused by the dicing wire only entering from one side of the silicon wafer, resulting in greater friction on the dicing wire against the silicon wafer. It also reduces the phenomenon that the dicing wire is not easy to separate the surfaces of two adjacent silicon wafers that are away from the side where the dicing wire entered. This further reduces the occurrence of scratches, bright lines, or even silicon wafer falling off the silicon wafer caused by friction from the dicing wire due to the strong suction that makes it difficult for the silicon wafer to be separated by the dicing wire. In addition, when the dicing wire is located between two adjacent silicon wafers, it alternates between take-up and release movements. The dicing wire swings back and forth in the horizontal direction perpendicular to the silicon wafer surface. This avoids the dicing wire from being in constant contact with either of the two adjacent silicon wafers. At the same time, during the horizontal swing, the dicing wire disengages from the silicon wafer, shortening the contact time between the dicing wire and the silicon wafer. This reduces friction on the silicon wafer, weakens the phenomenon of scratches on the silicon wafer surface, and reduces the breakage of the dicing wire and the damage to the silicon wafer caused by the dicing wire.

[0013] In a second aspect, the present invention also provides a silicon wafer having a first set of opposite edges and a second set of opposite edges, the first set of opposite edges including a first edge and a second edge disposed opposite to each other, and the second set of opposite edges including a third edge and a fourth edge disposed opposite to each other, wherein the first edge and / or the second edge intersects with the third edge and / or the fourth edge.

[0014] The surface of the silicon wafer has two sets of scratches. One set of scratches is inclined toward the third side in a first direction, and the other set of scratches is inclined toward the fourth side in a first direction. The first direction is from the first side to the second side.

[0015] With the above technical solution, both sets of scratches on the silicon wafer surface are formed by the dicing line scratching the wafer when it is lifted upwards relative to the dicing line. One set of scratches is formed randomly on the wafer surface when the dicing line travels in one direction, and the other set is formed randomly on the wafer surface when the dicing line travels in the opposite direction. Therefore, one set of scratches is inclined towards the third edge of the wafer in the first direction, and the other set is inclined towards the fourth edge of the wafer opposite to the third edge in the first direction. Since the wafer cutting and slicing operations are performed according to the wafer cutting method of this application, the phenomenon of scratches appearing on the wafer surface is reduced, and the damage caused by the dicing line to the wafer is decreased. Attached Figure Description

[0016] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0017] Figure 1 This is a schematic diagram of the steps of the silicon wafer cutting method provided in an embodiment of the present invention;

[0018] Figure 2 A schematic diagram showing the positional relationship between the silicon rod and the cutting line during the process of cutting the silicon rod with the cutting line;

[0019] Figure 3 A schematic diagram showing the positional relationship between the silicon wafer and the cutting line when the silicon wafer obtained by cutting the silicon rod is lifted upward relative to the cutting line, with the cutting line portion located inside the carrier plate.

[0020] Figure 4 A schematic diagram showing the positional relationship between the silicon wafer and the cutting line after the cutting line is detached from the carrier plate when the silicon wafer obtained by cutting the silicon rod is lifted upward relative to the cutting line.

[0021] Figure 5 A partial structural diagram showing the first set of scratches on a silicon wafer provided in an embodiment of the present invention;

[0022] Figure 6 This is a partial structural diagram showing a second set of scratches on a silicon wafer, provided for an embodiment of the present invention.

[0023] Figure label:

[0024] 1-Silicon rod, 2-Silicon wafer, 21-First set of scratches, 22-Second set of scratches, 23-Cutting line, 201-First side, 202-Second side, 203-Third side, 204-Fourth side, 3-Carrier plate, 4-Cutting line, 5-Drive roller, 6-Crystal holder. Detailed Implementation

[0025] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0026] It should be noted that in the description of this invention, the terms "upper," "lower," "front," "rear," "left," "right," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0027] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0028] First, it should be noted that, see Figure 2 and Figure 4 As shown, the take-up or unwinding motion of the cutting wire 4 is driven by the drive roller 5. In specific implementation, one end of the cutting wire 4 is wound from the surface of the first drive roller 5 to the surface of the second drive roller 5, then to the surface of the third drive roller 5, and then back to the surface of the first drive roller 5. This winding method forms a cutting wire mesh.

[0029] See Figure 1 and Figure 2 As shown, this embodiment of the invention provides a silicon wafer cutting method, including the following steps:

[0030] Step S100: Provide silicon rod 1 and carrier plate 3;

[0031] Silicon rod 1 is directly connected to carrier plate 3. First, select carrier plate 3 of the corresponding size according to the size of silicon rod 1 to be cut, such as... Figure 1 As shown, the silicon rod is bonded to the lower surface of the crystal holder 6 via the carrier plate 3. In specific implementations, the carrier plate 3 can be a resin plate or a plastic plate, and the thickness of the carrier plate 3 can be selected according to the actual situation, without specific limitations here.

[0032] Step S200: Drive the silicon rod 1 to move downward relative to the cutting line 4, so that the cutting line 4 cuts the silicon rod 1 to obtain multiple silicon wafers 2;

[0033] In step S300, the silicon wafer 2 is lifted upward relative to the dicing line 4. The movement mode of the dicing line 4 within the carrier plate 3 is different from its movement mode after detaching from the carrier plate 3. It should be noted that the movement mode of the dicing line 4 actually refers to the direction of the dicing line, that is, the dicing line can move in one direction only, either taking in or releasing, or move in two directions, alternating between taking in and releasing.

[0034] It should be noted that during the process of driving the silicon rod 1 downward relative to the cutting line 4 to cut the silicon rod 1 to obtain multiple silicon wafers 2, due to the bowing of the cutting line 4 in the cutting state, it is necessary to cut the cutting line 4 into the carrier plate 3 (at this time, the carrier plate 3 acts as a sacrificial plate) when cutting to the rear end of the silicon rod, so that the silicon rod 1 is completely cut through, and the multiple silicon wafers are in an independent state. The cut-through state at this time refers to the state in which the silicon wafers 2 are independent and the cutting line 4 is in the gap between the silicon wafers 2. Based on this, there are two movement modes during the material lifting process: the cutting line 4 is in the carrier plate 3, and the cutting line 4 is detached from the carrier plate 3.

[0035] Thus, during the process of lifting the silicon wafer relative to the dicing line, the movement mode of the dicing line within the carrier plate differs from its movement mode after detaching from the carrier plate. Due to the differences in the materials of the carrier plate and the silicon wafer, and the different requirements for the protection quality of the carrier plate and the silicon wafer, a more suitable movement mode of the dicing line is selected based on the actual lifting environment of the dicing line within the carrier plate and between the silicon wafers. The selection of the movement mode within the carrier plate and the movement mode after detaching from the carrier plate ensures reduced damage to the silicon wafer. In one example, the difference between the movement mode of the dicing line 4 within the carrier plate 3 and the movement mode of the dicing line 4 after detaching from the carrier plate 3 in step S300 specifically includes the following steps:

[0036] Step S301: Determine that the cutting line 4 is located inside the carrier plate 3, and the cutting line 4 performs a take-up or release motion.

[0037] Step S302: Determine that the cutting wire 4 is detached from the carrier plate, and the cutting wire 4 alternately performs wire take-up and wire release movements.

[0038] Thus, when the cutting line 4 is located within the carrier plate 3, the cutting line 4 only performs unidirectional movement, either winding or unwinding. At this time, the cutting line 4 will not swing back and forth in the horizontal direction perpendicular to the silicon wafer surface, ensuring that the cutting line 4 remains at the position where the carrier plate 3 is cut during the cutting process. That is, the cutting line 4 will not deviate towards either of the two adjacent silicon wafers 2. As a result, during the process of lifting the silicon wafer 2 relative to the cutting line 4, it is less likely that the cutting line 4 will get caught on the side of the silicon wafer 2 that is bonded to the carrier plate 3. Furthermore, this effectively reduces the occurrence of the cutting line 4 being pulled off or the silicon wafer 2 falling off as it is lifted. In addition, since the carrier plate does not have high protection requirements, a unidirectional movement method is chosen to reduce unnecessary changes in movement direction and improve the lifting efficiency of the cutting line within the carrier plate. Next, during the process from the removal of the dicing wire 4 from the carrier plate 3 to the lifting of the dicing wire 4 from the silicon wafer 2, the dicing wire 4 alternately performs take-up and release movements. The side of the dicing wire 4 relative to the silicon wafer 2 that it enters changes with the change of the direction of movement of the dicing wire 4. In this way, the large bow of the dicing wire 4 caused by the dicing wire 4 entering only from one side of the silicon wafer 2 can be reduced, the friction force on the dicing wire 4 on the silicon wafer 2 can be increased, and the dicing wire 4 is less likely to separate the surfaces of two adjacent silicon wafers 2 that are away from the side where the dicing wire 4 entered. This reduces the occurrence of scratches, bright lines, or even the silicon wafer 2 falling off due to friction caused by the dicing wire 4 on the silicon wafer 2 because the silicon wafer 2 is not easily separated by the dicing wire 4 due to the large suction force. In addition, when the cutting line 4 is located between two adjacent silicon wafers 2, it alternates between taking in and releasing the wire. The cutting line 4 swings back and forth in the horizontal direction perpendicular to the surface of the silicon wafer. At this time, it can avoid the cutting line 4 from being in constant contact with either of the two adjacent silicon wafers 2. At the same time, during the swinging process in the horizontal direction, the cutting line 4 disengages from the silicon wafer 2, shortening the contact time between the cutting line 4 and the silicon wafer 2. This can reduce friction on the silicon wafer 2, reduce the phenomenon of scratches on the surface of the silicon wafer 2, and reduce the damage to the silicon wafer caused by the cutting line.

[0039] like Figure 4 As shown, in one possible implementation, during step S302, when the cutting wire is determined to detach from the carrier plate and the cutting wire alternately performs take-up and release movements, the take-up length of the cutting wire 4 during the take-up movement is 0.05m-0.2m, and the release length of the cutting wire 4 during the release movement is 0.05m-0.2m.

[0040] In this way, the wire bow of the cutting wire 4 is avoided due to the long wire take-up length during the take-up movement and the long wire release length during the release movement. This reduces the contact area between the cutting wire 4 and the silicon wafer 2, reduces the friction between the cutting wire 4 and the silicon wafer 2, further reduces the occurrence of more scratches caused by the cutting wire 4 to the silicon wafer 2, and reduces the damage to the silicon wafer caused by the cutting wire.

[0041] For example, the take-up length of the cutting wire 4 during the take-up movement can be 0.05m, 0.08m, 0.1m, 0.12m, 0.15m, 0.18m, 0.2m, etc., and the release length of the cutting wire 4 during the release movement can be 0.05m, 0.06m, 0.08m, 0.1m, 0.12m, 0.16m, 0.17m, 0.2m, etc. Of course, this is just an example and is not intended as a specific limitation.

[0042] In one example, during step S302, when the dicing wire 4 is determined to detach from the carrier plate 3, and the dicing wire 4 alternately performs take-up and release movements, the take-up length of the dicing wire 4 during the take-up movement and the release length during the release movement are equal. In this case, the two adjacent silicon wafers 2 are separated more evenly, so as to avoid the situation where the side of the silicon wafer 2 parallel to the dicing wire separates more slowly than the other side, thereby reducing the friction between the silicon wafer and the dicing wire 4 and reducing the occurrence of scratches on the silicon wafer 2.

[0043] In some embodiments, during the process of the dicing wire 4 being determined to be located within the carrier plate 3 in step S301, the wire speed of the dicing wire 4 during its take-up or release motion is S1. During the process of the dicing wire 4 being determined to detach from the carrier plate 3 in step S302, the maximum wire speed of the dicing wire 4 during its alternating take-up and release motion is S2, and S1 < S2. At this time, during the take-up or release motion of the dicing wire 4 in step S301, the wire speed of the dicing wire 4 is relatively low, preventing the dicing wire 4 from deviating from either of the two adjacent silicon wafers 2 due to shaking, further reducing the possibility of the dicing wire 4 getting stuck on the side of the silicon wafer 2 that is bonded to the carrier plate 3. However, during the process from the dicing wire detaching from the carrier plate to the lifting process from the silicon wafer, the wire speed of the dicing wire is relatively high, which can accelerate the separation speed of the two adjacent silicon wafers 2 and improve the efficiency of separating the silicon wafer 2 from the dicing wire 4. It should be noted that, since the cutting line 4 has a bow, the cutting line 4 being located within the carrier plate 3 as defined in this invention means that at least a portion of the cutting line is located within the carrier plate 3; the cutting line 4 being detached from the carrier plate 3 means that all the cutting lines are detached from the carrier plate 3.

[0044] As an optional approach, in step S301, when the dicing wire 4 is determined to be within the carrier plate 3, S1 gradually increases during the take-up or release motion of the dicing wire 4. The speed is relatively low when the dicing wire 4 is completely within the carrier plate 3, to prevent the dicing wire 4 from deviating towards either of the two adjacent silicon wafers 2 due to shaking, thus reducing the probability of the dicing wire 4 getting caught on the side of the silicon wafer 2 that is bonded to the carrier plate 3. As the silicon wafer 2 is lifted relative to the dicing wire 4, due to the presence of the bow of the dicing wire 4, when the dicing wire 4 is partially within the silicon wafer 2, see [reference needed]. Figure 3As shown, at this time, the top of the wire bow of the cutting line 4 and the part of the cutting line 4 near the top of the wire bow are located in the carrier plate 3. The cutting speed of the cutting line 4 gradually increases. The cutting line 4 near the side of the cutting line 4 that comes out from the silicon wafer 2 can drive the part of the cutting line 4 located in the carrier plate 3, forcing the part of the cutting line 4 located in the carrier plate 3 to move to the middle of the two adjacent silicon wafers 2, so as to avoid the cutting line 4 getting caught on the side of the silicon wafer 2 that is bonded to the carrier plate 3.

[0045] In specific implementation, 3m / min ≤ S1 ≤ 50m / min. For example, S1 can be 3m / min, 10m / min, 20m / min, 25m / min, 30m / min, 40m / min, 50m / min, etc. S2 ≤ 50m / min, and S2 can be 20m / min, 25m / min, 30m / min, 36m / min, 42m / min, 45m / min, 50m / min, etc.

[0046] It is understandable that the direction of the bow formed by the bending of the cutting line 4 is the same as the direction of movement of the carrier plate 3 relative to the cutting line 4. Specifically, as shown in the figure... Figure 2 As shown, in the dicing process, the carrier plate 3 drives the silicon rod 1 to move from top to bottom relative to the dicing wire 4. At this time, the dicing wire 4 bends downwards to form a bow. Therefore, when the dicing wire 4 cuts into the carrier plate 3, the bow of the dicing wire 4 is in a downward-bent state. (Reference) Figure 3 and Figure 4 When the silicon wafer 2, obtained by cutting the silicon rod 1, is lifted upward relative to the cutting line 4, the cutting line 4 bends upward to form a bow. In this case, in order to separate the cutting line 4 from the carrier plate 3, during the process of lifting the carrier plate 3 relative to the cutting line 4, the bow of the cutting line 4 gradually changes from bending downward to bending upward. To ensure that the cutting line 4 is completely separated from the carrier plate 3, the cutting line 4 is switched from a unidirectional motion mode to a bidirectional motion mode. In step S301, it is determined that the cutting line is located inside the carrier plate. During the process of the cutting line retracting or releasing motion, the distance by which the silicon wafer 2 is lifted upward relative to the cutting line 4 is 15%-25% of the vertical dimension of the silicon wafer. Thus, for silicon wafers of different sizes, an appropriate lifting distance is selected to ensure that the lifting distance allows the cutting line 4 to completely separate from the carrier plate 3. In specific implementation, the distance by which the silicon wafer 2 is lifted upward relative to the cutting line 4 can be 30mm to 50mm, specifically 30mm, 32mm, 40mm, 46mm, 50mm, etc.

[0047] In one alternative approach, the silicon wafer 2 obtained by cutting the silicon rod 1 is lifted upwards relative to the cutting line 4 at a speed of 15 mm / min to 60 mm / min. This avoids both excessively high lifting speed of the silicon wafer 2 relative to the cutting line 4, which could cause the cutting line 4 to break or the silicon wafer 2 to fragment, and excessively low lifting speed of the silicon wafer 2 relative to the cutting line 4, which would result in low separation efficiency between the silicon wafer 2 and the cutting line 4.

[0048] In practice, during the process of lifting the silicon wafer 2 upwards relative to the cutting line 4 in step S300, the silicon wafer cutting method provided in this embodiment of the invention further includes the step of spraying cutting fluid onto the cutting line 4. The cutting fluid is preferably a mixed slurry, which can reduce the adhesion between two adjacent silicon wafers 2 and facilitates the separation of adjacent silicon wafers 2 by the cutting line 4. Specifically, the mixed slurry includes cutting fluid and silicon powder. The presence of silicon powder can reduce the adhesion between two adjacent silicon wafers 2 and also allows for the reuse of the cutting fluid, avoiding resource waste.

[0049] In one possible implementation, during step S302, when the cutting wire is determined to detach from the carrier plate and the cutting wire alternately performs take-up and release movements, the silicon wafer cutting method further includes the step of spraying clean water between the silicon wafers 2. The clean water serves two purposes: firstly, it cleans the silicon wafers 2; secondly, the spraying force of the clean water between the silicon wafers 2 facilitates the separation of adjacent silicon wafers 2. The water spray flow rate is 50L / min-300L / min to ensure that the spraying force is sufficient to separate adjacent silicon wafers 2. For example, the water spray flow rate can be 50L / min, 60L / min, 80L / min, 100L / min, 160L / min, 200L / min, 245L / min, 280L / min, 300L / min, etc.

[0050] The present application will be further described below with reference to specific embodiments.

[0051] Example 1

[0052] In this embodiment 1, a cutting wire is wound around the surface of three cutting rollers to form a cutting wire mesh. The grooves of the three cutting rollers are V-shaped grooves. The silicon rod is cut using the cutting wire mesh, and then cut into silicon wafers. The size of the silicon wafers obtained by cutting is 182.2mm*183.75mm*0.13mm. The cutting wire feed speed is 20mm / min, and the silicon wafer lifting speed is 30mm / min.

[0053] The silicon wafer cutting method described in Embodiment 1 includes the following steps: First, a silicon rod 1 and a carrier plate 3 are provided; second, the silicon rod 1 is driven to move downward relative to the cutting line 4, so that the cutting line 4 cuts the silicon rod 1 to obtain multiple silicon wafers 2. At this time, the cutting line 4 needs to cut into the carrier plate to ensure that the silicon rod 1 is completely cut through; finally, the silicon wafers 2 are lifted upward relative to the cutting line 4. When the cutting line 4 is located on the carrier plate 3, the movement mode of the cutting line is unidirectional wire feeding; when the cutting line has completely entered the silicon rod and it is determined that the cutting line 4 has detached from the carrier plate, the cutting line performs bidirectional wire feeding, that is, it alternately performs wire feeding and wire releasing movements. Specifically, the wire feeding length for unidirectional wire feeding is 4.2m, and the wire feeding length for bidirectional wire feeding is 0.6m.

[0054] Comparative Example 1

[0055] Unlike Example 1, in the entire material lifting process, the cutting line follows the unidirectional feeding method of Example 1, and the feeding length is 17m when all material is fed in a unidirectional manner. All other parts are the same as in Example 1.

[0056] Comparative Example 2

[0057] Unlike Example 1, in the entire material lifting process, the cutting line follows the bidirectional feeding method of Example 1, and the feeding length of all bidirectional feeding operations is 0.6m. All other parts are the same as in Example 1.

[0058] The following is a record of 2000 cuts conducted on 70 slicing machines of the same specifications. The breakage rate and wafer defect rate of Example 1 and Comparative Examples 1-2 were recorded respectively. It should be noted that the wafer defect rate is the total number of defective wafers produced in 2000 cuts divided by the total number of wafers produced. The wafer defect rate mainly refers to defects such as material lifting scratches and chamfer fragments. The specific comparison results are shown in Table 1.

[0059] Breakage ratio Silicon wafer defect rate This application 2.5％ 0.3％ Comparative Example 1 8％ 1％ Comparative Example 2 10％ 0.7％

[0060] As shown in Table 1, the silicon wafer cutting method provided in this application can reduce the proportion of broken cutting lines and decrease the wafer defect rate. Of course, the impact varies depending on the type of silicon wafer. Generally, as the cutting lines become finer and the wafer size increases, the silicon wafer cutting method provided in this embodiment of the invention will demonstrate greater advantages.

[0061] like Figure 3 , Figure 5 and Figure 6 As shown, this embodiment of the invention also provides a silicon wafer, the silicon wafer 2 having a first set of opposite edges and a second set of opposite edges, the first set of opposite edges including a first edge 201 and a second edge 202 disposed opposite to each other. Figure 3The image shows silicon wafer 2 with the first side 201 and the second side 202 on the left and right sides, respectively. The second set of opposite sides includes the third side 203 and the fourth side 204, which are arranged opposite each other. Figure 3 The image shows that the top and bottom edges of silicon wafer 2 are the third edge 203 and the fourth edge 204, respectively, where the first edge 201 and / or the second edge 202 intersect with the third edge 203 and / or the fourth edge 204; the surface of silicon wafer 2 has multiple cutting lines 23 and two sets of scratches, such as... Figure 5 The first set of scratches 21 shown within the rectangle and as shown in the image Figure 6 The second set of scratches 22 shown within the rectangular frame includes a cutting line 23 extending along the first set of opposite edges of the silicon wafer 2, specifically from the first edge 201 to the second edge 202. The figure shows the cutting line 23 extending horizontally. Of the two sets of scratches, one set is inclined towards the third edge 203 of the silicon wafer 2 in a first direction, which is the direction from the first edge 201 to the second edge 202. Figure 5 As shown, the first side 201 is located at Figure 5 and Figure 6 On the left side, the second side 202 is located Figure 5 and Figure 6 The third side 203 is located on the right side of the middle. Figure 5 and Figure 6 The upper part; another set of scratches slopes towards the fourth edge 204 of silicon wafer 2 in the first direction, such as Figure 6 As shown, the fourth side 204 is located Figure 5 and Figure 6 The lower part of the middle.

[0062] It should be noted that the dicing mark 23 is formed when the dicing wire 4 cuts the silicon rod 1. Specifically, the dicing mark 23 is a grinding texture formed on the silicon wafer surface by the grinding between the dicing wire 4 and the silicon wafer surface during the cutting process. Figure 2 As shown, since the silicon rod 1 is fed downward relative to the cutting line 4, the cutting line 4 is subjected to pressure from the silicon rod 1. While the cutting line 4 is moving back and forth, it forms a certain degree of bending in the feeding direction. The corresponding cutting line 23 formed appears as an arc visible to the naked eye on the silicon wafer surface. Figure 5 and Figure 6 The image illustrates the state of the dicing marks 23 on the silicon wafer. Multiple dicing marks 23 are densely arranged along the dicing direction. The silicon wafer dicing method also includes lifting the silicon wafer 2 upwards relative to the dicing line 4 after dicing. During this lifting process, due to varying degrees of contact between the dicing line 4 and the silicon wafer 2, scratches are formed on the surface of the silicon wafer 2. These scratches are marks formed when the silicon wafer 2 is lifted upwards relative to the dicing line 4 and comes into contact with it. Each group of scratches contains one, two, or a small number of scratches, and the scratches in the same group have the same tilt direction relative to the dicing marks 23. Figure 5 and Figure 6 As shown, along the direction from left to right, the relative cutting line 23 is inclined upward or downward.

[0063] It is understood that the first side 201 and / or the second side 202 intersect with the third side 203 and / or the fourth side 204 in this application, which may be due to the connection between them by chamfering, or they may be due to the intersection with each side or its extension. For example, for a polygonal or other shaped silicon wafer, the embodiments of this application do not limit this.

[0064] With the above technical solution, both sets of scratches on the silicon wafer surface are formed by the dicing wire scratching the silicon wafer when it is lifted upwards relative to the dicing wire. One set of scratches is formed randomly by the dicing wire scratching the silicon wafer surface while it travels in one direction; for example, the first set of scratches 21 is formed when the dicing wire moves between silicon wafers. The other set of scratches is formed randomly by the dicing wire scratching the silicon wafer surface while it travels in the opposite direction; for example, the second set of scratches 22 is formed when the dicing wire moves between silicon wafers. Since the silicon wafer is lifted upwards relative to the dicing wire while it is traveling, the two sets of scratches are formed by the dicing wire scratching in two opposite directions. One set of scratches is inclined towards the third edge 203 of the silicon wafer relative to the dicing wire scratch 23 in the first direction, and the other set of scratches is inclined towards the fourth edge 204 of the silicon wafer opposite to the third edge 203 in the first direction relative to the dicing wire scratch 23. Since the silicon wafer cutting and slitting operations are performed according to the silicon wafer cutting method of this application, the occurrence of scratches on the silicon wafer surface is reduced, and the damage caused by the cutting lines to the silicon wafer is minimized. See the beneficial effects described in the method for details, which will not be repeated here.

[0065] In some embodiments, the angle between the scratch and the cutting line 23 is less than 20°. For example, the angle can be 1°, 5°, 10°, 15°, 19°, etc. The angles between each scratch in the same group of scratches and the cutting line 23 can be the same or different. The angle refers to the angle between the scratch and the tangent on the cutting line 23, where the tangent is the tangent that passes through the intersection of the scratch and the cutting line 23. Since the cutting line 23 is generally slightly arc-shaped, but from the partial view with the scratch, the cutting line 23 in the partial view can be considered to be basically a straight line, and the scratch can also be considered to be basically a straight line.

[0066] The angle between the scratch and the dicing line is related to the speed at which the silicon wafer is lifted relative to the dicing line and the speed of the dicing line. A higher speed results in a larger angle between the scratch and the dicing line, leading to higher wafering efficiency, but also more scratches and more damage to the silicon wafer. Therefore, to ensure wafering efficiency and reduce scratches and damage on the silicon wafer, a suitable speed must be selected. Specific speeds can be found in the relevant descriptions within the method. At this speed, the angle between the scratch and the dicing line 23 formed on the silicon wafer is less than 20°.

[0067] In some embodiments, the depth of the scratches is 2μm to 17μm, specifically 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 17μm, etc. The silicon wafer obtained by the above method has a smaller depth of scratches on its surface, which is beneficial to improving the surface passivation effect of the subsequently prepared solar cell and improving the photoelectric conversion efficiency.

[0068] In some possible implementations, the two sets of scratches are located on the same surface of the silicon wafer, and / or the two sets of scratches are located on two opposite surfaces of the silicon wafer, respectively. Since the scratches formed by the dicing lines on the silicon wafer are random, scratches may form on only one surface of the silicon wafer, or they may form on both surfaces of the silicon wafer. When scratches are formed on only one surface of the silicon wafer, there are two sets of scratches on that surface, including a first set of scratches 21 and a second set of scratches 22. When scratches are formed on both surfaces of the silicon wafer, one surface may have only one set of scratches (such as the first set of scratches 21), and the other surface may have only another set of scratches (such as the second set of scratches), or one surface may have only one set of scratches, such as the first set of scratches 21 or the second set of scratches 22, and the other surface may have both sets of scratches simultaneously, or both surfaces may have both sets of scratches simultaneously.

[0069] It should be noted that the different groups of scratches mentioned above have different tilt directions, that is, the first group of scratches 21 and the second group of scratches 22 have different tilt directions, while the scratches in the same group have the same tilt direction.

[0070] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0071] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method of cutting a silicon wafer, characterized by, The method comprises the following steps: providing a silicon rod and a carrier plate; driving the silicon rod to move downward relative to a cutting line so that the cutting line cuts the silicon rod to obtain a plurality of silicon wafers; lifting the silicon wafers upward relative to the cutting line, the movement mode of the cutting line in the carrier plate being different from the movement mode of the cutting line after the cutting line is separated from the carrier plate, wherein when the cutting line is in the carrier plate, the cutting line performs a take-up movement or a pay-off movement; when the cutting line is separated from the carrier plate, the cutting line alternately performs the take-up movement and the pay-off movement.

2. The method of dicing a silicon wafer of claim 1 wherein, In the process of the cutting line alternately performing the take-up movement and the pay-off movement, the take-up length of the take-up movement of the cutting line is 0.05 m-0.2 m, and the pay-off length of the pay-off movement of the cutting line is 0.05 m-0.2 m.

3. The method of dicing a silicon wafer of claim 1 wherein, In the process of the cutting line alternately performing the take-up movement and the pay-off movement, the take-up length of the take-up movement of the cutting line is equal to the pay-off length of the pay-off movement of the cutting line.

4. The method of dicing a silicon wafer of claim 1 wherein, When the cutting line is in the carrier plate, the average wire speed of the cutting line in the process of the take-up movement or the pay-off movement is S1; When the cutting line is separated from the carrier plate, the maximum wire speed of the cutting line in the process of the take-up movement or the pay-off movement is S2, and S1<S2.

5. The method of dicing a silicon wafer of claim 4 wherein, In the process of the cutting line being in the carrier plate and the cutting line performing the take-up movement or the pay-off movement, the wire speed gradually increases.

6. The method of dicing a silicon wafer of claim 4 wherein, 3 m / min≤S1≤50 m / min and / or S2≤50 m / min.

7. The method of dicing a silicon wafer of claim 1 wherein, The lifting speed of the silicon wafers relative to the cutting line is 15 mm / min-60 mm / min.

8. The method of dicing a silicon wafer of claim 1 wherein, In the process of lifting the silicon wafers relative to the cutting line, the silicon wafer cutting method further comprises spraying a cutting liquid on the cutting line.

9. The method of dicing a silicon wafer of claim 1 wherein, When the cutting line is separated from the carrier plate, the silicon wafer cutting method further comprises spraying clean water between the silicon wafers in the process of the cutting line alternately performing the take-up movement and the pay-off movement.

10. A silicon wafer, characterized by, The silicon wafer is prepared by the silicon wafer cutting method according to any one of claims 1-9, the silicon wafer has a first pair of edges and a second pair of edges, the first pair of edges comprises a first edge and a second edge arranged oppositely, and the second pair of edges comprises a third edge and a fourth edge arranged oppositely, wherein the first edge and / or the second edge intersects with the third edge and / or the fourth edge; the surface of the silicon wafer has two groups of scratches, one group of the scratches is inclined to the third edge in a first direction, and the other group of the scratches is inclined to the fourth edge in the first direction, the first direction is from the first edge to the second edge, and the depth of the scratches is 2 μm-17 μm.

11. The silicon wafer of claim 10, wherein, The surface of the silicon wafer has a plurality of cutting line marks, the cutting line marks extend along a pair of edges of the silicon wafer; and the included angle between the scratches and the cutting line marks is less than 20°.

12. The silicon wafer according to any of claims 10-11, wherein the silicon wafer is a silicon wafer having a diameter of 200 mm or more. The two groups of scratches are located on the same surface of the silicon wafer, and / or the two groups of scratches are located on two opposite surfaces of the silicon wafer, respectively.

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