Preparation method of semiconductor device

Through the dry etching process, the functional layer and the barrier layer are synchronously etched, and the process parameters are adjusted, which solves the problems of high process difficulty and frequent etch stop phenomena in traditional processes, and realizes the efficient preparation of semiconductor devices.

CN119822316APending Publication Date: 2025-04-15CSMC TECH FAB2 CO LTD
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Patent Information

Application Number
CN202311332097.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-10-13
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

When preparing grooves with inclined walls in the traditional dry etching process, the process is difficult, and the etch stop phenomenon caused by thicker polymers is frequent, which affects the preparation efficiency.

Method used

The functional layer is etched longitudinally by using the dry etching process and the barrier layer is etched horizontally. By adjusting the process parameters of the dry etching machine, the etching rate ratio of longitudinal etching and transverse etching is controlled to form a groove with an inclined wall surface.

Benefits of technology

It reduces the etch stop phenomenon caused by thick polymer, reduces the difficulty of preparing semiconductor devices, and improves the feasibility of process control.

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Abstract

The invention relates to a preparation method of a semiconductor device. Comprising the steps that a semiconductor structure is provided, and the semiconductor structure comprises a substrate structure and a functional layer arranged on the substrate structure; forming a barrier layer on the functional layer, and defining an etching window on the barrier layer; and performing longitudinal etching on the functional layer and transverse etching on the barrier layer based on the etching window by adopting a dry etching process so as to form a groove with an inclined wall surface on the functional layer. According to the invention, the etch stop phenomenon caused by the thick polymer can be reduced, and the preparation difficulty of the semiconductor device can be reduced.
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Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit manufacturing, and in particular to a method for preparing a semiconductor device. Background Art

[0002] Micro Electro Mechanical System (MEMS) is an integration of microcircuits and micromachines on a chip according to functional requirements, which is conducive to the integration and miniaturization of semiconductor devices.

[0003] In MEMS devices, it is usually necessary to open a groove with an inclined wall in the dielectric layer to fill the conductive material. In the traditional dry etching process, it is usually carried out by increasing the selectivity of the process gas and depositing a certain thickness of polymer on the side wall of the groove. However, the traditional dry etching process is relatively difficult. Summary of the invention

[0004] Based on this, it is necessary to provide a method for preparing a semiconductor device to address the above problems.

[0005] A method for preparing a semiconductor device, comprising:

[0006] Providing a semiconductor structure, the semiconductor structure comprising a substrate structure and a functional layer disposed on the substrate structure;

[0007] forming a barrier layer on the functional layer, and defining an etching window on the barrier layer;

[0008] A dry etching process is adopted, and the functional layer is longitudinally etched and the barrier layer is transversely etched based on the etching window, so as to form a groove with an inclined wall surface on the functional layer.

[0009] In one embodiment, the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is positively correlated with the inclination angle of the inclined wall surface.

[0010] In one embodiment, before the step of using a dry etching process to longitudinally etch the functional layer and transversely etch the barrier layer based on the etching window to form a groove with an inclined wall surface on the functional layer, the method further includes:

[0011] The process parameters of the dry etching machine are adjusted so that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is a preset value.

[0012] In one of the embodiments, the process parameters further include process time, and the process time is equal to the ratio of the thickness of the functional layer to the etching rate of the vertical etching.

[0013] In one of the embodiments, the process gas of the dry etching process includes a first etching gas for etching the functional layer and a second etching gas for etching the barrier layer;

[0014] The process parameters include a flow ratio of the first etching gas to the second etching gas.

[0015] In one embodiment, the material of the functional layer includes silicon nitride, and the first etching gas includes at least one of CF4, CH2F2, CHF3 and CH3F;

[0016] Or, the material of the functional layer includes polysilicon, and the first etching gas includes at least one of Cl2 and HBr;

[0017] Alternatively, the material of the functional layer includes silicon dioxide, and the first etching gas includes at least one of C3F8, C4F8, C5F8, C4F6, CF4, CH2F2, CHF3 and CH3F.

[0018] In one embodiment, the barrier layer is a photoresist, and the second etching gas includes O2;

[0019] And / or, the process gas further includes at least one of Ar, He and Xe.

[0020] In one embodiment, the flow rate of the first etching gas is between 10 sccm and 200 sccm;

[0021] And / or, the flow rate of the second etching gas is between 10 sccm and 200 sccm.

[0022] In one embodiment, the chamber pressure of the dry etching machine is between 30 mTorr and 120 mTorr, and the power is between 150 W and 1000 W.

[0023] In one embodiment, after the step of using a dry etching process to longitudinally etch the functional layer and transversely etch the barrier layer based on the etching window to form a groove with an inclined wall surface on the functional layer, the method further includes:

[0024] The barrier layer is removed, and the semiconductor structure is pickled.

[0025] The method for preparing a semiconductor device provided in an embodiment of the present application uses a dry etching process to longitudinally etch the functional layer and transversely etch the barrier layer, so that a groove with an inclined wall surface can be formed on the functional layer. Compared with the traditional preparation method, the etch stop phenomenon caused by the thick polymer can be reduced, which is conducive to reducing the difficulty of preparing semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of the present application, the drawings required for use in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A flow chart of a method for preparing a semiconductor device provided in one embodiment of the present application.

[0028] Figure 2 for Figure 1 FIG. 1 is a flow chart of step 100 in a method for manufacturing a semiconductor device.

[0029] Figures 3 to 8 for Figure 1 The cross-sectional structural schematic diagram of the device structure during the process of manufacturing the semiconductor device is shown.

[0030] Fig. 9 A schematic diagram of the relationship between the etching rate and the inclination angle of the inclined wall of the groove provided in an embodiment of the present application.

[0031] Fig.10 Another flow chart of a method for preparing a semiconductor device provided in one embodiment of the present application.

[0032] Description of reference numerals:

[0033] 10. Semiconductor device; 11. Semiconductor structure; 111. Substrate structure; 1111. Substrate; 1112. Etching stop layer; 112. Functional layer; 113. Groove; 1131. Groove wall; 20. Barrier layer; 21. Etching window. DETAILED DESCRIPTION

[0034] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0036] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0037] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0038] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0039] Embodiments of the application are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the application, so that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the application should not be limited to the specific shapes of the zones shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the application.

[0040] As described in the background art, when using the traditional dry etching process to prepare grooves with inclined walls, the side walls are usually protected by increasing the selectivity of the process gas and depositing a certain thickness of polymer on the side walls of the groove to prevent lateral etching. However, on the one hand, this preparation method involves many types of gases, resulting in many process variables, and it is not easy to control the process parameters during the preparation process; on the other hand, when the polymer thickness is thick, there will be an etch stop phenomenon. In summary, the process difficulty of the traditional dry etching process is relatively large.

[0041] In order to solve at least one of the above problems, the embodiment of the present application provides a method for preparing a semiconductor device, by using a dry etching process to longitudinally etch the functional layer and transversely etch the barrier layer, so that a groove with an inclined wall surface can be formed on the functional layer. Compared with the traditional preparation method, the etch stop phenomenon caused by the thick polymer can be reduced, which is conducive to reducing the difficulty of preparing semiconductor devices.

[0042] Specifically, an embodiment of the present application provides a method for preparing a semiconductor device, which semiconductor device may be a MEMS device. Further, the MEMS device may be a gyroscope for electrically detecting the posture, angular velocity or angular acceleration of an object, a MEMS oscillator (Timing resonator) composed of a MEMS vibrator and an analog oscillation circuit, an IR sensor for electrically detecting infrared rays, a MEMS microphone in electronic devices such as mobile phones, laptops and tablet computers, etc.

[0043] Reference Figure 1 As shown, the method for preparing the semiconductor device comprises the following steps:

[0044] S100: Provide a semiconductor structure 11, the semiconductor structure 11 includes a substrate structure 111 and a functional layer 112 disposed on the substrate structure 111. It should be noted that the functional layer 112 may be a silicon nitride layer, a polysilicon layer or a silicon dioxide layer. The embodiment of the present application does not limit the material of the functional layer 112.

[0045] S200: forming a barrier layer 20 on the functional layer 112, and defining an etching window 21 on the barrier layer 20. In this way, the shape and position of the groove 113 can be defined, so as to facilitate etching to form the groove 113 in the subsequent process.

[0046] S300 : using a dry etching process, and based on the etching window 21 , longitudinally etching the functional layer 112 and transversely etching the barrier layer 20 , so as to form a groove 113 with an inclined wall surface on the functional layer 112 .

[0047] Here, it should be noted that the longitudinal etching and the lateral etching are performed simultaneously. Figure 8 As shown, the groove 113 with the inclined wall surface means that the angle between the groove wall 1131 of the groove 113 and the plane where the surface of the substrate structure 111 is located is greater than 0° and less than 90°.

[0048] In the embodiments of this application, refer to Figure 6 As shown, the wall surface of the etching window 21 is perpendicular to the plane where the surface of the substrate structure 111 is located. Figure 6 As shown in FIG. 1 , the cross-sectional shape of the etching window 21 along the direction perpendicular to the paper surface is a rectangle. Figure 7 As shown, it is convenient to form a groove 113 with an inclined wall surface by simultaneously performing lateral etching and longitudinal etching, and the morphology of the inclined wall surface is controllable.

[0049] The method for preparing a semiconductor device provided in an embodiment of the present application uses a dry etching process to longitudinally etch the functional layer 112 and transversely etch the barrier layer 20, so that a groove 113 with an inclined wall surface can be formed on the functional layer 112. Compared with the traditional preparation method, the etch stop phenomenon caused by the thick polymer can be reduced, which is conducive to reducing the difficulty of preparing the semiconductor device 10.

[0050] In one embodiment, referring to Figure 2 , and combined with Figure 3 , Figure 4 and Figure 5 As shown, S100: providing a semiconductor structure 11, the semiconductor structure 11 includes a substrate structure 111 and a functional layer 112 disposed on the substrate structure 111, specifically including the following steps:

[0051] S110: Provide a substrate 1111. The material of the substrate 1111 may be single crystal silicon, polycrystalline silicon, amorphous silicon, germanium silicon compound, silicon-on-insulator (SOI) or low temperature polysilicon (LTPS), etc. It is understandable that electronic components may be disposed on the substrate 1111.

[0052] S120: forming an etch stop layer 1112 on the substrate 1111. Exemplarily, the material of the etch stop layer 1112 may be silicon dioxide or silicon nitride. In the embodiment of the present application, the substrate structure 111 includes a substrate 1111 and an etch stop layer 1112 disposed on the substrate 1111.

[0053] S130: forming a functional layer 112 on the etch stop layer 1112. For example, the material of the functional layer 112 may be silicon nitride, polysilicon or silicon dioxide.

[0054] In one embodiment, the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is positively correlated with the inclination angle of the inclined wall surface.

[0055] Specifically, the etching rate of the functional layer 112 in the longitudinal etching is a, and the etching rate of the barrier layer 20 in the transverse etching is b. The greater the ratio of a to b, the greater the inclination angle of the inclined wall. In this way, it is convenient for the process personnel to control the inclination angle of the inclined wall according to the etching rate of the longitudinal etching and the etching rate of the transverse etching.

[0056] In a specific embodiment, referring to Fig. 9As shown, α represents the inclination angle of the inclined wall. When a=b, that is, the ratio of a to b is 1, the inclination angle α=45°; when a>b, that is, the ratio of a to b is greater than 1, the inclination angle α>45°; when a<b, that is, the ratio of a to b is less than 1, the inclination angle α<45°.

[0057] In one embodiment, before the step of using a dry etching process to longitudinally etch the functional layer 112 and transversely etch the barrier layer 20 based on the etching window 21 to form a groove 113 with an inclined wall surface on the functional layer 112 in S300, the following steps are also included:

[0058] S250: Adjusting the process parameters of the dry etching machine so that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is a preset value.

[0059] In one example, if it is necessary to produce an inclined wall surface with an inclination angle of 45°, the adjusted process parameters should ensure that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is 1. In another example, if it is necessary to produce an inclined wall surface with an inclination angle greater than 45°, the adjusted process parameters should ensure that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is greater than 1. In another example, if it is necessary to produce an inclined wall surface with an inclination angle less than 45°, the adjusted process parameters should ensure that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is less than 1.

[0060] In a specific embodiment, if an inclined wall with an inclination angle of 25° is required, the adjusted process parameters should ensure that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is a specific value, and the specific value is less than 1. The specific value of the specific value is not limited in the embodiment of the present application.

[0061] In one embodiment, the process parameters also include process time, which is equal to the ratio of the thickness of the functional layer 112 to the etching rate of the longitudinal etching. Thus, when adjusting the process parameters, by adjusting the process time, it is possible to ensure that the etching process completely etched through the functional layer 112 in the longitudinal direction, thereby forming a groove 113 penetrating the functional layer 112.

[0062] In one embodiment, the process gas of the dry etching process includes a first etching gas for etching the functional layer 112 and a second etching gas for etching the barrier layer 20. The process parameters include a flow ratio of the first etching gas to the second etching gas. Thus, when adjusting the process parameters, the flow ratio of the first etching gas to the second etching gas also needs to be adjusted.

[0063] Specifically, by controlling the flow ratio of the first etching gas and the second etching gas, the purpose of controlling the etching rate of the longitudinal etching and the lateral etching is achieved. Furthermore, the embodiment of the present application only needs to control the flow ratio of the first etching gas and the second etching gas, and the process time. Compared with the traditional technology, the embodiment of the present application has fewer process control variables, and it is easier to control the process parameters during the preparation process, which is conducive to reducing the process difficulty.

[0064] Furthermore, the flow ratio of the first etching gas and the second etching gas can be adjusted in the following manner:

[0065] In one example, the total flow of the first etching gas and the second etching gas is a certain value, and the flow of the first etching gas and the flow of the second etching gas are adjusted respectively so that the flow ratio of the first etching gas to the second etching gas is equal to a preset value.

[0066] In another specific embodiment, the flow rate of one of the first etching gas and the second etching gas is kept constant, and the flow rate of the other is adjusted. In this case, the total flow rate of the first etching gas and the second etching gas changes with the flow rate of the regulated etching gas.

[0067] In one embodiment, the material of the functional layer 112 includes silicon nitride, and the first etching gas includes at least one of CF4, CH2F2, CHF3 and CH3F. In this way, the first etching gas can have a higher selectivity when etching silicon nitride.

[0068] In one embodiment, the material of the functional layer 112 includes polysilicon, and the first etching gas includes at least one of Cl 2 and HBr. In this way, the first etching gas can have a higher selectivity when etching polysilicon.

[0069] In one embodiment, the material of the functional layer 112 includes silicon dioxide, and the first etching gas includes at least one of C3F8, C4F8, C5F8, C4F6, CF4, CH2F2, CHF3 and CH3F. In this way, the first etching gas can have a higher selectivity when etching silicon dioxide.

[0070] In one embodiment, the barrier layer 20 is a photoresist, and the second etching gas includes O2.

[0071] By setting the barrier layer 20 as photoresist, the preparation process and difficulty of the semiconductor device 10 can be reduced. By setting the second etching gas as O2, the selectivity of the photoresist can be adjusted, that is, the rate of lateral etching of the photoresist can be adjusted.

[0072] In one embodiment, the process gas further includes a dilution gas.

[0073] In a specific embodiment, the diluent gas includes at least one of Ar, He, and Xe.

[0074] It is understandable that the barrier layer 20 may also be a hard mask layer. The material of the barrier layer 20 is not limited in the embodiment of the present application.

[0075] In one embodiment, the flow rate of the first etching gas is between 10 sccm and 200 sccm. For example, the flow rate of the first etching gas can be 10 sccm, 30 sccm, 60 sccm, 100 sccm, 150 sccm, 180 sccm or 200 sccm.

[0076] In one embodiment, the flow rate of the second etching gas is between 10 sccm and 200 sccm. For example, the flow rate of the second etching gas can be 10 sccm, 25 sccm, 50 sccm, 90 sccm, 140 sccm, 175 sccm or 200 sccm.

[0077] In one embodiment, the chamber pressure of the dry etching machine is between 30 mTorr and 120 mTorr. Exemplarily, the chamber pressure may be 30 mTorr, 50 mTorr, 80 mTorr, 100 mTorr or 120 mTorr. By making the chamber pressure within the above range, the process gas can have a higher selectivity, which is conducive to forming the groove 113 with the inclined wall surface on the functional layer 112.

[0078] In one embodiment, the power is between 150 W and 1000 W. Exemplarily, the power may be 150 W, 250 W, 400 W, 600 W, 800 W or 1000 W. By making the power within the above range, the process gas can have a higher selectivity, which is conducive to forming the groove 113 with the inclined wall surface on the functional layer 112.

[0079] In one embodiment, in combination Figure 8 As shown, after S300: using a dry etching process, and etching the functional layer 112 longitudinally based on the etching window 21 and etching the barrier layer 20 transversely to form a groove 113 with an inclined wall surface on the functional layer 112, the following steps are also included:

[0080] S400: removing the barrier layer 20 and acid-washing the semiconductor structure 11. For example, the barrier layer 20 may be removed by a dry process or a wet process. By acid-washing the semiconductor structure 11, polymers generated during the preparation process may be removed.

[0081] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the accompanying drawings may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a portion of the steps or stages in other steps.

[0082] Based on the description of the above embodiments, more specific embodiments and drawings are presented below for detailed description.

[0083] Embodiment 1:

[0084] Reference Fig.10 As shown, the embodiment of the present application provides a method for preparing a semiconductor device, which specifically includes the following steps:

[0085] S10: Provide a substrate 1111.

[0086] S20: forming an etch stop layer 1112 on the substrate 1111. Specifically, the etch stop layer 1112 is made of silicon dioxide.

[0087] S30: forming a functional layer 112 on the etching stop layer 1112. Specifically, the material of the functional layer 112 is silicon nitride and the thickness of the functional layer 112 is 1175 angstroms.

[0088] S40: forming a photoresist on the functional layer 112, and exposing and developing the photoresist to define an etching window 21 on the photoresist. The thickness of the photoresist is 1.6 um.

[0089] S50: adjusting the process parameters of the dry etching machine so that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is a preset value.

[0090] Specifically, the process gas of the dry etching process includes CF4, O2 and Ar. The flow rate of CF4 is between 10sccm-200sccm. The flow rate of O2 is between 10sccm-200sccm. The flow rate ratio of CF4 and O2 is between 2:1-1:2. When adjusting the process parameters of the dry etching machine, the flow rate ratio of CF4 and O2 and the process time are specifically adjusted.

[0091] S60 : etching the functional layer 112 longitudinally and etching the photoresist laterally based on the etching window 21 , so as to form a groove 113 with an inclined wall surface on the functional layer 112 .

[0092] The method for preparing a semiconductor device provided in the embodiment of the present application, on the one hand, can form a groove 113 with an inclined wall surface on the functional layer 112. Compared with the traditional preparation method, it can reduce the etch stop phenomenon caused by the thick polymer, which is conducive to reducing the difficulty of preparing the semiconductor device 10; on the other hand, the embodiment of the present application only needs to control the flow ratio of the first etching gas and the second etching gas, and the process time. Compared with the traditional technology, the process control variables of the embodiment of the present application are small, and the process parameters are easy to control during the preparation process, which is conducive to reducing the difficulty of the process; on the other hand, by controlling the lateral etching rate of the photoresist and the longitudinal etching rate of the functional layer 112, the purpose of controlling the inclined wall surface morphology can be achieved, making the morphology more controllable; on the other hand, it can make the preparation process of the semiconductor device 10 simpler and reduce costs.

[0093] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0094] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0095] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for preparing a semiconductor device, characterized in that: include: Providing a semiconductor structure, the semiconductor structure comprising a substrate structure and a functional layer disposed on the substrate structure; forming a barrier layer on the functional layer, and defining an etching window on the barrier layer; A dry etching process is adopted, and the functional layer is longitudinally etched and the barrier layer is transversely etched based on the etching window, so as to form a groove with an inclined wall surface on the functional layer.

2. The method for preparing a semiconductor device according to claim 1, wherein: The ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is positively correlated with the inclination angle of the inclined wall surface.

3. The method for preparing a semiconductor device according to claim 2, characterized in that: Before the step of adopting a dry etching process and etching the functional layer longitudinally and etching the barrier layer transversely based on the etching window to form a groove with an inclined wall surface on the functional layer, the method further includes: The process parameters of the dry etching machine are adjusted so that the ratio of the etching rate of the longitudinal etching to the etching rate of the lateral etching is a preset value.

4. The method for preparing a semiconductor device according to claim 3, characterized in that: The process parameters further include process time, which is equal to the ratio of the thickness of the functional layer to the etching rate of the vertical etching.

5. The method for preparing a semiconductor device according to claim 3, characterized in that: The process gas of the dry etching process includes a first etching gas for etching the functional layer and a second etching gas for etching the barrier layer; The process parameters include a flow ratio of the first etching gas to the second etching gas.

6. The method for preparing a semiconductor device according to claim 5, characterized in that: The material of the functional layer includes silicon nitride, and the first etching gas includes at least one of CF4, CH2F2, CHF3 and CH3F; Or, the material of the functional layer includes polysilicon, and the first etching gas includes at least one of Cl2 and HBr; Alternatively, the material of the functional layer includes silicon dioxide, and the first etching gas includes at least one of C3F8, C4F8, C5F8, C4F6, CF4, CH2F2, CHF3 and CH3F.

7. The method for preparing a semiconductor device according to claim 5, characterized in that: The barrier layer is a photoresist, and the second etching gas includes O2; And / or, the process gas further includes at least one of Ar, He and Xe.

8. The method for preparing a semiconductor device according to claim 5, characterized in that: The flow rate of the first etching gas is between 10 sccm and 200 sccm; And / or, the flow rate of the second etching gas is between 10 sccm and 200 sccm.

9. The method for preparing a semiconductor device according to any one of claims 1 to 8, characterized in that: The chamber pressure of the dry etching machine is between 30 mTorr and 120 mTorr, and the power is between 150 W and 1000 W.

10. The method for preparing a semiconductor device according to any one of claims 1 to 8, characterized in that: After the step of adopting a dry etching process and etching the functional layer longitudinally and etching the barrier layer transversely based on the etching window to form a groove with an inclined wall surface on the functional layer, the method further includes: The barrier layer is removed, and the semiconductor structure is pickled.