Chip production assembly parameter control method and system

By setting environmental monitoring points during the chip production process, detecting and evaluating the environmental parameters of each step, the problem of difficulty in determining the impact of the environment on chip production in the prior art is solved, and a comprehensive evaluation of chip quality and improving yield rate is achieved.

CN119828615AActive Publication Date: 2025-04-15JIANGSU XINWANG ELECTRONIC TECH CO LTD
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
CN202411885886.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-20
Publication Date
2025-04-15
Estimated Expiration
2044-12-20

AI Technical Summary

Technical Problem

The prior art is difficult to determine the impact of the environment on chip production based on different environmental requirements of each step, and thus it is difficult to determine the testing requirements and quality of the chip.

Method used

By setting environmental monitoring points at the operating position of each production assembly step, the air cleanliness, temperature, humidity and vibration data are detected, and the processing environmental impact score, cleanliness impact score and vibration impact score are calculated based on these data, and the processing impact effect score is finally determined, which in turn determines the chip's test path.

Benefits of technology

A multi-faceted evaluation of chip quality in each step environment has been achieved, the chip yield rate has been improved, and a comprehensive understanding of chip quality has been ensured.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119828615A_ABST
    Figure CN119828615A_ABST
Patent Text Reader

Abstract

The invention provides a chip production and assembly parameter control method and system, and relates to the technical field of chip production control, and the method comprises the steps: setting serial numbers for a plurality of steps of chip production and assembly; detecting air cleanliness, air temperature, air humidity and vibration data of the operation position of each step; and determining a processing environment influence score, a cleanliness influence score and a vibration influence score, determining a processing influence effect score, if the processing influence effect score is higher than a preset influence threshold value, transferring the chip to the first test subarea, otherwise, transferring the chip to the second test subarea, and obtaining a chip product after the test is completed. According to the method and the device, the processing environment influence score, the cleanliness influence score and the vibration influence score can be determined according to the requirements of each step on the environment, so that the influence of the environment of each step on the processing quality is evaluated on the basis of multiple aspects, the quality condition of the chip can be comprehensively known, and the yield of the chip is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of chip production control, and in particular to a chip production assembly parameter control method and system. Background Art

[0002] In the related art, the chip production process may include multiple steps such as wafer preparation, oxidation, photolithography, etching, ion implantation, thin film deposition, interconnection, testing, packaging, and final testing. Each step has different environmental requirements. For steps with higher environmental requirements, there are higher requirements for the temperature, humidity, air cleanliness, vibration, etc. at the operating location. If the requirements are not met, the processing accuracy may be affected, and even qualified chips may not be manufactured. However, it is difficult to determine the impact of the environment on chip production based on the different environmental requirements of each step in the related art, and it is difficult to determine the testing requirements for the chip and understand the quality of the chip.

[0003] The information disclosed in the background technology section of this application is only intended to deepen the understanding of the general background technology of this application, and should not be regarded as an admission or any form of suggestion that the information constitutes the prior art already known to those skilled in the art. Summary of the invention

[0004] The present invention provides a chip production assembly parameter control method and system, which can solve the technical problem that the prior art cannot determine the impact of the environment on chip production according to the different environmental requirements of each step.

[0005] According to a first aspect of the present invention, there is provided a chip production assembly parameter control method, comprising:

[0006] According to the chip production and assembly sequence, multiple steps of chip production and assembly are assigned sequence numbers;

[0007] An environmental monitoring point is set at the operation position of each production and assembly step, wherein the environmental monitoring point is used to detect air cleanliness, air temperature, air humidity and vibration data;

[0008] Determine the air cleanliness, air temperature, air humidity and vibration data detected at multiple moments in each step of the environmental monitoring point in the production and assembly process of multiple chips belonging to the same wafer during the step;

[0009] Determine the processing environment impact score based on the air temperature and air humidity detected at multiple moments in each step and the sequence number of each step;

[0010] Determine the cleanliness impact score based on the air humidity, air cleanliness and the sequence number of each step detected at multiple moments in each step;

[0011] Determine a vibration impact score based on vibration data detected at multiple moments in each step and the sequence number of each step;

[0012] Determining a processing impact score according to the processing environment impact score, the cleanliness impact score and the vibration impact score;

[0013] If the processing impact effect score is higher than the preset impact threshold, the multiple chips belonging to the same wafer are transferred to the first test partition; otherwise, the multiple chips belonging to the same wafer are transferred to the second test partition, wherein the chips in the first test partition are subjected to quality testing one by one, and the chips in the second test partition are subjected to sampling quality testing;

[0014] After the test is completed, multiple chip products are obtained.

[0015] According to a second aspect of the present invention, there is provided a chip production assembly parameter control system, comprising:

[0016] A serial number module is used to set serial numbers for multiple steps of chip production and assembly according to the order of chip production and assembly;

[0017] A setting module, used to set an environmental monitoring point at the operation position of each production and assembly step, wherein the environmental monitoring point is used to detect air cleanliness, air temperature, air humidity and vibration data;

[0018] A detection module, used to determine the air cleanliness, air temperature, air humidity and vibration data detected by the environmental monitoring points in each step of the production and assembly process of multiple chips belonging to the same wafer at multiple moments during the process of the step;

[0019] A processing environment impact scoring module, used to determine the processing environment impact score according to the air temperature and air humidity detected at multiple moments in each step and the sequence number of each step;

[0020] A cleanliness impact scoring module is used to determine the cleanliness impact score according to the air humidity, air cleanliness and the sequence number of each step detected at multiple moments in each step;

[0021] A vibration impact scoring module, used to determine a vibration impact score according to vibration data detected at multiple moments in each step and the sequence number of each step;

[0022] A processing influence effect scoring module, used to determine a processing influence effect score according to the processing environment influence score, the cleanliness influence score and the vibration influence score;

[0023] A testing module, configured to transfer the plurality of chips belonging to the same wafer to a first testing partition if the processing impact effect score is higher than a preset impact threshold, and otherwise transfer the plurality of chips belonging to the same wafer to a second testing partition, wherein the chips in the first testing partition are subjected to quality testing one by one, and the chips in the second testing partition are subjected to sampling quality testing;

[0024] The product module is used to obtain multiple chip products after the test is completed.

[0025] Technical effect: According to the present invention, an environmental monitoring point can be set at the operating position of each step, so that the air cleanliness, air temperature, air humidity and vibration data at the operating position of each step can be detected. And according to the requirements of each step for the environment, the processing environment impact score, cleanliness impact score and vibration impact score are determined, so as to evaluate the impact of the environment of each step on the processing quality based on multiple aspects, and transfer the chips with greater impact to the first test partition for comprehensive testing, so as to fully understand the quality status of the chip and improve the chip yield. When determining the temperature impact score, the average value of the impact caused by the relative deviation between the air temperature detected at multiple moments and the preset temperature, as well as the average value of the impact caused by the change in the deviation between the air temperature and the preset temperature can be obtained, so as to obtain the maximum value of the two to describe the impact of the deviation between the temperature and the preset temperature on the chip quality. The temperature weight can be set based on the different temperature requirements of each step, and the serial number weight can be set based on the fact that the impact in the previous steps is likely to accumulate in the subsequent steps and cause a greater impact on the chip quality, so as to obtain the temperature impact score. Similarly, the humidity impact score can be obtained, and the processing environment impact score can be obtained after weighted summation, so as to accurately and objectively describe the impact of the air temperature and humidity environment at the operating location of each step on the chip quality. When determining the first relationship function, the first undetermined coefficient equation group of the first relationship function can be set based on the inverse correlation between air humidity and electrostatic voltage and the half-life of electrostatic voltage, and the first undetermined coefficient is solved by the air humidity set in multiple tests and the measured electrostatic voltage and the half-life of electrostatic voltage, so as to obtain the first relationship function, so as to concisely and accurately express the static electricity state of the silicon dioxide layer under specific air humidity conditions and the state of easy adsorption of particulate matter, and then accurately express the influence of air cleanliness and humidity on chip quality. When determining the cleanliness impact score, the influence of air humidity on the static electricity generated by the silicon dioxide layer on the surface of the wafer and the influence of static electricity on the adsorption of particulate matter in the air can be determined, so as to determine the additional influence of air humidity on the particulate matter in the air on the chip quality. And the influence of air cleanliness on chip quality can be determined, and then the overall influence of particulate matter in the air on chip quality can be determined from the two aspects of air cleanliness and air humidity, so as to improve the accuracy and objectivity of the cleanliness impact score. When determining the processing influence effect score, the ratio between the maximum vibration value detected during the execution of each step and the preset amplitude maximum value can be used to describe the influence of vibration on the processing accuracy of the chip in that step, and then the influence is weighted and summed based on the vibration weight and the serial number weight to obtain the vibration influence score, thereby accurately and objectively describing the overall influence of vibration at the operating position of each step on the chip quality.

[0026] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and do not limit the present invention. Other features and aspects of the present invention will become more apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other embodiments can be obtained based on these drawings without creative work.

[0028] Figure 1 A schematic diagram showing a flow chart of a chip production assembly parameter control method according to an embodiment of the present invention is exemplarily shown;

[0029] Figure 2 A block diagram of a chip production assembly parameter control system according to an embodiment of the present invention is exemplarily shown. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0032] Figure 1 A schematic flow chart of a chip production assembly parameter control method according to an embodiment of the present invention is exemplarily shown, the method comprising:

[0033] Step S101, setting serial numbers for multiple steps of chip production and assembly according to the order of chip production and assembly;

[0034] Step S102, setting an environmental monitoring point at the operation position of each production and assembly step, wherein the environmental monitoring point is used to detect air cleanliness, air temperature, air humidity and vibration data;

[0035] Step S103, determining the air cleanliness, air temperature, air humidity and vibration data detected by the environmental monitoring points in each step of the production and assembly process of multiple chips belonging to the same wafer at multiple moments during the process of the steps;

[0036] Step S104, determining a processing environment impact score according to the air temperature and air humidity detected at multiple moments in each step and the sequence number of each step;

[0037] Step S105, determining the cleanliness impact score according to the air humidity and air cleanliness detected at multiple moments in each step and the sequence number of each step;

[0038] Step S106, determining a vibration impact score according to vibration data detected at multiple moments in each step and the sequence number of each step;

[0039] Step S107, determining a processing impact score according to the processing environment impact score, the cleanliness impact score and the vibration impact score;

[0040] Step S108, if the processing impact effect score is higher than the preset impact threshold, the multiple chips belonging to the same wafer are transferred to the first test partition, otherwise, the multiple chips belonging to the same wafer are transferred to the second test partition, wherein the chips in the first test partition are subjected to quality testing one by one, and the chips in the second test partition are subjected to sampling quality testing;

[0041] Step S109: after the test is completed, a plurality of chip products are obtained.

[0042] According to the chip production assembly parameter control method of the embodiment of the present invention, an environmental monitoring point can be set at the operation position of each step, so that the air cleanliness, air temperature, air humidity and vibration data at the operation position of each step can be detected. And according to the requirements of each step for the environment, the processing environment impact score, cleanliness impact score and vibration impact score are determined, so as to evaluate the impact of the environment of each step on the processing quality based on multiple aspects, and transfer the chips with greater impact to the first test partition for comprehensive testing, so as to fully understand the quality status of the chip and improve the yield rate of the chip.

[0043] According to one embodiment of the present invention, the chip production process may include multiple steps such as wafer preparation, oxidation, photolithography, etching, ion implantation, thin film deposition, interconnection, testing, packaging, and final testing. Each step has different requirements for the environment. For example, the photolithography step has higher requirements for the environment, including temperature, humidity, air cleanliness, and vibration, while the packaging step has lower requirements for the environment. In order to distinguish the data collected at the operation position of each step, a sequence number may be set for each step in step S101, that is, a sequence number may be set for each step according to the order of chip production and assembly.

[0044] According to one embodiment of the present invention, in step S102, an environmental monitoring point may be set at the operation position of each production assembly step, and the environmental monitoring point may detect air cleanliness, air temperature, air humidity and vibration data. For example, the environmental monitoring point may be provided with measuring equipment such as a thermometer, a hygrometer, a particle detector, a vibration sensor, etc., so as to respectively detect the above data at the operation position.

[0045] According to an embodiment of the present invention, in step S103, during the production assembly process, a wafer obtained in the wafer preparation step can manufacture multiple chips, so the environmental impacts on the same wafer in multiple steps can be tracked, thereby determining the environmental impacts on all chips on the wafer. Therefore, the air cleanliness, air temperature, air humidity and vibration data detected by the environmental monitoring points in each step of the same wafer at multiple moments during the process of the step can be determined, and these data are the data of multiple chips belonging to the wafer at multiple moments during the process of each step.

[0046] According to one embodiment of the present invention, in step S104, each step has different requirements for air temperature and air humidity. For example, the oxidation step needs to strictly control the temperature to improve the uniformity of the oxide layer on the wafer surface, and the photolithography step needs to strictly control the temperature so that the solubility of the photoresist meets expectations. For another example, the oxidation step also needs to strictly control the air humidity to improve the uniformity of the oxide layer on the wafer surface, and the ion implantation step needs to strictly control the air humidity, which will affect the injection accuracy of the dopant and thus affect the electrical properties of the chip. Therefore, the sequence numbers of different steps can be used to distinguish the requirements of each step for air temperature and air humidity, and then determine the impact of air temperature and humidity on the quality of the batch of chips, and obtain the processing environment impact score.

[0047] According to one embodiment of the present invention, a processing environment impact score is determined based on air temperatures, air humidity detected at multiple moments in each step and the sequence number of each step, including: before each step starts, obtaining the initial air temperature and initial air humidity of the operating position of each step, and determining whether it is necessary to turn on the air conditioning equipment at the operating position of each step; if there is a target operating position where the air conditioning equipment needs to be turned on, after turning on the air conditioning equipment at the target operating position and waiting for the air temperature and air humidity to meet preset conditions, starting to execute the steps corresponding to the target operating position, and obtaining the air temperature and air humidity at multiple moments; determining the processing environment impact score based on the air temperature and air humidity at multiple moments, and the sequence number of each step.

[0048] According to an embodiment of the present invention, before each step starts, the preset temperature and preset humidity of the operation position of each step can be set. If it is detected that the relative deviation between the initial air temperature and the preset temperature is greater than or equal to the preset temperature deviation threshold, or the relative deviation between the dehumidified air humidity and the preset humidity is greater than or equal to the preset humidity deviation threshold, it is determined that the air conditioning device needs to be turned on. The operation position where the air conditioning device needs to be turned on is the target operation position. The air conditioning device can be turned on so that the relative deviation between the air humidity of the target operation position and the preset humidity is less than the preset humidity deviation threshold, and the relative deviation between the air temperature of the target operation position and the preset temperature is less than the preset temperature deviation threshold, that is, the preset conditions are met. After that, the step corresponding to the target operation position is started again, so that the air humidity and air temperature meet the preset conditions at the moment when the step starts to be executed. Subsequently, during the execution of the step, the air temperature and air humidity may change, for example, deviate from the preset temperature and preset humidity again. Therefore, the air temperature and air humidity of the operation position of each step can be continuously monitored to determine the impact of the air temperature and air humidity on the chip quality and obtain the processing environment impact score.

[0049] According to one embodiment of the present invention, the processing environment impact score is determined according to the air temperature and air humidity at multiple times and the sequence number of each step, including: determining the processing environment impact score S according to formula (1): E ,

[0050]

[0051] Among them, T i,j is the air temperature detected at the jth moment during the i-th step, T i,p is the preset temperature of the operating position in the ith step, n i is the number of moments in the process of the ith step, T i,j-1 The air temperature detected at the j-1th moment during the i-th step, Ni is the sequence number of the i-th step, α i is the temperature weight of the ith step, H i,j is the air humidity detected at the jth moment during the i-th step, H i,p is the preset humidity of the operating position in the ith step, H i,j-1 is the air humidity detected at the j-1th moment during the i-th step, β i is the humidity weight of the i-th step, N is the number of chip production and assembly steps, w T and w H is the preset weight, max(*) is the maximum value function, i, j, n i , N and N i All are positive integers.

[0052] According to one embodiment of the present invention, in formula (1), is the relative deviation between the air temperature detected at the jth moment during the i-th step and the preset temperature of the operating position of the i-th step. Since the chip quality may be affected regardless of whether the detected air temperature is higher than the preset temperature or lower than the preset temperature, the absolute value of the relative deviation can be obtained to indicate the impact caused by the relative deviation between the detected air temperature and the preset temperature. It represents the average value of the impact caused by the relative deviation between the air temperature detected at multiple moments in the i-th step and the preset temperature. It represents the relative change of the deviation between the air temperature detected at the jth moment during the i-th step and the preset temperature of the operating position of the i-th step, and the deviation between the air temperature detected at the j-1th moment and the preset temperature of the operating position of the i-th step. That is, if the deviation between the air temperature and the preset temperature detected at the j-1th moment is greater than the deviation between the air temperature and the preset temperature detected at the j-1th moment, the value of this item is greater. Therefore, this relative change can be used to represent the trend of deviation change. If the trend of deviation change is increasing, the value of this item increases, indicating that the deviation between the air temperature and the preset temperature is getting larger and larger, and the impact on chip quality is also greater. The average value of this item can be solved The average value used to represent the impact of the change in the deviation between the air temperature and the preset temperature. Further, the maximum value of the above two average values ​​can be taken as the impact of the deviation between the temperature and the preset temperature on the chip quality in the i-th step.

[0053] According to one embodiment of the present invention, It can be used as part of the weight of the impact of the deviation between the temperature and the preset temperature in the i-th step on the chip quality. Since the smaller the sequence number of the step, the earlier the step is, and the earlier the time of being affected by the environment, the impact of the environment on the chip quality in the step is more likely to accumulate in the subsequent steps, thereby causing a greater impact on the chip quality. Based on this, a higher weight can be given to the impact of the deviation between the temperature and the preset temperature on the chip quality in the steps with smaller sequence numbers, that is, this item is used as part of the weight of the impact of the deviation between the temperature and the preset temperature in the i-th step on the chip quality. In other words, this item can be used as a sequence weight. On the other hand, the temperature requirements of each step are different. Some steps have strict temperature requirements, such as lithography and other steps, while some steps have low temperature requirements, such as packaging and other steps. Therefore, the temperature weight of each step can be set, that is, a higher temperature weight is set for the step with strict temperature requirements, and a lower temperature weight is set for the step with low temperature requirements. The specific value of the temperature weight can be determined by expert experience. The product of the above sequence weight and temperature weight can be used as the weight of the impact of the deviation between the temperature and the preset temperature in the i-th step on the chip quality. The temperature impact score can be obtained by taking a weighted average of the impact of the deviation between the temperature in each step and the preset temperature on the chip quality.

[0054] According to one embodiment of the present invention, similar to the temperature impact score, the humidity impact score can be obtained. The processing environment impact score can be obtained by weighted summing the temperature impact score and the humidity impact score, which is used to describe the impact of the air temperature and humidity environment at the operating location of each step on the chip quality.

[0055] In this way, the average value of the impact caused by the relative deviation between the air temperature detected at multiple moments and the preset temperature, as well as the average value of the impact caused by the change in the deviation between the air temperature and the preset temperature can be obtained, thereby obtaining the maximum value of the two to describe the impact of the deviation between the temperature and the preset temperature on the chip quality. The temperature weight can be set based on the different temperature requirements of each step, and the serial number weight can be set based on the fact that the impact in the previous steps is likely to accumulate in the subsequent steps and cause a greater impact on the chip quality, so as to obtain a temperature impact score. Similarly, a humidity impact score can be obtained, and after weighted summation, a processing environment impact score can be obtained, thereby accurately and objectively describing the impact of the air temperature and humidity environment at the operating location of each step on the chip quality.

[0056] According to an embodiment of the present invention, in step S105, the cleanliness of the air also has a certain influence on some steps. Therefore, the steps such as photolithography, ion implantation, and thin film deposition have a high requirement for the cleanliness of the air to reduce the influence of pollutants such as particulate matter in the air on the above steps. In addition, the air humidity may also affect the adhesion of the particulate matter in the air. For example, if the air humidity is too low, that is, the air is too dry, static electricity is easily generated, causing the particulate matter in the air to easily adhere to the chip, affecting the chip quality.

[0057] According to one embodiment of the present invention, a cleanliness impact score is determined based on air humidity, air cleanliness and the serial number of each step detected at multiple moments in each step, including: sampling and testing the silicon dioxide layer on the surface of the wafer to determine a first relationship function between the air humidity of the layer and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide; setting a lower limit for the air humidity; and determining the cleanliness impact score based on the first relationship function, the lower limit for the air humidity, the air humidity, the air cleanliness and the serial number of each step.

[0058] According to one embodiment of the present invention, as described above, if the air humidity is too low, static electricity may be generated, which makes it easy for particles in the air to adhere to the chip and affect the chip quality. Different materials have different degrees of difficulty in generating static electricity under the same environmental conditions. Here, only the silicon dioxide layer on the surface of the wafer is sampled and tested to determine whether the silicon dioxide layer is easy to generate static electricity and whether it is easy to adsorb particles.

[0059] According to one embodiment of the present invention, a sampling test is performed on the silicon dioxide layer on the surface of a wafer to determine a first relationship function between the air humidity of the layer and the electrostatic voltage generated by the silicon dioxide and the electrostatic half-life, including: setting a test humidity of the test environment; rubbing the sampled silicon dioxide layer sample using a preset friction force and a preset friction speed to detect the test electrostatic voltage generated by the silicon dioxide layer sample; monitoring the test electrostatic voltage to determine the half-life of the test electrostatic voltage; and obtaining a first relationship function based on the test humidity, the test electrostatic voltage and the half-life of the test electrostatic voltage.

[0060] According to one embodiment of the present invention, after setting the test humidity of the environment, two silicon dioxide layer samples can be used to rub each other, the friction force is a preset friction force, the friction speed is a preset friction speed, and after the friction action continues for a preset time, any silicon dioxide layer sample is tested to determine the test electrostatic voltage generated by it, that is, the electrostatic voltage at the end of the friction action, and the electrostatic voltage is continuously monitored until the electrostatic voltage drops to half of the test electrostatic voltage, and the time interval between this moment and the moment when the friction action ends is recorded as the half-life of the test electrostatic voltage. Multiple tests can be performed according to the above steps, and during each test process, only one variable, the test humidity of the test environment, is adjusted, and the test electrostatic voltage and the half-life of the test electrostatic voltage during each test process are recorded.

[0061] According to one embodiment of the present invention, obtaining a first relationship function according to the test humidity, the test electrostatic voltage and the half-life of the test electrostatic voltage includes: determining a first undetermined coefficient equation group of the first relationship function according to formula (2),

[0062]

[0063] Among them, V test To test the electrostatic voltage, Δt test To test the half-life of the electrostatic voltage, H test To test humidity, θ 1 ,θ 2 ,θ 3 and θ 4 is an undetermined coefficient; according to the test humidity, the test electrostatic voltage and the half-life of the test electrostatic voltage in multiple tests, the undetermined coefficient is solved to obtain the solution value of the undetermined coefficient; according to the solution value of the undetermined coefficient and the first undetermined coefficient equation group, the first relationship function is obtained.

[0064] According to one embodiment of the present invention, the test electrostatic voltage and the half-life of the test electrostatic voltage are both inversely correlated with the test humidity, that is, the lower the test humidity of the test environment and the drier the air, the easier it is to generate static electricity. In this case, it is easy to cause accumulation of charges and generate static electricity with a higher voltage. In other words, the test electrostatic voltage is higher. In addition, the moisture content in the air is low, and the generated charges are not easily captured and neutralized by water molecules, making it easier for the charges to accumulate and difficult to dissipate, that is, the half-life of the test electrostatic voltage is longer.

[0065] According to one embodiment of the present invention, based on the above analysis, a first undetermined coefficient equation group can be set in formula (2) to respectively represent the inverse correlation between the test electrostatic voltage and humidity, and the inverse correlation between the half-lives of the test electrostatic voltage. Both equation groups of the first undetermined coefficient equation group are univariate linear equations, so that the relationship between the test electrostatic voltage and humidity, and the relationship between the half-lives of the test electrostatic voltage can be described by a simple linear relationship. For example, θ 1 and θ 3 The solution of is a negative number, which can represent the above inverse correlation.

[0066] According to one embodiment of the present invention, the undetermined coefficients in the two linear equations in the first undetermined coefficient equation group can be solved by the test humidity set in multiple tests, the measured test electrostatic voltage and the half-life of the test electrostatic voltage to obtain the solution values ​​of the undetermined coefficients, for example, by fitting. The solution values ​​of the undetermined coefficients are substituted into the first undetermined coefficient equation group to obtain the first relationship function.

[0067] In this way, the first group of equations of undetermined coefficients of the first relationship function can be set based on the inverse correlation between air humidity and electrostatic voltage and the half-life of the electrostatic voltage, and the first undetermined coefficients can be solved by using the air humidity set during multiple tests and the measured electrostatic voltage and the half-life of the electrostatic voltage to obtain the first relationship function, which can concisely and accurately represent the static electricity condition of the silicon dioxide layer under specific air humidity conditions and the condition of being easy to adsorb particulate matter, thereby accurately expressing the impact of air cleanliness and humidity on chip quality.

[0068] According to an embodiment of the present invention, after determining the above-mentioned first relationship function, the lower limit of air humidity can be determined. If the measured air humidity is lower than the lower limit of air humidity, it is easier to generate static electricity and adsorb particulate matter in the air, thereby affecting chip quality.

[0069] According to an embodiment of the present invention, determining the cleanliness impact score according to the first relationship function, the air humidity lower limit, the air humidity, the air cleanliness and the sequence number of each step includes: determining the cleanliness impact score S according to formula (3) C ,

[0070]

[0071] Among them, C i,j Cx is the air cleanliness detected at the jth moment during the i-th step. ,p is the air cleanliness threshold of the operating position in the ith step, H i,jis the air humidity detected at the jth moment during the i-th step, V max is the preset maximum electrostatic voltage, Δt max is the preset maximum electrostatic half-life, H min is the lower limit of air humidity, θ 1,F is θ 1 The solution value, θ 2,F is θ 2 The solution value, θ 3,F is θ 3 The solution value, θ 4,F is θ 4 The solution value of γ i is the cleanliness weight of the ith step, n i is the number of moments in the process of the i-th step, N i is the serial number of the i-th step, N is the number of chip production and assembly steps, if[*] is the conditional function, i, j, n i , N and N i All are positive integers.

[0072] According to one embodiment of the present invention, in formula (3), It is the ratio between the air cleanliness detected at the jth moment during the i-th step and the air cleanliness threshold of the operating position of the i-th step. The larger the ratio is, the more particulate matter there is in the air at the jth moment during the i-th step, and the easier it is to affect the chip quality. is a conditional function whose function value satisfies the condition H i,j ≤H min In the case of Otherwise, the function value of the conditional function is 1. That is, if the air humidity detected at the jth moment during the i-th step is lower than or equal to the lower limit of air humidity, the air is relatively dry, it is easier to generate static electricity, and it is easier to adsorb particles in the air. Moreover, the higher the static voltage, the easier it is to adsorb more particles. The longer the half-life of the static voltage, the longer the static electricity exists, and the easier it is to adsorb more particles. In this case, the impact of air humidity is That is, due to the easy generation of static electricity and the easy adsorption of particles, the factors affecting chip quality are increased compared with the case of high air humidity. Among them, θ 1,F H i,j +θ 2,F is the electrostatic voltage generated by the silicon dioxide layer on the wafer surface determined based on the first relationship function, and the ratio of the electrostatic voltage to the preset maximum electrostatic voltage (for example, the maximum test electrostatic voltage generated in each test is used as the preset maximum electrostatic voltage) represents the additive effect of the electrostatic voltage on the adsorption of particles, θ3,F H i,j +θ 4,F The half-life of the electrostatic voltage generated by the silicon dioxide layer on the surface of the wafer is determined based on the first relationship function. The ratio of the half-life of the electrostatic voltage to the preset maximum electrostatic half-life (for example, the maximum value of the half-life of the test electrostatic voltage generated in each test is used as the preset maximum electrostatic half-life) represents the additive effect of the electrostatic half-life on the adsorption of particulate matter. The product of the above two additive effects is the additional impact of too low air humidity on chip quality, and the sum of 1 and the additional impact is the impact of too low air humidity on chip quality. If the air humidity detected at the jth moment during the i-th step is higher than the lower limit of the air humidity, it means that the air humidity is within a reasonable range, and the impact of the air humidity on the chip quality is also within an acceptable range, and there is no additional impact. Therefore, the conditional function is 1. Therefore, the above conditional function can represent the impact of static electricity caused by air humidity on adsorbed particulate matter, or it can represent the impact of air humidity on chip quality. The conditional function value can be used as The weights of the air cleanliness and humidity on the chip quality can be obtained by performing weighted average processing.

[0073] According to one embodiment of the present invention, different steps have different requirements for air cleanliness. A higher cleanliness weight may be set for the step with a higher air cleanliness requirement. The setting method is similar to the setting method of the temperature weight, which will not be repeated here. The meaning of is as described above and will not be repeated here. The product of is used as the weight of the influence of the air cleanliness and air humidity measured in the i-th step on the chip quality, and a weighted average is performed to obtain a cleanliness impact score, which is used to represent the overall influence of the air cleanliness and air humidity at the operating position of each step on the chip quality.

[0074] In this way, the effect of air humidity on the static electricity generated by the silicon dioxide layer on the surface of the wafer, as well as the effect of static electricity on the adsorption of particles in the air, can be determined, thereby determining the additional effect of air humidity on the quality of chips. The effect of air cleanliness on chip quality can also be determined, and the overall effect of particles in the air on chip quality can be determined from both air cleanliness and air humidity, thereby improving the accuracy and objectivity of cleanliness impact scoring.

[0075] According to one embodiment of the present invention, in step S106, during the production and assembly process of the chip, vibration may also affect the processing accuracy and quality of the chip, and different steps have different requirements for anti-vibration. For example, the photolithography step has a higher requirement for anti-vibration, while the packaging and other steps have a lower requirement for anti-vibration. Therefore, the impact of vibration occurring during the production and assembly process on the chip quality can be determined based on the requirements for anti-vibration of different steps.

[0076] According to one embodiment of the present invention, the vibration impact score is determined according to the vibration data detected at multiple moments in each step and the sequence number of each step, including: determining the processing impact effect score S according to formula (4): V ,

[0077]

[0078] Among them, A i,j is the amplitude of the vibration data detected at the jth moment during the i-th step, A i,max is the preset maximum amplitude of the i-th step, δ i is the vibration weight of the ith step, n i is the number of moments in the process of the i-th step, N i is the serial number of the i-th step, N is the number of chip production and assembly steps, max(*) is the maximum value function, i, j, n i , N and N i All are positive integers.

[0079] According to one embodiment of the present invention, the maximum amplitude allowed for each step can be set as the preset maximum amplitude of each step, and the ratio of the amplitude of the vibration data detected at each moment to the preset maximum amplitude can be determined, and then the maximum ratio of multiple moments can be solved to describe the impact of vibration on the processing accuracy of the chip in this step. Furthermore, the vibration weight can be set, and different steps have different requirements for anti-vibration. A higher vibration weight can be set for steps with higher anti-vibration requirements. The setting method is similar to the setting method of the temperature weight, which will not be repeated here. The meaning of is as described above and will not be repeated here. The product of is used as the weight of the influence of the maximum vibration value measured in the i-th step on the processing accuracy of the chip in this step, and weighted average processing is performed to obtain the vibration impact score, which is used to represent the overall influence of the vibration at the operating position of each step on the chip quality.

[0080] In this way, the influence of vibration on the processing accuracy of the chip in each step can be described by the ratio between the maximum vibration value detected during the execution of each step and the preset amplitude maximum value, and then the influence is weighted and summed based on the vibration weight and the serial number weight to obtain the vibration impact score, thereby accurately and objectively describing the overall influence of vibration at the operating position of each step on the chip quality.

[0081] According to one embodiment of the present invention, in step S107, the processing environment impact score, cleanliness impact score and vibration impact score obtained above may be weighted and summed to obtain a processing impact effect score, thereby describing the overall impact of various environmental factors in the processing process on the processing quality of the chip.

[0082] According to one embodiment of the present invention, in step S108, if the processing impact effect score is higher than the preset impact threshold, multiple chips belonging to the same wafer are transferred to the first test partition. Since the processing impact effect score is high, these chips are greatly affected by the environment and have a higher probability of quality problems. Therefore, the chips in the first test partition can be quality tested one by one, and the chips that pass the test can be used as chip products. If the test fails, they are recycled as defective products. If the processing impact effect score is lower than or equal to the preset impact threshold, multiple chips belonging to the same wafer are transferred to the second test partition. Since the chips in the second test partition are less affected by environmental factors and have a lower probability of quality problems, the chips in the second test partition can be sampled and tested, and if the sampling test passes, all chips in the second test partition are used as chip products.

[0083] According to an embodiment of the present invention, in step S109, after completing the above test, a plurality of chip products can be obtained, and the chip products can be considered to be chips of qualified quality.

[0084] According to the chip production assembly parameter control method of the embodiment of the present invention, an environmental monitoring point can be set at the operation position of each step, so that the air cleanliness, air temperature, air humidity and vibration data at the operation position of each step can be detected. And according to the requirements of each step for the environment, the processing environment impact score, cleanliness impact score and vibration impact score are determined, so as to evaluate the impact of the environment of each step on the processing quality based on multiple aspects, and transfer the chips with greater impact to the first test partition for comprehensive testing, so as to fully understand the quality status of the chip and improve the yield rate of the chip. When determining the temperature impact score, the average value of the impact caused by the relative deviation between the air temperature detected at multiple moments and the preset temperature, as well as the average value of the impact caused by the change in the deviation between the air temperature and the preset temperature can be obtained, so as to obtain the maximum value of the two to describe the impact of the deviation between the temperature and the preset temperature on the chip quality. The temperature weight can be set based on the different temperature requirements of each step, and the serial number weight can be set based on the fact that the impact in the previous steps is likely to accumulate in the subsequent steps and cause a greater impact on the chip quality, so as to obtain the temperature impact score. Similarly, the humidity impact score can be obtained, and the processing environment impact score can be obtained after weighted summation, so as to accurately and objectively describe the impact of the air temperature and humidity environment at the operating location of each step on the chip quality. When determining the first relationship function, the first undetermined coefficient equation group of the first relationship function can be set based on the inverse correlation between air humidity and electrostatic voltage and the half-life of electrostatic voltage, and the first undetermined coefficient is solved by the air humidity set in multiple tests and the measured electrostatic voltage and the half-life of electrostatic voltage, so as to obtain the first relationship function, so as to concisely and accurately express the static electricity state of the silicon dioxide layer under specific air humidity conditions and the state of easy adsorption of particulate matter, and then accurately express the influence of air cleanliness and humidity on chip quality. When determining the cleanliness impact score, the influence of air humidity on the static electricity generated by the silicon dioxide layer on the surface of the wafer and the influence of static electricity on the adsorption of particulate matter in the air can be determined, so as to determine the additional influence of air humidity on the particulate matter in the air on the chip quality. And the influence of air cleanliness on chip quality can be determined, and then the overall influence of particulate matter in the air on chip quality can be determined from the two aspects of air cleanliness and air humidity, so as to improve the accuracy and objectivity of the cleanliness impact score. When determining the processing influence effect score, the ratio between the maximum vibration value detected during the execution of each step and the preset amplitude maximum value can be used to describe the influence of vibration on the processing accuracy of the chip in that step, and then the influence is weighted and summed based on the vibration weight and the serial number weight to obtain the vibration influence score, thereby accurately and objectively describing the overall influence of vibration at the operating position of each step on the chip quality.

[0085] Figure 2A block diagram of a chip production assembly parameter control system according to an embodiment of the present invention is exemplarily shown, the system comprising:

[0086] A serial number module is used to set serial numbers for multiple steps of chip production and assembly according to the order of chip production and assembly;

[0087] A setting module, used to set an environmental monitoring point at the operation position of each production and assembly step, wherein the environmental monitoring point is used to detect air cleanliness, air temperature, air humidity and vibration data;

[0088] A detection module, used to determine the air cleanliness, air temperature, air humidity and vibration data detected by the environmental monitoring points in each step of the production and assembly process of multiple chips belonging to the same wafer at multiple moments during the process of the step;

[0089] A processing environment impact scoring module, used to determine the processing environment impact score according to the air temperature and air humidity detected at multiple moments in each step and the sequence number of each step;

[0090] A cleanliness impact scoring module is used to determine the cleanliness impact score according to the air humidity, air cleanliness and the sequence number of each step detected at multiple moments in each step;

[0091] A vibration impact scoring module, used to determine a vibration impact score according to vibration data detected at multiple moments in each step and the sequence number of each step;

[0092] A processing influence effect scoring module, used to determine a processing influence effect score according to the processing environment influence score, the cleanliness influence score and the vibration influence score;

[0093] A testing module, configured to transfer the plurality of chips belonging to the same wafer to a first testing partition if the processing impact effect score is higher than a preset impact threshold, and otherwise transfer the plurality of chips belonging to the same wafer to a second testing partition, wherein the chips in the first testing partition are subjected to quality testing one by one, and the chips in the second testing partition are subjected to sampling quality testing;

[0094] The product module is used to obtain multiple chip products after the test is completed.

[0095] It should be understood by those skilled in the art that the embodiments of the present invention described above and shown in the accompanying drawings are only examples and do not limit the present invention. The purpose of the present invention has been fully and effectively achieved. The functional and structural principles of the present invention have been demonstrated and explained in the embodiments, and the embodiments of the present invention may be deformed or modified in any way without departing from the principles.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip production assembly parameter control method, characterized in that: include: According to the chip production and assembly sequence, multiple steps of chip production and assembly are assigned sequence numbers; An environmental monitoring point is set at the operation position of each production and assembly step, wherein the environmental monitoring point is used to detect air cleanliness, air temperature, air humidity and vibration data; Determine the air cleanliness, air temperature, air humidity and vibration data detected at multiple moments in each step of the environmental monitoring point in the production and assembly process of multiple chips belonging to the same wafer during the step; Determine the processing environment impact score based on the air temperature and air humidity detected at multiple moments in each step and the sequence number of each step; Determine the cleanliness impact score based on the air humidity, air cleanliness and the sequence number of each step detected at multiple moments in each step; Determine a vibration impact score based on vibration data detected at multiple moments in each step and the sequence number of each step; Determining a processing impact score according to the processing environment impact score, the cleanliness impact score and the vibration impact score; If the processing impact effect score is higher than the preset impact threshold, the multiple chips belonging to the same wafer are transferred to the first test partition; otherwise, the multiple chips belonging to the same wafer are transferred to the second test partition, wherein the chips in the first test partition are subjected to quality testing one by one, and the chips in the second test partition are subjected to sampling quality testing; After the test is completed, multiple chip products are obtained.

2. The chip production assembly parameter control method according to claim 1, characterized in that: The processing environment impact score is determined based on the air temperature, air humidity detected at multiple moments in each step and the sequence number of each step, including: Before each step starts, the initial air temperature and initial air humidity of the operation position of each step are obtained, and it is determined whether the air conditioning equipment of the operation position of each step needs to be turned on; If there is a target operation position where the air conditioner needs to be turned on, after turning on the air conditioner at the target operation position and waiting for the air temperature and air humidity to meet the preset conditions, the steps corresponding to the target operation position are started, and the air temperature and air humidity at multiple times are obtained; The processing environment impact score is determined based on the air temperature and air humidity at multiple times and the sequence number of each step.

3. The chip production assembly parameter control method according to claim 2, characterized in that: The processing environment impact score is determined based on the air temperature and humidity at multiple times and the sequence number of each step, including: According to the formula Determine the processing environmental impact score S E , where T i,j is the air temperature detected at the jth moment during the i-th step, T i,p is the preset temperature of the operating position in the ith step, n i is the number of moments in the process of the ith step, T i,j-1 The air temperature detected at the j-1th moment during the i-th step, N i is the sequence number of the i-th step, α i is the temperature weight of the ith step, H i,j is the air humidity detected at the jth moment during the i-th step, H i,p is the preset humidity of the operating position in the ith step, H i,j-1 is the air humidity detected at the j-1th moment during the i-th step, β i is the humidity weight of the i-th step, N is the number of chip production and assembly steps, w T and w H is the preset weight, max(*) is the maximum value function, i, j, n i , N and N i All are positive integers.

4. The chip production assembly parameter control method according to claim 1, characterized in that: The cleanliness impact score is determined based on the air humidity, air cleanliness and the sequence number of each step detected at multiple times in each step, including: Sampling and testing the silicon dioxide layer on the surface of the wafer to determine a first relationship function between the air humidity of the layer and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide; Set the lower limit of air humidity; A cleanliness impact score is determined according to the first relationship function, the air humidity lower limit, the air humidity, the air cleanliness and the sequence number of each step.

5. The chip production assembly parameter control method according to claim 4, characterized in that: The silicon dioxide layer on the surface of the wafer is sampled and tested to determine the first relationship function between the air humidity of the layer and the electrostatic voltage and electrostatic half-life generated by the silicon dioxide, including: Set the test humidity of the test environment; Using a preset friction force and a preset friction speed, rubbing the sampled silicon dioxide layer sample, and detecting the test electrostatic voltage generated by the silicon dioxide layer sample; Monitoring the test electrostatic voltage to determine a half-life of the test electrostatic voltage; A first relationship function is obtained according to the test humidity, the test electrostatic voltage and the half-life of the test electrostatic voltage.

6. The chip production assembly parameter control method according to claim 5, characterized in that: According to the test humidity, the test electrostatic voltage and the half-life of the test electrostatic voltage, a first relationship function is obtained, including: According to the formula Determine the first undetermined coefficient equation group of the first relationship function, where V test To test the electrostatic voltage, Δt test To test the half-life of the electrostatic voltage, H test To test humidity, θ1, θ2, θ3 and θ4 are coefficients to be determined; According to the test humidity, the test electrostatic voltage and the half-life of the test electrostatic voltage in multiple tests, the undetermined coefficients are solved to obtain the solution values ​​of the undetermined coefficients; A first relationship function is obtained according to the solved values ​​of the undetermined coefficients and the first undetermined coefficient equation group.

7. The chip production assembly parameter control method according to claim 6, characterized in that: Determining a cleanliness impact score according to the first relationship function, the air humidity lower limit, the air humidity, the air cleanliness and the sequence number of each step includes: According to the formula Determine the cleanliness impact score S C , where C i,j is the air cleanliness detected at the jth moment during the i-th step, C i,p is the air cleanliness threshold of the operating position in the ith step, H i,j is the air humidity detected at the jth moment during the i-th step, V max is the preset maximum electrostatic voltage, Δt max is the preset maximum electrostatic half-life, H min is the lower limit of air humidity, θ 1,F is the solution value of θ1, θ 2,F is the solution value of θ2, θ 3,F is the solution value of θ3, θ 4,F is the solution value of θ4, γ i is the cleanliness weight of the ith step, n i is the number of moments in the process of the i-th step, N i is the serial number of the i-th step, N is the number of chip production and assembly steps, if[*] is the conditional function, i, j, n i , N and N i All are positive integers.

8. The chip production assembly parameter control method according to claim 1, characterized in that: The vibration impact score is determined based on the vibration data detected at multiple moments in each step and the sequence number of each step, including: According to the formula Determine the processing effect score S V , where A i,j is the amplitude of the vibration data detected at the jth moment during the i-th step, A i,max is the preset maximum amplitude of the i-th step, δ i is the vibration weight of the ith step, n i is the number of moments in the process of the i-th step, N i is the serial number of the i-th step, N is the number of chip production and assembly steps, max(*) is the maximum value function, i, j, n i , N and N i All are positive integers.

9. A chip production assembly parameter control system, characterized in that: include: A serial number module is used to set serial numbers for multiple steps of chip production and assembly according to the order of chip production and assembly; A setting module, used to set an environmental monitoring point at the operation position of each production and assembly step, wherein the environmental monitoring point is used to detect air cleanliness, air temperature, air humidity and vibration data; A detection module, used to determine the air cleanliness, air temperature, air humidity and vibration data detected by the environmental monitoring points in each step of the production and assembly process of multiple chips belonging to the same wafer at multiple moments during the process of the step; A processing environment impact scoring module, used to determine the processing environment impact score according to the air temperature and air humidity detected at multiple moments in each step and the sequence number of each step; A cleanliness impact scoring module is used to determine the cleanliness impact score according to the air humidity, air cleanliness and the sequence number of each step detected at multiple moments in each step; A vibration impact scoring module, used to determine a vibration impact score according to vibration data detected at multiple moments in each step and the sequence number of each step; A processing influence effect scoring module, used to determine a processing influence effect score according to the processing environment influence score, the cleanliness influence score and the vibration influence score; A testing module, configured to transfer the plurality of chips belonging to the same wafer to a first testing partition if the processing impact effect score is higher than a preset impact threshold, and otherwise transfer the plurality of chips belonging to the same wafer to a second testing partition, wherein the chips in the first testing partition are subjected to quality testing one by one, and the chips in the second testing partition are subjected to sampling quality testing; The product module is used to obtain multiple chip products after the test is completed.

Citation Information

Patent Citations

  • Chip DFN packaging and process collaborative optimization method based on machine learning

    CN118709468A

  • Sauced beef processing environment detection method and system

    CN118882753A

  • Memory system, method and computer program products

    US20190205244A1