Preparation method of bonded wafer
In the preparation method for the bonded wafer for preparing SOI wafers, a combination of pre-heat treatment and peeling heat treatment is adopted to solve the problem of particle aggregation caused by uneven bubbles during low-temperature peeling, and the surface uniformity of the top silicon layer is improved.
Patent Information
- Application Number
- CN202411982229.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-15
AI Technical Summary
During the low-temperature peeling process of preparing SOI wafers, uneven bubbles lead to particle aggregation on the top silicon layer, affecting its thickness uniformity.
A method of preparing bonded wafers is adopted, including forming an oxide layer on the surface of the device wafer and the support wafer, bonding it to the support wafer after ion implantation process, and then performing peeling treatment through a combination of preheat treatment and peeling heat treatment. The temperature of the preheat treatment is less than the temperature of the peeling heat treatment.
The uniformity of the bubbles at the bonding interface is improved by low-temperature preheat treatment, reducing particle aggregation during the peeling process, and improving the surface uniformity of the top silicon layer.
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Figure CN119833467A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for preparing a bonded wafer. Background Art
[0002] Silicon on insulator (SOI) technology has now become one of the mainstream products in most electronic materials fields. With the rapid development of new energy vehicles, the integration of automotive-grade SOI wafers and on-board chips has gradually increased, so the market demand for high-uniformity SOI wafers is getting higher and higher.
[0003] In the process of preparing SOI wafers, a low-temperature stripping treatment is performed after the device wafer and the support wafer are bonded to form an SOI wafer. Uneven bubbling (the generation of bubbles on the stripping interface) during the low-temperature stripping process can easily lead to more particles focusing on the top silicon layer in the SOI wafer after stripping. These particles are mainly gathered in the 180-degree direction of the notch of the SOI wafer, and at the same time, the thickness uniformity of the top silicon layer will deteriorate. Summary of the invention
[0004] The object of the present invention is to provide a method for preparing a bonded wafer, which can reduce particle aggregation caused by the stripping process and improve the surface uniformity of the top silicon layer.
[0005] In order to achieve the above object, the present invention provides a method for preparing a bonded wafer, comprising:
[0006] Providing a device wafer and a support wafer, wherein an oxide layer is formed on the surface of the device wafer and / or the support wafer;
[0007] performing an ion implantation process on the device wafer;
[0008] Bonding the ion-implanted side of the device wafer to the support wafer to form a bonded wafer;
[0009] The bonded wafer is subjected to a stripping process to strip off a portion of the device wafer, and the remaining portion of the device wafer serves as a top silicon layer, wherein the stripping process includes a pre-heat treatment process and a stripping heat treatment process performed sequentially, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process.
[0010] Optionally, the temperature of the pre-heat treatment process is 250°C to 350°C.
[0011] Optionally, the pre-heat treatment process takes 10 to 15 minutes.
[0012] Optionally, the temperature of the stripping heat treatment process is 450°C to 600°C.
[0013] Optionally, when the bonded wafer is subjected to a stripping process, the bonded wafer is placed in a furnace tube, and a first heating process is performed to increase the initial temperature of the furnace tube to the temperature of the pre-heat treatment process, and the pre-heat treatment process is performed after the heating process; after the pre-heat treatment process is completed, a second heating process is performed to increase the temperature of the pre-heat treatment process to the temperature of the stripping heat treatment process, and the stripping heat treatment process is performed after the heating process.
[0014] Optionally, the first heating process and the second heating process have the same heating rate.
[0015] Optionally, the heating rates of the first heating process and the second heating process are both 15° C. / min to 20° C. / min.
[0016] Optionally, the thickness of the top silicon layer is 200nm-500nm.
[0017] Optionally, the thickness difference of the top silicon layer is 1.5 nm to 6 nm.
[0018] Optionally, the implanted ions in the ion implantation process include hydrogen ions, the implantation energy in the ion implantation process is 48keV to 68keV, and the implantation dose in the ion implantation process is 1×10 16 atom / cm 2 ~6×10 16 atom / cm 2 .
[0019] In the preparation method of the bonded wafer provided by the present invention, it includes: providing a device wafer and a support wafer, an oxide layer is formed on the surface of the device wafer and / or the support wafer; performing an ion implantation process on the device wafer; bonding the side of the device wafer after ion implantation with the support wafer to form a bonded wafer; performing a stripping process on the bonded wafer to strip off part of the device wafer, and the remaining part of the device wafer is used as the top silicon layer, wherein the stripping process includes a pre-heat treatment process and a stripping heat treatment process performed in sequence, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process. In the present invention, by performing a pre-heat treatment process before the stripping heat treatment process, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process, the low-temperature pre-heat treatment process can make the bubbling efficiency of the bonding interface higher and more uniform, and when the stripping heat treatment process is performed later, the particle aggregation caused by the stripping process can be reduced, and the surface uniformity of the top silicon layer can be improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 A flow chart of a method for preparing a bonded wafer provided in one embodiment of the present invention.
[0021] Figure 2 A process diagram of a stripping process in a method for preparing a bonded wafer provided in one embodiment of the present invention.
[0022] Figure 3 A schematic diagram of surface particles on the top silicon layer of Comparative Example 1 in the method for preparing a bonded wafer provided by an embodiment of the present invention.
[0023] Figure 4 A schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 1 in the method for preparing a bonded wafer provided by an embodiment of the present invention.
[0024] Figure 5 A schematic diagram of surface particles on the top silicon layer of Comparative Example 2 in the method for preparing a bonded wafer provided by an embodiment of the present invention.
[0025] Figure 6 A schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 2 in the method for preparing a bonded wafer provided in an embodiment of the present invention.
[0026] Figure 7 A schematic diagram of surface particles on the top silicon layer of Comparative Example 3 in the method for preparing a bonded wafer provided in one embodiment of the present invention.
[0027] Figure 8 A schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 3 in the method for preparing a bonded wafer provided in one embodiment of the present invention.
[0028] Fig. 9 A schematic diagram of surface particles on the top silicon layer of Comparative Example 4 in the method for preparing a bonded wafer provided in one embodiment of the present invention.
[0029] Fig.10 A schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 4 in the method for preparing a bonded wafer provided in one embodiment of the present invention. DETAILED DESCRIPTION
[0030] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.
[0031] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the term "at least two" is usually used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.
[0032] Figure 1 This is a flow chart of the method for preparing a bonded wafer provided in this embodiment. Please refer to Figure 1 , this embodiment provides a method for preparing a bonded wafer, comprising:
[0033] Step S1: providing a device wafer and a support wafer, wherein an oxide layer is formed on the surface of the device wafer and / or the support wafer;
[0034] Step S2: performing an ion implantation process on the device wafer;
[0035] Step S3: bonding the ion-implanted side of the device wafer to the support wafer to form a bonded wafer;
[0036] Step S4: performing a stripping process on the bonded wafer to strip off part of the device wafer, and retaining part of the device wafer as the top silicon layer, wherein the stripping process includes a pre-heat treatment process and a stripping heat treatment process performed sequentially, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process.
[0037] The following is a detailed description of the method for preparing the bonded wafer provided in this embodiment.
[0038] Execute step S1: provide a device wafer and a support wafer, the device wafer and the support wafer are silicon wafers, the thickness of the device wafer and the support wafer can be 500μm to 800μm, for example, 775μm, the thickness difference between the device wafer and the support wafer can be less than 0.5μm, and the thickness difference is the difference between the maximum thickness and the minimum thickness, but is not limited thereto. Clean and oxidize the device wafer and / or the support wafer in sequence to form an oxide layer on the surface of the device wafer and / or the support wafer, the thickness of the oxide layer can be greater than 20nm and less than 300nm, but is not limited thereto; specifically, the oxide layer can be formed on the surface of the device wafer, or on the surface of the support wafer, or on the surface of the device wafer and the support wafer.
[0039] Execute step S2: perform an ion implantation process on the device wafer to form an ion implantation layer in the device wafer. The ion implantation layer mainly plays a role in stripping and splitting. The implanted ions in the ion implantation process may include hydrogen ions (single hydrogen ion implantation may be used), but are not limited thereto, and may also be other inert ions. In this embodiment, the implantation beam current of the ion implantation process may be 10 mA to 20 mA, the implantation energy of the ion implantation process may be 48 keV to 68 keV, and the implantation dose of the ion implantation process may be 1×10 16 atom / cm 2 ~6×10 16 atom / cm 2 .
[0040] Execute step S3: bond the ion-implanted side of the device wafer to the support wafer to form a bonded wafer. Specifically, the side of the device wafer with the ion implantation layer is bonded to the support wafer. The bonding method includes, but is not limited to, hydrophilic bonding.
[0041] Execute step S4: perform a stripping process on the bonded wafer to strip off part of the device wafer, and retain part of the device wafer as the top silicon layer. Specifically, after bonding, the ion implantation layer of the device wafer is stripped and split to strip off part of the device wafer, and part of the device wafer is retained on the support wafer; after stripping, the retained part of the device wafer is used as the top silicon layer, the support wafer is used as the substrate layer, and the oxide layer between the device wafer and the support wafer is used as the insulating buried oxide layer.
[0042] In this embodiment, the stripping process includes a pre-heat treatment process and a stripping heat treatment process that are performed in sequence, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process. Specifically, when the bonded wafer is subjected to the stripping process, the bonded wafer is placed in a furnace tube, and a first heating process is performed to raise the initial temperature of the furnace tube to the temperature of the pre-heat treatment process, and the pre-heat treatment process is performed after the temperature of the pre-heat treatment process is raised to the temperature of the pre-heat treatment process; after the pre-heat treatment process is completed, a second heating process is performed to raise the temperature of the pre-heat treatment process to the temperature of the stripping heat treatment process, and the stripping heat treatment process is performed after the temperature of the stripping heat treatment process is raised to the temperature of the stripping heat treatment process until the stripping process is completed.
[0043] Figure 2 This is a process diagram of the peeling process in the method for preparing the bonded wafer provided in this embodiment. Please refer to Figure 2 , the horizontal axis is the stripping process, the vertical axis is the temperature, A1 represents the standby state of the furnace tube, B1 represents the first heating process, C1 represents the preheating process, B2 represents the second heating process, C2 represents the stripping heat treatment process, A2 represents the cooling process, T0 represents the initial temperature of the furnace tube, T1 represents the temperature of the preheating process, and T2 represents the temperature of the stripping heat treatment process. Figure 2It can be seen that when the bonded wafer is loaded into the furnace tube, the furnace tube is in the standby state A1, the furnace tube maintains the initial temperature T0, and then starts to execute the first heating process B1. When the temperature in the furnace tube rises to the temperature T1 of the pre-heat treatment process, the pre-heat treatment process C1 is carried out; after the pre-heat treatment process C1 is completed, the second heating process B2 is started. When the temperature in the furnace tube rises to the temperature T2 of the stripping heat treatment process, the stripping heat treatment process C2 is carried out; when the stripping is completed, the cooling process A2 is executed, and the cooling process A2 can reduce the temperature to T1 or T0.
[0044] In this embodiment, the temperature of the pre-heat treatment process is preferably 250℃~350℃. If the temperature of the pre-heat treatment process is too low, the bubbles at the peeling interface will be reduced, resulting in particle aggregation. If the temperature of the pre-heat treatment process is too high, too many bubbles will be generated at the peeling interface, causing irregular aggregation of bubbles in advance. Transfer failure will occur at the position of irregular aggregation during peeling, resulting in peeling failure. Therefore, the temperature of the pre-heat treatment process is limited; and the corresponding pre-heat treatment process time is preferably 10min~15min. The temperature of the peeling heat treatment process can be 450℃~600℃, and the corresponding peeling heat treatment process time can be 10min~20min; the initial temperature of the furnace tube can be 100℃, but is not limited thereto.
[0045] In this embodiment, the heating rates of the first heating process and the second heating process are preferably the same, and the heating rates of the first heating process and the second heating process are preferably 15°C / min to 20°C / min, but are not limited thereto. After stripping, the thickness of the top silicon layer can be 200nm to 500nm, and the thickness difference of the top silicon layer can be 1.5nm to 6nm, and the thickness difference is the difference between the maximum thickness and the minimum thickness, but is not limited thereto.
[0046] Since the bonded wafer is directly subjected to a peeling heat treatment (the temperature of the peeling heat treatment is generally between 450°C and 600°C, such as 500°C), uneven bubbling is likely to occur during the peeling process, resulting in particle aggregation on the surface of the top silicon layer after peeling, and making the thickness uniformity of the top silicon layer worse. Therefore, by setting a pre-heat treatment process, and the temperature of the pre-heat treatment process is lower than the temperature of the peeling heat treatment process, the temperature of the pre-heat treatment process is preferably between 250°C and 350°C, and the low-temperature pre-heat treatment process can make the bubbling efficiency of the bonding interface higher and more uniform, and when the peeling heat treatment process is performed later, the particle aggregation caused by the peeling process can be reduced, and the surface uniformity of the top silicon layer can be improved.
[0047] Four comparative examples are provided below to further illustrate the method for preparing the bonded wafer provided in this embodiment.
[0048] In comparative example 1, a device wafer and a support wafer are provided, an oxide layer is formed on the surface of the device wafer, the thickness of the oxide layer is 200 nm, and the thickness of the device wafer and the support wafer can be 773 μm to 775 μm; an ion implantation process is performed on the device wafer, the implanted ions of the ion implantation process are hydrogen ions, the implantation energy of the ion implantation process can be 58 keV, and the implantation dose of the ion implantation process can be 5.5×10 16 atom / cm 2 ; Bond the side of the device wafer after ion implantation to the support wafer to form a bonded wafer; perform a stripping process on the bonded wafer to strip off part of the device wafer, and retain part of the device wafer as the top silicon layer. In comparative example 1, when the bonded wafer is stripped, the bonded wafer is placed in a furnace tube, and the first heating process (heating rate 15°C / min) is performed to raise the initial temperature of the furnace tube to the temperature of the pre-heat treatment process (350°C), and the pre-heat treatment process is performed after the temperature of the pre-heat treatment process (350°C) is raised (execution time 12min); after the pre-heat treatment process is completed, the second heating process (heating rate 15°C / min) is performed to raise the temperature of the pre-heat treatment process (350°C) to the temperature of the stripping heat treatment process (500°C), and the stripping heat treatment process is performed after the temperature of the stripping heat treatment process (500°C) is raised (execution time 15min).
[0049] In comparative example 2, a device wafer and a support wafer are provided, an oxide layer is formed on the surface of the device wafer, the thickness of the oxide layer is 200 nm, and the thickness of the device wafer and the support wafer can be 773 μm to 775 μm; an ion implantation process is performed on the device wafer, the implanted ions of the ion implantation process are hydrogen ions, the implantation energy of the ion implantation process can be 58 keV, and the implantation dose of the ion implantation process can be 5.5×10 16 atom / cm 2 ; Bond the side of the device wafer after ion implantation to the support wafer to form a bonded wafer; perform a stripping process on the bonded wafer to strip off part of the device wafer, and retain part of the device wafer as the top silicon layer. In comparative example 2, when the bonded wafer is stripped, the bonded wafer is placed in a furnace tube, and a heating process (heating rate 15°C / min) is performed to raise the initial temperature of the furnace tube to the temperature of the stripping heat treatment process (500°C), and then the stripping heat treatment process is performed after the temperature of the stripping heat treatment process (500°C) is raised (execution time 15min).
[0050] In comparative example 3, a device wafer and a support wafer are provided, an oxide layer is formed on the surface of the device wafer, the thickness of the oxide layer is 200 nm, and the thickness of the device wafer and the support wafer can be 773 μm to 775 μm; an ion implantation process is performed on the device wafer, the implanted ions of the ion implantation process are hydrogen ions, the implantation energy of the ion implantation process can be 58 keV, and the implantation dose of the ion implantation process can be 5.5×10 16 atom / cm 2 ; Bond the side of the device wafer after ion implantation to the support wafer to form a bonded wafer; perform a stripping process on the bonded wafer to strip part of the device wafer, and retain part of the device wafer as the top silicon layer. In comparative example 3, when the bonded wafer is stripped, the bonded wafer is placed in a furnace tube, and the first heating process (heating rate 15°C / min) is performed to raise the initial temperature of the furnace tube to the temperature of the pre-heat treatment process (200°C), and the pre-heat treatment process is performed after the temperature of the pre-heat treatment process (200°C) is raised to the temperature of the pre-heat treatment process (200°C) (execution time 12min); after the pre-heat treatment process is completed, the second heating process (heating rate 15°C / min) is performed to raise the temperature of the pre-heat treatment process (200°C) to the temperature of the stripping heat treatment process (500°C), and the stripping heat treatment process is performed after the temperature of the stripping heat treatment process (500°C) is raised to the temperature of the stripping heat treatment process (500°C) (execution time 15min) until the stripping process is completed.
[0051] In comparative example 4, a device wafer and a support wafer are provided, an oxide layer is formed on the surface of the device wafer, the thickness of the oxide layer is 200 nm, and the thickness of the device wafer and the support wafer can be 773 μm to 775 μm; an ion implantation process is performed on the device wafer, the implanted ions of the ion implantation process are hydrogen ions, the implantation energy of the ion implantation process can be 58 keV, and the implantation dose of the ion implantation process can be 5.5×10 16 atom / cm 2 ; Bond the side of the device wafer after ion implantation to the support wafer to form a bonded wafer; perform a stripping process on the bonded wafer to strip part of the device wafer, and retain part of the device wafer as the top silicon layer. In comparative example 4, when the bonded wafer is stripped, the bonded wafer is placed in a furnace tube, and the first heating process (heating rate 15°C / min) is performed to raise the initial temperature of the furnace tube to the temperature of the pre-heat treatment process (420°C), and the pre-heat treatment process is performed after the temperature of the pre-heat treatment process (420°C) is raised to the temperature of the pre-heat treatment process (420°C) (execution time 12min); after the pre-heat treatment process is completed, the second heating process (heating rate 15°C / min) is performed to raise the temperature of the pre-heat treatment process (420°C) to the temperature of the stripping heat treatment process (500°C), and the stripping heat treatment process is performed after the temperature of the stripping heat treatment process (500°C) is raised to the temperature of the stripping heat treatment process (500°C) (execution time 15min) until the stripping process is completed.
[0052] Figure 3 A schematic diagram of surface particles of the top silicon layer of Comparative Example 1 in the method for preparing a bonded wafer provided in this embodiment, Figure 4 This is a schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 1 in the method for preparing a bonded wafer provided in this embodiment. Figure 3 , using the peeling treatment of comparative example 1, the peeling interface has more bubbles and the bubbles are uniform, and it can be seen that there are fewer particles on the surface of the top silicon layer; please refer to Figure 4 , it can be seen that the surface of the top silicon layer is smoother and has better uniformity.
[0053] Figure 5 A schematic diagram of surface particles of the top silicon layer of Comparative Example 2 in the method for preparing a bonded wafer provided in this embodiment, Figure 6 This is a schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 2 in the method for preparing a bonded wafer provided in this embodiment. Figure 5 , the peeling treatment of comparative example 2 was adopted, and the blistering at the peeling interface was less and uneven, and it can be seen that the particles on the surface of the top silicon layer were seriously aggregated; please refer to Figure 6 It can be seen that the surface uniformity of the top silicon layer is slightly worse than that of the top silicon layer in Comparative Example 1.
[0054] Figure 7 A schematic diagram of surface particles of the top silicon layer of Comparative Example 3 in the method for preparing a bonded wafer provided in this embodiment, Figure 8 This is a schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 3 in the method for preparing a bonded wafer provided in this embodiment. Figure 7 , the peeling treatment of comparative example 3 is adopted. Due to the lower temperature of the pre-heat treatment, there is less blistering at the peeling interface, and it can be seen that the particles on the surface of the top silicon layer are slightly aggregated; please refer to Figure 8 It can be seen that the surface uniformity of the top silicon layer is worse than that of the top silicon layer in comparative example 1.
[0055] Fig. 9 A schematic diagram of surface particles of the top silicon layer of Comparative Example 4 in the method for preparing a bonded wafer provided in this embodiment, Fig.10 This is a schematic diagram of the surface uniformity of the top silicon layer of Comparative Example 4 in the method for preparing a bonded wafer provided in this embodiment. Fig. 9 , the peeling treatment of comparative example 4 was adopted. Due to the high temperature of the pre-heat treatment, excessive bubbles were generated at the peeling interface, resulting in irregular aggregation of bubbles in advance. Transfer failure occurred at the irregular aggregation position during peeling. It can be seen that the particles on the surface of the top silicon layer are seriously aggregated. The high pre-heat treatment temperature causes the number of particles to increase exponentially. Please refer to Fig.10It can be seen that the surface uniformity of the top silicon layer is worse than that of the top silicon layer in Comparative Example 1.
[0056] Table 1 is a comparison table of the results of Comparative Examples 1 to 4. Please refer to Table 1. After the stripping process of Comparative Examples 1 to 4 was completed, four bonded wafers were tested to obtain the thickness of the top silicon layer and the number of particles. Table 1 illustrates that the stripping of Comparative Examples 1 to 3 was successful, while the stripping of Comparative Example 4 failed due to the high temperature of the pre-heat treatment; and the number of particles generated in Comparative Example 1 is much lower than the number of particles generated in Comparative Examples 2 to 4. Through the above comparison and description, it is shown that the stripping process in Comparative Example 1 can reduce the particle aggregation caused by the stripping process, and at the same time can improve the surface uniformity of the top silicon layer, and the temperature of the pre-heat treatment process needs to be reasonably set to achieve the purpose of this embodiment.
[0057] Thickness of the top silicon layer (angstroms) Number of particles Comparative Example 1 3601.5 12 Comparative Example 2 3600.3 256 Comparative Example 3 3598.1 103 Comparative Example 4 Stripping failure 3021
[0058] Table 1. Comparative Example 1 to Comparative Example 4 Results Comparative Example 1
[0059] In summary, the preparation method of the bonded wafer provided by the present invention includes: providing a device wafer and a support wafer, an oxide layer is formed on the surface of the device wafer and / or the support wafer; performing an ion implantation process on the device wafer; bonding the side of the device wafer after ion implantation with the support wafer to form a bonded wafer; performing a stripping process on the bonded wafer to strip off part of the device wafer, and the remaining part of the device wafer is used as the top silicon layer, wherein the stripping process includes a pre-heat treatment process and a stripping heat treatment process performed in sequence, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process. In the present invention, by performing a pre-heat treatment process before the stripping heat treatment process, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process, the low-temperature pre-heat treatment process can make the bubbling efficiency of the bonding interface higher and more uniform, and when the stripping heat treatment process is performed later, the particle aggregation caused by the stripping process can be reduced, and the surface uniformity of the top silicon layer can be improved.
[0060] The above is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, makes any form of equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which does not depart from the content of the technical solution of the present invention and still falls within the protection scope of the present invention.
Claims
1. A method for preparing a bonded wafer, characterized in that: include: Providing a device wafer and a support wafer, wherein an oxide layer is formed on the surface of the device wafer and / or the support wafer; performing an ion implantation process on the device wafer; Bonding the ion-implanted side of the device wafer to the support wafer to form a bonded wafer; The bonded wafer is subjected to a stripping process to strip off a portion of the device wafer, and the remaining portion of the device wafer serves as a top silicon layer, wherein the stripping process includes a pre-heat treatment process and a stripping heat treatment process performed sequentially, and the temperature of the pre-heat treatment process is lower than the temperature of the stripping heat treatment process.
2. The method for preparing a bonded wafer according to claim 1, wherein: The temperature of the pre-heat treatment process is 250°C to 350°C.
3. The method for preparing a bonded wafer according to claim 2, wherein: The time of the pre-heat treatment process is 10 minutes to 15 minutes.
4. The method for preparing a bonded wafer according to claim 1, wherein: The temperature of the peeling heat treatment process is 450°C to 600°C.
5. The method for preparing a bonded wafer according to claim 1, wherein: When the bonded wafer is subjected to a stripping process, the bonded wafer is placed in a furnace tube, and a first heating process is performed to raise the initial temperature of the furnace tube to the temperature of the pre-heat treatment process, and the pre-heat treatment process is performed after the heating process is performed; after the pre-heat treatment process is completed, a second heating process is performed to raise the temperature of the pre-heat treatment process to the temperature of the stripping heat treatment process, and the stripping heat treatment process is performed after the heating process is performed.
6. The method for preparing a bonded wafer according to claim 5, characterized in that: The first heating process and the second heating process have the same heating rate.
7. The method for preparing a bonded wafer according to claim 6, wherein: The heating rates of the first heating process and the second heating process are both 15° C. / min to 20° C. / min.
8. The method for preparing a bonded wafer according to claim 1, wherein: The thickness of the top silicon layer is 200nm-500nm.
9. The method for preparing a bonded wafer according to claim 7, wherein: The thickness difference of the top silicon layer is 1.5nm to 6nm.
10. The method for preparing a bonded wafer according to claim 1, wherein: The implanted ions in the ion implantation process include hydrogen ions, the implantation energy in the ion implantation process is 48keV to 68keV, and the implantation dose in the ion implantation process is 1×10 16 atom / cm 2 ~6×10 16 atom / cm 2 .