A bridgeless PFC device and switching power supply

Abstract

The application discloses a kind of bridgeless PFC device and switching power supply, bridgeless PFC device includes: bridgeless PFC circuit, bus capacitor and surge suppression circuit;Surge suppression circuit includes: diode D1, diode D2, diode D5, diode D6, capacitor C1 and voltage reduction module;Bridgeless PFC circuit first input port, diode D1 anode and diode D2 cathode are connected bridgeless PFC device first end;The second input port of bridgeless PFC circuit and diode D5 anode are connected bridgeless PFC device second end;Bridgeless PFC circuit first output port connects diode D1 cathode, diode D6 anode, voltage reduction module output port and bus capacitor C2 one end;Diode D5 cathode connects diode D6 anode, capacitor C1 one end and voltage reduction module input port;Bridgeless PFC circuit second output port, diode D2 anode, capacitor C1 other end, voltage reduction module ground port and bus capacitor C2 other end are connected bridgeless PFC device ground end.The application can inhibit the surge current of AC input.

Description

Technical Field

[0001] This invention belongs to the field of power supply technology, and specifically relates to a bridgeless PFC device and a switching power supply. Background Technology

[0002] To address the problems of power grid harmonic pollution and energy waste, power factor correction (PFC) circuits are increasingly being used, and bridgeless PFC circuits are receiving more and more attention due to their high efficiency.

[0003] During PFC circuit startup, due to the uncertain input voltage and the initial zero voltage on the output filter capacitor, a large input inrush current may be generated during the charging process. This inrush current can cause performance degradation or even damage to power semiconductor devices, reducing converter reliability and causing significant stress on the power supply system.

[0004] Existing solutions typically involve inserting a thermistor in series in the circuit and using a relay to bypass the thermistor after startup. However, this increases the size of the power supply equipment, which is not conducive to the development of power supply equipment towards miniaturization and high power density.

[0005] The Chinese patent application CN111342436B proposes to suppress surge current by controlling the turn-on timing of the thyristor. However, if the input voltage is a DC voltage, the thyristor cannot be turned off naturally when the current crosses zero, so the surge current cannot be suppressed by controlling the turn-on timing of the thyristor's start-up phase.

[0006] Therefore, there is an urgent need for a bridgeless PFC device that can suppress both AC input surge current and DC input surge current. Summary of the Invention

[0007] In view of this, the technical problem to be solved by the present invention is to overcome at least one of the defects in the prior art and provide a bridgeless PFC device and switching power supply that can suppress AC and DC input surge currents without the need to add thermistors and relays, thereby reducing the size of the power supply equipment.

[0008] As a first aspect of the present invention, the technical solution of the bridgeless PFC device provided is as follows:

[0009] A bridgeless PFC device includes: a first terminal for inputting a DC negative voltage or AC L-line voltage, a second terminal for inputting a DC positive voltage or AC N-line voltage, a ground terminal, a bridgeless PFC circuit, a bus capacitor, and a surge suppression circuit; the surge suppression circuit includes: diodes D1, D2, D5, and D6, capacitor C1, and a step-down module; the first input port of the bridgeless PFC circuit, the anode of diode D1, and the cathode of diode D2 are connected together to connect to the first terminal of the bridgeless PFC device; the second input port of the bridgeless PFC circuit and the anode of diode D5 are connected to... The first output port of the bridgeless PFC circuit is connected to the cathode of diode D1, the anode of diode D6, the output port of the step-down module, and one end of bus capacitor C2; the cathode of diode D5 is connected to the anode of diode D6, one end of capacitor C1, and the input port of the step-down module; the second output port of the bridgeless PFC circuit, the anode of diode D2, the other end of capacitor C1, the ground port of the step-down module, and the other end of bus capacitor C2 are connected together to connect to the ground terminal of the bridgeless PFC circuit.

[0010] Wherein: the two switching transistors in the power frequency bridge arm of the bridgeless PFC circuit are thyristors; when the bridgeless PFC device is working, after the auxiliary power supply is started, the bridgeless PFC device is first controlled to not work, and the corresponding control strategy is selected according to the current operating conditions to suppress the surge current.

[0011] When a positive half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, the first control strategy is selected. A charging circuit is formed by pulse control of the thyristors in the power frequency bridge arm, and the voltage of the bus capacitor C2 is slowly charged to be equal to the peak value of the input voltage.

[0012] When a DC signal is input to the first and second input ports of the bridgeless PFC circuit, the second control strategy is selected, and the voltage of the bus capacitor C2 is slowly charged to be equal to the input voltage by controlling the step-down module.

[0013] When a negative half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, either the first control strategy or the second control strategy is selected to slowly charge the voltage of the bus capacitor C2 to be equal to the peak value of the input voltage.

[0014] Preferably, the bridgeless PFC circuit includes a PFC inductor L1, a high-frequency bridge arm, and a power frequency bridge arm. One end of the PFC inductor L1 is the first input port of the bridgeless PFC circuit, and the other end of the PFC inductor L1 is connected to the midpoint of the high-frequency bridge arm. The midpoint of the power frequency bridge arm is the second input port of the bridgeless PFC circuit. One end of the high-frequency bridge arm and one end of the power frequency bridge arm are connected together to form the first output port of the bridgeless PFC circuit, and the other end of the high-frequency bridge arm and the other end of the power frequency bridge arm are connected together to form the second output port of the bridgeless PFC circuit.

[0015] Furthermore, when a positive half-cycle AC signal is input to the first input port and the second input port of the bridgeless PFC circuit, the thyristor connected between the first output port of the PFC circuit and the midpoint of the power frequency bridge arm is used for pulse control in the first control strategy.

[0016] When a negative half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, the thyristor connected between the second output port of the PFC circuit and the midpoint of the power frequency bridge arm is used for pulse control in the first control strategy.

[0017] Furthermore, when the first and second input ports of the bridgeless PFC circuit are input with AC signals, each control cycle sends a drive pulse to the corresponding thyristor only when the absolute value of the AC signal is in the decreasing region, thereby ensuring that the corresponding thyristor is turned off at the zero-crossing moment.

[0018] Preferably, the step-down module includes a switching transistor Q3, a freewheeling diode D8, and a Buck inductor L2. The drain of the switching transistor Q3 is the input port of the step-down module, and the source of the switching transistor Q3 is connected to both the cathode of the freewheeling diode D8 and one end of the Buck inductor L2. The other end of the Buck inductor L2 is the output port of the step-down module, and the anode of the freewheeling diode D8 is the ground port of the step-down module.

[0019] Preferably, the switching transistor Q3 is a MOSFET.

[0020] Furthermore, in the second control strategy, the voltage of the bus capacitor C2 is gradually charged to be equal to the peak value of the input voltage by gradually increasing the driving pulse width of the switch Q3.

[0021] As a second aspect of the present invention, the technical solution of the provided switching power supply embodiment is as follows:

[0022] A switching power supply, wherein: it includes the bridgeless PFC device described in any of the first aspects above.

[0023] The beneficial effects of this invention are as follows:

[0024] (1) The bridgeless PFC device of the present invention has two thyristors as the power frequency bridge arm of the bridgeless PFC circuit. When the bridgeless PFC device is working, after the auxiliary power supply is started, the bridgeless PFC device is first controlled to not work, and the corresponding control strategy is selected according to the current working condition to suppress the surge current, so as to effectively suppress both AC input surge current and DC input surge current.

[0025] (2) The embodiments of the present invention use a bridgeless PFC device, which eliminates the need for relays to improve efficiency and eliminates the need for thermistors to start normally at lower temperatures. Therefore, it is more efficient than the traditional solution, and has a wider temperature range and better stability.

[0026] (3) The bridgeless PFC device used in the embodiments of the present invention eliminates the need for relays and thermistors, making it smaller in size than the traditional solution and easier to surface mount and integrate. Attached Figure Description

[0027] Figure 1 The waveform of the AC input voltage;

[0028] Figure 2 This is a schematic block diagram of the bridgeless PFC device according to the first embodiment of the present invention;

[0029] Figure 3 Based on Figure 2 A specific type of circuit diagram based on a block diagram;

[0030] Figure 4 for Figure 3 Control timing diagram of the circuit under AC input;

[0031] Figure 5 for Figure 3 A schematic diagram of the current loop of the circuit at DC input. Detailed Implementation

[0032] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0033] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be used interchangeably where appropriate for the purposes of describing embodiments of this application herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] It should be understood that in the specification, claims, and drawings, when a step is described as continuing into another step, the step may directly continue into that other step or be continued into that other step through a third step; when an element / unit is described as "continuing" into another element / unit, the element / unit may be "directly connected" to that other element / unit or "connected" to that other element / unit through a third element / unit.

[0036] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions thereof will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0037] Figure 1 Given the waveform of the AC input voltage, the thyristor control strategy in the AC circuit can be as follows: obtain the absolute value decreasing range of the input AC voltage based on the waveform of the input AC voltage, and send a turn-on signal to the thyristor during the absolute value decreasing range of the input AC voltage (such as the range of Ts / 4~Ts / 2 and the range of 3 / 4Ts~Ts, where Ts represents one power frequency cycle), and send a turn-off signal to the thyristor during the absolute value increasing range of the input AC voltage.

[0038] The power frequency bridge arm of the bridgeless PFC circuit of this invention has two thyristors. When the bridgeless PFC device is working, after the auxiliary power supply is started, the bridgeless PFC device is first controlled to not work, and the corresponding control strategy is selected according to the current operating conditions to suppress the surge current, thereby effectively suppressing both AC input surge current and DC input surge current.

[0039] First Embodiment

[0040] Figure 2The schematic diagram of the bridgeless PFC device according to the first embodiment of the present invention includes diode D1, diode D2, bridgeless PFC circuit, diode D5, diode D6, capacitor C1, bus capacitor C2, and step-down module.

[0041] Terminal L (DC-) is electrically connected to the anode of diode D1, the cathode of diode D2, and point A of the first input port of the bridgeless PFC circuit. The cathode of diode D1 is electrically connected to point C of the first output port of the bridgeless PFC circuit, the anode of diode D6, point C' of the output port of the buck module, and one end of bus capacitor C2. The cathode of diode D6 is electrically connected to the cathode of diode D5, one end of capacitor C1, and point A' of the input port of the buck module. The other end of output capacitor C2 is electrically connected to point B' of the reference ground of the buck module, the other end of capacitor C1, point D of the second output port of the bridgeless PFC circuit, the anode of diode D2, and terminal GND. Terminal N (DC+) is electrically connected to point B of the second input port of the bridgeless PFC circuit and the anode of diode D5.

[0042] In this circuit, the power frequency bridge arm of the bridgeless PFC circuit contains two thyristors. When the bridgeless PFC device is working, after the auxiliary power supply is started, the bridgeless PFC device is first controlled to not work, and the corresponding control strategy is selected according to the current operating conditions to suppress the surge current.

[0043] When a positive half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, the first control strategy is selected. A charging circuit is formed by pulse control of the thyristors in the power frequency bridge arm, and the voltage of the bus capacitor C2 is slowly charged to be equal to the peak value of the input voltage.

[0044] When a DC signal is input to the first and second input ports of the bridgeless PFC circuit, the second control strategy is selected. By controlling the step-down module, the voltage of the bus capacitor C2 is slowly charged to be equal to the input voltage.

[0045] When a negative half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, either the first control strategy or the second control strategy is selected to slowly charge the voltage of the bus capacitor C2 to be equal to the peak value of the input voltage.

[0046] Figure 3 For based on Figure 2 A specific circuit diagram of the principle block diagram: The bridgeless PFC circuit includes PFC inductor L1, switching transistor Q1, switching transistor Q2, thyristor X1, and thyristor X2; the step-down module is a Buck circuit, including switching transistor Q3, freewheeling diode D8, and Buck inductor L2.

[0047] Terminal L (DC-) is electrically connected to the anode of diode D1, the cathode of diode D2, and one end of PFC inductor L1. The other end of PFC inductor L1 is electrically connected to the source of switching transistor Q1 and the drain of switching transistor Q2. Terminal N (DC+) is electrically connected to the anode of thyristor X1, the cathode of thyristor X2, and the anode of diode D5. The cathode of diode D5 is electrically connected to the cathode of diode D6, one end of capacitor C1, and the drain of switching transistor Q3. The source of switching transistor Q3 is electrically connected to the cathode of freewheeling diode D8 and one end of Buck inductor L2. The cathode of diode D1 is electrically connected to the drain of switching transistor Q1, the cathode of thyristor X1, the anode of diode D6, the other end of Buck inductor L2, and one end of bus capacitor C2. The other end of bus capacitor C2 is electrically connected to the anode of freewheeling diode D8, the other end of capacitor C1, the anode of thyristor X2, the source of switching transistor Q2, the anode of diode D2, and terminal GND.

[0048] Figure 3 The operation of a bridgeless PFC device when used in a switching power supply consists of four stages, as follows:

[0049] The first stage is the auxiliary power supply startup stage, during which the digital control circuit ( Figure 3 (This circuit is omitted in the circuit diagram.) The bridgeless PFC circuit and Buck circuit do not work. The auxiliary voltage works normally when the input voltage reaches a certain threshold.

[0050] The second stage is the surge current suppression zone. During this stage, the bridgeless PFC circuit does not work. At this time, the digital control circuit controls the drive signal of the thyristor or Buck circuit to buffer the voltage of the output capacitor C2 to be equal to the input voltage, thereby achieving the surge current suppression effect.

[0051] The third stage is the startup area of ​​the bridgeless PFC circuit, during which the bridgeless PFC circuit begins soft startup.

[0052] The fourth stage is the working area of ​​the bridgeless PFC circuit, during which the bridgeless PFC circuit operates normally.

[0053] In the second stage described above, when an AC signal is input, the thyristor can be pulse-controlled by a digital control circuit to gradually charge the voltage of the output capacitor C2 to the same level as the peak value of the input voltage, thus achieving the effect of an AC surge suppression circuit. When a DC signal is input, the switching transistor Q3 of the Bcuk circuit can be controlled by a digital control circuit to gradually charge the voltage of the output capacitor C2 to the same level as the input voltage, thus achieving the effect of a DC surge suppression circuit.

[0054] Figure 4 for Figure 3The circuit's timing diagram shows its operation when the input AC positive half-cycle voltage is applied. The first control strategy suppresses inrush current, controlling the thyristors in the power frequency bridge arm. Please refer to [reference needed] for details. Figure 4 Where Vin represents the input voltage waveform, Vgs represents the thyristor pulse drive signal, Uo represents the voltage across the output capacitor C2, and i rush This indicates the input surge current. Initially, the bridgeless PFC circuit and Buck circuit are not working (switching transistors Q1, Q2, and Q3 are off, and thyristors X1 and X2 are cut off). To suppress the surge current, after the auxiliary power supply starts working, it detects the input AC voltage and output voltage and calculates the voltage difference between the input and output voltages. The input AC voltage can be divided into an absolute value rising range and an absolute value falling range. Under the action of the digital control circuit, thyristor X2 is pulse-conducted for a duration T1 during the absolute value falling range of the input AC voltage. At this time, thyristor X2 is turned on, and output capacitor C2 is charged. The charging current path is terminal L (DC-) → diode D1 → output capacitor C2 → thyristor X2 → terminal N (DC+). The voltage of output capacitor C2 gradually increases, while the input voltage gradually decreases. When the voltage of output capacitor C2 is higher than the input voltage, that is, the cathode voltage of thyristor X2 is greater than the anode voltage, the thyristor is cut off, and the charging circuit of output capacitor C2 is disconnected, completing a single charge. At this time, the voltage of output capacitor C2 is U1. The smaller the voltage difference between the input and output voltages, the smaller the phase difference of the thyristor conduction, the smaller the surge current, and the longer the time required for the output capacitor to be precharged to be equal to the peak value of the input voltage. Thus, the start-up time is controllable to meet different application requirements.

[0055] When the input AC voltage is in a negative cycle, the first control strategy is also used to suppress inrush current. Due to the symmetry of the AC input, the controlled thyristor is X1. Specifically, thyristor X1 is pulse-conducted for a duration T2 during the decreasing absolute value range of the input AC voltage. During this time, thyristor X1 conducts, and output capacitor C2 is charged. The charging current path is terminal N (DC+) → thyristor X1 → output capacitor C2 → diode D2 → terminal L (DC-). The voltage of output capacitor C2 gradually increases, while the absolute value of the input voltage gradually decreases. When the cathode voltage of thyristor X1 is greater than the anode voltage, the thyristor is cut off, and the charging circuit of output capacitor C2 is disconnected, completing a single charge. At this time, the voltage of output capacitor C2 is U2, and U2 > U1. The absolute value of the input AC voltage corresponding to the thyristor conduction moment increases sequentially with the conduction time points, thereby enabling the voltage of output capacitor C2 to gradually increase to the maximum amplitude of the input AC voltage.

[0056] Figure 5 For Figure 3The circuit diagram shows the current loop at the DC input. A second control strategy is used to suppress inrush current, controlling the step-down module. Please refer to the diagram for details. Figure 5 At this point, L(DC-) is the negative DC input terminal, and L(DC+) is the positive DC input terminal. Initially, the bridgeless PFC circuit and Buck circuit are not working (switches Q1, Q2, and Q3 are off, thyristors X1 and X2 are off, diode D5 is on, diode D6 is off, and diode D2 is on). To suppress the startup inrush current, the current charges capacitor C1 through diodes D5 and D2. After the auxiliary power supply starts working, the digital control circuit controls the drive pulse width of switch Q3. When switch Q3 is on, the voltage on capacitor C1 excites the Buck inductor L2 and charges the output capacitor C2. When switch Q3 is off, freewheeling diode D8 is on, and Buck inductor L2 charges the output capacitor C2. As the drive pulse width of switch Q3 increases, the voltage of output capacitor C2 gradually increases until it equals the input voltage, thus achieving the effect of suppressing the startup DC input surge. The longer the driving pulse width of switch Q3 gradually increases, the better the DC input surge suppression effect.

[0057] It should be noted that, Figure 3 The circuit can also be used during the negative half-cycle of the input AC. Figure 5 The current loop in the circuit buffers the voltage of the output capacitor C2 to be equal to the input voltage, thereby achieving the effect of surge current suppression. At this time, the second control strategy is adopted to suppress surge current, and the control is the step-down module.

[0058] The bridgeless PFC device of this invention can effectively suppress AC / DC input surge current, has controllable start-up time, meets different application requirements, is more efficient than traditional solutions, and has a wider and more stable temperature range. It is also smaller in size than traditional solutions, facilitating surface mounting and integration.

[0059] Second Embodiment

[0060] This embodiment provides a switching power supply, which includes any of the bridgeless PFC devices in the first embodiment.

[0061] The switching power supply of this embodiment, by including any of the bridgeless PFC devices in the first embodiment, can achieve AC / DC input surge current suppression, and does not require the addition of thermistors and relays, thus reducing the size of the switching power supply device.

[0062] The above description of the embodiments is only for the purpose of helping to understand the inventive concept of the present invention and is not intended to limit the present invention. For those skilled in the art, any modifications, equivalent substitutions, improvements, etc., made without departing from the principle of the present invention should be included within the protection scope of the present invention.

Claims

1. A bridgeless PFC device, characterized in that: It includes a first terminal for inputting DC negative voltage or AC L-line voltage, a second terminal for inputting DC positive voltage or AC N-line voltage, a grounding terminal, a bridgeless PFC circuit, a bus capacitor, and a surge suppression circuit; The surge suppression circuit includes: diodes D1, D2, D5, and D6, capacitor C1, and a step-down module; the first input port of the bridgeless PFC circuit, the anode of diode D1, and the cathode of diode D2 are connected together to connect to the first terminal of the bridgeless PFC device; the second input port of the bridgeless PFC circuit and the anode of diode D5 are connected together to connect to the second terminal of the bridgeless PFC device; the first output port of the bridgeless PFC circuit is simultaneously connected to the cathode of diode D1, the anode of diode D6, the output port of the step-down module, and one end of the bus capacitor C2; the cathode of diode D5 is simultaneously connected to the anode of diode D6, one end of capacitor C1, and the input port of the step-down module; the second output port of the bridgeless PFC circuit, the anode of diode D2, the other end of capacitor C1, the ground port of the step-down module, and the other end of the bus capacitor C2 are connected together to connect to the ground terminal of the bridgeless PFC device; Wherein: the two switching transistors in the power frequency bridge arm of the bridgeless PFC circuit are thyristors; when the bridgeless PFC device is working, after the auxiliary power supply is started, the bridgeless PFC device is first controlled to not work, and the corresponding control strategy is selected according to the current operating conditions to suppress the surge current. When a positive half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, the first control strategy is selected. A charging circuit is formed by pulse control of the thyristors in the power frequency bridge arm, and the voltage of the bus capacitor C2 is slowly charged to be equal to the peak value of the input voltage. When a DC signal is input to the first and second input ports of the bridgeless PFC circuit, the second control strategy is selected, and the voltage of the bus capacitor C2 is slowly charged to be equal to the input voltage by controlling the step-down module. When a negative half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, either the first control strategy or the second control strategy is selected to slowly charge the voltage of the bus capacitor C2 to be equal to the peak value of the input voltage.

2. The bridgeless PFC device according to claim 1, characterized in that: The bridgeless PFC circuit includes a PFC inductor L1, a high-frequency bridge arm, and a power frequency bridge arm. One end of the PFC inductor L1 is the first input port of the bridgeless PFC circuit, and the other end of the PFC inductor L1 is connected to the midpoint of the high-frequency bridge arm. The midpoint of the power frequency bridge arm is the second input port of the bridgeless PFC circuit. One end of the high-frequency bridge arm and one end of the power frequency bridge arm are connected together to form the first output port of the bridgeless PFC circuit, and the other end of the high-frequency bridge arm and the other end of the power frequency bridge arm are connected together to form the second output port of the bridgeless PFC circuit.

3. The bridgeless PFC device according to claim 2, characterized in that: When a positive half-cycle AC signal is input to the first input port and the second input port of the bridgeless PFC circuit, the thyristor connected between the first output port of the PFC circuit and the midpoint of the power frequency bridge arm is used for pulse control in the first control strategy. When a negative half-cycle AC signal is input to the first and second input ports of the bridgeless PFC circuit, the thyristor connected between the second output port of the PFC circuit and the midpoint of the power frequency bridge arm is used for pulse control in the first control strategy.

4. The bridgeless PFC device according to claim 3, characterized in that: When the first and second input ports of the bridgeless PFC circuit are input with AC signals, each control cycle sends a drive pulse to the corresponding thyristor only when the absolute value of the AC signal is in the decreasing region, thereby ensuring that the corresponding thyristor is turned off at the zero crossing moment.

5. The bridgeless PFC device according to claim 1, characterized in that: The step-down module includes a switching transistor Q3, a freewheeling diode D8, and a Buck inductor L2. The drain of the switching transistor Q3 is the input port of the step-down module, and the source of the switching transistor Q3 is connected to both the cathode of the freewheeling diode D8 and one end of the Buck inductor L2. The other end of the Buck inductor L2 is the output port of the step-down module, and the anode of the freewheeling diode D8 is the ground port of the step-down module.

6. The bridgeless PFC device according to claim 5, characterized in that: The switching transistor Q3 is a MOSFET.

7. The bridgeless PFC device according to claim 5, characterized in that: In the second control strategy, the voltage of the bus capacitor C2 is gradually increased by controlling the driving pulse width of the switch Q3 to equal the peak value of the input voltage.

8. A switching power supply, characterized in that: Includes the bridgeless PFC device according to any one of claims 1 to 7.

Images