Stepped multi-chip stacked and connected PCB (Printed Circuit Board)

Abstract

The invention discloses a stepped multi-chip stacked and connected PCB (printed circuit board), which comprises a PCB and chips, and is characterized in that the PCB is provided with concave first-stage steps, the areas, exposed by windowing of the chips, of the first-stage steps are sequentially subjected to primary processing protection and secondary processing protection, the PCB is provided with second-stage steps, the second-stage steps and the first-stage steps are adjacently arranged in a stepped manner, and the first-stage steps and the second-stage steps are sequentially subjected to primary processing protection and secondary processing protection. The first-stage step and the second-stage step which are subjected to secondary processing protection are arranged through milling PP windowing, and the areas, exposed through chip windowing, of the first-stage step and the second-stage step are subjected to press fit through corresponding inverted-buckle convex molds, so that the upper surfaces of the inverted-buckle convex molds on the first-stage step and the second-stage step are flush with each other; and the outer layer of the laminated PCB is subjected to resistance welding treatment and is cleaned. The chip sinks into the PCB, and the plurality of layers of chips are arranged in a sinking and stepped manner, so that the overall thickness is reduced, the ultrathin direction can be developed, and the signal transmission distance is shortened to the connection distance between the chip and the inner layer circuit of the PCB, thereby accelerating the transportation processing capability.

Description

Technical Field

[0001] The invention belongs to the technical field of PCB board manufacturing, and in particular relates to a PCB board with stepped multi-chip stacking connections. Background Art

[0002] PCB board is the abbreviation of circuit board, which is the control core of all products and equipment that need to be controlled.

[0003] The problem with existing circuit boards is that chips are generally mounted on PCBs, so the overall thickness is the thickness of the chip plus the thickness of the PCB. The overall thickness of multi-chip stacking is the combined thickness of the PCB plus all chips, resulting in a large overall thickness of the PCB. The product cannot be developed in the direction of ultra-thinness, especially the traditional production method cannot meet the current miniaturization requirements. In addition, the transmission distance of this type of PCB is long, resulting in slow computing processing capabilities.

[0004] Secondly, for the existing patent with application number 201410033506.2, a method for manufacturing a WB type packaging substrate is specifically disclosed, including: manufacturing a step unit with a wire bonding pad; attaching a combined dry film layer on the surface of the step unit with the wire bonding pad, and then transferring the pattern of the combined dry film layer to form a combined dry film layer with a pattern on the surface of the step unit with the wire bonding pad; milling and grooving the semi-cured sheet to form a window in the semi-cured sheet, and positioning and laminating the semi-cured sheet after milling and grooving, the step unit with the dry film formed, and the top plate together; executing the outer layer PCB manufacturing process; performing through-groove milling and depth-controlled milling from the top plate to expose the combined dry film layer of the step unit; removing the combined dry film layer to expose the wire bonding pad; and performing finished product milling after the wire bonding pad is exposed. Among them, the method of through-groove milling and controlled-depth milling followed by pressing is not feasible, because it will cause the membrane surface to sink toward the middle during pressing, leading to a serious problem of glue overflowing in the middle. Summary of the invention

[0005] The object of the present invention is to provide a PCB board with stepped multi-chip stacking connections to solve the problems raised in the above background technology.

[0006] In view of this, the present invention provides a PCB board with stepped multi-chip stacking connection, comprising a PCB board and a chip, a recessed first-level step is provided on the PCB board, and the first-level step and the chip are both bonded with a PAD, so that the chip is mounted on the first-level step and connected to the PAD through a bonding line, and the area exposed by the chip opening on the first-level step is subjected to primary processing protection and secondary processing protection in sequence, a second-level step is provided on the PCB board, and the second-level step and the first-level step are arranged adjacent to each other in a stepped manner, the second-level step is bonded with the PAD, the chip is mounted on the second-level step and the chip is connected to the PAD on the second-level step through a bonding line, and the area exposed by the chip opening on the second-level step is subjected to primary processing protection and secondary processing protection in sequence, the first-level step and the second-level step after the secondary processing protection are set with a gong PP window, and the areas exposed by the chip opening on the first-level step and the second-level step are pressed and set by corresponding inverted convex molds, so that the upper surfaces of the inverted convex molds on the first-level step and the second-level step are flush, and after pressing, the outer layer of the PCB board is solder-resisted and cleaned.

[0007] In the present invention, further, the first-level step and the second-level step are arranged in a stepped manner, and the first-level step is located below the horizontal plane of the second-level step, and is arranged on a stepped network according to the number of steps.

[0008] In the present invention, further, the first-level step and the second-level step are milled out by a CNC machine tool.

[0009] In the present invention, further, the one-time protection treatment sequentially prints anti-plating ink, exposes, develops and UV treats the areas of the chip exposed by opening windows on the first step and the second step, wherein the liquid photosensitive anti-plating ink is evenly covered on the surface of the first step and the second step by one of screen printing, spraying or curtain coating, and then pre-baked at 70°C-100°C to form a dry film layer, and then ultraviolet light is used to selectively expose the ink through a mask, and the ultraviolet light uses a g-line (436nm) wavelength light source, and then the unexposed part of the ink is dissolved by an alkaline developer to expose the substrate area to be plated, and finally the UV treatment uses a cold light source UV LED device (power 80W / cm).

[0010] In the present invention, further, the secondary processing protection is to affix a high-temperature PI protective film on the first step and the second step of the chip, and expose the chip window area through laser cutting patterns.

[0011] In the present invention, further, the laser PP window opening includes laser window opening in the area where window opening is required on the first-step and second-step chips, the window opening area on the PP film is larger than the exposed size of the chip, and the single side of the window opening on the PP film is 10 mil away from the single side size of the chip.

[0012] In the present invention, further, the inverted convex mold includes an integrally formed base plate and a punch, the size of the punch is smaller than the size of the base plate, the shape of the punch is consistent with the area exposed by the chip window on the first step and the second step, and the punch is engaged with the area exposed by the corresponding chip window, so that the upper surface of the base plate of the inverted convex mold on the first step and the second step is located on the same horizontal plane.

[0013] In the present invention, further, after lamination, the first step and the second step are externally wrapped with a protective film and subjected to an outer layer solder resist treatment of the PCB board.

[0014] In the present invention, further, after the solder resist treatment, the protective film and the undercut convex mold are removed, and a high-temperature PI protective film is affixed.

[0015] In the present invention, laser and plasma are further used to clean the PCB board.

[0016] The beneficial effects of the present invention are: The PCB board with stepped multi-chip stacking connection adopts a stepped mounting connection method to manufacture the PCB board. According to the number of chips to be stacked, a corresponding number of steps are opened, and the steps are arranged in a stepped manner. The bonding wires are connected to the bonding pads and mounted chips on the corresponding steps, and primary processing protection and secondary processing protection are performed on the first and second steps in turn. Windowing is performed according to the area where the chip needs to be exposed. The above-mentioned manufacturing steps are repeated according to the number of layers of the chip. After completion, PP processing is performed on the first and second steps, and windowing is performed on the area where the chip needs to be exposed. , and then design the inverted convex mold corresponding to each step to fit on each chip, so that the upper surface of the inverted convex mold on each step is in the same horizontal plane state before pressing, avoiding the overflow of glue caused by the PP film sinking to the middle during pressing, maintaining the uniformity of pressing, and finally performing solder mask and foreign matter cleaning to complete the production. Through this method, the chip sinks into the PCB board, and the multi-layer chips are arranged and connected in a sinking and stepped manner, which not only reduces the overall thickness and can develop in the direction of ultra-thinness, but also shortens the signal transmission distance to the connection distance between the chip and the inner layer of the PCB, thereby speeding up the transportation and processing capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram of a PCB board of the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0019] In the description of the present application, it should be noted that the terms used herein are only for describing specific embodiments, and are not intended to limit the exemplary embodiments according to the present application. For ease of description, the technology, method and equipment known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments can have different values. It should be noted that similar reference numerals and letters represent similar items below.

[0020] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0021] It should be noted that, in the description of the present application, the directions indicated by directional terms such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are only for the convenience of describing the present application and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the referred device or element must have a specific orientation or be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the scope of protection of the present application; the directional terms "inside and outside" refer to the inside and outside relative to the contour of each component itself.

[0022] It should be noted that, in the present application, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises one..." does not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be noted that the scope of the method and device in the embodiment of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0023] The present embodiment provides a PCB board with stepped multi-chip stacking connection, including a PCB board 1 and a chip 2. The chip 2 can be multiple pieces, and is designed to be sunken in the PCB board 1 for mounting layout, so that the overall thickness does not exceed the thickness of the PCB board 1.

[0024] In this embodiment, specifically, first, a recessed first-level step 10 is provided on the PCB board 1. The first-level step 10 can be milled by CNC milling or laser milling. This embodiment does not impose any specific restrictions. PADs are bonded to the first-level step 10 and the chip 2, so that the chip 2 is mounted on the first-level step 10 and connected to the PAD through bonding wires. The PAD (pad) is a key structure for achieving electrical connection and mechanical fixation between electronic components and circuit boards.

[0025] Secondly, the area exposed by the window opening of the chip 2 on the first-level step 10 is subjected to primary processing and secondary processing protection in sequence; Specifically, the one-time protection process is to sequentially perform resist plating ink, exposure, development and UV treatment according to the area of ​​the chip 2 exposed by the window on the first-level step 10. The area of ​​the chip 2 exposed by the window means the area of ​​the chip 2 exposed on the first-level step 10. The area cannot be blocked in the subsequent processing, that is, the chip 2 must be exposed. Subsequently, a liquid photosensitive anti-electroplating ink is uniformly covered on the surface of the first step 10 by screen printing, spraying or curtain coating, and then pre-baked at 70° C.-100° C. to form a dry film layer to avoid over-curing affecting development, wherein the anti-electroplating ink can be composed of acrylic epoxy resin, thermosetting epoxy resin, reactive diluent and photoinitiator, etc.; Subsequently, ultraviolet light is used to selectively expose the ink through a mask. The ultraviolet light uses a g-line (436nm) wavelength light source. The unexposed part of the ink is then dissolved by an alkaline developer to expose the substrate area to be plated. Finally, a cold light source UV LED device (power 80W / cm2) is used for UV treatment. After UV treatment, the ink is completely cross-linked by high temperature (about 150°C) to enhance resistance to electroplating solution and mechanical strength.

[0026] Then, a secondary step 11 is opened on the PCB board 1, and the secondary step 11 and the primary step 10 are arranged adjacent to each other in a stepped manner, the secondary step 11 is bonded to the PAD, the chip 2 is mounted on the secondary step 11, and the chip 2 is connected to the PAD on the secondary step 11 through a bonding line, and the area exposed by the window opening of the chip 2 on the secondary step 11 is subjected to primary processing protection and secondary processing protection in sequence, the primary step 10 and the secondary step 11 after the secondary processing protection are set by a gong PP window opening, and the areas exposed by the window opening of the chip 2 on the primary step 10 and the secondary step 11 are pressed and set by the corresponding inverted convex mold 3, so that the upper surfaces of the inverted convex mold 3 on the primary step 10 and the secondary step 11 are flush, and after pressing, the outer layer of the PCB board 1 is subjected to solder mask processing and cleaning.

[0027] After the first protection treatment, the second protection treatment is carried out. The second protection treatment is to stick a high-temperature PI protective film on the first step 10 of the chip 2. The window area of ​​the chip 2 is exposed through laser cutting. The PI film (polyimide film) is a high-performance polymer material. It is made of pyromellitic dianhydride (PMDA) and diaminodiphenyl ether (ODA / DDE) in a strong polar solvent, cast into a film, and then imidized. It is an existing film.

[0028] Then, the secondary step 11 is made according to the above steps, and the above method is repeated to mount the chip 2 on the secondary step 11, perform the primary processing protection and the secondary processing protection. It should be noted that the primary step 10 and the secondary step 11 are arranged in a stepped manner, and the primary step 10 is located below the horizontal plane of the secondary step 11. The number of steps is determined according to the number of paper chips 2 required.

[0029] In this embodiment, a further step is to perform laser PP windowing on the first step 10 and the second step 11. The laser PP windowing includes laser windowing in the areas where windowing is required on the first step 10 and the second step 11 chip 2. The windowing area on the PP film is larger than the exposed size of the chip 2. The single side of the window on the PP film is 10 mil away from the single side size of the chip 2. The reason for this setting is that under the high temperature of lamination, it will flow to fill the gap in the core board. A slightly larger windowing area can reserve space for the resin flow during lamination to avoid resin overflow to the chip 2 area, resulting in local uneven thickness or impedance deviation. The expansion of the windowing area can provide a buffer zone to reduce stress concentration during temperature changes or mechanical bending, and avoid delamination or fracture. The expansion of the PP windowing can ensure that the solder mask layer is aligned with the PP window to avoid the solder mask ink covering the chip 2 pad. If the windowing is too small, the edge PP will remain, which may cause local impedance discontinuity and affect the integrity of the high-speed signal.

[0030] Moreover, in the present embodiment, after PP is milled, the thickness of the PP film is 0.1 mm. The PP layer serves as an insulating layer, and retaining a certain thickness can prevent short circuits while maintaining interlayer adhesion. Retaining a PP film thickness of 0.1 mm can ensure structural stability after lamination, and prevent the inner core board or copper foil from being exposed due to excessive milling, thereby causing short circuits or delamination risks. Retaining a precise PP film thickness is helpful to control the impedance matching of high-frequency signals, reduce signal reflection and attenuation, and maintain the good effect of multi-layer lamination from the electrical level and structural stability.

[0031] In the present embodiment, in particular, the inverted convex mold 3 includes an integrally formed bottom plate 30 and a punch 31, the size of the punch 31 is smaller than the size of the bottom plate 30, the shape of the punch 31 is consistent with the area where the chip 2 is exposed through the window on the first step 10 and the second step 11, and the punch 31 is fitted into the area where the chip 2 is exposed through the window, so that the upper surfaces of the bottom plate 30 of the inverted convex mold 3 on the first step 10 and the second step 11 are located on the same horizontal plane and then pressed together, thereby avoiding the overflow phenomenon caused by the PP film sinking to the middle during pressing and maintaining the uniformity of pressing.

[0032] In the present embodiment, further, after lamination, the first step 10 and the second step are wrapped with a protective film on the outside and the outer layer of the PCB board 1 is subjected to solder mask treatment. A solder mask is made on the outer layer, and the film is applied to protect the entire board surface. This can not only accurately control the coverage area of ​​the solder mask layer to ensure that the pad is exposed, but also prevent ink from contaminating non-target areas, and form precise patterns during the exposure process to avoid misexposure.

[0033] In this embodiment, further, after the solder resist treatment, the protective film and the undercut convex mold 3 are removed, and a high-temperature PI protective film is pasted.

[0034] In this embodiment, further, laser and plasma are used to clean the PCB board 1, and debris such as glue flow and foreign matter are cleaned. Through the above-mentioned method, the multi-chip 2 adopts a stepped mounting connection method to manufacture the PCB board 1. According to the number of chips 2 to be stacked, a corresponding number of steps are opened, and the steps are arranged in a stepped form. The bonding PAD and the mounted chip 2 are connected by bonding lines on the corresponding steps, and the first-level step 10 and the second-level step 11 are sequentially processed for primary protection and secondary processing and protection, wherein windows are opened according to the areas where the chip 2 needs to be exposed, and the above-mentioned manufacturing steps are repeated according to the number of layers of the chip 2. After completion, the first-level step 10 and the second-level step 11 are subjected to gong PP processing, and the areas where the chip 2 needs to be exposed are subjected to window processing. The inverted convex mold 3 corresponding to each step is designed again and embedded on each chip 2, so that the upper surface of the inverted convex mold 3 on each step is in the same horizontal plane state before pressing, avoiding the overflow of glue caused by the PP film sinking to the middle during pressing, maintaining the uniformity of pressing, and finally performing solder mask and foreign matter cleaning to complete the production. Through this method, the chip 2 sinks into the PCB board 1, and the multi-layer chips 2 are arranged and connected in a sinking and stepped manner, which not only reduces the overall thickness to develop in the direction of ultra-thinness, but also shortens the signal transmission distance to the connection distance between the chip 2 and the inner layer circuit of the PCB, thereby speeding up the transportation and processing capabilities.

[0035] The embodiments of the present application are described above. In the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A PCB board with stepped multi-chip stacking connection, characterized in that: The invention comprises a PCB board and a chip, wherein a concave first-level step is provided on the PCB board, and a PAD is bonded to the first-level step and the chip, so that the chip is mounted on the first-level step and connected to the PAD through a bonding line, and the area exposed by the chip opening on the first-level step is subjected to primary processing protection and secondary processing protection in sequence, a second-level step is provided on the PCB board, and the second-level step and the first-level step are arranged adjacent to each other in a stepped manner, the second-level step is bonded to the PAD, a chip is mounted on the second-level step and the chip is connected to the PAD on the second-level step through a bonding line, and the area exposed by the chip opening on the second-level step is subjected to primary processing protection and secondary processing protection in sequence, the first-level step and the second-level step after the secondary processing protection are set with a gong PP window, and the areas exposed by the chip opening on the first-level step and the second-level step are pressed together through corresponding inverted convex molds, so that the upper surfaces of the inverted convex molds on the first-level step and the second-level step are flush, and after pressing together, the outer layer of the PCB board is subjected to solder mask treatment and cleaned.

2. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: The first-level step and the second-level step are arranged in a stepped manner, and the first-level step is located below the horizontal plane of the second-level step, and is arranged in a stepped network according to the number of steps.

3. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: The first-level step and the second-level step are milled out by a numerically controlled machine tool.

4. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: The one-time protection treatment sequentially prints anti-plating ink, exposes, develops and UV treats the exposed areas of the chip on the first step and the second step, wherein the liquid photosensitive anti-plating ink is evenly covered on the surface of the first step and the second step by screen printing, spraying or curtain coating, and then pre-baked at 70°C-100°C to form a dry film layer, and then ultraviolet light is used to selectively expose the ink through a mask, and the ultraviolet light uses a g-line (436nm) wavelength light source, and then the unexposed part of the ink is dissolved by an alkaline developer to expose the substrate area to be plated, and finally the UV treatment uses a cold light source UV LED device (power 80W / cm).

5. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: The secondary processing protection is to affix a high-temperature PI protective film on the first step and the second step of the chip, and expose the chip window area through laser cutting patterns.

6. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: The Luo PP window opening includes laser window opening in the areas where window opening is required on the first-step and second-step chips. The window opening area on the PP film is larger than the exposed size of the chip, and the single side of the window opening on the PP film is 10 mil away from the single side size of the chip.

7. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: The inverted convex mold includes an integrally formed base plate and a punch. The size of the punch is smaller than that of the base plate. The shape of the punch is consistent with the area exposed by the chip window on the first step and the second step. The punch is fitted into the area exposed by the corresponding chip window, so that the upper surface of the base plate of the inverted convex mold on the first step and the second step is located on the same horizontal plane.

8. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: After lamination, the first step and the second step are wrapped with a protective film and subjected to an outer layer solder mask treatment of the PCB board.

9. The PCB board with stepped multi-chip stacking connection according to claim 8, characterized in that: After solder mask treatment, remove the protective film and the inverted convex mold, and apply a high-temperature PI protective film.

10. The PCB board with stepped multi-chip stacking connection according to claim 1, characterized in that: Use laser and plasma to clean PCB boards.

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