Back contact solar cell structure, preparation method and cell module

Abstract

The invention provides a back contact solar cell, a preparation method and a cell assembly, and the back contact solar cell comprises a substrate which is provided with a light receiving surface and a backlight surface which are oppositely arranged; the backlight face comprises first polarity areas and second polarity areas which are alternately arranged in the first direction. The first polarity region comprises a first substrate doping layer, a first functional layer, a second functional layer and a first electrode which are sequentially stacked in the direction away from the substrate; the second polarity region comprises a second substrate doping layer, a second functional layer and a second electrode which are sequentially stacked in the direction away from the substrate; the doping type of the first substrate doping layer is opposite to that of the second substrate doping layer; and the third functional layer and the anti-reflection layer are arranged on the light receiving surface and the backlight surface, the anti-reflection layer covers the third functional layer, and the third functional layer covers the first functional layer and the second functional layer on the backlight surface. Impurity sources deposited on the surfaces of p and n bordering regions are selectively removed, so that no impurity is diffused into the Poly layer and the substrate in the bordering regions.

Description

Technical Field

[0001] The present invention relates to the field of solar cells, and in particular to a back-contact solar cell structure, a preparation method and a cell assembly. Background Art

[0002] The current mainstream N-type cell technologies include TOPCon (Tunnel oxide passivated contact), HJT (Heterojunction) and IBC (Interdigitated back contact). Different from the traditional double-sided electrode contact cell, the biggest feature of the back contact (BC) cell is that there is no grid line blocking on the front side, so there are more incident photons, which can increase the short-circuit current density of the cell; there is no need to consider the front contact problem, and the light trapping and surface passivation performance of the front surface can be optimized to the greatest extent.

[0003] However, in order to solve the leakage problem of the border area between the p and n regions on the back of the current full back junction cell, it is usually necessary to selectively remove the border area with a laser, or selectively protect it with ink printing, and then perform wet etching. In order to completely remove the poly layer in the isolation area, the isolation area needs to be made into a velvet morphology, which will cause the passivation performance of the isolation area to be poor, which is not conducive to further improving the efficiency of the full back junction cell. Therefore, a new back contact solar cell structure is needed. Summary of the invention

[0004] The object of the present invention is to provide a back-contact solar cell and a method for preparing the same, which can prevent leakage of the p-n junction region of the back-contact solar cell and meet the passivation requirements.

[0005] In a first aspect, the present invention provides a back-contact solar cell, comprising: a substrate having a light-receiving surface and a backlight surface that are arranged opposite to each other;

[0006] The backlight surface includes a first polarity region and a second polarity region alternately arranged along a first direction;

[0007] The first polarity region includes a first substrate doping layer, a first functional layer, a second functional layer and a first electrode stacked in sequence in a direction away from the substrate; the second polarity region includes a second substrate doping layer, a second functional layer and a second electrode stacked in sequence in a direction away from the substrate; the doping type of the first substrate doping layer is opposite to the doping type of the second substrate doping layer;

[0008] The second functional layer includes a second passivation layer, a junction region passivation layer, a second doped semiconductor layer and a junction region doped semiconductor layer, the second doped semiconductor layer covers the second passivation layer, the junction region doped semiconductor layer covers the junction region passivation layer; the second passivation layer covers the second substrate doped layer;

[0009] The junction area passivation layer is connected to one end of the second passivation layer and extends away from the substrate, the junction area doped semiconductor layer is connected to one end of the second doped semiconductor layer and extends away from the substrate, and the junction area doped semiconductor layer covers the junction area passivation layer.

[0010] Furthermore, it also includes a third functional layer and an anti-reflection layer, and the third functional layer and the anti-reflection layer are provided on the light-receiving surface and the backlight surface; on the light-receiving surface, the third functional layer covers the light-receiving surface, and the anti-reflection layer covers the third functional layer; on the backlight surface, the third functional layer covers the second functional layer and the first functional layer.

[0011] Furthermore, the first functional layer includes a first passivation layer and a first doped semiconductor layer, the first doped semiconductor layer covers the first passivation layer, and the first passivation layer covers the first substrate doped layer.

[0012] Furthermore, the junction area passivation layer and the junction area doped semiconductor layer at least partially extend to a side of the first doped semiconductor layer away from the substrate, and an insulating layer is provided between the overlapping portion of the junction area passivation layer and the first doped semiconductor layer.

[0013] Furthermore, one end of the first electrode and the second electrode is placed on the anti-reflection layer and is higher than the anti-reflection layer, and the other end extends in a direction close to the substrate and contacts the first doped semiconductor layer and the second doped semiconductor layer respectively.

[0014] In a second aspect, the present invention provides a method for preparing a back-contact solar cell, comprising:

[0015] S100, forming a first substrate doping layer, a first functional layer and an insulating layer in sequence on the back side of the substrate, wherein the first functional layer completely covers the back side, the first substrate doping layer completely covers the first functional layer, and the insulating layer covers the first functional layer;

[0016] S200, performing patterning on the insulating layer, the first functional layer and the first substrate doping layer in the second polarity region to form a first opening;

[0017] S300, sequentially forming a second substrate doping layer and a second functional layer on the substrate after patterning;

[0018] S400, polishing and velveting the back side, and forming a velvet structure on the front side;

[0019] S500, sequentially preparing a third functional layer and an anti-reflection layer on the front side and the back side of the substrate in a direction away from the substrate;

[0020] S600: preparing an electrode structure.

[0021] Furthermore, the first functional layer and the second functional layer are prepared by low pressure chemical vapor deposition or plasma enhanced chemical vapor deposition.

[0022] Furthermore, the first opening exposes the back side of the substrate.

[0023] Furthermore, the substrate also includes a plurality of first polarity regions, and the first polarity regions are distributed at intervals from the second polarity regions.

[0024] Furthermore, the patterning process includes: removing the insulating layer or the insulating layer and part of the first functional layer in the first region by means of laser or printing mask layer, and then removing the remaining first functional layer and the first substrate doping layer in the first region by etching.

[0025] Furthermore, the doping type of the second substrate doping layer is opposite to that of the first substrate doping layer.

[0026] Furthermore, while executing the step S400, it also includes: removing the second functional layer and the insulating layer in the first region in the first polarity region to form a second opening, and the length of the first region is less than or equal to the length of the first polarity region.

[0027] In a third aspect, the present invention further provides a battery assembly, comprising a back-contact solar cell prepared by the preparation method as described in any one of the above items, or comprising a back-contact solar cell as described in any one of the above items.

[0028] Compared with the prior art, the present invention includes at least the following beneficial effects: by selectively removing the impurity sources deposited on the surface of the p and n bordering areas, no impurities diffuse into the Poly layer and the substrate in the bordering areas, and the boundary area is set as an intrinsic Poly layer, and there is no inner diffusion layer in this area, which replaces the previous direct overlap of the p and n type Poly, and there is no need for texturing and etching for isolation, thereby preventing leakage of the p and n bordering areas of the full back junction battery, and further improving the passivation effect of this area. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0030] Figure 1 A schematic diagram of a back contact solar cell structure according to an embodiment of the present invention;

[0031] Figure 2 for Figure 1 A partial enlarged view of part A;

[0032] Figure 3 A schematic diagram of a back contact solar cell structure according to another embodiment of the present invention;

[0033] Figure 4 It is a flow chart of a method for preparing a back contact solar cell according to one embodiment of the present invention;

[0034] Figure 5 It is a structural schematic diagram of sequentially forming a first substrate doping layer, a first functional layer and an insulating layer on the back side of a substrate in one embodiment of the present invention;

[0035] Figure 6 A schematic diagram of a structure in which the insulating layer, the first functional layer and the first substrate doping layer in the second polarity region are patterned to form a first opening in one embodiment of the present invention;

[0036] Figure 7 It is a structural schematic diagram of sequentially forming a second substrate doping layer and a second functional layer on a substrate after patterning in one embodiment of the present invention;

[0037] Figure 8 It is a structural schematic diagram of removing the second functional layer and the insulating layer in the first region within the first polarity region to form a second opening in one embodiment of the present invention;

[0038] Fig. 9 It is a schematic structural diagram of preparing a third functional layer and an anti-reflection layer in sequence on the front surface and the back surface of the substrate in a direction away from the substrate in one embodiment of the present invention;

[0039] Fig.10 Schematic diagram of preparing an electrode structure in one embodiment of the present invention.

[0040] Among them, 1-substrate; 2-second substrate doping layer; 31-second passivation layer; 32-junction area passivation layer; 41-second doped semiconductor layer; 42-junction area doped semiconductor layer; 5-first substrate doping layer; 6-first passivation layer; 7-first doped semiconductor layer; 8-insulating layer; 9-back third functional layer; 10-back anti-reflection layer; 11-front third functional layer; 12-front anti-reflection layer; 13-second electrode; 14-first electrode; S1-second polarity region; S2-first polarity region; O1-first opening; O2-second opening; O3-first width; O4-second width. DETAILED DESCRIPTION

[0041] A back contact solar cell structure, preparation method and cell assembly of the present invention will be described in more detail below in conjunction with schematic diagrams, wherein preferred embodiments of the present invention are shown, and it should be understood that those skilled in the art can modify the present invention described herein while still achieving the beneficial effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art and not as a limitation of the present invention.

[0042] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0043] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention.

[0044] The present invention provides a back contact solar cell, please refer to Figure 1 , comprising: a substrate 1, wherein the substrate 1 has a light-receiving surface and a backlight surface that are arranged oppositely;

[0045] The backlight surface includes first polarity regions S2 and second polarity regions S1 alternately arranged along a first direction;

[0046] The first polarity region S2 includes a first substrate doping layer 5, a first functional layer, a second functional layer and a first electrode 14 stacked in sequence in a direction away from the substrate 1; the second polarity region S1 includes a second substrate doping layer 2, a second functional layer and a second electrode 13 stacked in sequence in a direction away from the substrate 1; the doping type of the first substrate doping layer 5 is opposite to the doping type of the second substrate doping layer 2;

[0047] For details, please refer to Figure 1 and Figure 2 , the substrate 1 as the basis of the battery can be single crystal silicon, or it can be n-type or p-type doped. The light-receiving surface is the front of the battery, which is used to receive sunlight; the backlight surface is the back of the battery, which is used to connect the electrode and the functional layer. The backlight surface is alternately arranged with the first polarity area and the second polarity area, which correspond to different functions respectively. By arranging alternating different polarity areas on the backlight surface, it is helpful to optimize the transmission path of the charge carriers, reduce the carrier recombination, and thus improve the photoelectric conversion efficiency of the solar cell. Due to the optimized design of the doping layer, the anti-aging performance of the battery is improved, thereby extending the service life of the battery.

[0048] As for the first functional layer, the first functional layer includes a first passivation layer 6 and a first doped semiconductor layer 7 , the first doped semiconductor layer 7 covers the first passivation layer 6 , and the first passivation layer 6 covers the first substrate doping layer 5 .

[0049] Specifically, the first passivation layer 6 may be a tunneling oxide layer with a thickness of 0.5 nm-2 nm. Preferably, in the present embodiment, the thickness of the first passivation layer 6 is 1.3 nm. The first doped semiconductor layer 7 includes a doped polysilicon layer with a thickness of 10 nm-400 nm. Preferably, in the present embodiment, the thickness of the first doped semiconductor layer 7 is 400 nm. The doping type of the first doped semiconductor layer 7 is the same as the doping type of the second doped semiconductor layer.

[0050] The first passivation layer can effectively reduce the recombination of carriers between the semiconductor layer and the electrode, and improve the carrier transmission efficiency. The presence of the tunneling oxide layer helps to form a good band structure, so that electrons and holes can be effectively separated, thereby improving the efficiency of the battery. The first passivation layer covers the first substrate doping layer, which can reduce surface defect states, reduce surface recombination, and improve the long-term stability of the battery. The first doped semiconductor layer and the second doped semiconductor layer have the same doping type, which helps to maintain the uniformity of the electric field inside the entire battery, thereby optimizing the collection efficiency of charge carriers.

[0051] In a possible embodiment of the present invention, the second functional layer includes a second passivation layer 31, a junction area passivation layer 32, a second doped semiconductor layer 41 and a junction area doped semiconductor layer 42, the second doped semiconductor layer 41 covers the second passivation layer 31, the junction area doped semiconductor layer 42 covers the junction area passivation layer 32; the second passivation layer 31 covers the second substrate doping layer 2.

[0052] Specifically, the second passivation layer 31 and the junction passivation layer 32 include tunneling oxide, and the thickness thereof is 0.5nm-2nm. Preferably, in the present embodiment, the thickness of the second passivation layer 31 is 1.2nm, and the thickness of the junction passivation layer 32 is 1.3nm. The second doped semiconductor layer 41 includes a doped polysilicon layer, and the thickness thereof is 10nm-300nm, and the doping type thereof is the same as the doping type of the second doped layer 2; the junction doped semiconductor layer 42 includes intrinsic polysilicon, and the thickness thereof is 10nm-300nm. In the present embodiment, the thickness of the second doped semiconductor layer 41 is 120nm, and the thickness of the junction doped semiconductor layer 42 is 110nm.

[0053] The second passivation layer 31 and the boundary passivation layer 32 use tunneling oxide, which helps to reduce the recombination of carriers between the semiconductor layer and the electrode and improve the carrier transmission efficiency. The presence of the tunneling oxide layer helps to form a good energy band structure, so that electrons and holes can be effectively separated, thereby improving the efficiency of the battery.

[0054] In a possible embodiment of the present invention, the junction region passivation layer 32 is connected to one end of the second passivation layer 31 and extends downward (i.e., in a direction away from the substrate), the junction region doped semiconductor layer 42 is connected to one end of the second doped semiconductor layer 2 and extends downward (i.e., in a direction away from the substrate), and the junction region doped semiconductor layer 42 covers the junction region passivation layer 32. The junction region passivation layer 32 and the junction region doped semiconductor layer 42 are arranged in the horizontal direction as follows: Figure 1 As shown, the width of the first boundary region of the boundary region passivation layer 32 and the boundary region doped semiconductor layer 42 along the horizontal direction of the substrate is assumed to be a first width O3. In this embodiment, the width O3 is 10 μm-100 μm.

[0055] The extended design of the junction passivation layer 32 and the junction doped semiconductor layer 42 effectively forms an isolation barrier in the p-n border area, preventing illegal channels for carriers, thereby reducing the risk of leakage. By extending the junction passivation layer 32 and the junction doped semiconductor layer 42, it helps to maintain a uniform electric field distribution in the junction area and improve the collection efficiency of carriers. The extension of the junction passivation layer 32 provides additional surface passivation, reduces surface defects and carrier recombination, and improves the surface passivation performance of the battery.

[0056] Please refer to Figure 3 In a possible embodiment of the present invention, the junction region passivation layer 32 and the junction region doped semiconductor layer 42 at least partially extend to the side of the first doped semiconductor layer 7 away from the substrate, and an insulating layer 8 is provided between the overlapping portion of the junction region passivation layer 32 and the first doped semiconductor layer 7. Please refer to Figure 1 The width of the junction passivation layer 32 and the junction doped semiconductor layer 42 covering the first functional layer is set to O4, that is, the width of the overlapping part in the horizontal direction, which ranges from 0 to 100 μm. The insulating layer 8 includes at least one or more of phosphosilicate glass or borosilicate glass, silicon oxide, silicon nitride, and silicon oxynitride.

[0057] By extending the junction passivation layer 32 and the junction doped semiconductor layer 42 at least partially to the side of the first doped semiconductor layer 7 away from the substrate, and providing an insulating layer 8 between the overlapping parts, short circuits between layers of different potentials are effectively prevented. The introduction of the insulating layer 8 enhances the stability of the junction structure, reduces interlayer stress, and improves the overall mechanical strength of the battery. The insulating layer 8 and the junction passivation layer 32 work together to provide more effective surface passivation, reducing surface defects and carrier recombination.

[0058] Furthermore, the third functional layer and the anti-reflection layer are both provided on the light-receiving surface and the backlight surface; on the light-receiving surface, the third functional layer covers the light-receiving surface, and the anti-reflection layer covers the third functional layer; on the backlight surface, the third functional layer covers the second functional layer and the first functional layer.

[0059] For the third functional layer and the anti-reflection layer, please refer to Figure 1 The third functional layer and the anti-reflection layer are sequentially arranged along the front and back sides of the substrate in a direction away from the substrate. The third functional layer includes a back third functional layer 9 and a front third functional layer 11; the anti-reflection layer includes a back anti-reflection layer 10 and a front anti-reflection layer 12.

[0060] In this embodiment, the third functional layer is aluminum oxide with a thickness of 3nm-20nm; aluminum oxide as the third functional layer has good chemical stability and corrosion resistance, which helps to improve the long-term stability of the battery in harsh environments. The anti-reflection layer includes one or more of silicon oxide, silicon nitride, and silicon oxynitride, with a thickness of 40nm-100nm. The third functional layer can effectively enhance the battery's ability to absorb sunlight and reduce the reflection loss of light inside the battery. It helps to further optimize the electric field distribution inside the battery, improve the carrier collection efficiency, and thus improve the conversion efficiency of the battery.

[0061] Furthermore, the first electrode 14 and the second electrode 13 extend in a direction away from the substrate 1 and are higher than the third functional layer and the anti-reflection layer. The first electrode 14 and the second electrode 13 are respectively located in a direction away from the substrate 1 in the first polarity region S2 and the second polarity region S1, and the first electrode 14 and the second electrode 13 are prepared by screen printing silver paste, inkjet printing silver paste, electroplating, etc.

[0062] The first electrode 14 and the second electrode 13 extend in a direction away from the substrate 1 and are higher than the third functional layer and the anti-reflection layer. Such a design helps to improve the conductivity of the electrode, reduce the resistance, and thus improve the current output of the battery. The electrode is located on the semiconductor layer, which helps to optimize the contact interface between the electrode and the semiconductor layer, reduce the contact resistance, and improve the carrier collection efficiency.

[0063] In another embodiment of the present invention, a method for preparing a back contact solar cell is also provided. Figure 1-Figure 3 , Figure 4-Figure 10 include:

[0064] S100, forming a first substrate doping layer 5, a first functional layer and an insulating layer 8 in sequence on the back side of the substrate 1, wherein the first functional layer completely covers the back side, the first substrate doping layer 5 completely covers the first functional layer, and the insulating layer 8 covers the first functional layer;

[0065] S200, performing patterning on the insulating layer 8, the first functional layer and the first substrate doping layer 5 of the second polarity region S1 to form a first opening O1;

[0066] S300, sequentially forming a second substrate doping layer 2 and a second functional layer on the substrate after patterning;

[0067] S400, polishing and velveting the back side, and forming a velvet structure on the front side;

[0068] S500, sequentially preparing a third functional layer and an anti-reflection layer on the front side and the back side of the substrate in a direction away from the substrate;

[0069] S600: preparing an electrode structure.

[0070] like Figure 1 As shown, the back side of the substrate 1 is provided with a first polarity region S2 and a second polarity region S1 which are distributed at intervals. Before executing step S100, the front side and the back side of the substrate 1 are firstly polished.

[0071] For step S100, please refer to Figure 5A first passivation layer 6 and a first semiconductor layer are prepared on the back side of the substrate 1 by an LPCVD (low pressure chemical vapor deposition) process. For example, the first passivation layer may include a tunneling oxide with a thickness of 0.5-2 nm; the first semiconductor layer may be an intrinsic amorphous silicon layer or an intrinsic polycrystalline silicon layer.

[0072] Next, high temperature diffusion is used for doping and crystallization. During the doping process, the first semiconductor layer forms the first doped semiconductor layer 7, and at the same time, part of the doped ions enter the substrate 1 to form the first substrate doped layer 5. The first doped semiconductor layer 7 includes doped polysilicon with a thickness of 10nm-400nm; the first substrate doped layer 5 has a thickness of 5nm-200nm.

[0073] In addition, PECVD (plasma enhanced chemical vapor deposition) can also be used. On the back side of the substrate 1, a first passivation layer 6 and a first semiconductor layer are prepared by a PECVD process. For example, the first passivation layer may include a tunneling oxide with a thickness of 0.5 nm to 2 nm; the first semiconductor layer may be an amorphous silicon layer or a polycrystalline silicon layer.

[0074] Next, in-situ doping is adopted to form the first semiconductor layer into the first doped semiconductor layer 7 . Meanwhile, part of the doping ions enters into the substrate 1 to form the first substrate doping layer 5 .

[0075] Afterwards, high temperature annealing is performed for crystallization.

[0076] The first doped semiconductor layer 7 includes doped polysilicon with a thickness of 10-400 nm; the first substrate doped layer 5 has a thickness of 5 nm-200 nm.

[0077] Afterwards, the insulating layer 8 is formed on the first doped semiconductor layer 7. The insulating layer 8 includes at least one or more of phosphosilicate glass or borosilicate glass, silicon oxide, silicon nitride, and silicon oxynitride.

[0078] Next, for step S200, the patterning process includes: removing the insulating layer 8 or the insulating layer 8 and part of the first functional layer in the second polarity region S1 by means of laser or printing mask layer. Then, the remaining first functional layer and the first substrate doping layer 5 in the second polarity region S1 are removed by etching to form a first opening O1. In this embodiment, the etching adopts alkaline polishing etching to expose the substrate 1 in the first opening O1.

[0079] For step S300, please refer to Figure 7, an oxide layer and a second semiconductor layer may be formed by using a LPCVD (low pressure chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition) process, wherein the oxide layer includes a first portion covering the substrate 1 exposed by the first opening O1, a second portion covering the insulating layer 8, and a third portion connecting the first portion and the second portion, and the first portion is the second passivation layer 31. The second semiconductor layer covers the oxide layer.

[0080] In this step S300 , the second semiconductor layer may be formed in a manner similar to step S100 .

[0081] Next, an impurity source film layer is deposited on a surface away from the substrate using CVD, such as APCVD, and the impurity source on the surface of the first polarity region S2 is removed using a laser or a printed mask layer. The impurities are diffused into the second functional layer and the substrate 1 exposed by the first opening O1 at high temperature to form a second substrate doping layer 2 and a second doped semiconductor layer 41, and the doping type is opposite to that of the first functional layer.

[0082] Afterwards, please refer to Figure 8 As shown, the second semiconductor layer, the second portion of the oxide layer and the insulating layer 8 in the first region of the first polarity region S2 are removed to form a second opening O2, and the length of the first region is less than or equal to the length of the first polarity region S2. In the embodiment of the present invention, the removal is performed by laser or printing mask layer.

[0083] After the second opening O2 is formed, the remaining second semiconductor layer forms the interface doped semiconductor layer 42 , and the remaining second portion and third portion of the oxide layer form the interface passivation layer 32 .

[0084] Please refer to Figure 1 This is an embodiment in which the length of the first region is smaller than the length of the first polarity region S2. At this time, the second functional layer and the insulating layer 8 of the second width O4 are retained at both ends of the first region. The width range of the second width O4 is less than 100 μm. In this embodiment, the second width O4 is preferably 30 μm. Figure 3 This is an embodiment in which the length of the first region is equal to the length of the first polarity region S2 , that is, the width of the second width O4 is equal to 0.

[0085] In step S400, the back surface is polished and textured, and a textured structure is formed on the front surface. The textured process can adopt the existing technology, which will not be described in detail in the present invention.

[0086] For step S500, please refer to Fig. 9As shown, the third functional layer is prepared by atomic layer deposition (ALD). Specifically, aluminum oxide with a thickness of 3nm-20nm is formed on two opposite surfaces of the substrate 1 to obtain the back third functional layer 9 and the front third functional layer 11.

[0087] The back third functional layer 9 covers the second doped semiconductor layer 41 , and the front third functional layer 11 covers the front side of the substrate 1 .

[0088] Afterwards, the anti-reflection layer is prepared by deposition using CVD such as PECVD. Specifically, one or more of silicon oxide, silicon nitride, and silicon oxynitride with a thickness of 40nm-100nm are formed on two opposite surfaces of the substrate 1 to obtain a back anti-reflection layer 10 and a front anti-reflection layer 12.

[0089] The back anti-reflection layer 10 covers the back third functional layer 9 , and the front anti-reflection layer 12 covers the front third functional layer 11 .

[0090] Then, step S600 is performed, referring to Fig.10 As shown, a first electrode 14 and a second electrode 13 are formed. The electrode preparation methods include screen printing silver paste, inkjet printing silver paste, electroplating, etc.

[0091] After the above steps, the back contact solar cell of the present invention can be obtained, and its structure is as follows: Figure 1 or Figure 3 shown.

[0092] In another embodiment of the present invention, the present invention also provides a battery assembly, comprising a back-contact solar cell prepared according to the preparation method as described in any of the above items, and / or, comprising a back-contact solar cell according to any of the above items.

[0093] In summary, surface treatment is performed on the border area between p-type and n-type semiconductors to effectively remove the impurity source deposited in the area. It ensures that impurities do not diffuse into the poly layer and deeper substrate materials, thereby forming a highly pure intrinsic poly layer at the junction of p-type and n-type materials. The formation of the inner diffusion layer is avoided in the specific junction area, improving the stability and performance of the device. It effectively solves the leakage problem that may occur in the p-n junction area of ​​the full back junction battery. Optimizing the passivation effect of the junction area helps to reduce the performance degradation of the battery during long-term use and extend the service life of the battery.

[0094] The above specific examples are used to illustrate the present invention, which is only used to help understand the present invention and is not intended to limit the present invention. For those skilled in the art, according to the concept of the present invention, some simple deductions, modifications or substitutions can be made.

Claims

1. A back contact solar cell, characterized in that: The invention comprises: a substrate having a light-receiving surface and a backlight surface which are arranged opposite to each other; The backlight surface includes a first polarity region and a second polarity region alternately arranged along a first direction; The first polarity region includes a first substrate doping layer, a first functional layer, a second functional layer and a first electrode stacked in sequence in a direction away from the substrate; the second polarity region includes a second substrate doping layer, a second functional layer and a second electrode stacked in sequence in a direction away from the substrate; the doping type of the first substrate doping layer is opposite to the doping type of the second substrate doping layer; The second functional layer includes a second passivation layer, a junction region passivation layer, a second doped semiconductor layer and a junction region doped semiconductor layer, the second doped semiconductor layer covers the second passivation layer, and the junction region doped semiconductor layer covers the junction region passivation layer; The second passivation layer covers the second substrate doping layer; The junction area passivation layer is connected to one end of the second passivation layer and extends away from the substrate, the junction area doped semiconductor layer is connected to one end of the second doped semiconductor layer and extends away from the substrate, and the junction area doped semiconductor layer covers the junction area passivation layer.

2. The back contact solar cell according to claim 1, characterized in that It also includes a third functional layer and an anti-reflection layer, and the third functional layer and the anti-reflection layer are provided on the light-receiving surface and the backlight surface; on the light-receiving surface, the third functional layer covers the light-receiving surface, and the anti-reflection layer covers the third functional layer; on the backlight surface, the third functional layer covers the second functional layer and the first functional layer.

3. The back contact solar cell according to claim 1, characterized in that The first functional layer includes a first passivation layer and a first doped semiconductor layer, the first doped semiconductor layer covers the first passivation layer, and the first passivation layer covers the first substrate doped layer.

4. The back contact solar cell according to claim 1, characterized in that: The junction area passivation layer and the junction area doped semiconductor layer at least partially extend to a side of the first doped semiconductor layer away from the substrate, and an insulating layer is provided between the overlapping portion of the junction area passivation layer and the first doped semiconductor layer.

5. The back contact solar cell according to claim 1, wherein: One end of the first electrode and the second electrode is placed on the anti-reflection layer and is higher than the anti-reflection layer, and the other end extends in a direction close to the substrate and contacts the first doped semiconductor layer and the second doped semiconductor layer respectively.

6. A method for preparing a back contact solar cell, characterized in that: include: S100, sequentially forming a first substrate doping layer, a first functional layer and an insulating layer on the back side of the substrate, wherein the first functional layer covers the back side, the first substrate doping layer completely covers the first functional layer, and the insulating layer covers the first functional layer; S200, performing patterning on the insulating layer, the first functional layer and the first substrate doping layer in the second polarity region to form a first opening; S300, sequentially forming a second substrate doping layer and a second functional layer on the substrate after patterning; S400, polishing and velveting the back side, and forming a velvet structure on the front side; S500, sequentially preparing a third functional layer and an anti-reflection layer on the front side and the back side of the substrate in a direction away from the substrate; S600: preparing an electrode structure.

7. The method for preparing a back contact solar cell according to claim 6, characterized in that: The first functional layer and the second functional layer are prepared by low pressure chemical vapor deposition or plasma enhanced chemical vapor deposition.

8. The method for preparing a back contact solar cell according to claim 6, characterized in that: The first opening exposes a back side of the substrate.

9. The method for preparing a back contact solar cell according to claim 6, characterized in that: The substrate further includes a plurality of first polarity regions, and the first polarity regions are distributed at intervals from the second polarity regions.

10. The method for preparing a back contact solar cell according to claim 6, characterized in that: The patterning process includes: removing the insulating layer or the insulating layer and part of the first functional layer in the first region by laser or printing mask layer, and then removing the remaining first functional layer and the first substrate doping layer in the first region by etching.

11. The method for preparing a back contact solar cell according to claim 6, characterized in that: The second substrate doping layer has a doping type opposite to that of the first substrate doping layer.

12. The method for preparing a back contact solar cell according to claim 6, wherein: Before executing the step S400, the method further includes: removing the second functional layer and the insulating layer in the first region of the first polarity zone to form a second opening, and the length of the first region is less than or equal to the length of the first polarity zone.

13. A battery assembly, characterized in that: A back-contact solar cell comprising the back-contact solar cell according to any one of claims 1-5, and / or a back-contact solar cell prepared by the preparation method according to any one of claims 6-12.

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