Laminated ceramic electronic component

Abstract

The invention provides a laminated ceramic electronic capacitor with high crack resistance. A multilayer ceramic capacitor (1) according to the present invention is provided with: a laminate (10); and a first external electrode (40A) and a second external electrode (40B) which are disposed separately from each other at both end portions in the longitudinal direction (L) of the laminated body (10), the first external electrode (40A) including a first base electrode layer (50A) and the second external electrode (40B) including a second base electrode layer (50B), the first base electrode layer (50A) and the second base electrode layer (50B) having a metal portion (70) and a plurality of non-metal portions (80) present in the metal portion (70), in a cross-sectional view perpendicular to the width direction (W), the average area of a non-metal part (80) having a circularity of 0.4 or less in a first body is 10 [mu] m2 or more, and in the cross-sectional view perpendicular to the width direction (W), the ratio of the non-metal part (80) present in the first base electrode layer (50A) and the second base electrode layer (50B) is 8.2% or more.

Description

Technical Field

[0001] The present invention relates to a laminated ceramic electronic component. Background Art

[0002] In the past, a laminated ceramic capacitor is known as a laminated ceramic electronic component. Generally, a laminated ceramic capacitor includes: a laminated body in which a plurality of dielectric layers and internal electrode layers are alternately laminated; and external electrodes provided on both end surfaces of the laminated body. For example, Patent Document 1 discloses a laminated ceramic capacitor having the above-mentioned structure, wherein the external electrode includes a base electrode layer formed by sintering.

[0003] Prior Art Literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2003-243249 Summary of the invention

[0006] Problem that the invention aims to solve

[0007] Here, in the multilayer ceramic capacitor described in Patent Document 1, the external electrode (external electrode layer) has a function of preventing moisture from penetrating from the outside to the end surface of the multilayer body in addition to being electrically connected to the internal electrode (internal electrode layer). On the other hand, due to the force applied to the external electrode, cracks may be generated in the multilayer body of the multilayer ceramic capacitor.

[0008] Therefore, an object of the present invention is to provide a multilayer ceramic electronic component having high crack resistance.

[0009] Technical solutions to solve problems

[0010] The laminated ceramic electronic component of the present invention comprises: a laminated body comprising a plurality of ceramic layers and a plurality of internal conductor layers alternately laminated in a lamination direction, and comprising a first main surface and a second main surface opposite to each other in the lamination direction, a first end surface and a second end surface opposite to each other in a length direction perpendicular to the lamination direction, and a first side surface and a second side surface opposite to each other in a width direction perpendicular to the lamination direction and the length direction; and a pair of external electrodes, which are separately arranged at both ends of the lamination body in the length direction, the internal conductor layers comprising: a first internal conductor layer, which leads to The first end face; and a second internal conductor layer, led out to the second end face, the external electrode comprising: a first external electrode, including a first base electrode layer connected to the first internal conductor layer; and a second external electrode, including a second base electrode layer connected to the second internal conductor layer, wherein the first base electrode layer and the second base electrode layer have a metal portion and a plurality of non-metal portions present in the metal portion, and in a cross-section perpendicular to the width direction, the average area of ​​the non-metal portions in the first group consisting of the non-metal portions with a circularity of less than 0.4 is 10 μm 2 As described above, in the cross-section viewed perpendicularly to the width direction, the existence ratio of the non-metal portion in the first foundation electrode layer and the second foundation electrode layer is 8.2% or more.

[0011] Effects of the Invention

[0012] According to the present invention, a multilayer ceramic electronic component having high crack resistance can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a perspective view of the appearance of a multilayer ceramic capacitor according to an embodiment.

[0014] Figure 2 yes Figure 1 II-II sectional view.

[0015] Figure 3 yes Figure 2 III-III sectional view.

[0016] Figure 4A yes Figure 2 IVA-IVA cross-sectional view.

[0017] Figure 4B yes Figure 2 IVB-IVB cross-sectional view.

[0018] Figure 5 yes Figure 2 An enlarged cross-sectional view of the portion shown in R1 based on a SEM photograph.

[0019] Figure 6 This is a diagram showing an example of a non-metallic portion having a relatively low circularity.

[0020] Fig. 7A FIG. 1 is a diagram showing a two-layer structured multilayer ceramic capacitor.

[0021] Figure 7B FIG. 1 is a diagram showing a triple-structured multilayer ceramic capacitor.

[0022] Figure 7C FIG. 1 is a diagram showing a quadruple-structured multilayer ceramic capacitor.

[0023] Figure 8 It is a schematic diagram for explaining the weight drop test in the example. DETAILED DESCRIPTION

[0024] Hereinafter, a multilayer ceramic capacitor 1 as a multilayer ceramic electronic component according to an embodiment of the present disclosure will be described with reference to the drawings. Figure 1 It is a perspective view of the appearance of a multilayer ceramic capacitor 1 according to the embodiment. Figure 2 yes Figure 1 II-II sectional view. Figure 3 yes Figure 2 III-III sectional view. Figure 4A yes Figure 2 IVA-IVA cross-sectional view. Figure 4B yes Figure 2 IVB-IVB cross-sectional view.

[0025] like Figure 1 As shown, the multilayer ceramic capacitor 1 according to the embodiment has a substantially rectangular parallelepiped shape. The multilayer ceramic capacitor 1 includes a multilayer body 10 having a substantially rectangular parallelepiped shape and a pair of external electrodes 40 disposed at both ends of the multilayer body 10 so as to be separated from each other.

[0026] exist Figure 1 In FIG. 1 , arrow T indicates the stacking direction of the multilayer ceramic capacitor 1 and the multilayer body 10. The stacking direction T is also the thickness direction and height direction of the multilayer ceramic capacitor 1 and the multilayer body 10. Figure 1 In FIG. 1 , arrow L indicates the longitudinal direction of the laminated ceramic capacitor 1 and the laminated body 10 that is orthogonal to the lamination direction T. Figure 1 In FIG. 1 , arrow W indicates the width direction of the multilayer ceramic capacitor 1 and the laminate 10 , which is perpendicular to the lamination direction T and the longitudinal direction L. The pair of external electrodes 40 are respectively arranged at one end and the other end in the longitudinal direction L of the laminate 10 .

[0027] exist Figure 1 to Figure 4B, an XYZ orthogonal coordinate system is shown. The length direction L of the laminated ceramic capacitor 1 and the laminated body 10 corresponds to the X direction. The width direction W of the laminated ceramic capacitor 1 and the laminated body 10 corresponds to the Y direction. The stacking direction T of the laminated ceramic capacitor 1 and the laminated body 10 corresponds to the Z direction. Here, Figure 2 The section shown is also referred to as the LT section. Figure 3 The section shown is also referred to as the WT section. Figure 4A as well as Figure 4B The section shown is also referred to as the LW section.

[0028] like Figure 1 to Figure 4B As shown, the stack 10 includes a first main surface TS1 and a second main surface TS2 opposite to each other in the stacking direction T, a first end surface LS1 and a second end surface LS2 opposite to each other in the length direction L orthogonal to the stacking direction T, and a first side surface WS1 and a second side surface WS2 opposite to each other in the width direction W orthogonal to the stacking direction T and the length direction L.

[0029] like Figure 1 As shown, the stack 10 has a substantially rectangular parallelepiped shape. In addition, the dimension in the length direction L of the stack 10 is not necessarily longer than the dimension in the width direction W. It is preferred that the corners and ridges of the stack 10 are rounded. The corner is the portion where three faces of the stack intersect, and the ridge is the portion where two faces of the stack intersect. In addition, a part or all of the surface constituting the stack 10 may be formed with concave and convex portions.

[0030] The size of the laminate 10 is not particularly limited. If the size in the longitudinal direction L of the laminate 10 is set as the L size, the L size is preferably 0.2 mm or more and 6 mm or less. In addition, if the size in the stacking direction T of the laminate 10 is set as the T size, the T size is preferably 0.05 mm or more and 5 mm or less. In addition, if the size in the width direction W of the laminate 10 is set as the W size, the W size is preferably 0.1 mm or more and 5 mm or less.

[0031] like Figure 2 as well as Figure 3 As shown, the laminated body 10 includes an inner layer portion 11 , and a first main surface side outer layer portion 12 and a second main surface side outer layer portion 13 arranged in the lamination direction T so as to sandwich the inner layer portion 11 .

[0032] The inner layer portion 11 includes a plurality of dielectric layers 20 as a plurality of ceramic layers and a plurality of internal electrode layers 30 as a plurality of internal conductor layers alternately stacked in the stacking direction T. The inner layer portion 11 includes the internal electrode layer 30 located closest to the first main surface TS1 side to the internal electrode layer 30 located closest to the second main surface TS2 side in the stacking direction T. In the inner layer portion 11, the plurality of internal electrode layers 30 are arranged opposite to each other with the dielectric layer 20 interposed therebetween. The inner layer portion 11 is a portion that generates electrostatic capacitance and substantially functions as a capacitor.

[0033] The plurality of dielectric layers 20 are made of dielectric material. The dielectric material may be, for example, a dielectric ceramic containing BaTiO3, CaTiO3, SrTiO3, or CaZrO3. In addition, the dielectric material may be a material in which a secondary component such as a Mn compound, a Fe compound, a Cr compound, a Co compound, or a Ni compound is added to these main components. The dielectric material is preferably a material containing BaTiO3 as a main component.

[0034] The thickness of the dielectric layer 20 is preferably 0.2 μm or more and 10 μm or less. The number of laminated dielectric layers 20 is preferably 15 or more and 1200 or less. The number of dielectric layers 20 is the sum of the number of dielectric layers 20 of the inner layer portion 11 and the number of dielectric layers 20 of the first main surface side outer layer portion 12 and the second main surface side outer layer portion 13.

[0035] The plurality of internal electrode layers 30 include a plurality of first internal electrode layers 31 as a plurality of first internal conductor layers and a plurality of second internal electrode layers 32 as a plurality of second internal conductor layers. The first internal electrode layers 31 and the second internal electrode layers 32 are alternately arranged in the stacking direction T with the dielectric layer 20 sandwiched therebetween. The first internal electrode layers 31 are led out to the first end surface LS1. The second internal electrode layers 32 are led out to the second end surface LS2. In the following, when the first internal electrode layers 31 and the second internal electrode layers 32 are not required to be distinguished, the first internal electrode layers 31 and the second internal electrode layers 32 are sometimes collectively referred to as the internal electrode layers 30.

[0036] like Figure 4A As shown, the first internal electrode layer 31 includes a first opposing portion 31A and a first lead portion 31B. The first opposing portion 31A is a region that is opposed to the second internal electrode layer 32 with the dielectric layer 20 interposed therebetween, and is located inside the laminate 10. The first lead portion 31B is a portion that is led from the first opposing portion 31A toward the first end surface LS1, and is exposed at the first end surface LS1.

[0037] like Figure 4BAs shown, the second internal electrode layer 32 has a second opposing portion 32A and a second lead portion 32B. The second opposing portion 32A is a region that is opposed to the first internal electrode layer 31 with the dielectric layer 20 interposed therebetween, and is located inside the laminate 10. The second lead portion 32B is a portion that is led out from the second opposing portion 32A toward the second end surface LS2, and is exposed at the second end surface LS2.

[0038] In the present embodiment, the first opposing portion 31A and the second opposing portion 32A face each other via the dielectric layer 20 , thereby forming capacitance and exhibiting capacitor characteristics.

[0039] The shapes of the first opposing portion 31A and the second opposing portion 32A are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded, or the corners of the rectangular shape may be formed obliquely. The shapes of the first lead-out portion 31B and the second lead-out portion 32B are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded, or the corners of the rectangular shape may be formed obliquely.

[0040] The dimension of the first opposing portion 31A in the width direction W and the dimension of the first lead portion 31B in the width direction W may be formed to be the same dimension, or one of the dimensions may be formed to be smaller. The dimension of the second opposing portion 32A in the width direction W and the dimension of the second lead portion 32B in the width direction W may be formed to be the same dimension, or one of the dimensions may be formed to be smaller.

[0041] The first internal electrode layer 31 and the second internal electrode layer 32 are made of a suitable conductive material such as a metal such as Ni, Cu, Ag, Pd, Au, or an alloy containing at least one of these metals. When an alloy is used, the first internal electrode layer 31 and the second internal electrode layer 32 may be made of, for example, an Ag-Pd alloy.

[0042] The thickness of each of the first internal electrode layer 31 and the second internal electrode layer 32 is preferably, for example, 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 31 and the second internal electrode layers 32 is preferably 15 or more and 1000 or less.

[0043] like Figure 2 as well as Figure 3As shown, the first main surface side outer layer portion 12 is located on the first main surface TS1 side of the stack 10. The first main surface side outer layer portion 12 is a collection of multiple dielectric layers 20 located between the first main surface TS1 and the internal electrode layer 30 closest to the first main surface TS1. On the other hand, the second main surface side outer layer portion 13 is located on the second main surface TS2 side of the stack 10. The second main surface side outer layer portion 13 is a collection of multiple dielectric layers 20 located between the second main surface TS2 and the internal electrode layer 30 closest to the second main surface TS2. The dielectric layers 20 used in the first main surface side outer layer portion 12 and the second main surface side outer layer portion 13 may be the same as the dielectric layers 20 used in the inner layer portion 11.

[0044] The laminate 10 also includes an opposing electrode portion 11E. The opposing electrode portion 11E is a portion where the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 face each other. The opposing electrode portion 11E is configured as a part of the inner layer portion 11. Figure 4A as well as Figure 4B , the range of the opposing electrode portion 11E in the width direction W and the length direction L is shown. In addition, the opposing electrode portion 11E is also referred to as a capacitor effective portion.

[0045] In addition, the stacked body 10 has a side outer layer portion. The side outer layer portion has a first side outer layer portion WG1 and a second side outer layer portion WG2. The first side outer layer portion WG1 is a portion including the dielectric layer 20 located between the opposing electrode portion 11E and the first side WS1. The second side outer layer portion WG2 is a portion including the dielectric layer 20 located between the opposing electrode portion 11E and the second side WS2. Figure 3 , Figure 4A as well as Figure 4B , the range of the first side outer layer portion WG1 and the second side outer layer portion WG2 in the width direction W is shown. In addition, the side outer layer portion is also called a W interval or a side interval.

[0046] In addition, the stacked body 10 has an end face side outer layer portion. The end face side outer layer portion has a first end face side outer layer portion LG1 and a second end face side outer layer portion LG2. The first end face side outer layer portion LG1 is a portion including the dielectric layer 20 and the first lead portion 31B located between the opposing electrode portion 11E and the first end face LS1. That is, the first end face side outer layer portion LG1 is a collection of portions of the plurality of dielectric layers 20 on the first end face LS1 side and the plurality of first lead portions 31B. The second end face side outer layer portion LG2 is a portion including the dielectric layer 20 and the second lead portion 32B located between the opposing electrode portion 11E and the second end face LS2. That is, the second end face side outer layer portion LG2 is a collection of portions of the plurality of dielectric layers 20 on the second end face LS2 side and the plurality of second lead portions 32B. Figure 2 , Figure 4A as well as Figure 4B , the range of the first end surface side outer layer portion LG1 and the second end surface side outer layer portion LG2 in the length direction L is shown. In addition, the end surface side outer layer portion is also referred to as an L interval or an end interval.

[0047] like Figure 1 as well as Figure 2 As shown, the external electrode 40 includes a first external electrode 40A disposed on the first end surface LS1 side of the stacked body 10 and a second external electrode 40B disposed on the second end surface LS2 side of the stacked body 10 .

[0048] The first external electrode 40A and the second external electrode 40B have the same basic structure. The first external electrode 40A and the second external electrode 40B have shapes that are substantially plane-symmetrical with respect to the WT cross section at the center in the longitudinal direction L of the multilayer ceramic capacitor 1. Therefore, in the following description, when there is no need to distinguish between the first external electrode 40A and the second external electrode 40B, the first external electrode 40A and the second external electrode 40B are sometimes collectively referred to as the external electrode 40.

[0049] The first external electrode 40A is arranged on the first end surface LS1. The first external electrode 40A contacts the first lead portion 31B of each of the plurality of first internal electrode layers 31 exposed on the first end surface LS1. Thus, the first external electrode 40A is electrically connected to the plurality of first internal electrode layers 31. The first external electrode 40A may also be arranged on a portion of the first main surface TS1 and a portion of the second main surface TS2 and a portion of the first side surface WS1 and a portion of the second side surface WS2. In the present embodiment, the first external electrode 40A is formed to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2 and a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0050] The second external electrode 40B is arranged on the second end surface LS2. The second external electrode 40B contacts the second lead-out portion 32B of each of the plurality of second internal electrode layers 32 exposed on the second end surface LS2. Thus, the second external electrode 40B is electrically connected to the plurality of second internal electrode layers 32. The second external electrode 40B may also be arranged on a portion of the first main surface TS1 and a portion of the second main surface TS2 and a portion of the first side surface WS1 and a portion of the second side surface WS2. In the present embodiment, the second external electrode 40B is formed to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2 and a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0051] As described above, in the laminate 10, the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 are opposed to each other via the dielectric layer 20, thereby forming a capacitor. Therefore, between the first external electrode 40A connected to the first internal electrode layer 31 and the second external electrode 40B connected to the second internal electrode layer 32, the characteristics of a capacitor are exhibited.

[0052] like Figure 2 , Figure 4A as well as Figure 4B As shown, the first external electrode 40A includes a first foundation electrode layer 50A and a first plating layer 60A disposed on the first foundation electrode layer 50A. In addition, the second external electrode 40B includes a second foundation electrode layer 50B and a second plating layer 60B disposed on the second foundation electrode layer 50B.

[0053] The first base electrode layer 50A is arranged on the first end surface LS1. The first base electrode layer 50A is connected to the first lead portion 31B of each of the plurality of first internal electrode layers 31 exposed on the first end surface LS1. In the present embodiment, the first base electrode layer 50A is formed to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2 and a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0054] The second base electrode layer 50B is arranged on the second end surface LS2. The second base electrode layer 50B contacts the second lead-out portion 32B of each of the plurality of second internal electrode layers 32 exposed on the second end surface LS2. In the present embodiment, the second base electrode layer 50B is formed to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, a portion of the first side surface WS1, and a portion of the second side surface WS2.

[0055] The first base electrode layer 50A and the second base electrode layer 50B of the present embodiment are sintered layers. The sintered layer preferably contains any one of a metal component and a glass component or a ceramic component, or contains both of them. The metal component, for example, contains at least one selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The glass component, for example, contains at least one selected from B, Si, Ba, Mg, Al, Li, etc. The ceramic component can use the same type of ceramic material as the dielectric layer 20, or a ceramic material of a different type from the dielectric layer 20. The ceramic component, for example, contains at least one selected from BaTiO3, CaTiO3, (Ba, Ca)TiO3, SrTiO3, CaZrO3, etc.

[0056] The sintered layer is, for example, a sintered layer obtained by applying a conductive paste containing glass and metal to the stack 10 and sintering it. The sintered layer can be formed by simultaneously sintering a pre-sintered stacked chip as a raw material of the stack 10 having a plurality of internal electrodes and a dielectric layer and a conductive paste applied to the stacked chip. Alternatively, it can also be formed by applying a conductive paste to the stack 10 and sintering it after the stack 10 is obtained by sintering the stacked chip. In addition, in the case of the above-mentioned structure, the sintered layer is preferably formed by sintering a paste to which a ceramic material is added instead of a glass component. In this case, as the added ceramic material, it is particularly preferred to use a ceramic material of the same type as the dielectric layer 20. In addition, the sintered layer can also be a plurality of layers.

[0057] The thickness of the first foundation electrode layer 50A located on the first end surface LS1 in the longitudinal direction L is preferably about 10 μm or more and 200 μm or less in the central portion in the stacking direction T and the width direction W of the first foundation electrode layer 50A, for example.

[0058] The thickness of the second foundation electrode layer 50B located on the second end surface LS2 in the longitudinal direction L is preferably about 10 μm or more and 200 μm or less in the central portion in the stacking direction T and the width direction W of the second foundation electrode layer 50B, for example.

[0059] When the first base electrode layer 50A is also provided on a portion of at least one of the first main surface TS1 or the second main surface TS2, the thickness of the first base electrode layer 50A provided on the portion corresponding to the stacking direction T is preferably, for example, greater than 3 μm and less than 40 μm in the central portion in the length direction L and the width direction W of the first base electrode layer 50A provided on the portion.

[0060] When the first base electrode layer 50A is also provided on a portion of at least one surface of the first side surface WS1 or the second side surface WS2, the thickness of the first base electrode layer 50A provided on the portion corresponding to the width direction W is preferably, for example, greater than 3 μm and less than 40 μm in the central portion in the length direction L and the stacking direction T of the first base electrode layer 50A provided on the portion.

[0061] When a second base electrode layer 50B is also provided on a portion of at least one of the first main surface TS1 or the second main surface TS2, the thickness of the second base electrode layer 50B provided on the portion corresponding to the stacking direction T is preferably, for example, greater than 3 μm and less than 40 μm in the central portion in the length direction L and the width direction W of the second base electrode layer 50B provided on the portion.

[0062] When the second base electrode layer 50B is also provided on a portion of at least one surface of the first side surface WS1 or the second side surface WS2, the thickness of the second base electrode layer 50B provided on the portion corresponding to the width direction W is preferably, for example, greater than 3 μm and less than 40 μm in the central portion in the length direction L and the stacking direction T of the second base electrode layer 50B provided on the portion.

[0063] The first plating layer 60A is arranged to cover the first foundation electrode layer 50A.

[0064] The second plating layer 60B is arranged to cover the second base electrode layer 50B.

[0065] The first plating layer 60A and the second plating layer 60B may include, for example, at least one selected from Cu, Ni, Sn, Ag, Pd, Ag-Pd alloy, Au, etc. The first plating layer 60A and the second plating layer 60B may also be formed of a plurality of layers. The first plating layer 60A and the second plating layer 60B are preferably a two-layer structure in which a Sn plating layer is formed on a Ni plating layer.

[0066] The first plating layer 60A is disposed so as to cover the first base electrode layer 50A. In the present embodiment, the first plating layer 60A includes a first Ni plating layer 61A and a first Sn plating layer 62A located on the first Ni plating layer 61A.

[0067] The second plating layer 60B is arranged to cover the second base electrode layer 50B. In the present embodiment, the second plating layer 60B includes a second Ni plating layer 61B and a second Sn plating layer 62B located on the second Ni plating layer 61B.

[0068] The Ni plating layer prevents the first base electrode layer 50A and the second base electrode layer 50B from being corroded by the solder when the multilayer ceramic capacitor 1 is mounted. In addition, the Sn plating layer improves the wettability of the solder when the multilayer ceramic capacitor 1 is mounted. Thus, the mounting of the multilayer ceramic capacitor 1 becomes easy. The thickness of each of the first Ni plating layer 61A, the first Sn plating layer 62A, the second Ni plating layer 61B, and the second Sn plating layer 62B is preferably 2 μm or more and 10 μm or less.

[0069] In addition, the external electrode 40 of the present embodiment may also include, for example, a conductive resin layer containing conductive particles and a thermosetting resin. The conductive resin layer may also be configured to cover the sintered layer. When the conductive resin layer is configured to cover the sintered layer, the conductive resin layer is configured between the sintered layer and the plating layer (the first plating layer 60A, the second plating layer 60B). The conductive resin layer may completely cover the sintered layer or may cover a portion of the sintered layer.

[0070] The conductive resin layer containing a thermosetting resin is more flexible than a conductive layer composed of, for example, a plated film or a sintered product of a conductive paste. Therefore, even when a physical impact or an impact caused by a thermal cycle is applied to the multilayer ceramic capacitor 1, the conductive resin layer functions as a buffer layer. Therefore, the conductive resin layer suppresses the occurrence of cracks in the multilayer ceramic capacitor 1.

[0071] The metal constituting the conductive particles may also be Ag, Cu, Ni, Sn, Bi or an alloy containing them. The conductive particles preferably contain Ag. The conductive particles are, for example, Ag metal powder. Ag has the lowest specific resistance among metals and is therefore suitable for electrode materials. In addition, Ag is a noble metal and is therefore not easily oxidized and has high weather resistance. Therefore, Ag metal powder is suitable as the conductive particles.

[0072] In addition, the conductive particles may also be metal powders coated with Ag on the surface. When using metal powders coated with Ag on the surface of the metal powders, the metal powders are preferably Cu, Ni, Sn, Bi or alloy powders thereof. In order to make the metal of the base material a cheap metal while maintaining the characteristics of Ag, it is preferred to use metal powders coated with Ag.

[0073] Furthermore, the conductive particles may be conductive particles in which Cu and Ni have been subjected to an oxidation prevention treatment. In addition, the conductive particles may be metal powders in which Sn, Ni, and Cu are coated on the surface of the metal powder. When using metal powders in which Sn, Ni, and Cu are coated on the surface of the metal powder, the metal powder is preferably Ag, Cu, Ni, Sn, Bi, or alloy powders thereof.

[0074] The shape of the conductive particles is not particularly limited. The conductive particles may be spherical, flat, or other shapes, but preferably, a mixture of spherical metal powder and flat metal powder is used.

[0075] The conductive particles contained in the conductive resin layer mainly play a role in ensuring the conductivity of the conductive resin layer. Specifically, a plurality of conductive particles are in contact with each other, thereby forming a conductive path inside the conductive resin layer.

[0076] The resin constituting the conductive resin layer may also include at least one selected from various known thermosetting resins such as epoxy resin, phenolic resin, urethane resin, silicone resin, polyimide resin, etc. Among them, epoxy resin with excellent heat resistance, moisture resistance, adhesion, etc. is one of the most suitable resins. In addition, the resin of the conductive resin layer preferably contains a curing agent together with the thermosetting resin. When epoxy resin is used as the base resin, the curing agent of the epoxy resin may also be various known compounds such as phenols, amines, acid anhydrides, imidazoles, active esters, and amide-imides.

[0077] In addition, the conductive resin layer may be formed of a plurality of layers. The thickness of the thickest portion of the conductive resin layer is preferably 10 μm or more and 150 μm or less.

[0078] The above is the basic structure of the multilayer ceramic capacitor 1 involved in the embodiment. In addition, if the dimension in the length direction of the multilayer ceramic capacitor 1 including the stacked body 10 and the external electrode 40 is set to L dimension, the L dimension is preferably 0.2 mm or more and 6 mm or less. In addition, if the dimension in the stacking direction of the multilayer ceramic capacitor 1 is set to T dimension, the T dimension is preferably 0.05 mm or more and 5 mm or less. In addition, if the dimension in the width direction of the multilayer ceramic capacitor 1 is set to W dimension, the W dimension is preferably 0.1 mm or more and 5 mm or less.

[0079] Furthermore, the inventors of the present application have obtained the following knowledge through repeated research and experiments, that is, in order to improve the crack resistance of the laminated ceramic capacitor, it is preferable to set the non-metallic portion included in the base electrode layer (that is, the first base electrode layer 50A and the second base electrode layer 50B of the present embodiment) that is in direct contact with the laminate to an appropriate state. This point will be described below.

[0080] Figure 5 yes Figure 2 An enlarged cross-sectional view of the portion shown in R1 based on a SEM (scanning electron microscope) photograph. Figure 5 It is a part of the LT cross section perpendicular to the width direction W of the laminated body 10 in the laminated ceramic capacitor 1. Figure 5 , the first base electrode layer 50A, a portion of the first Ni plating layer 61A, and a portion of the laminate 10 are shown. Figure 5 , the dielectric layer 20 and the plurality of first internal electrode layers 31 in the laminate 10 are shown. The first base electrode layer 50A is in contact with the first internal electrode layer 31 exposed at the first end surface LS1 of the laminate 10 .

[0081] The second base electrode layer 50B of this embodiment also has Figure 5 Therefore, based on Figure 5 The structure of the first foundation electrode layer 50A described above is the structure of the second foundation electrode layer 50B. Therefore, in the following description, when there is no need to distinguish between the first foundation electrode layer 50A and the second foundation electrode layer 50B, the first foundation electrode layer 50A and the second foundation electrode layer 50B are sometimes collectively referred to as the foundation electrode layer 50.

[0082] like Figure 5 As shown, the base electrode layer 50 includes a metal portion 70 and a plurality of non-metal portions 80 present in the metal portion 70 .

[0083] The metal portion 70 includes at least one metal component selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. included in the above-mentioned sintered layer forming the base electrode layer 50. A plurality of non-metal portions 80 are dispersed in the metal portion 70.

[0084] The non-metallic portion 80 is mainly voids, but may not be entirely voids, and may include a portion of a glass component containing Ba or Si. In addition, the non-metallic portion 80 may be entirely composed of a glass component containing Ba or Si. The circularity and average area of ​​the plurality of non-metallic portions 80 are different. The non-metallic portion 80 has a function of alleviating stress generated by a force applied to the external electrode.

[0085] In the base electrode layer 50 of this embodiment, Figure 5 In the LT cross-section perpendicular to the width direction W shown in FIG. 1 , the average area of ​​the non-metallic portion 80 in the first group consisting of the non-metallic portion 80 having a circularity of 0.4 or less is preferably 10 μm 2 above.

[0086] In addition, in the base electrode layer 50 of the present embodiment, Figure 5 In the LT cross-section perpendicular to the width direction W shown, the existence ratio of the non-metallic portion 80 is preferably 8.2% or more.

[0087] In the multilayer ceramic capacitor 1 of the present embodiment, the area of ​​the non-metallic portion 80 with low circularity among the non-metallic portions 80 present in the base electrode layer 50 is relatively large.

[0088] Figure 6 This is an example of a non-metallic part 80 with relatively low circularity. The circularity of this non-metallic part 80 is 0.169. When there are a plurality of such non-metallic parts 80 with low circularity and the sizes of these non-metallic parts 80 are large, the stress relief effect can be effectively obtained without increasing the sizes of all non-metallic parts 80 and without greatly increasing the proportion of the non-metallic parts 80.

[0089] In the present embodiment, when the whole composed of the non-metallic parts 80 having a circularity of 0.4 or less is defined as a first whole, the average area of ​​the plurality of non-metallic parts 80 constituting the first whole is 10 μm. 2 Above, in Figure 5 In the area shown, specifically 15 μm 2 In addition, in the present embodiment, the existence ratio of the non-metallic portion 80 in the base electrode layer 50 is 8.2% or more. Figure 5In the region shown, it is specifically 18%. Thus, even when the base electrode layer 50 includes the non-metallic portion 80, the stress relief effect of the force applied to the external electrode can be ensured. Therefore, crack resistance is improved, and reliability can be improved.

[0090] In the present embodiment, the average area of ​​the plurality of non-metallic portions 80 constituting the first population is preferably 10 μm. 2 Above and 23μm 2 Below, more preferably 10.5 μm 2 Above and 23μm 2 As a result, the effect of improving the crack resistance can be more appropriately obtained.

[0091] In the multilayer ceramic capacitor 1 of the present embodiment, the existence ratio of the non-metallic portion 80 in the base electrode layer 50 is preferably 8.2% or more, and more preferably, for example, 8.2% or more and 30% or less in the LT cross-section. Further, the existence ratio of the non-metallic portion 80 in the base electrode layer 50 is preferably, for example, 8.2% or more and 25% or less, and more preferably, for example, 11% or more and 25% or less. Even if the base electrode layer 50 includes the non-metallic portion 80 and the existence ratio of the non-metallic portion 80 in the base electrode layer 50 is within such a range, the effect of the present embodiment, that is, the effect of improving crack resistance, can be obtained.

[0092] Next, a method for measuring various parameters such as the circularity of the non-metal portion 80 , the average area of ​​the non-metal portion 80 , and the existence ratio of the non-metal portion 80 in the base electrode layer 50 in the present embodiment will be described.

[0093] First, the multilayer ceramic capacitor 1 is ground from the first side surface WS1 or the second side surface WS2 to a position 1 / 2 of the dimension in the width direction W. As a result, the LT section at the exact center of the multilayer ceramic capacitor 1 in the width direction W is exposed. Next, the LT section exposed by grinding is observed using an SEM. Specifically, the portion of the LT section including the base electrode layer 50 is photographed as a reflected electron image. In the reflected electron image, the difference in resistance value is reflected as contrast, the metal portion 70 is photographed as whiter, and the non-metal portion 80 is photographed as darker than the metal portion 70. In addition, the shooting magnification is set to 2000 times, and the portion of the base electrode layer 50 in the reflected electron image is taken as the analysis object range.

[0094] Reflected electron images are acquired at two locations of the first foundation electrode layer 50A and two locations of the second foundation electrode layer 50B (four locations in total). Figure 2In the figure, R1, R2, R3, and R4 are used to indicate the acquisition positions of the reflected electron images at four locations. R1 is the portion of the first base electrode layer 50A that is in contact with the inner layer 11 of the stack 10 and is closest to the first main surface TS1. R2 is the portion of the first base electrode layer 50A that is in contact with the inner layer 11 of the stack 10 and is closest to the second main surface TS2. R3 is the portion of the second base electrode layer 50B that is in contact with the inner layer 11 of the stack 10 and is closest to the first main surface TS1. R4 is the portion of the second base electrode layer 50B that is in contact with the inner layer 11 of the stack 10 and is closest to the second main surface TS2. In addition, the lengths of R1, R2, R3, and R4 in the stacking direction T are all set to 80 μm.

[0095] In the base electrode layer 50, the four regions corresponding to the reflected electron image acquisition positions R1, R2, R3, and R4 are likely to become structural singular points and have a high degree of influence on crack resistance. Therefore, from the viewpoint of crack resistance, the state of the base electrode layer 50 in these parts is important.

[0096] The acquired reflected electron image is binarized by the image analysis software "WinROOF (produced by Mitani Shoji Co., Ltd.)" to identify the metal portion 70 and the plurality of non-metal portions 80 existing in the metal portion 70. Using this binarized image, various parameters such as the area of ​​each non-metal portion 80 existing in the base electrode layer 50 are calculated. In addition, the existence ratio of the non-metal portion 80 in the base electrode layer 50 is calculated.

[0097] The area of ​​the non-metal portion 80 is calculated based on a binary image obtained by binarizing the reflected electron image. 2 If the value of , this may not be the non-metal part 80 but noise. Therefore, in order to eliminate the influence of noise, the analysis object is excluded from the 2 The non-metallic portion 80.

[0098] For each non-metal portion 80 , the circularity of the non-metal portion 80 is calculated by the following formula (1) based on the area of ​​the non-metal portion 80 and the circumference (the length of the contour line) of the non-metal portion 80 .

[0099] Circularity = 4π×(area) / (circumference length) 2 … (1)

[0100] All non-metallic parts 80 (as described above, the exclusion area is less than 2.0 μm) identified in the analysis target range of the reflected electron image are removed. 2The set of non-metallic parts 80 with a circularity of less than 0.4 among the non-metallic parts 80 with a value of is set as the first population, wherein the reflected electron image is obtained at the reflected electron image acquisition positions R1, R2, R3, and R4 of the four locations. Based on the area of ​​each non-metallic part 80 constituting the first population, the average area of ​​the non-metallic parts 80 in the first population is calculated.

[0101] Based on the area of ​​the analysis target range and the area of ​​the non-metal portion 80 , the existence ratio of the non-metal portion 80 in the base electrode layer 50 is calculated by the following formula (2).

[0102] The proportion of non-metallic parts (%) = (area of ​​non-metallic parts / area of ​​the analysis target range) × 100 … (2)

[0103] The existence ratio of the non-metal portion 80 is calculated for each of the analysis target ranges of the four locations (R1, R2, R3, and R4). Then, the average value thereof is calculated as the existence ratio of the non-metal portion 80 in the present embodiment.

[0104] As described above, the measurement target range for calculating the average area of ​​the non-metallic portion 80 in the first population composed of the non-metallic portion 80 having a circularity of 0.4 or less is a set of the analysis target ranges of the above-mentioned four locations (R1, R2, R3, and R4). Specifically, the measurement target range is the first main surface TS1 side portion and the second main surface TS2 side portion of the first base electrode layer 50A and the second base electrode layer 50B that are in contact with the inner layer portion 11 of the laminate 10. In more detail, the measurement object range is a portion of the first base electrode layer 50A and the second base electrode layer 50B, which is from a position in the stacking direction of the boundary portion between the inner layer portion 11 of the stacking body 10 and the outer layer portion 12 on the first main surface side toward the center of the stacking direction of the stacking body 10 to a position of 80 μm, and a portion of the boundary portion in the stacking direction between the inner layer portion 11 of the stacking body 10 and the outer layer portion 13 on the second main surface side toward the center of the stacking direction of the stacking body 10 to a position of 80 μm.

[0105] Next, a method for manufacturing the multilayer ceramic capacitor 1 of the present embodiment will be described. The method for manufacturing the multilayer ceramic capacitor 1 of the present embodiment is not limited as long as the above requirements are met. However, a preferred manufacturing method includes the following steps. Each step will be described in detail below.

[0106] A dielectric sheet for the dielectric layer 20 and a conductive paste for the internal electrode layer 30 are prepared. The dielectric sheet for the dielectric layer 20 and the conductive paste for the internal electrode layer 30 both contain a binder and a solvent. The binder and the solvent may also be known binders and solvents. The paste containing the conductive material is, for example, a paste in which an organic binder and an organic solvent are added to metal powder.

[0107] For example, a conductive paste for the internal electrode layer 30 is printed on the dielectric sheet by screen printing, gravure printing, etc., using a printing plate designed with a pattern to form the shape of the internal electrode layer 30 of the present embodiment. Thus, a dielectric sheet having a pattern of the first internal electrode layer 31 and a dielectric sheet having a pattern of the second internal electrode layer 32 are prepared.

[0108] A predetermined number of dielectric sheets on which the pattern of the internal electrode layer 30 is not printed are stacked to form a portion of the first main surface side outer layer portion 12 on the first main surface TS1 side. A dielectric sheet on which the pattern of the first internal electrode layer 31 is printed and a dielectric sheet on which the pattern of the second internal electrode layer 32 is printed are stacked alternately in sequence to form a portion of the inner layer portion 11. A predetermined number of dielectric sheets on which the pattern of the internal electrode layer 30 is not printed are stacked on the portion to form the inner layer portion 11 to form a portion of the second main surface side outer layer portion 13 on the second main surface TS2 side. Thus, a laminated sheet is obtained.

[0109] Next, the laminated sheets are pressed in the laminating direction by isostatic pressing or the like, thereby producing a laminated block.

[0110] Next, the stacked block is cut into pieces of a given size to obtain a plurality of stacked small pieces. The stacked small pieces may then be polished by barrel polishing or the like to round off the corners and ridges.

[0111] Next, the stacked small pieces are fired to obtain the stacked body 10. The firing temperature at this time depends on the materials of the dielectric layer 20 and the internal electrode layer 30, but is preferably 900°C or higher and 1400°C or lower, for example.

[0112] A conductive paste that becomes a base electrode layer 50 is applied to both end surfaces of the laminate 10. In the present embodiment, the base electrode layer 50 is a sintered layer. The sintered layer can be formed by applying a conductive paste containing a glass component and a metal to the laminate 10 by a method such as dipping, and then performing a sintering treatment. The temperature of the sintering treatment at this time is preferably 700° C. or more and 900° C. or less.

[0113] In addition, the stacked small pieces before firing and the conductive paste applied to the stacked small pieces can also be fired at the same time. In this case, the sintered layer is preferably formed by sintering a paste to which a ceramic material is added instead of a glass component. At this time, as the added ceramic material, it is particularly preferred to use a ceramic material of the same type as the dielectric layer 20. In this case, the conductive paste is applied to the stacked small pieces before firing, and the stacked small pieces and the conductive paste applied to the stacked small pieces are sintered at the same time, thereby forming a stacked body 10, which is formed with a sintered layer.

[0114] By changing the shape and particle size distribution of the copper powder added to the conductive paste, it is possible to control the circularity of the non-metallic portion 80 present inside the base electrode layer 50. When spherical powder is used as the copper powder and the particle size distribution of the copper powder is sharper, the circularity of the non-metallic portion 80 is higher. On the contrary, when flat powder is used as the copper powder and the particle size distribution of the copper powder is wider, the circularity of the non-metallic portion 80 is reduced.

[0115] By changing the particle size of the copper powder and the glass component and the firing temperature, it is possible to control the average area of ​​the non-metallic portion 80 present inside the base electrode layer 50. The smaller the particle size of the copper powder and the glass component and the higher the firing temperature, the smaller the average area of ​​the non-metallic portion 80. On the contrary, the larger the particle size of the copper powder and the glass component and the lower the firing temperature, the larger the average area of ​​the non-metallic portion 80.

[0116] By changing the amount of glass component added and the firing temperature, the proportion of the non-metallic portion 80 in the base electrode layer 50 can be controlled. The more the amount of glass component added and the lower the firing temperature, the higher the proportion of the non-metallic portion 80. On the contrary, the less the amount of glass component added and the higher the firing temperature, the lower the proportion of the non-metallic portion 80. The conductive paste comprises 50 vol% to 80 vol% of copper powder, 5 vol% to 20 vol% of glass component, other solvents, and resin components.

[0117] Then, a plating layer is formed on the surface of the base electrode layer 50 composed of a sintered layer. In the present embodiment, a first plating layer 60A is formed on the surface of the first base electrode layer 50A. In addition, a second plating layer 60B is formed on the surface of the second base electrode layer 50B. In the present embodiment, a Ni plating layer and a Sn plating layer are formed as plating layers. When performing the plating process, either electrolytic plating or electroless plating can be used. However, regarding electroless plating, in order to increase the deposition speed of the plating layer, it is necessary to perform pretreatment using a catalyst, etc., and therefore there is a disadvantage that the process is complicated. Therefore, it is usually preferred to use electrolytic plating. The Ni plating layer and the Sn plating layer are formed in sequence, for example, by roller plating.

[0118] In addition, when a conductive resin layer is provided, the conductive resin layer may also be configured to cover the sintered layer. When a conductive resin layer is provided, after a conductive resin paste containing a thermosetting resin and a metal component is applied to the sintered layer, a heat treatment is performed at a temperature of 250 to 550° C. or higher. Thus, the thermosetting resin is thermally cured to form a conductive resin layer. The atmosphere during the heat treatment is preferably an N2 atmosphere. In addition, in order to prevent the scattering of the resin and the oxidation of various metal components, the oxygen concentration is preferably 100 ppm or less.

[0119] Through the above-described manufacturing steps, the multilayer ceramic capacitor 1 can be manufactured.

[0120] The structure of the multilayer ceramic capacitor 1 is not limited to Figure 1 to Figure 4B For example, the multilayer ceramic capacitor 1 may also be as follows Fig. 7A , Figure 7B as well as Figure 7C The following are the multilayer ceramic capacitors with two-cell structure, three-cell structure, and four-cell structure.

[0121] Fig. 7A The illustrated multilayer ceramic capacitor 1 is a duplex structure multilayer ceramic capacitor 1, which includes, as the internal electrode layer 30, a floating internal electrode layer 35 that is not extended to either the first end surface LS1 or the second end surface LS2 in addition to the first internal electrode layer 33 and the second internal electrode layer 34. Figure 7B The illustrated multilayer ceramic capacitor 1 is a triple-structured multilayer ceramic capacitor 1 , and includes a first floating internal electrode layer 35A and a second floating internal electrode layer 35B as the floating internal electrode layers 35 . Figure 7C The multilayer ceramic capacitor 1 shown is a multilayer ceramic capacitor 1 of a quadruple structure, wherein the floating internal electrode layer 35 includes a first floating internal electrode layer 35A, a second floating internal electrode layer 35B, and a third floating internal electrode layer 35C. In this way, by providing the floating internal electrode layer 35 as the internal electrode layer 30, the multilayer ceramic capacitor 1 has a structure in which the opposing electrode portion is divided into a plurality of portions. Thus, a structure is formed in which a plurality of capacitor components are formed between the opposing internal electrode layers 30, and these capacitor components are connected in series. Therefore, the voltage applied to each capacitor component becomes lower, and the multilayer ceramic capacitor 1 can be made to have a high withstand voltage. In addition, it is self-evident that the multilayer ceramic capacitor 1 of the present embodiment can also be a multi-connection structure of four or more.

[0122] Furthermore, the multilayer ceramic capacitor 1 may be a two-terminal multilayer ceramic capacitor having two external electrodes, or may be a multi-terminal multilayer ceramic capacitor having a plurality of external electrodes.

[0123] In addition, in the above-mentioned embodiment, as a laminated ceramic electronic component, a laminated ceramic capacitor using a dielectric layer 20 composed of dielectric ceramic as a ceramic layer is exemplified. However, the laminated ceramic electronic component disclosed in the present invention is not limited to this. For example, the ceramic electronic component disclosed in the present invention can also be applied to various laminated ceramic electronic components such as piezoelectric components using piezoelectric ceramics as ceramic layers and thermistors using semiconductor ceramics as ceramic layers. As piezoelectric ceramics, PZT (lead zirconate titanate) ceramics and the like can be listed, and as semiconductor ceramics, spinel ceramics and the like can be listed.

[0124] According to the multilayer ceramic capacitor 1 according to the embodiment described above, the following effects are achieved.

[0125] The multilayer ceramic capacitor 1 according to the embodiment comprises: a multilayer body 10, comprising a plurality of dielectric layers 20 as ceramic layers and a plurality of internal electrode layers 30 as internal conductor layers alternately stacked in a stacking direction T, and comprising a first main surface TS1 and a second main surface TS2 opposite to each other in the stacking direction T, a first end surface LS1 and a second end surface LS2 opposite to each other in a length direction L orthogonal to the stacking direction T, and a first side surface WS1 and a second side surface WS2 opposite to each other in a width direction W orthogonal to the stacking direction T and the length direction L; and a pair of external electrodes 40, which are disposed at both ends of the multilayer body 10 in the length direction L so as to be separated from each other, and the internal electrode layers 30 comprising: a first main surface TS1 as a first internal conductor layer and a second main surface TS2 opposite to each other in the stacking direction T; a first end surface LS1 and a second end surface LS2 opposite to each other in a width direction W orthogonal to the stacking direction T and the length direction L; The internal electrode layer 31 is led out to the first end face LS1; and the second internal electrode layer 32 as the second internal conductor layer is led out to the second end face LS2, and the external electrode 40 has: the first external electrode 40A, including the first base electrode layer 50A connected to the first internal electrode layer 31; and the second external electrode 40B, including the second base electrode layer 50B connected to the second internal electrode layer 32, wherein the first base electrode layer 50A and the second base electrode layer 50B have a metal portion 70 and a plurality of non-metal portions 80 existing in the metal portion 70, and in a cross-section perpendicular to the width direction W, the average area of ​​the non-metal portion 80 in the first group composed of the non-metal portion 80 with a circularity of less than 0.4 is 10μm 2 As described above, in the cross-section viewed perpendicularly to the width direction, the existence ratio of the non-metal portion in the first foundation electrode layer and the second foundation electrode layer is 8.2% or more.

[0126] This achieves a stress alleviation effect on the force applied to the external electrodes, and can provide a multilayer ceramic capacitor having high crack resistance.

[0127] In the multilayer ceramic capacitor 1 according to the embodiment, the first foundation electrode layer 50A and the second foundation electrode layer 50B are preferably sintered layers.

[0128] Thus, when forming the first base electrode layer 50A and the second base electrode layer 50B, it is possible to form them by a relatively simple method compared to the case where they are formed by a thin film forming method such as sputtering or evaporation. In addition, by forming a sintered layer simultaneously with the firing of the stacked body 10, it is possible to simplify the manufacturing process.

[0129] The present invention is not limited to the configuration of the above-described embodiment, and can be applied with appropriate changes within the scope of the present invention. In addition, a configuration combining two or more of the preferred configurations described in the above-described embodiment is also the present invention.

[0130] Example

[0131] The following is a description of the embodiments. According to the manufacturing method described in the above-mentioned embodiment, multiple batches of multilayer ceramic capacitors were manufactured so that the average area of ​​the non-metallic part in the first group within the base electrode layer became different values, and they were used as samples of Examples 1 to 6 and Comparative Examples. Examples 1 to 6 are multilayer ceramic capacitors that meet the requirements of the present invention, and the Comparative Examples are multilayer ceramic capacitors outside the present invention. The samples of the same batch were manufactured under the same manufacturing conditions, and the specifications of the base electrode layers became the same. For each batch (Examples 1 to 6 and Comparative Examples), 72 samples were manufactured. Next, the manufactured samples of Examples 1 to 6 and Comparative Examples were provided to a heavy hammer drop test. The heavy hammer drop test was performed as follows. Figure 8 The structure shown is tested to determine whether it can withstand mechanical stress. Figure 8 Schematic diagram for explaining the heavy hammer drop test in the embodiment. The heavy hammer drop test will be described later. Furthermore, 10 samples prepared separately from the samples for the heavy hammer drop test and made in the same batch as the samples of Examples 1 to 6 and the comparative example were ground, and parameters such as the average area of ​​the non-metallic part in the first population were measured by the aforementioned measurement method.

[0132] In addition, during the production, each sample was produced according to the following specifications.

[0133] · Dimensions of multilayer ceramic capacitors: L×W×T=1.6mm×0.8mm×0.8mm

[0134] Dielectric layer: BaTiO3

[0135] Capacitance: 10μF

[0136] Rated voltage: 25V

[0137] ·Base electrode layer: Electrode containing conductive metal (Cu) and glass components (thickness of the base electrode layer disposed on the first end face and the second end face: 36 μm)

[0138] · Plating layer: Two layers of Ni plating layer (2μm) and Sn plating layer (4μm) are formed

[0139] Internal electrode layer: Ni

[0140] Table 1 shows the measurement results of the average area of ​​the non-metallic portion in the first population and the existence ratio of the non-metallic portion in the base electrode layer for the samples of Examples 1 to 6 and the comparative example. In addition, the measurement results are the average values ​​of 10 samples prepared separately from the 72 samples subjected to the above test.

[0141] First, if Figure 8 As shown, a laminated ceramic capacitor 1 as a sample is fixed by a fixing fixture G on a steel table D, and a weight W is dropped on the laminated ceramic capacitor under the following conditions. The weight W is dropped on the external electrode on the end surface of the laminate. After the test, internal cracks are confirmed.

[0142] ·Weight: 6g (cylindrical stainless steel bar with a diameter of Φ3.1mm×L100.4mm)

[0143] ·Height of hammer drop: 4.8mm

[0144] Regarding the observation of cracks, grinding was started from the first side or the second side of the multilayer ceramic capacitor, and from the position where the internal electrode layer began to be exposed to the position where the internal electrode layer ended to be exposed, the LT cross section was exposed each time and observed under a microscope. Here, the number of cracks reaching the effective part and the number of cracks that occurred but did not reach the effective part were distinguished and the number of cracks was counted. These results are recorded together in Table 1.

[0145] [Table 1]

[0146]

[0147] According to Table 1, in the comparative example, it is clear that when the average area of ​​the non-metallic portion in the first population is less than 10 μm 2 On the other hand, if the average area of ​​the non-metallic part in the first population is 10 μm 2 If the area of ​​the non-metallic part in the first group is 10 μm, the cracks will not reach the effective part, and the crack resistance will be good. Therefore, from the perspective of ensuring crack resistance, the average area of ​​the non-metallic part in the first group is preferably 10 μm. 2 The existence ratio of the non-metallic portion in the first population is also preferably 8.2% or more from the viewpoint of ensuring crack resistance, similarly to the average area.

[0148] In Example 1, although there were no cracks reaching the effective part and no sample with NG crack resistance was generated, cracks that did not reach the effective part were generated. Therefore, it can be said that the average area of ​​the non-metallic part in the first population is more preferably 10.5 μm 2 It can be said that the existence ratio of the non-metallic part in the first population is more preferably 11% or more.

[0149] For example, the average area of ​​the non-metallic portion constituting the first population is preferably 10 μm 2 Above and 23μm 2 Below, more preferably 10.5 μm 2 Above and 23μm 2 Thereby, crack resistance is improved.

[0150] Furthermore, the existence ratio of the non-metallic portion in the base electrode layer is preferably 8.2% or more and 25% or less. For example, the existence ratio of the non-metallic portion in the base electrode layer is preferably 11% or more and 25% or less.

[0151] The present invention is not limited to the configuration of the above-described embodiment, and can be applied with appropriate changes within the scope of the present invention. In addition, a configuration combining two or more of the preferred configurations described in the above-described embodiment is also the present invention.

[0152] Description of Reference Numerals

[0153] 1: Multilayer ceramic capacitors (multilayer ceramic electronic components);

[0154] 10: laminate;

[0155] 20: dielectric layer (ceramic layer);

[0156] 30: internal electrode layer (internal conductor layer);

[0157] 31: first internal electrode layer (first internal conductor layer);

[0158] 32: second internal electrode layer (second internal conductor layer);

[0159] 40: external electrode;

[0160] 40A: 1st external electrode;

[0161] 40B: second external electrode;

[0162] 50: base electrode layer;

[0163] 50A: 1st base electrode layer;

[0164] 50B: second base electrode layer;

[0165] 70: Metal Department;

[0166] 80: Non-metallic department;

[0167] L: length direction;

[0168] T: stacking direction;

[0169] W: width direction;

[0170] LS1: 1st end face;

[0171] LS2: 2nd end face;

[0172] TS1: 1st main surface;

[0173] TS2: 2nd main surface;

[0174] WS1: side 1;

[0175] WS2: Side 2.

Claims

1. A laminated ceramic electronic component comprising: A laminate comprising a plurality of ceramic layers and a plurality of internal conductor layers alternately laminated in a lamination direction, and comprising a first main surface and a second main surface opposite to each other in the lamination direction, a first end surface and a second end surface opposite to each other in a length direction perpendicular to the lamination direction, and a first side surface and a second side surface opposite to each other in a width direction perpendicular to the lamination direction and the length direction; and A pair of external electrodes are disposed at both ends of the stack in the longitudinal direction and are separated from each other. The inner conductor layer comprises: a first internal conductor layer extending to the first end surface; and a second internal conductor layer extending to the second end surface, The external electrode has: a first external electrode including a first base electrode layer connected to the first internal conductor layer; and a second external electrode including a second base electrode layer connected to the second internal conductor layer; in, The first foundation electrode layer and the second foundation electrode layer include a metal portion and a plurality of non-metal portions present in the metal portion. In a cross-sectional view perpendicular to the width direction, the average area of ​​the non-metallic parts in the first group consisting of the non-metallic parts having a circularity of 0.4 or less is 10 μm 2 above, In a cross-sectional view perpendicular to the width direction, an existence ratio of the non-metal portion in the first foundation electrode layer and the second foundation electrode layer is 8.2% or more.

2. The multilayer ceramic electronic component according to claim 1, wherein The first base electrode layer and the second base electrode layer are sintered layers.

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