Method for increasing conductivity of chip

Abstract

The invention discloses a method for increasing the conductivity of a chip, and relates to the technical field of chip detection, and the method comprises the following steps: S1, fixing a carrier, and keeping the contact surface of the carrier at the upper part; s2, the contact surface of the carrier is ground and polished through abrasive paper; s3, the carrier is checked; and S4, entering a scanning electron microscope for detection. According to the invention, through a refined grinding and polishing process, a comprehensive quality detection system and strict process control, the conductivity between the chip and the carrier is effectively improved, so that the accuracy and effectiveness of a detection result of the chip in scanning electron microscope detection are ensured.

Description

Technical Field

[0001] The patent of this invention relates to the field of chip detection technology, specifically a method for increasing the conductivity of a chip. Background Art

[0002] In the scanning electron microscope inspection of the chip, it involves observing the morphology of the chip surface, in-depth observation of the internal structure of the chip, elemental analysis, locating and analyzing the failure point of the chip, and observing the microstructure and composition changes in the failure area. All of these require the chip to have high conductivity to ensure the accuracy and effectiveness of the test.

[0003] In the above-mentioned tests, the chips need to be placed on a conductive carrier before subsequent testing can be carried out. However, during daily use, the current carriers will have irregular bumps on their surfaces due to wear and bumps. As a result, when the chip surface contacts the contact surface of the carrier, the two cannot be completely fitted together, causing the contact resistance between the chip and the carrier to become lower during the test, which further affects the efficiency of electron transfer. Since the conductivity is affected, the detection effect of the chip is also reduced. At the same time, during daily use of the carrier, the oxidation of the carrier surface by air to form an oxide layer, and the adhesion of impurities in the air to the carrier surface will also affect the conductivity between the chip and the carrier. Summary of the invention

[0005] The purpose of the present invention is to provide a method for increasing the conductivity of a chip to solve the problems raised in the above background technology.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions: a method for increasing the conductivity of a chip, comprising the following steps:

[0007] S1: Fix the carrier and keep the contact surface of the carrier at the top;

[0008] S2: Grinding and polishing the contact surface of the carrier with sandpaper;

[0009] S21: Use 200-grit sandpaper to perform preliminary rough grinding on the contact surface of the carrier;

[0010] S22: Use 400-grit sandpaper to finely grind the contact surface of the carrier;

[0011] S23: cleaning the contact surface of the carrier with a corrosive solution and then washing with clean water;

[0012] The grinding in steps S21-S22 is performed by mechanical equipment, and the grinding method is clockwise circular grinding, and the number of circles is 10-100 circles;

[0013] S3: Check the vehicle;

[0014] S31: Detecting the flatness of the carrier contact surface;

[0015] The flatness detection method is as follows: placing the carrier on the loading platform of the flatness detector, and ensuring that the detector of the flatness detector is aligned with the contact surface of the carrier, and then checking the flatness through the feedback data of the flatness detector;

[0016] If the test result is qualified, proceed to step S33;

[0017] If the detected structure is unqualified, return to step S2 to rewrite the grinding and polishing;

[0018] The flatness acceptance standard is ±0.05μm;

[0019] S32: Detecting the roughness of the contact surface of the carrier;

[0020] The roughness detection method is: measuring the flatness of the carrier contact surface by an electric roughness meter, and obtaining the profile arithmetic mean deviation Ra of the carrier contact surface by integral calculation;

[0021] If the test result is qualified, proceed to step S33;

[0022] If the test result is unqualified, return to steps S22 and S23 in sequence;

[0023] The roughness qualification standard is between Ra0.01 and Ra0.1.

[0024] S33: Detecting the conductivity between the carrier and the chip;

[0025] The conductivity inspection method is: placing the chip on a carrier, and then detecting the resistivity between the chip and the carrier by a resistivity tester;

[0026] If the test result is qualified, proceed to step S4;

[0027] If the detected structure is unqualified, return to step S2 to rewrite the grinding and polishing;

[0028] The resistivity qualification standard is between 10^-3Ω·cm;

[0029] The number of clockwise circumferential grinding turns from any sub-step in step S3 back to step S2 is 10-50 turns;

[0030] S4: Enter scanning electron microscope detection.

[0031] The beneficial effects achieved by the present invention are:

[0032] 1. Fine grinding and polishing of the carrier contact surface can effectively remove the surface oxide layer, impurities and uneven parts, thereby significantly improving the contact effect between the carrier and the chip, thereby enhancing the conductive performance, thereby ensuring the accuracy and effectiveness of the chip detection results in the scanning electron microscope.

[0033] 2. Ensure that the carrier contact surface meets quality standards through strict flatness and roughness testing. Improvements in flatness and roughness help reduce contact resistance and improve current transmission efficiency between the chip and the carrier.

[0034] 3. The specific steps of grinding and polishing, the grit of sandpaper used, the grinding method and the number of turns and other parameters are clearly specified to ensure the controllability and repeatability of the method.

[0035] 4. Comprehensive testing from flatness, roughness to conductivity constitutes a complete quality inspection system, which helps to timely discover and deal with potential problems caused by unqualified surface grinding and polishing of the carrier, and thus ensure the accuracy and effectiveness of the test results in subsequent scanning electron microscope testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a flow chart of a method for increasing the conductivity of a chip in Embodiment 1. DETAILED DESCRIPTION

[0037] The present invention is further described below in conjunction with the accompanying drawings.

[0038] like Figure 1 As shown, the present invention discloses a method for increasing the conductivity of a chip, comprising the following steps:

[0039] S1: Fix the carrier and keep the contact surface of the carrier at the top;

[0040] S2: Grinding and polishing the contact surface of the carrier with sandpaper;

[0041] S21: Use 200-grit sandpaper to perform preliminary rough grinding on the contact surface of the carrier;

[0042] S22: Use 400-grit sandpaper to finely grind the contact surface of the carrier;

[0043] S23: cleaning the contact surface of the carrier with a corrosive solution and then washing with clean water;

[0044] The grinding in steps S21-S22 is performed by mechanical equipment, and the grinding method is clockwise circular grinding, and the number of circles is 10-100 circles;

[0045] S3: Check the vehicle;

[0046] S31: Detecting the flatness of the carrier contact surface;

[0047] The flatness detection method is as follows: placing the carrier on the loading platform of the flatness detector, and ensuring that the detector of the flatness detector is aligned with the contact surface of the carrier, and then checking the flatness through the feedback data of the flatness detector;

[0048] If the test result is qualified, proceed to step S33;

[0049] If the detected structure is unqualified, return to step S2 to rewrite the grinding and polishing;

[0050] The flatness acceptance standard is ±0.05μm;

[0051] S32: Detecting the roughness of the contact surface of the carrier;

[0052] The roughness detection method is: measuring the flatness of the carrier contact surface by an electric roughness meter, and obtaining the profile arithmetic mean deviation Ra of the carrier contact surface by integral calculation;

[0053] If the test result is qualified, proceed to step S33;

[0054] If the test result is unqualified, return to steps S22 and S23 in sequence;

[0055] The roughness qualification standard is between Ra0.01 and Ra0.1.

[0056] S33: Detecting the conductivity between the carrier and the chip;

[0057] The conductivity inspection method is: placing the chip on a carrier, and then detecting the resistivity between the chip and the carrier by a resistivity tester;

[0058] If the test result is qualified, proceed to step S4;

[0059] If the detected structure is unqualified, return to step S2 to rewrite the grinding and polishing;

[0060] The resistivity qualification standard is between 10^-3Ω·cm;

[0061] The number of clockwise circumferential grinding turns from any sub-step in step S3 back to step S2 is 10-50 turns;

[0062] S4: Enter scanning electron microscope detection.

[0063] The patent of the present invention can effectively remove the surface oxide layer, impurities and uneven parts by fine grinding and polishing the contact surface of the carrier, thereby significantly improving the contact effect between the carrier and the chip, thereby enhancing the conductive performance, thereby ensuring the accuracy and effectiveness of the test results of the chip in the scanning electron microscope test; at the same time, through strict flatness and roughness testing, it is ensured that the contact surface of the carrier meets the quality standards. The improvement of flatness and roughness helps to reduce contact resistance and improve the current transmission efficiency between the chip and the carrier; and the patent clearly stipulates the specific steps of grinding and polishing, the grit of the sandpaper used, the grinding method and the number of turns and other parameters to ensure the controllability and repeatability of the method; the all-round testing from flatness, roughness to conductivity constitutes a complete quality inspection system, which helps to timely discover and deal with potential problems caused by unqualified surface grinding and polishing of the carrier, and then the accuracy and effectiveness of the test results in subsequent scanning electron microscope testing.

[0064] The above are only preferred specific implementation methods of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical solution and invention concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A control method for increasing the conductivity of a chip, characterized in that: The steps include: S1: Fix the carrier and keep the contact surface of the carrier at the top; S2: Grinding and polishing the contact surface of the carrier with sandpaper; S3: Check the vehicle; S4: Enter scanning electron microscope detection.

2. The control method for increasing the conductivity of a chip according to claim 1, characterized in that: The step S2 includes the following sub-steps: S21: Use 200-grit sandpaper to perform preliminary rough grinding on the contact surface of the carrier; S22: Use 400 grit sandpaper to finely grind the contact surface of the carrier.

3. A method for increasing the conductivity of a chip according to claim 2, characterized in that: The grinding in steps S21-S22 is performed by mechanical equipment, and the grinding method is clockwise circular grinding, and the number of circles is 10-100 circles.

4. The control method for increasing the conductivity of a chip according to claim 2, characterized in that: The step S2 further includes the following sub-step S23: cleaning the contact surface of the carrier with a corrosive solution and then washing with clean water.

5. The control method for increasing the conductivity of a chip according to claim 1, characterized in that: The step S3 includes the following sub-steps: S31: Detecting the flatness of the carrier contact surface; The flatness detection method is as follows: placing the carrier on the loading platform of the flatness detector, and ensuring that the detector of the flatness detector is aligned with the contact surface of the carrier, and then checking the flatness through the feedback data of the flatness detector; If the test result is qualified, proceed to step S33; If the detected structure is unqualified, return to step S2 to rewrite the grinding and polishing; The flatness acceptance standard is ±0.05μm; S32: Detecting the roughness of the contact surface of the carrier; The roughness detection method is: measuring the flatness of the carrier contact surface by an electric roughness meter, and obtaining the profile arithmetic mean deviation Ra of the carrier contact surface by integral calculation; If the test result is qualified, proceed to step S33; If the test result is unqualified, return to steps S22 and S23 in sequence; The roughness qualification standard is between Ra0.01 and Ra0.

1. S33: Detecting the conductivity between the carrier and the chip; The conductivity inspection method is: placing the chip on a carrier, and then detecting the resistivity between the chip and the carrier by a resistivity tester; If the test result is qualified, proceed to step S4; If the detected structure is unqualified, return to step S2 to rewrite the grinding and polishing; The resistivity qualification standard is between 10^-3Ω·cm.

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