Automatic double-pulse test and parameter characteristic analysis platform for silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor)

Abstract

The invention discloses an automatic double-pulse test and parameter characteristic analysis platform for a silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), which comprises a hardware platform and a software platform, and is characterized in that the hardware platform comprises a control unit, an automatic driving unit, an intelligent data unit, an isolation unit and an element test unit; the control unit comprises an upper computer control module, a serial port communication transmission module and an Ethernet communication transmission module; the automatic driving unit comprises an MCU control module, an ADC module, a sampling module, an overvoltage protection module, a GPIO module and a driving module. The intelligent data unit comprises a data acquisition module, a data processing module and a data processing module; the isolation unit comprises a signal isolation module and a driving isolation module; the software platform comprises an MCU control program and an upper computer program. According to the invention, automatic double-pulse testing and parameter characteristic depth analysis can be realized, corresponding analysis results can be visualized, and double-pulse testing efficiency and testing reliability are greatly improved.

Description

Technical Field

[0001] This invention belongs to the field of electronic component testing, and relates to a device for double-pulse testing of silicon carbide MOSFETs, specifically an automated double-pulse testing and parameter characteristic analysis platform for silicon carbide MOSFETs. Background Technology

[0002] Silicon carbide power semiconductor devices have become a key factor affecting the reliability of power electronic converters. Conducting dual-pulse testing on silicon carbide MOSFET devices is crucial for ensuring their long-term stable operation.

[0003] When performing double-pulse testing on silicon carbide MOSFETs, the conduction times (i.e., pulse width and interval) of the upper and lower transistors need to be finely adjusted to obtain detailed test parameters. This means that the input signal needs to be continuously adjusted during the test. Simultaneously, various parameters such as drive voltage and loop current need to be monitored for device performance analysis. Furthermore, overvoltage protection is required during double-pulse testing to ensure the reliability of the test platform. Current technology requires manual parameter adjustment throughout the double-pulse testing of silicon carbide MOSFETs, and manual data processing and storage are necessary after each test. This is not only highly manual and inefficient, but also lacks real-time feedback and automated analysis capabilities, resulting in low accuracy of experimental data analysis. Therefore, a device capable of timely protecting circuit equipment and testing and analyzing the parameter characteristics of silicon carbide MOSFETs urgently needs to be developed. Summary of the Invention

[0004] To address the shortcomings of the prior art, this invention provides an automated double-pulse testing and parameter characteristic analysis platform for silicon carbide MOSFETs. This platform can perform double-pulse testing of silicon carbide MOSFETs, has the ability to promptly protect circuit equipment, and utilizes LSTM-based deep learning technology for data analysis, significantly improving the processing capability of silicon carbide MOSFET double-pulse test data and effectively revealing key influencing factors on MOSFET performance, with a high degree of automation.

[0005] The objective of this invention is achieved through the following technical solution:

[0006] An automated dual-pulse testing and parameter characterization platform for silicon carbide MOSFETs comprises two parts: a hardware platform and a software platform, wherein:

[0007] The hardware platform comprises five parts: a control unit, an automated drive unit, an intelligent data unit, an isolation unit, and a component testing unit.

[0008] The control unit includes a host computer control module, a serial communication transmission module, and an Ethernet communication transmission module;

[0009] The automated drive unit includes an MCU control module, an ADC module, a sampling module, an overvoltage protection module, a GPIO module, and a drive module;

[0010] The intelligent data unit includes a data acquisition module, a data processing module, and a data processing module;

[0011] The isolation unit includes a signal isolation module and a drive isolation module;

[0012] The host computer control module is connected to the MCU control module and the data acquisition module through a serial communication transmission module and an Ethernet communication transmission module, respectively, to realize the control of dual-pulse test commands and data transmission and reception, and to perform automated data acquisition, processing and storage.

[0013] The ADC module is connected to the MCU control module. It samples the voltage of the component test unit through the sampling module and provides overvoltage protection through the overvoltage protection module.

[0014] The GPIO module is connected to the MCU control module and drives the component test unit with voltage through the driver module.

[0015] The data acquisition module is connected to the component testing unit and acquires the drain-source voltage V of the lower transistor in the test circuit. ds Gate-source voltage V gs and main circuit current I C It also connects to the data processing module with a built-in Long Short-Term Memory (LSTM) network to filter noise from the collected data;

[0016] The data processing module is connected to the data storage module, which is responsible for naming the processed data according to the test time and storing it in the corresponding folder.

[0017] The drive isolation module is located between the drive module and the component test unit to isolate the drive module and the component test unit.

[0018] The signal isolation module is located between the sampling module and the component testing unit to isolate the sampling module and the component testing unit.

[0019] The component testing unit is connected to the silicon carbide MOSFET device under test for dual-pulse testing;

[0020] The software platform consists of two parts: an MCU control program and a host computer program.

[0021] The MCU control program is connected to the MCU control module and is used to realize the drive signal output for the silicon carbide MOSFET double pulse test and the overvoltage soft protection of the test circuit.

[0022] The host computer program connects to the host computer control module to set parameters for the silicon carbide MOSFET double-pulse test, and to visualize the data stored in the data storage module, generating a user interface so that users can read and analyze the data.

[0023] A method for automated double-pulse testing and parameter characteristic analysis of silicon carbide MOSFETs using the above-mentioned platform includes the following steps:

[0024] Step (1) Pre-test and overvoltage monitoring: The host computer control module sends a pre-test command to the MCU control module through the serial communication transmission module. The MCU control module controls the overvoltage protection module to realize device overvoltage protection based on the sampling result of the ADC module. If the sampled voltage exceeds the threshold set by the host computer control module, the overvoltage protection module cuts off the test circuit, and the MCU control module sends a "trigger overvoltage protection" message to the host computer control module. If the sampled voltage does not exceed the threshold set by the host computer control module, the MCU control module sends a "test circuit normal" message to the host computer control module.

[0025] Step (2) Test command confirmation: After confirming that the test circuit is normal, the host computer control module sends a normal test command to the MCU control module;

[0026] Step (3) Generation of double pulse signal: After receiving the normal test command, the MCU control module controls the GPIO module to generate a double pulse signal, and drives the silicon carbide MOSFET device under test in the component test unit through the drive module to perform double pulse test;

[0027] Step (4) Data Acquisition and Processing: The data acquisition module records the drain-source voltage V of the lower transistor in the test circuit. ds Gate-source voltage V gs and main circuit current I C The data processing module filters noise from the collected data using a pre-trained Long Short-Term Memory (LSTM) network, and the data storage module stores the processed data.

[0028] Compared with the prior art, the present invention has the following advantages:

[0029] 1. This invention realizes dual-pulse testing of silicon carbide MOSFETs based on microcontroller and neural network, avoiding frequent manual parameter adjustments, greatly improving testing speed, reducing labor costs, and achieving a high degree of automation.

[0030] 2. This invention can protect the main circuit in a timely manner by taking overvoltage protection measures based on the parameters set by the host computer program and the voltage / current information sampled by the main circuit during testing, without the need for manual disconnection, thus ensuring test safety.

[0031] 3. This invention can use the Long Short-Term Memory (LSTM) network to analyze, filter, and organize experimental parameters, and perform visualization operations. It displays the key parameters and waveforms of the organized data on the host computer, realizing integrated dual-pulse testing and simplifying the operation process.

[0032] 4. This invention can realize automated double pulse testing and in-depth analysis of parameter characteristics, and visualize the corresponding analysis results, which greatly improves the efficiency and reliability of double pulse testing. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the automated double-pulse testing and parameter characteristic analysis platform for silicon carbide MOSFETs according to the present invention;

[0034] Figure 2 This is the schematic diagram of a dual-pulse test circuit;

[0035] Figure 3 This is a flowchart of the data processing module of the present invention;

[0036] Figure 4 This is a diagram of the computational structure of the Long Short-Term Memory (LSTM) network unit of this invention. Detailed Implementation

[0037] The technical solution of the present invention will be further described below with reference to the accompanying drawings, but it is not limited thereto. Any modifications or equivalent substitutions to the technical solution of the present invention that do not depart from the spirit and scope of the technical solution of the present invention should be covered within the protection scope of the present invention.

[0038] This invention provides an automated dual-pulse testing and parameter characterization platform for silicon carbide MOSFETs, such as... Figure 1 and Figure 2 As shown, the platform consists of two parts: a hardware platform and a software platform, wherein:

[0039] The hardware platform consists of five parts: a control unit, an automated drive unit, an intelligent data unit, an isolation unit, and a component testing unit.

[0040] The control unit includes a host computer control module, a serial communication transmission module, and an Ethernet communication transmission module;

[0041] The automated drive unit includes an MCU control module, an ADC module, a sampling module, an overvoltage protection module, a GPIO module, and a drive module;

[0042] The intelligent data unit includes a data acquisition module, a data processing module, and a data processing module;

[0043] The isolation unit includes a signal isolation module and a drive isolation module;

[0044] The host computer control module is connected to the MCU control module and the data acquisition module through a serial communication transmission module and an Ethernet communication transmission module, respectively, to realize the control of dual-pulse test commands and data transmission and reception, and to perform automated data acquisition, processing and storage.

[0045] The ADC module is connected to the MCU control module. It samples the voltage of the component test unit through the sampling module and provides overvoltage protection through the overvoltage protection module.

[0046] The overvoltage protection module has real-time monitoring capabilities. By comparing the loop voltage data collected by the sampling module with the threshold voltage set by the host computer control module, the test circuit can be cut off in time to protect the test circuit and the device under test, and effectively improve the reliability of the test.

[0047] The GPIO module is connected to the MCU control module and drives the component test unit with voltage through the driver module.

[0048] The data acquisition module is connected to the component testing unit and acquires the drain-source voltage V of the lower transistor in the test circuit. ds Gate-source voltage V gs and main circuit current I C It also connects to the data processing module with a built-in Long Short-Term Memory (LSTM) network to filter noise from the collected data;

[0049] The data processing module is connected to the data storage module, which is responsible for naming the processed data according to the test time and storing it in the corresponding folder.

[0050] The drive isolation module is located between the drive module and the component test unit to isolate the drive module and the component test unit.

[0051] The signal isolation module is located between the sampling module and the component testing unit to isolate the sampling module and the component testing unit.

[0052] The component testing unit is connected to the silicon carbide MOSFET device under test for dual-pulse testing;

[0053] The software platform consists of two parts: an MCU control program and a host computer program.

[0054] The MCU control program is connected to the MCU control module and is used to realize the drive signal output for the silicon carbide MOSFET double pulse test and the overvoltage soft protection of the test circuit.

[0055] The host computer program connects to the host computer control module to set parameters for the silicon carbide MOSFET double-pulse test and to visualize the data stored in the data storage module, generating a user interface that allows users to read and analyze the data. This visualization function not only enhances the user experience but also provides strong support for subsequent decision-making.

[0056] A method for automated double-pulse testing and parameter characteristic analysis of silicon carbide MOSFETs using the above-mentioned platform includes the following steps:

[0057] Step (1) The host computer control module sends a pre-test command to the MCU control module through the serial communication transmission module. The MCU control module, based on the sampling result of the ADC module, controls the overvoltage protection module to implement device overvoltage protection as appropriate. If the sampled voltage is higher than the threshold voltage preset by the host computer control module, the overvoltage protection module will activate and disconnect the test circuit. The MCU control module will feed back the result of "triggered overvoltage protection" to the host computer control module. The host computer control module will display this result on the host computer interface to notify the user. Once the user reduces the test voltage to below the threshold voltage, the test circuit will work normally. If the sampled voltage is lower than the threshold voltage preset by the host computer control module, the overvoltage protection module will not activate, the test circuit will work normally, and the MCU control module will feed back the result of "test circuit works normally" to the host computer control module. The host computer control module will display this result on the host computer interface to notify the user and wait for the normal test command.

[0058] Step (2) The host computer control module sends a test command to the MCU control module. The MCU control module controls the GPIO module to send a double pulse signal and drives the silicon carbide MOSFET device under test in the component test unit through the drive module to perform double pulse test.

[0059] Step (3) The data acquisition module acquires the drain-source voltage V of the lower transistor in the test circuit. ds Gate-source voltage V gs and main circuit current I C The data processing module processes the collected data using a pre-trained Long Short-Term Memory (LSTM) network, and the data storage module stores the processed data.

[0060] like Figure 2 As shown, when testing a certain type of silicon carbide MOSFET, the host computer control module communicates with the MCU control module to control the drive module to send a drive signal with adjustable pulse width, i.e., the gate-source voltage V.gs It controls the on / off state of the lower tube, thereby achieving a dual-pulse test with adjustable pulse width.

[0061] like Figure 3 As shown, when testing a certain type of silicon carbide MOSFET, the data processing module performs noise filtering on the acquired data according to the following steps:

[0062] Step S1: Data normalization processing:

[0063] Step S1.1: The data acquisition module acquires the drain-source voltage V of the lower transistor in the test circuit. ds Gate-source voltage V gs and main circuit current I C One-dimensional data, represented as [x1, x2, ..., x n ] data array;

[0064] Step S1.2: The one-dimensional data is standardized to obtain a new sequence [y1, y2, ..., y]. n The calculation is performed using the following formula:

[0065]

[0066] Among them, y i For the new sequence generated after standardization, x i This is the original sequence. The average value of the original sequence is given by the formula. We derive s as the standard deviation of the input data, derived from the formula... The conclusion is as follows.

[0067] Step S2, Time Window Design:

[0068] Step S2.1: The data processing module determines the size of the time window based on the sampling rate of the analyzed data. The formula for calculating the size of the time window can be expressed as:

[0069] n = f s ×T

[0070] Where n is the number of samples within the time window, f s Where is the sampling rate (Hz) and T is the window duration (s).

[0071] Step S2.2: Generate multiple time windows using the sliding window method. Each window contains n consecutive data points. The time window data is represented as follows:

[0072] (y n+1 )=([y1,y2,…,y n ])

[0073] Among them, (y n+1() represents the output time window data, ([y1,y2,…,y) n ]) represents standardized time series data.

[0074] Step S3, LSTM structure parameter setting:

[0075] Step S3.1: Divide the time window dataset generated in step S2.2 into time-order sets, with the first 70% used as the training set, the middle 15% as the validation set, and the last 15% as the test set.

[0076] Step S3.2: Input the dataset into an LSTM network consisting of multiple LSTM layers and fully connected layers to achieve deep learning and feature extraction of the data. The structural parameters of the LSTM network mainly include the input dimension (n), hidden layer dimension (h), and output dimension (m), where the input dimension is the number of samples n in the time window, the hidden layer dimension is 20, and the output dimension is 3.

[0077] The update of network status is described by the following formula:

[0078]

[0079] Among them, f t 、i t o t These are the parameters for the forget gate, input gate, and output gate, respectively. t Candidate state and Let W be the activation function, W be the weight matrix, and x be the weight matrix. t h is the input to this LSTM layer. t-1 'b' represents the short-term state of the previous layer, and 'b' represents the bias term. Through the design of a multi-layer LSTM structure, the LSTM network can effectively capture the temporal features in time series data.

[0080] Step S4, LSTM network training and optimization:

[0081] The LSTM network is trained, and then optimized using mean squared error (MSE) calculation and the Adam optimization algorithm.

[0082] The formula for calculating the mean square error is:

[0083]

[0084] Where MSE is the mean squared error, N is the sample size, and Y is the mean squared error. true,i Y represents the true value. pred,i is the predicted value.

[0085] The Adam optimization algorithm dynamically adjusts network parameters, and its calculation formula is as follows:

[0086]

[0087] Among them, g t The gradient is at time step t, and J(θ) is the loss function; m t It is a first-order moment, v t These are second-order moments, and β1 and β2 are hyperparameters, set to β1 = 0.9 and β2 = 0.999; and It is to perform deviation correction; θ t+1 To update the parameters, α is the learning rate, set to 0.001, and ε is a very small number to avoid division by zero.

[0088] Step S5: After converting the one-dimensional data into three-dimensional data [number of samples, time step, number of features], use the trained LSTM model to predict and filter noise from the input data.

[0089] like Figure 4 As shown, when testing a certain type of silicon carbide MOSFET, the experimental data is further processed using a pre-trained LSTM neural network. Each unit of the LSTM neural network has three key gating units: a forget gate, an input gate, and an output gate. The specific unit calculation process is as follows:

[0090] Forgotten Gate:

[0091] f t =σ(W f ·[h t-1 ,x t ]+b f )

[0092] Among them, f t For the output of the forget gate, W is the sigmoid function. f Let h be the weight matrix of the forget gate. t-1 For the output of the previous layer, x t b is the sequence data to be input to this layer. f This is the bias term for the forget gate.

[0093] Input Gate:

[0094]

[0095] The input gate consists of two parts: one part uses The sigmoid function, i t W is the output of the first part of the input gate. i Let h be the weight matrix of the input gate. t-1 For the output of the previous layer, xt b is the sequence data to be input to this layer. i One part is the bias term for the input gate; the other part uses the tanh activation function. W is the output of the other part of the input gate. c h is the weight matrix for the candidate cell states. t-1 For the output of the previous layer, x t b is the sequence data to be input to this layer. c This is a bias term for the candidate cell state.

[0096] Update status:

[0097]

[0098] Among them, C t f represents the cell state at the current time step. t For the output of the forget gate, C t-1 i represents the cell state at the previous time step. t The first part of the input gate is the output. This is the output of the other part of the input gate.

[0099] Output gate:

[0100]

[0101] The output gate is divided into two parts, first using The sigmoid function yields an o that takes values ​​in the interval [0,1]. t , where W o h is the weight matrix of the output gate. t-1 For the output of the previous layer, x t b is the sequence data to be input to this layer. o This is the bias term for the output gate; then the cell state is processed by the tanh activation function and then compared with o. t Multiplication is the output h of this layer. t .

Claims

1. An automated double pulse test and parameter feature analysis platform for silicon carbide MOSFET, characterized in that The analysis platform includes two parts: a hardware platform and a software platform, wherein: The hardware platform includes five parts: control unit, automatic drive unit, intelligent data unit, isolation unit and component testing unit; The control unit includes a host computer control module, a serial communication transmission module and an Ethernet communication transmission module; The automation drive unit includes an MCU control module, an ADC module, a sampling module, an overvoltage protection module, a GPIO module and a drive module; The intelligent data unit includes a data acquisition module, a data processing module and a data processing module; The isolation unit includes a signal isolation module and a drive isolation module; The host computer control module is connected to the MCU control module and the data acquisition module through the serial communication transmission module and the Ethernet communication transmission module respectively, so as to realize the double pulse test instruction and data transmission and reception control, and perform automatic data collection, processing and storage; The ADC module is connected to the MCU control module, performs voltage sampling on the component test unit through the sampling module, and performs overvoltage protection through the overvoltage protection module; The GPIO module is connected to the MCU control module, and performs voltage driving on the component test unit through the driving module; The data acquisition module is connected to the component test unit to collect the drain-source voltage V of the lower tube in the test circuit. ds , gate-source voltage V gs And main circuit current I C , and connect the built-in LSTM of the data processing module to filter the noise of the collected data; The data processing module is connected to the data storage module, which is responsible for naming the processed data according to the test time and storing it in the corresponding folder; The driving isolation module is arranged between the driving module and the component testing unit, and is used to isolate the driving module from the component testing unit; The signal isolation module is arranged between the sampling module and the component testing unit, and is used to isolate the sampling module and the component testing unit; The component testing unit is connected to the silicon carbide MOSFET device to be tested to perform a double pulse test; The software platform includes two parts: MCU control program and host computer program; The MCU control program is connected to the MCU control module to realize the drive signal output of the silicon carbide MOSFET double pulse test and the overvoltage soft protection of the test circuit; The host computer program is connected to the host computer control module, and is used to realize parameter setting of the silicon carbide MOSFET double pulse test, and to perform visual processing on the data stored in the data storage module, and to generate a user interface so that the user can read and analyze the data.

2. A method for performing automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET using the analysis platform described in claim 1, characterized in that The method comprises the following steps: Step (1) pre-test and overvoltage monitoring: the host computer control module sends a pre-test instruction to the MCU control module through the serial communication transmission module. The MCU control module implements device overvoltage protection by controlling the overvoltage protection module according to the sampling result of the ADC module. If the sampled voltage exceeds the threshold value set by the host computer control module, the overvoltage protection module cuts off the test loop, and the MCU control module feeds back "overvoltage protection triggered" to the host computer control module; if the sampled voltage does not exceed the threshold value set by the host computer control module, the MCU control module feeds back "test loop normal" to the host computer control module. Step (2) Test instruction confirmation: After confirming that the test loop is normal, the host computer control module sends a normal test instruction to the MCU control module; Step (3) generating a double pulse signal: after receiving the normal test instruction, the MCU control module controls the GPIO module to generate a double pulse signal, and drives the silicon carbide MOSFET device to be tested in the component test unit through the driving module to perform a double pulse test; Step (4) Data acquisition and processing: The data acquisition module records the drain-source voltage V of the lower tube in the test circuit. ds , gate-source voltage V gs And main circuit current I C ; The data processing module filters the noise of the collected data through the pre-trained LSTM, and the data storage module stores the processed data.

3. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 2, characterized in that In step (4), the steps of performing noise filtering on the collected data are as follows: Step S1: Data normalization processing: Step S1.1: The data acquisition module obtains the drain-source voltage V of the lower tube in the test circuit. ds , gate-source voltage V gs And main circuit current I C One-dimensional data, represented as [x1,x2,…,x n ]’s data array; Step S1.2: After the one-dimensional data is standardized, the new sequence [y1, y2, …, y n ] is calculated by the following formula: Among them, y i is the new sequence generated after standardization, x i is the original sequence, is the original sequence mean, s is the standard deviation of the input data; Step S2: time window design: Step S2.1, the data processing module determines the time window size according to the sampling rate of the analysis data; Step S2.2: Generate multiple time windows by sliding window method, each window contains n consecutive data points, and the time window data is expressed as: (y) n+1 )=([y1,y2,…,y n ]) Among them, (y n+1 ) is the output time window data, ([y1,y2,…,y n ]) is the standardized time series data; Step S3, LSTM structure parameter setting: Step S3.1, dividing the time window data set generated in step S2.2 into the data set in time order; Step S3.2, input the data set into an LSTM network composed of multiple LSTM layers and a fully connected layer to achieve deep learning and feature extraction of the data; the structural parameters of the LSTM network include input dimension, hidden layer dimension, and output dimension, where the input dimension is the number of samples n in the time window, the hidden layer dimension is 20, and the output dimension is 3; Step S4: LSTM network training and optimization: Train the LSTM network and optimize it using mean square error calculation and Adam optimization algorithm; Step S5: After converting the one-dimensional data into three-dimensional data [number of samples, time step, number of features], use the trained LSTM model to predict the input data and filter out noise.

4. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 3, characterized in that Said By formula Conclude.

5. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 3, characterized in that The s is given by the formula Conclude.

6. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 3, characterized in that The calculation formula of the time window size is expressed as: n=f s ×T Where n is the number of samples in the time window, f s is the sampling rate and T is the window duration.

7. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 3, characterized in that The update of the LSTM network state is described by the following formula: Among them, f t 、i t , o t They are the three gate parameters of forget gate, input gate and output gate, g t For candidate status, and is the activation function, W is the weight matrix, x t is the input of the LSTM layer, h t-1 is the short-term state of the previous layer, and b is the bias term.

8. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 3, characterized in that The calculation formula of the mean square error is: Among them, MSE is the mean square error, N is the number of samples, and Y true,i is the true value, Y pred,i is the predicted value.

9. The method for automated double pulse testing and parameter characteristic analysis of silicon carbide MOSFET according to claim 3, characterized in that The Adam optimization algorithm dynamically adjusts the network parameters, and its calculation formula is: Among them, g t is the gradient at time step t, J(θ) is the loss function; m t is the first-order moment, v t is the second-order moment, β1 and β2 are hyperparameters; and is to perform bias correction; θ t+1 To update the parameters, α is the learning rate and ε is a very small number to avoid division by 0.

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