CXL-containing memory page placement system

Abstract

The invention discloses a CXL-containing memory page placement system, and relates to the technical field of memories. Comprising a memory cold and hot page detection module and a memory migration module which are connected in sequence; the memory cold and hot page detection module is used for collecting memory access events, generating a page heat map based on the collected memory access events, and analyzing page types and page locality; the memory migration module is used for identifying and distributing cold and hot memory interfaces. According to the method, the use performance of the memory can be optimized and improved, and the method has good market prospects and application value.

Description

Technical Field

[0001] The present invention relates to the field of memory technology, and in particular to a memory page placement system including CXL. Background Art

[0002] DRAM is a dynamic random access memory, which is the memory widely used at this stage. Its characteristic is that information is lost after power failure. In theory, the read and write life is unlimited. The current Linux memory management mechanism is designed for homogeneous CPU systems that are only connected to DRAM, but it performs poorly on CXL memory systems.

[0003] Therefore, how to provide a memory page placement system including CXL to solve the difficulties existing in the prior art is a problem that those skilled in the art need to solve urgently. Summary of the invention

[0004] In view of this, the present invention provides a memory page placement system including CXL, which can optimize and improve the performance of memory and has good market prospects and application value.

[0005] In order to achieve the above object, the present invention adopts the following technical solution:

[0006] A memory page placement system including CXL, comprising a memory cold and hot page detection module and a memory migration module connected in sequence;

[0007] The memory hot and cold page detection module is used to collect memory access events, and based on the collected memory access events, generate a page heat map, and analyze page types and page locality;

[0008] The memory migration module is used to identify and allocate hot and cold memory interfaces.

[0009] Optionally, the memory hot and cold page detection module includes a collector and a processor connected by signals:

[0010] The collector divides the CPU cores into multiple groups to collect memory access events as sampling data.

[0011] The processor is used to analyze the sampled data collected by the collector and generate page heat maps, page types, and page locality information.

[0012] Optionally, the collector collects memory access events in the following ways:

[0013] Initialize the performance monitoring mechanism PEBS event for each CPU core and set the event threshold and sampling buffer;

[0014] Divide all CPU cores into multiple groups and enable sampling group by group;

[0015] When the number of events reaches the threshold, the performance monitoring mechanism PEBS triggers an interrupt and writes the event record into the sampling buffer;

[0016] The collector reads event records from the sampling buffer and stores them in a hash table;

[0017] After each sampling interval, the collector switches the sampling event collection task to the next CPU core group;

[0018] After each sampling interval, the Collector wakes up the workers to process the sampled data.

[0019] Optionally, the sampling data collected by the processor analysis collector includes:

[0020] Convert the virtual address of the sampled record to a physical address;

[0021] Generate page heat map;

[0022] Analyze page access patterns based on page heat maps.

[0023] Optionally, the memory migration module includes a memory allocation unit, a memory page hot and cold identification unit, a memory elimination unit, and a memory promotion unit:

[0024] The memory allocation unit is used to allocate new memory pages;

[0025] Memory cold and hot page identification, connected to the output of the memory allocation unit, used to identify cold pages in local memory and hot pages in CXL memory;

[0026] A memory elimination unit connected to the first output terminal of the memory hot and cold page identification, and used for migrating the cold pages in the local memory to the CXL memory;

[0027] The memory promotion unit is connected to the second output terminal of the memory hot and cold page identification, and is used to migrate the hot pages in the CXL memory to the local memory.

[0028] Optionally, the memory hot and cold page identification includes: determining the hot and coldness of the local memory page through the least recently used algorithm LRU mechanism, and determining the hot and coldness of the CXL memory page through the NUMAhint fault.

[0029] Optionally, the memory allocation unit includes: if the number of free pages in the local memory is higher than the allocation watermark, allowing new pages to be allocated to the local memory;

[0030] If the number of free pages in the local memory is lower than the allocation watermark, new pages are allocated to the CXL memory.

[0031] Optionally, the memory elimination unit includes: monitoring the memory usage of the local memory, and triggering the elimination mechanism when the used pages are higher than the elimination water level;

[0032] Use the least recently used algorithm (LRU) mechanism to select the page that has not been accessed for the longest time as the candidate for elimination;

[0033] Check if the candidate page is an anonymous page or a cached page;

[0034] If it is an anonymous page, it will not be eliminated for the time being, but will be marked as eliminated;

[0035] If the page is still a candidate for elimination in the next cycle, the page is eliminated to CXL memory. If the page is not a candidate for elimination in the next cycle, the elimination mark is cleared.

[0036] If it is a file page, the page is directly eliminated to CXL memory.

[0037] Optionally, monitor the memory access of CXL memory and trigger the promotion mechanism when a NUMAhint fault occurs on the page;

[0038] Check if the page is in the active least recently used algorithm LRU list:

[0039] If the page is in the active least recently used algorithm LRU list, migrate it to local memory;

[0040] If the page is in the inactive least recently used algorithm LRU list, it is marked as visited and moved to the active least recently used algorithm LRU list.

[0041] It can be seen from the above technical solution that, compared with the prior art, the present invention provides a memory page placement system containing CXL, which has the following beneficial effects: 1) The present invention performs page detection and management for a memory system that mixes DRAM and CXL, and provides a method for detecting hot and cold memory pages and placing pages, so as to optimize and improve the performance of memory usage; 2) The present invention can place hot pages in the fast memory layer DRAM and cold pages in the slow memory layer CXL memory without explicit intervention by the application, thereby improving application performance, and has good market prospects and application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0043] Figure 1 A block diagram of a memory page placement system including CXL disclosed in the present invention;

[0044] Figure 2 This is a working principle diagram of the memory hot and cold page detection module disclosed in the present invention;

[0045] Figure 3 This is a working principle diagram of the memory migration module disclosed in the present invention. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0047] Reference Figure 1 As shown, the present invention discloses a memory page placement system including CXL, including a memory cold and hot page detection module and a memory migration module connected in sequence;

[0048] The memory hot and cold page detection module is used to collect memory access events, and based on the collected memory access events, generate a page heat map, and analyze page types and page locality;

[0049] The memory migration module is used to identify and allocate hot and cold memory interfaces.

[0050] Further, see Figure 2 As shown, the memory hot and cold page detection module includes a collector and a processor connected by signals:

[0051] The collector divides the CPU cores into multiple groups to collect memory access events as sampling data.

[0052] The processor is used to analyze the sampled data collected by the collector and generate page heat maps, page types, and page locality information.

[0053] Furthermore, the method for the collector to collect memory access events includes:

[0054] Initialize PEBS events for each CPU core, and set event thresholds and sampling buffers. Specifically, select hardware events related to memory access, namely last-level cache miss (L3 miss) and TLB miss, according to the analysis target; set a threshold for each event, set the sampling rate to 1% of the application CPU utilization considering the performance impact, and set the event threshold to the maximum interrupt response time within each sampling interval; allocate a sampling buffer for each CPU core to store event records; enable PEBS events using processor-specific instructions or system calls, and configure the sampling buffer;

[0055] Divide all CPU cores into multiple groups and enable sampling for each group. Specifically, determine how many groups the CPU cores are divided into according to the number of CPU cores and the sampling interval. For example, if the number of CPU cores is 8 and the sampling interval is 5 seconds, the CPU cores can be divided into 2 groups, each with 4 cores. Create a core group data structure and assign each CPU core to a corresponding core group. Enable sampling for each group and set a timer to switch to the next core group after each sampling interval.

[0056] When the number of events reaches the threshold, PEBS triggers an interrupt and writes the event record into the sampling buffer;

[0057] The collector reads event records from the sampling buffer and stores them in a hash table. Event information includes event type, virtual address, timestamp, etc.

[0058] After each sampling interval, the collector switches the sampling event collection task to the next CPU core group, specifically, stops the PEBS event sampling of the current core group; enables the PEBS event sampling of the next core group, and sets a timer to switch to the next core group after the next sampling interval;

[0059] After each sampling interval, the collector wakes up the worker to process the sampled data. Specifically, the collector thread sends a signal to the processor thread to notify it to start processing the sampled data. The collector thread waits for the worker thread to complete the processing before continuing to sample the next sampling interval.

[0060] Furthermore, the sampling data collected by the processor analysis collector includes:

[0061] Convert the virtual address of the sampled record to a physical address;

[0062] Generate page heat map;

[0063] Analyze page access patterns based on page heat maps.

[0064] Furthermore, converting the virtual address of the sample record into a physical address includes:

[0065] The processor reads the proc / $PID / maps file to obtain the virtual address space layout information of the process;

[0066] The processor reads the / proc / $PID / pagemap file to obtain the mapping relationship between virtual addresses and physical addresses;

[0067] The worker converts the virtual address of the sample record into a physical address based on the virtual address and page size.

[0068] Furthermore, generating a page heat map includes:

[0069] Maintain a bitmap for each page to record its active status in each sampling interval;

[0070] Whenever a page is accessed, the processor updates the page activity bitmap and sets the corresponding bit to 1;

[0071] Based on the page activity bitmap, a page heat map is generated to show the activity level of each page over a period of time.

[0072] Furthermore, the access patterns of the analyzed pages include:

[0073] According to the page heat map, analyze the hotness and coldness of the page, including cold pages and hot pages;

[0074] Analyze the access frequency of pages according to the page activity bitmap, including low-frequency access pages and high-frequency access pages;

[0075] Analyze page access patterns based on page popularity and access frequency, including short-term active pages, long-term active pages, and intermittently active pages.

[0076] Further, see Figure 3 As shown, the memory migration module includes a memory allocation unit, a memory page hot and cold identification unit, a memory elimination unit, and a memory promotion unit:

[0077] The memory allocation unit is used to allocate new memory pages;

[0078] Memory cold and hot page identification, connected to the output of the memory allocation unit, used to identify cold pages in local memory and hot pages in CXL memory;

[0079] A memory elimination unit connected to the first output terminal of the memory hot and cold page identification, and used for migrating the cold pages in the local memory to the CXL memory;

[0080] The memory promotion unit is connected to the second output terminal of the memory hot and cold page identification, and is used to migrate the hot pages in the CXL memory to the local memory.

[0081] Furthermore, it also includes maintaining two watermarks for local memory: an allocation watermark and an elimination watermark. The allocation watermark is set lower than the elimination watermark. If the local memory usage page is higher than the elimination watermark, some pages will be migrated to the CXL memory. If the local memory usage page is lower than the allocation watermark, the CXL memory page will be migrated to the local memory.

[0082] Furthermore, the identification of hot and cold memory pages includes: judging the hot and coldness of local memory pages by using the least recently used algorithm LRU mechanism, and judging the hot and coldness of CXL memory pages by using NUMAhint fault.

[0083] Furthermore, NUMAhint fault refers to a minor page fault in the NUMA balancing mechanism when a CPU accesses a page that does not belong to its local memory node. This page fault prompts the kernel to migrate the page to the local memory node of the CPU accessing it to reduce access latency.

[0084] Further, the memory allocation unit includes: if the number of free pages in the local memory is higher than the allocation watermark, allowing new pages to be allocated to the local memory;

[0085] If the number of free pages in the local memory is lower than the allocation watermark, new pages are allocated to the CXL memory.

[0086] Furthermore, the memory elimination unit includes: monitoring the memory usage of the local memory, and triggering the elimination mechanism when the used pages are higher than the elimination water level;

[0087] Use the least recently used algorithm (LRU) mechanism to select the page that has not been accessed for the longest time as the candidate for elimination;

[0088] Check if the candidate page is an anonymous page or a cached page;

[0089] If it is an anonymous page, it will not be eliminated for the time being, but will be marked as eliminated;

[0090] If the page is still a candidate for elimination in the next cycle, the page is eliminated to CXL memory. If the page is not a candidate for elimination in the next cycle, the elimination mark is cleared.

[0091] If it is a file page, the page is directly eliminated to CXL memory.

[0092] Furthermore, the memory access of CXL memory is monitored, and when a NUMAhint fault occurs on a page, the promotion mechanism is triggered;

[0093] Check if the page is in the active least recently used algorithm LRU list:

[0094] If the page is in the active least recently used algorithm LRU list, migrate it to local memory;

[0095] If the page is in the inactive least recently used algorithm LRU list, it is marked as visited and moved to the active least recently used algorithm LRU list.

[0096] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A memory page placement system including CXL, characterized in that: It includes a memory hot and cold page detection module and a memory migration module connected in sequence; The memory hot and cold page detection module is used to collect memory access events, and based on the collected memory access events, generate a page heat map, and analyze page types and page locality; The memory migration module is used to identify and allocate hot and cold memory interfaces.

2. A memory page placement system including CXL according to claim 1, characterized in that: The memory hot and cold page detection module includes a collector and a processor connected by signals: The collector divides the CPU cores into multiple groups to collect memory access events as sampling data; The processor is used to analyze the sampled data collected by the collector and generate page heat maps, page types, and page locality information.

3. A memory page placement system including CXL according to claim 2, characterized in that: The collector collects memory access events in the following ways: Initialize the performance monitoring mechanism PEBS event for each CPU core and set the event threshold and sampling buffer; Divide all CPU cores into multiple groups and enable sampling group by group; When the number of events reaches the threshold, the performance monitoring mechanism PEBS triggers an interrupt and writes the event record into the sampling buffer; The collector reads event records from the sampling buffer and stores them in a hash table; After each sampling interval, the collector switches the sampling event collection task to the next CPU core group; After each sampling interval, the Collector wakes up the workers to process the sampled data.

4. A memory page placement system including CXL according to claim 2, characterized in that: The sampling data collected by the processor profiling collector includes: Convert the virtual address of the sampled record to a physical address; Generate page heat map; Analyze page access patterns based on page heat maps.

5. A memory page placement system including CXL according to claim 1, characterized in that: The memory migration module includes a memory allocation unit, a memory page hot and cold identification unit, a memory elimination unit, and a memory promotion unit: The memory allocation unit is used to allocate new memory pages; Memory cold and hot page identification, connected to the output of the memory allocation unit, used to identify cold pages in local memory and hot pages in CXL memory; A memory elimination unit connected to the first output terminal of the memory hot and cold page identification, and used for migrating the cold pages in the local memory to the CXL memory; The memory promotion unit is connected to the second output terminal of the memory hot and cold page identification, and is used to migrate the hot pages in the CXL memory to the local memory.

6. A memory page placement system including CXL according to claim 5, characterized in that: Identification of hot and cold memory pages includes: judging the hot and coldness of local memory pages through the least recently used algorithm LRU mechanism, and judging the hot and coldness of CXL memory pages through NUMAhint fault.

7. A memory page placement system including CXL according to claim 5, characterized in that: The memory allocation unit includes: if the number of free pages in the local memory is higher than the allocation watermark, allowing new pages to be allocated to the local memory; If the number of free pages in the local memory is lower than the allocation watermark, new pages are allocated to the CXL memory.

8. A memory page placement system including CXL according to claim 5, characterized in that: The memory elimination unit includes: monitoring the memory usage of the local memory, and triggering the elimination mechanism when the used pages are higher than the elimination water level; Use the least recently used algorithm (LRU) mechanism to select the page that has not been accessed for the longest time as the candidate for elimination; Check if the candidate page is an anonymous page or a cached page; If it is an anonymous page, it will not be eliminated for the time being, but will be marked as eliminated; If the page is still a candidate for elimination in the next cycle, the page is eliminated to CXL memory. If the page is not a candidate for elimination in the next cycle, the elimination mark is cleared. If it is a file page, the page is directly eliminated to CXL memory.

9. A memory page placement system including CXL according to claim 5, characterized in that: Monitor the memory access of CXL memory and trigger the promotion mechanism when a NUMAhint fault occurs on the page; Check if the page is in the active least recently used algorithm LRU list: If the page is in the active least recently used algorithm LRU list, migrate it to local memory; If the page is in the inactive least recently used algorithm LRU list, it is marked as visited and moved to the active least recently used algorithm LRU list.

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