Display panel

Abstract

The invention discloses a display panel, the display panel comprises a non-display area and a display area, the non-display area surrounds the display area, and the non-display area comprises a substrate; the driving module is positioned on one side of the substrate; the bonding pads are located on the side, away from the display area, of the driving module at intervals; the at least one capacitor structure is located on the periphery of the driving module, and the capacitor structure is electrically connected with the bonding pad; the detection module is electrically connected with the capacitor structure and used for detecting the capacitance value of the capacitor structure and converting the capacitance value into a temperature value according to a first preset relation. At least one capacitor structure is arranged on the periphery of a driving module located in a non-display area, a detection module is connected with a bonding pad and the capacitor structure, the bonding pad provides a detection signal for the capacitor structure, and the detection module detects the capacitance value of the capacitor structure and converts the capacitance value into a temperature value. The temperature of the peripheral area of the driving module in the working process is independently detected, so that the temperature of the local area of the display panel is accurately fed back.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel. Background Art

[0002] The temperature of the display panel will change during use, and if the temperature of the display panel is too high, it will affect the luminous effect of the display panel and the service life of various devices. Especially for devices that generate a lot of heat when the display panel is working, such as driver chips, if the operating temperature of the driver chip is too high, it is likely to burn out, affecting the use of the display panel. Therefore, an external sensor is generally added to the display panel, or a resistance line is made inside the surface to pass through the surface. By monitoring the resistance change, it is converted into temperature change and then the temperature of the display panel is monitored. However, the temperature monitored by the temperature sensor set by the above method is the temperature of the entire panel. In the in-plane resistance design, the area where the line passes has high temperature and low temperature parts, and the resistance change is the change of the entire line, so the monitored temperature is the average temperature of the area passed through, and it is impossible to accurately feedback the temperature of the location where the high-temperature device in the panel will be generated. Summary of the invention

[0003] The present application provides a display panel to solve the problem in the prior art that the temperature of a local area of ​​the display panel cannot be accurately fed back.

[0004] According to one aspect of the present application, a display panel is provided, comprising a non-display area and a display area, wherein the non-display area is arranged around the display area, and the non-display area comprises: a substrate; a driving module located on one side of the substrate; a plurality of pads located at intervals on a side of the driving module away from the display area; at least one capacitor structure located around the driving module, the capacitor structure being electrically connected to the pad; and a detection module electrically connected to the capacitor structure, for detecting a capacitance value of the capacitor structure and converting the capacitance value into a temperature value according to a first preset relationship.

[0005] The present application proposes a display panel, which includes: a driving module, a pad, a capacitor structure and a detection module, wherein the vicinity of the driving module is an area in the display panel that is prone to high temperature. At least one capacitor structure is arranged around the driving module in a non-display area of ​​the display panel, and the detection module is connected to the capacitor structure. The detection module provides a detection signal to the capacitor structure, detects the capacitance value of the capacitor structure, and converts the above capacitance value into a temperature value, thereby realizing real-time temperature detection of the area around the driving module, so as to achieve accurate feedback on the temperature of the local area of ​​the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0007] Figure 1 is a schematic diagram of a top view structure of a display panel provided according to an embodiment of the present application;

[0008] Figure 2 yes Figure 1 A schematic diagram of a partially enlarged structure of a non-display area of ​​a display panel;

[0009] Figure 3 yes Figure 2 A schematic diagram of the cross-sectional structure of the non-display area structure;

[0010] Figure 4 is a schematic cross-sectional structure diagram of an array substrate of a display area provided according to an embodiment of the present application;

[0011] Figure 5 is a schematic diagram of a partial top view structure of a display area and a non-display area of ​​a display panel provided according to an embodiment of the present application;

[0012] Figure 6 is a partial top view structural diagram of a display area and a non-display area of ​​another display panel provided according to an embodiment of the present application;

[0013] Figure 7 is a schematic cross-sectional structure diagram of a capacitor structure provided according to an embodiment of the present application;

[0014] Figure 8 yes Figure 2 A schematic diagram of a local enlarged structure of the capacitor structure;

[0015] Fig. 9 yes Figure 2 Another schematic diagram of a local enlarged structure of the capacitor structure;

[0016] Fig.10 yes Figure 2 Another partial enlarged structural schematic diagram of the mid-capacitor structure;

[0017] Fig.11 is a schematic cross-sectional structure diagram of another capacitor structure provided according to an embodiment of the present application;

[0018] Fig.12 yes Figure 2 Another partial enlarged structural schematic diagram of the mid-capacitor structure;

[0019] Fig.13 yes Figure 2 Another partial enlarged structural schematic diagram of the mid-capacitor structure;

[0020] Fig.14 yes Figure 2 Another partial enlarged structural schematic diagram of the mid-capacitor structure;

[0021] Fig.15 yes Figure 2 Another partial enlarged structural schematic diagram of the mid-capacitor structure;

[0022] Fig.16 yes Figure 2 Another schematic diagram of a local enlarged structure of the mid-capacitor structure.

[0023] The above drawings include the following reference numerals:

[0024] 10. Non-display area; 11. Fan-out area; 20. Display area; 21. Thin film transistor; 22. Pixel electrode; 23. Capacitor component; 30. Substrate; 31. Multilayer film layer; 40. Driving module; 41. Input pin; 42. Output pin; 50. Pad; 51. Detection pad; 52. Input pad; 53. Output pad; 60. Capacitor structure; 61. First capacitor structure; 62. Second capacitor structure; 63. Third capacitor structure; 64. Fourth capacitor structure; 65. 10. First electrode plate; 620. Capacitor insulating layer; 630. Second electrode plate; 640. Third electrode plate; 70. Detection module; 80. Array substrate; 81. Active layer; 82. Gate layer; 83. Source layer; 84. Drain layer; 85. Pixel electrode layer; 86. Touch electrode layer; 87. Common electrode layer; 820. First insulating layer; 830. Second insulating layer; 850. Third insulating layer; 860. Fourth insulating layer; 90. Hollow area; 100. Flexible circuit board. DETAILED DESCRIPTION

[0025] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0026] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] As mentioned in the background technology, the temperature monitored by the temperature sensor in the display panel is the temperature of the entire panel. In the in-plane resistance design, the area where the wiring passes has high temperature and low temperature parts, and the resistance change is the change of the entire wiring. Therefore, the monitored temperature is the average temperature of the area passed through, and it is impossible to accurately feedback the temperature of the high temperature position in the panel. The drive module is the most serious heat in the display panel and is easily damaged by high temperature. The display area close to the drive module is easily affected by high temperature and produces uneven light emission.

[0029] According to one embodiment of the present application, Figure 1 is a schematic diagram of a top view structure of a display panel provided according to an embodiment of the present application, Figure 2 yes Figure 1 A partial enlarged structural diagram of the non-display area of ​​the display panel. Figure 1 and Figure 2 As shown, a display panel is provided, including a non-display area 10 and a display area 20, wherein the non-display area 10 is arranged around the display area 20, and the non-display area 10 includes: a substrate 30; a driving module 40, located on one side of the substrate 30; a plurality of pads 50, spaced apart and located on a side of the driving module 40 away from the display area 20; at least one capacitor structure 60, located around the driving module 40, the capacitor structure 60 is electrically connected to the pad 50; a detection module 70, electrically connected to the capacitor structure 60, for detecting the capacitance value of the capacitor structure 60, and converting the capacitance value into a temperature value according to a first preset relationship.

[0030] By setting at least one capacitor structure around the driving module that is most likely to generate high temperature, and then detecting the capacitance value of the capacitor structure, the detection module converts the capacitance value into a corresponding temperature value, and then accurately and targetedly detects the area in the display panel that is prone to high temperature, thereby solving the problem that the temperature of the local area of ​​the display panel cannot be accurately fed back. In the case where it is detected that the temperature somewhere is higher than the temperature threshold for normal operation of the device, the detected temperature signal is transmitted to the control center of the display panel. The control center can reduce the temperature of the display panel by reducing the backlight brightness and display frequency. In more serious cases, the display panel can also be directly turned off to stop the display panel from working to protect the components of the panel.

[0031] The above is the core idea of ​​this application. The technical solutions in the embodiments of this application will be described clearly and completely below in conjunction with the drawings in the embodiments of this application. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0032] like Figure 1 As shown, the display panel includes a display area 20 and a non-display area 10. The display area 20 includes a plurality of gate lines (G1, G2, ..., Gn) and a plurality of data lines (S1, S2, ..., Sn), and the data lines and gate lines are insulated and intersected; the array substrate in the display area 20 includes a plurality of thin film transistors 21 arranged in an array, the source electrodes of the plurality of thin film transistors 21 in each column are electrically connected to the data lines, the gate electrodes of the plurality of thin film transistors 21 in each row are electrically connected to the gate lines, the drain electrodes of each thin film transistor 21 are electrically connected to the capacitor components 23 and the pixel electrodes 22, and the plurality of capacitor components 23 in each row are electrically connected to the capacitor lines (M1, M2, ..., Mn). The non-display area 10 includes a driving module 40, which can be, for example, an IC, and the control signal is drawn from the IC and input into the display area 20 through the relevant signal lines to provide various control signals for the display area 20. The driving module 40 frequently operates and easily generates heat, which may be different from the temperature of other areas of the display panel. Therefore, the temperature of the driving module 40 needs to be measured in time so that when the detected temperature exceeds the temperature threshold, corresponding adjustments can be made in time. Figure 1 The structure of the display area and the non-display area of ​​the display panel is only given as an example. In practice, the display panel can be configured as needed.

[0033] like Figure 1As shown, the periphery of the driving module 40 can be a blank area on one side of the driving module 40 close to the display area 20 (where the first capacitor structure 61 is placed), can be a blank area on the left and right sides of the driving module 40 (where the second capacitor structure 62 and the third capacitor structure 63 are placed respectively), can be a projection area of ​​the driving module on the display panel (where the fourth capacitor structure 64 is placed), Figure 1 Only one of each position is shown, and each position can also be set to multiple. Figure 3 yes Figure 2 FIG. 1 is a schematic cross-sectional structure diagram of the non-display area 10. Figure 2 and Figure 3 As shown, after the input pin 41 of the driving module 40 is connected to the input pad 52, and the output pin 42 of the driving module 40 is connected to the output pad 53, the above-mentioned blank area is the area between the driving module 40 and the multilayer film layer 31 on the substrate 30 (including one or more layers of the film layers such as the insulating layer, the film layer in the same layer as the active layer, the film layer in the same layer as the gate layer, and the film layer in the same layer as the source and drain layer), that is, the blank area between the input pad 52 and the output pad 53. The capacitor structure 60 is arranged in the blank area around the driving module 40. In addition to detecting the temperature of the area where the driving module 40 is located, it can also provide certain support for the driving module 40 when it is bound, so as to prevent the driving module 40 from sinking or warping due to the lack of support in the surrounding blank area, thereby causing damage. Among them, the capacitor structure 60 can be completely located in the blank area between the driving module 40 and the multilayer film layer on the substrate, or it can be partially located in the blank area, thereby supporting the driving module 40 and improving the area utilization efficiency of the display panel.

[0034] The above-mentioned capacitor structure has different voltage thresholds at different temperatures. The detection module can use the pulse width method to detect the capacitance value of the capacitor structure. The detection module is used to detect the time when the capacitor structure reaches the voltage threshold during charging. When the charging resistance R is constant, the charging time T and the capacitance value C are inversely proportional (T=RC). In this way, the capacitance value of the capacitor structure can be detected, and the temperature value is obtained based on the capacitance value.

[0035] Specifically, Figure 1 The two pins of the capacitor structure 60 can be electrically connected to the two detection pads 51 respectively, and the capacitor detection signals can be transmitted to the multiple capacitor structures 60 in the display panel at the same time; one pin of the multiple capacitor structures 60 can also be electrically connected to the same detection pad 51, and the other pins of the multiple capacitor structures 60 can be electrically connected to another same detection pad 51. This implementation method can save the number of detection pads 51, effectively improve the utilization rate of the display panel, and perform time-sharing detection on different capacitor structures 60.

[0036] The capacitor structure can be arranged in the same direction as the input or output pad, or vertically or tilted. Figure 2 , Figure 2 There are several capacitor structures 60 ( Figure 2 The structures filled in the figure are all capacitor structures 60). The specific degree of inclination of the capacitor structure 60 depends on the pad and wiring layout of the non-display area, and this application does not make any specific limitation.

[0037] The substrate 30 may be formed of any suitable insulating material having flexibility. For example, the substrate 30 may be formed of a polymer material such as polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyarylate (PAR), or fiberglass reinforced plastic (FRP). The substrate 30 may also be formed of a rigid material such as glass.

[0038] In some optional embodiments, such as Figure 1 As shown, the non-display area 10 includes a functional area and a non-functional area. The functional area includes the driving module 40 . The non-functional area is located on a side of the driving module 40 close to the display area. The non-functional area includes the capacitor structure 60 .

[0039] In the above optional implementation, if Figure 1 As shown, the functional area is an area in the non-display area 10 where signal lines, pads or driving modules 40 are set, and the non-functional area is a blank area (an area without functional modules) other than the functional area. The non-display area 10 includes a fan-out area 11, which is used to lead out various signal lines in the display area 20 and connect to the driving module 40, so that the driving module 40 can process the signal received from the input pad 52, and then transmit the processed signal to the display area 20 through the output pad and the signal line. The above-mentioned signal line can be a data signal line, a touch signal line, a common electrode signal line, etc.

[0040] Figure 4 is a schematic cross-sectional structure diagram of an array substrate of a display area provided according to an embodiment of the present application. Figure 1 and Figure 4The display area 20 of the display panel includes an array substrate 80, which includes a substrate 30 and thin film transistors 21 (including an active layer 81, a gate layer 82, a source layer 83 and a drain layer 84), a pixel electrode layer 85, a touch electrode layer 86 and a common electrode layer 87 formed on the substrate 30 in sequence. The number of thin film transistors 21 includes multiple thin film transistors 21, and the multiple thin film transistors 21 are arranged in an array on the substrate 30; the pixel electrode layer 85 is located on the side of the drain layer 84 away from the substrate 30, and the pixel electrode layer 85 contacts the drain layer 84 of the corresponding thin film transistor through the via hole of the insulating layer, and the material of the pixel electrode layer 85 can be selected from ITO (IndiumTin The touch electrode layer 86 is located on the side of the pixel electrode layer 85 facing away from the substrate 30, that is, the touch electrode layer 86 is located above the pixel electrode layer 85; the common electrode layer 87 is located on the side of the touch electrode layer 86 facing away from the pixel electrode layer 85, that is, the common electrode layer 87 is located above the touch electrode layer 86, and the common electrode layer 87 is connected to the corresponding touch electrode layer 86. The material of the common electrode layer 87 can be ITO (Indium Tin Oxide), or other transparent conductive materials.

[0041] In some optional embodiments, such as Figure 1 and Figure 2 and Figure 5 As shown, the capacitor structures 60 are spaced apart in the non-display area 10 .

[0042] In the above optional implementation, if Figure 1 As shown, the capacitor structure 60 can be located at intervals on one side of the driving module 40 close to the display area 20, on the projection area of ​​the driving module 40 in the display panel, and on the left and right sides of the driving module 40, for all-round temperature detection of the driving module 40. Figure 2 As shown, the signal lines in the display area are reasonably arranged, and multiple spaced capacitor structures 60 can be located on the left and right of the driver module 40 and in the area between the display area and the driver module 40 to surround the driver module 40. They can also be located in the projection area of ​​the driver module 40 on the display panel to fill the space below the driver module 40 and make full use of it. While the temperature of the driver module 40 can be fully detected, the blank area below the driver module 40 can also be supported to prevent the driver module 40 from sinking or warping due to the lack of support in the surrounding blank area, thereby improving the yield of the display panel. Furthermore, Figure 5 FIG. 1 is a schematic diagram of a partial top view of a display area and a non-display area of ​​a display panel provided according to an embodiment of the present application. Figure 5As shown, when the display panel space is relatively small, the signal lines in the display area 20 can be reasonably arranged in the non-display area above the driving module to leave an area for setting the capacitor structure 60. The capacitor structure 60 is placed in this area to perform temperature detection on the area other than the area around the driving module. Figure 5 As shown, multiple independent capacitor structures 60 are arranged in the non-display area 10. This arrangement method can realize multi-point temperature monitoring of the display panel and improve the monitoring accuracy. At least one electrode of the multiple capacitor structures 60 can share the film layer in the display area (such as Figure 4 The active layer 81, gate layer 82, source layer 83 and drain layer 84, pixel electrode layer 85, touch electrode layer 86 and common electrode layer 87, etc., can realize temperature detection in different areas without increasing the production cost of the display panel.

[0043] Figure 5 The capacitor structure 60 in Figure 1 and Figure 2 By combining the capacitor structure 60 located near the driving module 40, the temperature of each part of the entire display panel can be more comprehensively monitored. For example, the capacitor structure 60 surrounding the display area 20 in the display panel is Figure 5 In the scheme, the capacitor structure 60 near the driving module 40 includes Figure 1 The capacitor structure 60 surrounding the display area 20 in the display panel is any one or more of the first capacitor structure 61, the second capacitor structure 62, the third capacitor structure 63 and the fourth capacitor structure 64; Figure 5 In the scheme, the capacitor structure 60 near the driving module 40 is Figure 2 The specific combination is not specifically limited in this application.

[0044] It should be noted that the shape of the capacitor structure in a top view is not limited to a circle, a rounded quadrilateral, a polygon or the like.

[0045] Figure 6 FIG. 1 is a partial top view of the display area and non-display area of ​​another display panel provided according to an embodiment of the present application. In some optional implementations, such as Figure 6 As shown, part of the capacitor structure 60 is disposed around the display area 20 .

[0046] In the above optional implementation, if Figure 6 As shown, a continuous capacitor structure 60 is arranged in the non-display area 10 outside the display area 20 to form a ring-shaped capacitor structure 60 surrounding the display area 20. Figure 5 The same as the embodiment in the embodiment, the film layer structure in the display area 20 (such as Figure 4The active layer 81, gate layer 82, source layer 83 and drain layer 84, pixel electrode layer 85, touch electrode layer 86 and common electrode layer 87 in the display area 20 form a continuous capacitor structure 60, which simplifies the process steps compared to the structure with two additional layers of capacitor plates, and also realizes the monitoring of the peripheral temperature of the display area 20.

[0047] In order to protect the display panel from electrostatic discharge, an electrostatic discharge unit may be connected to the common electrode layer, and the electrostatic discharge unit is also electrically connected to the shift register in the display panel. The electrostatic discharge unit is electrically connected to the shift register and the common electrode signal line, respectively. The output end of the shift register is usually electrically connected to a plurality of scan lines (in the display area, not shown) to provide a shift signal to each scan line, and its input end usually includes at least one clock signal line, at least one input signal line, etc., and these input ends are all electrically connected to an electrostatic discharge unit, so that the static electricity generated on the scan line can be introduced into the common electrode signal line through the shift register and released through the common electrode signal line.

[0048] Figure 6 The capacitor structure 60 in Figure 1 and Figure 2 By combining the capacitor structure 60 located near the driving module 40, the temperature of each part of the entire display panel can be more comprehensively monitored. Figure 5 Description of the place.

[0049] The above is an introduction to the layout of the capacitor structure in the display panel. Next, the specific structure of the capacitor structure 60 will be introduced.

[0050] Figure 7 is a schematic diagram of a cross-sectional structure of a capacitor structure provided according to an embodiment of the present application. In some optional implementations, such as Figure 7 As shown, the capacitor structure 60 includes a first plate 610, a capacitor insulating layer 620 and a second plate 630, wherein the first plate 610 is located on one side of the substrate; the second plate 630 is located on the side of the first plate 610 away from the substrate; the capacitor insulating layer 620 is located between the first plate 610 and the second plate 630, and the dielectric constant of the capacitor insulating layer 620 has a second preset relationship with the capacitance value of the capacitor structure 60. In the display panel, the capacitor insulating layer 620 is usually made of materials such as organic resin, SiN, SiO or SiNO.

[0051] In the above optional implementation, Figure 7 is a schematic diagram of a cross-sectional structure of a capacitor structure 60. The capacitor structure 60 is composed of at least two layers of plates and an insulating layer between the plates. Figure 7The structure of the two-layer electrode is shown in FIG. 6 , wherein the first electrode 610 is located at the bottom layer of the capacitor structure 60, that is, the substrate close to the display panel. According to the preset relationship between the capacitance value and temperature of the capacitor structure 60, the temperature of the display panel area where the capacitor structure 60 is located can be known, thereby realizing the temperature monitoring of the panel.

[0052] In some optional embodiments, reference Figure 4 and Figure 7 ,like Figure 4 As shown, the display area includes an array substrate 80, which is located on one side of the substrate 30. The array substrate 80 includes a gate layer 82, a source-drain electrode layer, a pixel electrode layer 85, a touch electrode layer 86 and a common electrode layer 87. The gate layer 82 is located on the side of the source-drain electrode layer close to the substrate 30. In the direction from the gate layer 82 to the source-drain electrode layer, the pixel electrode layer 85, the touch electrode layer 86 and the common electrode layer 87 are sequentially located on the side of the source-drain electrode layer away from the gate layer 82. The first electrode plate 610 and / or the second electrode plate 630 of the capacitor structure 60 located in the non-display area 10 can be in the same layer as the gate layer 82, the source-drain electrode layer, the pixel electrode layer 85, the touch electrode layer 86 and the common electrode layer 87, respectively, and the projections of the first electrode plate 610, the second electrode plate 630 and the driving module on the surface of one side of the substrate 30 at least partially overlap.

[0053] The combination of the first electrode plate 610 and the second electrode plate 630 is not limited to the above solution, and the capacitor insulating layer 620 located between the first electrode plate 610 and the second electrode plate 630 can be one layer or more layers. Figure 4 and Figure 7 As shown, the first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 can be in the same layer as the source layer 83 and the drain layer 84, and the capacitor insulating layer 620 is composed of the first insulating layer 820; the first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 can be in the same layer as the pixel electrode layer 85, and the capacitor insulating layer 620 can be composed of the first insulating layer 820 and the second insulating layer 830; the first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 can be in the same layer as the touch electrode layer 86, and the capacitor insulating layer 620 can be composed of the first insulating layer 820, the second insulating layer 830, and the third insulating layer 850. The first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 can be in the same layer as the common electrode layer 87, and the capacitor insulating layer 620 can be composed of the first insulating layer 820, the second insulating layer 830, the third insulating layer 850, and the fourth insulating layer 860. The first electrode 610 may also be in the same layer as the source electrode layer 83 and the drain electrode layer 84 , the pixel electrode layer 85 , or the touch electrode layer 86 . Those skilled in the art may reasonably adjust the specific results of the capacitor structure according to actual conditions.

[0054] In other embodiments, the display area includes an array substrate, which is located on one side of the substrate. The array substrate includes a gate layer, a source and drain layer, a pixel electrode layer, a touch electrode layer and a common electrode layer. The gate layer is located on the side of the source and drain layer close to the substrate. In the direction from the gate layer to the source and drain layer, the pixel electrode layer, the touch electrode layer and the common electrode layer are located in sequence on the side of the source and drain layer away from the gate layer. The first electrode plate and / or the second electrode plate and / or the third electrode plate can be in the same layer as the gate layer, the source and drain layer, the pixel electrode layer, the touch electrode layer and the common electrode layer, and the projections of the first electrode plate, the second electrode plate, the third electrode layer and the driving module on the surface of one side of the substrate at least partially overlap.

[0055] In the case where the capacitor structure is a sandwich capacitor structure, the capacitor structure also has a third electrode plate, and the third electrode plate can be in the same layer as the first electrode plate and the second electrode plate, or in a different layer. For the corresponding description, reference can be made to the above description of the first electrode plate and the second electrode plate. By setting the capacitor structure as a sandwich capacitor, another capacitor structure consisting of the second electrode plate and the third electrode plate and the capacitor insulating layer therebetween can be introduced on the basis of the capacitor structure having only the first electrode plate and the second electrode plate and the capacitor insulating layer therebetween, thereby increasing the capacitance value and improving the accuracy of the capacitor structure in detecting temperature.

[0056] like Figure 1 and Figure 2 It can be seen that the wiring of the above-mentioned capacitor structure 60 passes through the side of the driving module 40 close to the substrate 30, saving the wiring area on the surface of the non-display area 10, and the plates in the capacitor structure 60 are either located in different layers or have an insulating layer between them. The signals of the capacitor monitoring signal lines between each capacitor structure 60 do not interfere with each other, making the detection accuracy more accurate.

[0057] In some optional embodiments, such as Figures 8 to 10 As shown, the projection areas of the first electrode plate 610 and the second electrode plate 630 on the surface of the substrate at least partially overlap, and the overlapping projection areas have a plurality of hollow areas 90 .

[0058] In the above optional implementation, Figures 8 to 10 yes Figure 2 A schematic diagram of the partially enlarged structure of the capacitor structure. Figures 8 to 10 still Figure 7 The top view of the structure is shown in the figure. In the display panel, the display area is fixed to the substrate by a sealant, and the sealant is located at the edge of the display area. The sealant is usually cured by light curing. Therefore, in order to ensure that light can pass through, some film layer structures in the non-display area will have light-transmitting areas, such as designing hollows in the electrode layer and the insulating layer, or using a transparent conductive layer to prepare the electrode film layer. In order to set a capacitor structure in the non-display area while ensuring transmittance, the following can be set on the capacitor structure: Figures 8 to 10 The hollow area 90 shown, or on the basis that the material of the first electrode plate 610 and the second electrode plate 630 is a transparent conductive layer, a hollow area 90 is set on the capacitor structure. The projections of the hollow area 90 of the first electrode plate 610, the second electrode plate 630 and the capacitor insulating layer on the substrate surface at least partially overlap, and preferably, the projections of the hollow area 90 of the first electrode plate 610, the second electrode plate 630 and the capacitor insulating layer on the substrate surface completely overlap.

[0059] In some optional embodiments, the first electrode plate is electrically connected to the capacitance detection signal line, the second electrode plate is electrically connected to the common electrode signal line, or both the first electrode plate and the second electrode plate are electrically connected to the capacitance detection signal line.

[0060] In the above optional implementation, due to the characteristic of the capacitor structure, it has impedance to AC signals and has no impedance to DC signals. Therefore, only by applying DC signals and AC signals at the same time can the capacitor structure respond, so that the capacitance value can be detected. If only DC signals are applied, the capacitor structure will not have any response and the capacitance value cannot be detected. Therefore, the plates in the above capacitor structure need to have at least one plate electrically connected to the DC signal and at least one plate electrically connected to the pulse signal, specifically, when the first plate is electrically connected to the capacitor detection signal line, the second plate is electrically connected to the common electrode signal line, or when the second plate is electrically connected to the capacitor detection signal line, the first plate is electrically connected to the common electrode signal line, the DC signal is provided by the common electrode signal line, and the pulse signal line is provided by the capacitor detection signal line; when the first plate and the second plate are both electrically connected to the capacitor detection signal line, one of the capacitor detection signal lines provides a pulse signal, and the other capacitor detection signal line provides a DC signal, and then the capacitance value of the capacitor structure under different temperature environments is detected.

[0061] Fig.11 FIG. 1 is a schematic cross-sectional view of another capacitor structure provided according to an embodiment of the present application. In some optional implementations, such as Fig.11 As shown, the capacitor structure 60 further includes a third electrode plate 640, which is located on the side of the second electrode plate 630 away from the first electrode plate 610, and the capacitor insulating layer 620 is provided between the third electrode plate 640 and the second electrode plate 630. Compared with the capacitor structure 60 having only the first electrode plate 610, the second electrode plate 630 and the capacitor insulating layer 620 therebetween, a new capacitor structure 60 is incorporated.

[0062] For example, when the first electrode plate 610 and the third electrode plate 640 are electrically connected to the AC signal and the second electrode plate 630 is electrically connected to the DC signal, the structure of the sandwich capacitor is a capacitor structure 60 composed of the first electrode plate 610, the second electrode plate 630 and the capacitor insulating layer 620 therebetween, and a capacitor structure 60 composed of the third electrode plate 640, the second electrode plate 630 and the capacitor insulating layer 620 therebetween.

[0063] For example, when the first electrode plate 610 and the second electrode plate 630 are electrically connected to the AC signal and the third electrode plate 640 is electrically connected to the DC signal, the structure of the sandwich capacitor is a capacitor structure 60 composed of the first electrode plate 610, the third electrode plate 640 and the capacitor insulating layer 620 therebetween, and a capacitor structure 60 composed of the third electrode plate 640, the second electrode plate 630 and the capacitor insulating layer 620 therebetween.

[0064] Therefore, the capacitance value of the sandwich capacitor is larger than that of a capacitor structure with only two layers of plates, and the sensitivity for sensing temperature is higher, and the detection accuracy of the display panel temperature is higher.

[0065] In the above optional implementation, if Fig.11 As shown, the capacitor insulating layer 620 between the third electrode plate 640 and the second electrode plate 630 may be formed by combining one or more insulating layers. Figure 4 and Fig.11 As shown, the first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 can be in the same layer as the source layer 83 and the drain layer 84, the third electrode plate 640 can be in the same layer as the pixel electrode layer 85, and the capacitor insulating layer 620 can be composed of the planarization layer of the source layer 83 and the drain layer 84; the first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 can be in the same layer as the source layer 83 and the drain layer 84, the third electrode plate 640 can be in the same layer as the touch electrode layer 86, and the capacitor insulating layer 62 ... pixel electrode layer 85. The insulating layer 620 is composed of the planarization layer of the source layer 83 and the drain layer 84 and the planarization layer of the pixel electrode layer 85; the first electrode plate 610 can be in the same layer as the gate layer 82, the second electrode plate 630 is in the same layer as the source layer 83 and the drain layer 84, the third electrode plate 640 is in the same layer as the common electrode layer 87, and the capacitor insulating layer 620 is composed of the planarization layer of the source layer 83 and the drain layer 84, the planarization layer of the pixel electrode layer 85 and the planarization layer of the touch electrode layer 86. Those skilled in the art can reasonably adjust the specific results of the capacitor structure according to actual conditions.

[0066] The first electrode plate and the second electrode plate in the sandwich capacitor structure can both be connected to the capacitor detection signal line, and the third electrode plate can be electrically connected to the common electrode signal line, or the first electrode plate can be connected to the capacitor detection signal line, and the third electrode plate and the second electrode plate can both be electrically connected to the common electrode signal line, or all three can be connected to the capacitor detection signal line. The capacitor detection signal line can transmit an AC signal or a DC signal. When all three are connected to the capacitor detection signal line, some capacitor detection signal lines will be responsible for transmitting a DC signal, as long as at least one electrode plate is electrically connected to the DC signal and at least one electrode plate is electrically connected to the pulse signal.

[0067] Figure 12 to Figure 14 yes Figure 2 Another partial enlarged structural diagram of the capacitor structure. Figure 12 to Figure 14 Yes or Fig.11 In some optional embodiments, such as Figure 12 to Figure 14 As shown, the projection areas of the first electrode plate 610 , the second electrode plate 630 and the third electrode plate 640 on the surface of the substrate at least partially overlap, and the overlapping projection areas have a plurality of hollow areas 90 .

[0068] The description of the arrangement of the hollow area 90 of the capacitor structure 60 sandwiched by the first electrode plate 610, the second electrode plate 630 and the third electrode plate 640 can refer to the description of the first electrode plate 610 and the second electrode plate 630, except that a third electrode plate 640 is added on the basis of the capacitor structure 60 having the first electrode plate 610 and the second electrode plate 630. Preferably, the first electrode plate 610, the second electrode plate 630, the third electrode plate 640 and the hollow area 90 of the capacitor insulating layer are completely overlapped to ensure that the panel has maximum light transmittance.

[0069] Fig.15 yes Figure 2 Another partial enlarged structural diagram of the capacitor structure. In some optional embodiments, the capacitor structure 60 can also be a parallel capacitor structure. In special cases, when the thickness of the insulating layer between different layers of the display panel is large when designing (the thicker the capacitor insulating layer between the two plates of the capacitor structure, the smaller the capacitance value), in order to ensure the capacitance value of the capacitor structure, the capacitor structure can be designed as a parallel capacitor to obtain a larger capacitance value and maintain detection accuracy.

[0070] like Fig.15As shown, the first electrode plate 610 and the second electrode plate 630 are in an interdigitated structure, and the capacitor insulating layer 620 is located between the interdigitated structures of the first electrode plate 610 and the second electrode plate 630. The first electrode plate 610 and the second electrode plate 630 can be both in the same layer as the gate layer, both in the same layer as the source layer and the drain layer, both in the same layer as the pixel electrode layer, both in the same layer as the touch electrode layer, or both in the same layer as the common electrode layer; the first electrode plate 610 and the second electrode plate 630 can be both connected to a capacitor detection signal (one capacitor detection signal is an AC signal, and the other is a DC signal), or one of the first electrode plate 610 and the second electrode plate 630 is connected to a common electrode signal, and the other is connected to a capacitor detection signal.

[0071] The above parallel capacitor structure can also be formed by three layers of plates, such as Fig.16 As shown, the parallel capacitor structure 60 may be composed of a first electrode plate 610, a second electrode plate 630, and a third electrode plate 640 having a finger-shaped structure, a portion of the capacitor insulating layer 620 is located between the finger-shaped structures of the first electrode plate 610 and the second electrode plate 630, and a portion of the capacitor insulating layer 620 is also located between the finger-shaped structures of the first electrode plate 610 and the third electrode plate 640, wherein the first electrode plate 610 may be connected to a capacitor detection signal, the second electrode plate 630 and the third electrode plate 640 may be connected to a common electrode signal, or the first electrode plate 610 may be connected to a common electrode signal, the second electrode plate 630 and the third electrode plate 640 may be connected to a capacitor detection signal, or the first electrode plate 610, the second electrode plate 630, and the third electrode plate 640 may all be connected to a capacitor detection signal. The first electrode plate 610, the second electrode plate 630, and the third electrode plate 640 may all be in the same layer as the gate layer, in the same layer as the source electrode layer and the drain electrode layer, in the same layer as the pixel electrode layer, in the same layer as the touch electrode layer, or in the same layer as the common electrode layer.

[0072] like Figure 1 and Figure 2 As shown, the display panel further includes a flexible circuit board 100, the input pad is electrically connected to the flexible circuit board 100, the flexible circuit board 100 transmits the control signal to the driving module 40, and the control signal is processed by the driving module 40 and then transmitted to the display area 20 through the output pad and the data line to control the operation of the display panel.

[0073] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0074] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A display panel, characterized in that: It includes a non-display area and a display area, wherein the non-display area is surrounded by the display area, and the non-display area includes: substrate; A driving module, located on one side of the substrate; A plurality of pads are spaced apart and located at a side of the driving module away from the display area; at least one capacitor structure, located at the periphery of the driving module, the capacitor structure being electrically connected to the pad; The detection module is electrically connected to the capacitor structure and is used to detect the capacitance value of the capacitor structure and convert the capacitance value into a temperature value according to a first preset relationship.

2. The display panel according to claim 1, characterized in that: The non-display area includes a functional area and a non-functional area, the functional area includes the driving module, the non-functional area is located at a side of the driving module close to the display area, and the non-functional area includes the capacitor structure.

3. The display panel according to claim 1, characterized in that: The capacitor structures are spaced apart and located in the non-display area.

4. The display panel according to claim 1, characterized in that: Part of the capacitor structure is disposed around the display area.

5. The display panel according to claim 1, characterized in that: The capacitor structure includes a first electrode plate, a second electrode plate and a capacitor insulating layer, wherein: The first electrode plate is located on one side of the substrate; The second electrode plate is located on a side of the first electrode plate away from the substrate; The capacitor insulating layer is located between the first electrode plate and the second electrode plate, and the dielectric constant of the capacitor insulating layer has a second preset relationship with the capacitance value of the capacitor structure.

6. The display panel according to claim 5, characterized in that: The capacitor structure further includes a third electrode plate, which is located on a side of the second electrode plate away from the first electrode plate, and the capacitor insulating layer is provided between the third electrode plate and the second electrode plate.

7. The display panel according to claim 5, characterized in that: The projection areas of the first electrode plate and the second electrode plate on the surface of the substrate at least partially overlap, and the overlapping projection areas have a plurality of hollow areas.

8. The display panel according to claim 5, characterized in that: The first electrode plate is electrically connected to the capacitance detection signal line, and the second electrode plate is electrically connected to the common electrode signal line, or The first electrode plate and the second electrode plate are both electrically connected to the capacitance detection signal line.

9. The display panel according to claim 6, characterized in that: The projection areas of the first electrode plate, the second electrode plate and the third electrode plate on the surface of the substrate at least partially overlap, and the overlapping projection areas have a plurality of hollow areas.

10. The display panel according to claim 1, characterized in that: The capacitor structure includes a plurality of first plates. The first electrodes are in a plurality of finger-insertion structures, and the first electrodes are electrically connected to the capacitance detection signal line, or the capacitance structure includes a plurality of second electrodes, and the second electrodes are in a plurality of finger-insertion structures, and the second electrodes are electrically connected to the capacitance detection signal line, or The capacitor structure includes a plurality of third plates, the plurality of third plates are in an interdigitated structure, and at least one of the third plates is electrically connected to the capacitor detection signal line, or The capacitor structure includes the first electrode plate and the second electrode plate, the first electrode plate and the second electrode plate are in an interdigitated structure, and the first electrode plate and the second electrode plate are electrically connected to the capacitor detection signal line, or The capacitor structure includes a third plate, the first plate or the second plate, the third plate and the first plate or the second plate are in an interdigitated structure, the third plate is electrically connected to a common electrode signal line, and the first plate or the second plate is electrically connected to the capacitor detection signal line.

11. The display panel according to claim 5, characterized in that: The display area includes an array substrate, which is located on one side of the substrate. The array substrate includes a gate layer, a source-drain layer, a pixel electrode layer, a touch electrode layer and a common electrode layer. The gate layer is located on a side of the source-drain layer close to the substrate. In the direction from the gate layer to the source-drain layer, the pixel electrode layer, the touch electrode layer and the common electrode layer are located in sequence on a side of the source-drain layer away from the gate layer. The first electrode plate and / or the second electrode plate are in the same layer as the gate layer, the source-drain layer, the pixel electrode layer, the touch electrode layer and the common electrode layer. The projections of the first electrode plate, the second electrode plate and the driving module on a surface of one side of the substrate at least partially overlap.

12. The display panel according to claim 6, characterized in that: The display area includes an array substrate, which is located on one side of the substrate. The array substrate includes a gate layer, a source-drain layer, a pixel electrode layer, a touch electrode layer and a common electrode layer. The gate layer is located on a side of the source-drain layer close to the substrate. In the direction from the gate layer to the source-drain layer, the pixel electrode layer, the touch electrode layer and the common electrode layer are located in sequence on a side of the source-drain layer away from the gate layer. The first electrode plate and / or the second electrode plate and / or the third electrode plate are in the same layer as the gate layer, the source-drain layer, the pixel electrode layer, the touch electrode layer and the common electrode layer. The projections of the first electrode plate, the second electrode plate, the third electrode plate and the driving module on a surface of one side of the substrate at least partially overlap.

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