Light-emitting device driving backboard

Abstract

The light-emitting device driving backboard is provided with a display area and a non-display area, the driving backboard comprises a first substrate, a first driving layer, a second substrate and a second driving layer in the thickness direction of the driving backboard, the first driving layer at least comprises a first driving unit, and the second driving layer at least comprises a second driving unit. The second driving unit is electrically connected with the first driving unit through the second substrate, one of the first driving unit and the second driving unit is used for storing a gray scale data signal of the light-emitting device, and the other one of the first driving unit and the second driving unit is used for driving the light-emitting device to emit light based on the gray scale data signal; the first driving unit and the second driving unit are arranged on the driving backboard in different layers and at least partially overlap in the display area so as to reduce the non-display area.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a light-emitting device driving backplane. Background Art

[0002] Silicon-based display panel is a special display panel based on silicon semiconductor technology that forms a large market through optical magnification. Silicon-based display panel usually includes driving circuit and light-emitting device. The light-emitting materials of micro light-emitting diode (Micro Light Emitting Diode, Micro-LED) or organic light-emitting diode (Organic Light Emitting Diode, OLED) can be grown on silicon to make silicon-based display panel, which can be used in near-eye display devices and virtual display devices.

[0003] Currently, digital subfield scanning technology is often used to drive the light-emitting devices of silicon-based display panels. Figure 1 As shown, taking the full grayscale of 256 grayscale levels (L0~L255) as an example, the digital subfield scanning technology refers to dividing a frame display period H1 of the silicon-based display panel into 8 subfields (F1~F8), each subfield includes a data writing stage T1 and a light-emitting stage T2, and controlling the different durations of the light-emitting stage T2 of each subfield by setting different weight values ​​of each subfield, thereby controlling the different lighting durations of the light-emitting device in each subfield, and then realizing the full grayscale display of the light-emitting device based on the grayscale superposition of all subfields. To realize the display of 256 grayscale levels by using the digital subfield scanning technology, it is necessary to store the 8-bit binary (8bit) display data of each light-emitting device, that is, it is necessary to set a data cache circuit in the non-display area of ​​the silicon-based display panel, and the data cache circuit stores image data composed of at least 8-bit binary display data.

[0004] However, the data cache circuit needs to occupy the non-display area of ​​the driving backplane of the silicon-based micro display panel, so that the border of the silicon-based micro display panel is relatively large, affecting the overall module size of the micro display panel. Summary of the invention

[0005] The present application provides a light emitting device driving backplane, which solves the problem of increasing the non-display area due to setting a data buffer circuit.

[0006] The present application provides a light emitting device driving backplane,

[0007] The drive backplane has a display area and a non-display area surrounding the display area, and the drive backplane includes:

[0008] first base;

[0009] A first driving layer, wherein the first driving layer is disposed on a surface of the first substrate, and the first driving layer at least includes a first driving unit;

[0010] a second substrate, the second substrate being disposed on a side of the first driving layer away from the first substrate;

[0011] A second driving layer, the second driving layer is arranged on a surface of the second substrate away from the first driving layer, the second driving layer comprises at least one second driving unit, and the second driving unit is electrically connected to the first driving unit via the second substrate; wherein,

[0012] The first driving unit and the second driving unit at least partially overlap in the display area, one of the first driving unit and the second driving unit is used to store a grayscale data signal of the light-emitting device, and the other of the first driving unit and the second driving unit is used to drive the light-emitting device to emit light based on the grayscale data signal.

[0013] In the light-emitting device driving backplane provided in the present application, the first driving unit is used to store the grayscale data signal of the light-emitting device, and the first driving unit includes a grayscale data receiving subunit and a grayscale data storage subunit, and at least one of the grayscale data receiving subunit and the grayscale data storage subunit is located in the display area;

[0014] The grayscale data receiving subunit is electrically connected to the scanning signal end of the driving backplane, the grayscale data signal end of the driving backplane, and the grayscale data storage subunit, and the grayscale data receiving subunit is used to output the grayscale data signal provided by the grayscale data signal end to the grayscale data storage subunit according to the scanning signal provided by the scanning signal end;

[0015] The grayscale data storage subunit is electrically connected to the second driving unit, and the grayscale data storage subunit is used to store the grayscale data signal and output the grayscale data signal to the second driving unit.

[0016] In the light-emitting device driving backplane provided in the present application, the first driving layer includes n first driving units, the n first driving units are electrically connected to a first node, the first node is also electrically connected to the second driving unit, and n is an integer greater than or equal to 8;

[0017] Among them, n first driving units are electrically connected to the same grayscale data signal end, and n first driving units correspond one-to-one and are electrically connected to n scan signal ends, or n first driving units are electrically connected to the same scan signal end, and n first driving units correspond one-to-one and are electrically connected to n grayscale data signal ends.

[0018] In the light-emitting device driving backplane provided in the present application, the first driving layer also includes n clock signal control units, the n clock signal control units correspond one-to-one to and are electrically connected to the n first clock signal control terminals of the driving backplane, the n clock signal control units correspond one-to-one to and are electrically connected to the n first driving units, the n clock signal control units are electrically connected to the first node, and the clock signal control unit is used to output the grayscale data signal to the second driving unit according to the first clock signal provided by the first clock signal control terminal.

[0019] In the light-emitting device driving backplane provided in the present application, the first driving layer further includes a comparison unit, and the comparison unit is at least partially located in the display area, and the first driving layer or the second driving layer further includes a counting unit, and the counting unit is located in the non-display area;

[0020] The counting unit is electrically connected to the second clock signal control terminal of the driving backplane and the comparing unit, and the counting unit is used to output a comparison control signal to the comparing unit according to the second clock signal provided by the second clock signal control terminal;

[0021] The comparison unit is also electrically connected to the n first driving units and the first node, and the comparison unit is used to output the grayscale data signal to the second driving unit according to the comparison control signal.

[0022] In the light-emitting device driving backplane provided in the present application, the second driving unit is located in the display area, the second driving unit is used to drive the light-emitting device to emit light based on the grayscale data signal, and the second driving unit includes a light-emitting control subunit and a driving current adjustment subunit;

[0023] The driving current regulating subunit is connected to a reference voltage signal and is electrically connected to a first power supply terminal of the driving backplane and the light emitting control subunit, and the driving current regulating subunit is used to output a first power supply signal of the first power supply terminal to the light emitting control subunit based on the reference voltage signal;

[0024] The light emitting control subunit is also electrically connected to the grayscale data storage subunit and the light emitting device, and the light emitting control subunit is used to output the first power supply signal to the light emitting device based on the grayscale data signal to drive the light emitting device to emit light.

[0025] In the light-emitting device driving backplane provided in the present application, the light-emitting control subunit includes a first transistor, a gate of the first transistor is electrically connected to the grayscale data storage subunit, one of the source and the drain of the first transistor is electrically connected to the driving current regulating subunit, and the other of the source and the drain of the first transistor is electrically connected to the light-emitting device.

[0026] In the light-emitting device driving backplane provided in the present application, the driving current regulating subunit includes a second transistor, the gate of the second transistor is electrically connected to the reference current source, one of the source and the drain of the second transistor is electrically connected to the first power supply terminal, and the other of the source and the drain of the second transistor is electrically connected to the light-emitting control subunit.

[0027] In the light-emitting device driving backplane provided in the present application, the second driving unit further includes a current mirror unit, the current mirror unit is electrically connected to the driving current regulating subunit, and the current mirror unit is used to provide the reference voltage signal to the driving current regulating subunit;

[0028] Wherein, the current mirror unit includes a third transistor, a fourth transistor, a fifth transistor and a current source;

[0029] The gate of the third transistor is electrically connected to the driving current regulating subunit and one of the source and the drain of the third transistor, one of the source and the drain of the third transistor is also electrically connected to one of the source and the drain of the fourth transistor, and the other of the source and the drain of the third transistor is electrically connected to the first power supply terminal;

[0030] The gate of the fourth transistor is electrically connected to the gate of the fifth transistor, and the other of the source and the drain of the fourth transistor is electrically connected to the second power supply terminal of the driving backplane;

[0031] One of the source and the drain of the fifth transistor is electrically connected to the second power supply terminal, and the other of the source and the drain of the fifth transistor is electrically connected to the gate of the fifth transistor and the current source.

[0032] In the light-emitting device driving backplane provided in the present application, the second driving layer also includes a peripheral driving unit located in the non-display area, and the peripheral driving unit includes at least one of a power control unit, a gate driving unit, a source driving unit and a timing control unit.

[0033] The light-emitting device driving backplane provided in the present application is based on the first substrate and the second substrate stacked along the thickness direction of the driving backplane, so that the first driving unit and the second driving unit are arranged in different layers on the driving backplane, and the first driving unit and the second driving unit are at least partially overlapped in the display area, which can reduce the space required for arranging at least one of the first driving unit and the second driving unit in the non-display area, thereby reducing the non-display area required for the driving backplane and realizing a narrow frame of the display panel; in addition, the upper and lower stacking structure of the first driving unit and the second driving unit can also achieve a higher pixel density. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A schematic diagram of the sub-field segmentation corresponding to 256 gray levels in the related art;

[0035] Figure 2 A schematic diagram of the structure of a driving backplane of a micro display panel in the related art;

[0036] Figure 3 A schematic diagram of a first cross section of a light emitting device driving backplane provided in an embodiment of the present application;

[0037] Figure 4 for Figure 3 A schematic diagram of a first structure of a light emitting device driving backplane is shown;

[0038] Figure 5 for Figure 3 A first block diagram between the first drive unit and the second drive unit is shown;

[0039] Figure 6 for Figure 5 A schematic diagram of a circuit between a first driving unit and a second driving unit is shown;

[0040] Figure 7 for Figure 3 A second block diagram between the first drive unit and the second drive unit is shown;

[0041] Figure 8 for Figure 3 A third block diagram between the first drive unit and the second drive unit is shown;

[0042] Fig. 9 for Figure 7 and Figure 8 The timing diagram corresponding to any one of the following:

[0043] Fig.10 for Figure 3 A fourth block diagram between the first drive unit and the second drive unit is shown;

[0044] Fig.11 for Fig.10 A timing diagram of a second clock signal in;

[0045] Fig.12 A schematic diagram of a second cross section of a light emitting device driving backplane provided in an embodiment of the present application;

[0046] Fig.13 for Fig.12 Schematic diagram of the structure of the bonding layer in FIG.

[0047] Fig.14 To form Fig.13 A schematic diagram of the bonding layer process is shown;

[0048] Fig.15 for Figure 3 A schematic diagram of a second structure of a light emitting device driving backplane is shown. DETAILED DESCRIPTION

[0049] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application. The described embodiments are only used to explain the ideas created by the present invention and should not be regarded as limiting the scope of protection of the present application.

[0050] Silicon-based display panels can not only realize active addressing of light-emitting devices, but also can prepare circuits including pixel circuits, timing control circuits (TCON), gate drive circuits (GOA), source drive circuits (Source driver), power circuits (Power), overcurrent protection circuits, etc. on silicon-based substrates through semiconductor manufacturing processes, which is conducive to reducing the system volume of display panels and realizing lightweight display panels. Figure 2 As shown, in the related art, the silicon-based display panel 400 may include a driving backplane 401 and a light-emitting layer 402. The driving backplane 401 has a display area AA and a non-display area NA. The light-emitting layer 402 is arranged on one side of the driving backplane 401. The light-emitting layer 402 includes a plurality of light-emitting devices, and the plurality of light-emitting devices are arranged corresponding to the display area AA. The driving layer ( Figure 2 The display device 401 includes a driving circuit for driving the light emitting device to emit light, and the driving circuit is correspondingly arranged in the display area AA. The timing control circuit, the gate driving circuit, the source driving circuit and other circuits are arranged in the non-display area NA of the driving backplane 401.

[0051] like Figure 1 as well as Figure 2As shown, in order to improve the luminous brightness of the maximum grayscale value L255 displayed by the light-emitting device, when the gate driving circuit outputs a scanning signal to the display area AA to scan each row of light-emitting devices, each row of light-emitting devices can emit light immediately after the addressing scanning time, and each light-emitting device can continue to emit light in each light-emitting stage T2 within the display cycle H1 of a complete frame of the display picture. Therefore, a data buffer circuit (Frame buffer, also known as a frame buffer circuit) that can store 8-bit binary image data needs to be set in the non-display area NA of the driving backplane 401. However, setting the data buffer circuit needs to occupy the non-display area NA of the driving backplane 001, so that the frame of the display panel 400 with the driving backplane 401 is larger, thereby affecting the overall size of the display panel, which is not conducive to the narrow frame of the display panel.

[0052] On the other hand, in the related art, when the video source data provided by the external device is input to the silicon-based display panel, the silicon-based display panel needs to first perform image scaling, gamma correction and other processing on the video source data to obtain processed image data, and then transfer the processed image data to the data cache circuit for storage. The size of the image data stored in the data cache circuit is at least the product of the number of light-emitting devices and the color depth. The data cache circuit uses a bit plane to store the processed image data. In order to write the image data corresponding to each light-emitting device to the corresponding light-emitting device driving circuit in the display area AA, it is necessary to divide the display period H1 of each frame of the displayed image into at least 8 subfields, so as to read the image data from the data cache circuit and write the image data into each light-emitting device driving circuit in the display area AA. The above-mentioned image data processing is relatively cumbersome, and the power consumption required for driving the backplane 401 to read and write data is relatively high.

[0053] In order to solve the above problems existing in the related art, the present application provides a light emitting device driving backplane, such as Figure 3 As shown, along the thickness direction of the light emitting device driving backplane 100, the light emitting device driving backplane 100 includes a first substrate 11, a first driving layer 12, a second substrate 21 and a second driving layer 22 in sequence. Figure 3 as well as Figure 4 As shown, the light emitting device driving backplane 100 has a display area AA and a non-display area NA surrounding the display area AA, and the light emitting device driving backplane 100 includes at least one first driving unit 121 and at least one second driving unit 221 .

[0054] The first substrate 11 may be a silicon substrate. The first substrate 11 includes a plurality of well regions, and in each well region, two doping regions are arranged at intervals.

[0055] The first driving layer 12 is disposed on the surface of the first substrate 11. The first driving layer 12 includes at least one first driving unit 121, and the first driving unit 121 may specifically include a plurality of transistors, and at least one transistor in the first driving unit 121 is electrically connected to a well region of the first substrate to realize electrical connection between the first driving unit 121 and the first substrate 11.

[0056] Taking a well region as an example, the electrical connection relationship between a transistor in the first driving unit 121 and the first substrate 11 is explained: the positive projection of the gate of the transistor on the first substrate 11 is located between the two doping regions, the source of the transistor is electrically connected to one of the two doping regions, and the drain of the transistor is electrically connected to the other of the two doping regions.

[0057] The second substrate 21 is disposed on a side of the first driving layer 12 away from the first substrate 11. The second substrate 21 may be a silicon substrate, and the second substrate 21 includes a plurality of well regions, and in each well region, two doping regions are disposed at intervals.

[0058] The second driving layer 22 is disposed on the surface of the first driving layer 12 away from the first substrate 11. The second driving layer 22 includes at least one second driving unit 221. One second driving unit 221 may specifically include a plurality of transistors. At least one transistor in the second driving unit 221 is electrically connected to a well region of the second substrate 21 to achieve electrical connection between the second driving unit 221 and the second substrate 21. Since the second substrate 21 is electrically connected to the first driving unit 121, the second driving unit 221 may be electrically connected to the first driving unit 121 via the second substrate.

[0059] At least one of the first driving unit 121 and the second driving unit 221 is at least disposed in the display area AA of the driving backplane 100. That is, the first driving unit 121 of the first driving layer 12 can be located not only in the display area AA but also in the non-display area NA; the second driving unit 221 of the second driving layer 22 can be located not only in the display area AA but also in the non-display area NA.

[0060] One of the first driving unit 121 and the second driving unit 221 is used to store the grayscale data signal of the light-emitting device, and the other of the first driving unit 121 and the second driving unit 221 is used to drive the light-emitting device to emit light based on the grayscale data signal. That is, the first driving layer 12 of the light-emitting device driving backplane 100 may be provided with the first driving unit 121 for storing the grayscale data signal of the light-emitting device, and the second driving layer 22 of the light-emitting device driving backplane 100 may be provided with the second driving unit 221 for driving the light-emitting device to emit light based on the grayscale data signal. Of course, the first driving layer 12 of the light-emitting device driving backplane 100 may be provided with the first driving unit 121 for driving the light-emitting device to emit light based on the grayscale data signal, and the second driving layer 22 may be provided with the second driving unit 221 for storing the grayscale data signal of the light-emitting device.

[0061] In the driving backplane 100 provided in the present embodiment, since the first driving unit 121 and the second driving unit 221 are respectively arranged on the first substrate 11 and the second substrate 21, that is, the first driving unit 121 and the second driving unit 221 are arranged in different layers in the driving backplane 100 along the thickness direction of the driving backplane 100, and the first driving unit 121 and the second driving unit 221 at least partially overlap in the display area AA, while reducing the non-display area NA of the driving backplane 100 occupied by the first driving unit 121 and / or the second driving unit 221, it will not affect the pixel density.

[0062] In this embodiment, the first driving unit 121 and the second driving unit 221 at least partially overlap in the display area AA, which means that the orthographic projection of the first driving unit 121 on the first substrate 11 and the orthographic projection of the second driving unit 221 on the first substrate 11 at least partially overlap, and the overlapping portion is located in the display area AA of the driving backplane 100.

[0063] Compared with the related art in which the first driving unit 121 and the second driving unit 221 are arranged on the same substrate, the light-emitting device driving backplane 100 provided in the present embodiment is based on arranging the first driving unit 121 and the second driving unit 221 in different layers. The first driving unit 121 and the second driving unit 221 can both be arranged in the display area AA, thereby reducing the space required for arranging at least one of the first driving unit 121 and the second driving unit 221 in the non-display area NA, thereby reducing the non-display area NA required for the driving backplane, and realizing the narrow frame of the silicon-based display panel. At the same time, the first driving unit 121 and the second driving unit 122 arranged in different layers in the display area AA will not reduce the pixel density of the light-emitting device arranged in the display area AA, so that the light-emitting device driving backplane 100 provided in the present embodiment is conducive to achieving a higher pixel density (Pixels Per Inch, PPI).

[0064] like Figure 5 As shown, the first driving unit 121 is used to store the grayscale data signal of the light emitting device. The first driving unit 121 includes a grayscale data receiving subunit 1211 and a grayscale data storage subunit 1212. Moreover, at least one of the grayscale data receiving subunit 1211 and the grayscale data storage subunit 1212 is located in the display area AA.

[0065] The grayscale data receiving subunit 1211 is electrically connected to the scan signal terminal WL of the driving backplane 100, the grayscale data signal terminal BL of the driving backplane 100, and the grayscale data storage subunit 1212. The grayscale data receiving subunit 1211 is used to output the grayscale data signal provided by the grayscale data signal terminal BL to the grayscale data storage subunit 1212 according to the scan signal provided by the scan signal terminal WL.

[0066] like Figure 5 as well as Figure 6 As shown, the grayscale data receiving subunit 1211 includes a sixth transistor T6 and a seventh transistor T6_2 , and the grayscale data signal terminal BL includes a first sub-grayscale data signal terminal BL1 and a second sub-grayscale data signal terminal BL2 .

[0067] The gate of the sixth transistor T6 is electrically connected to the scan signal terminal WL, one of the source and the drain of the sixth transistor T6 is electrically connected to the first sub-grayscale data signal terminal BL1, and the other of the source and the drain of the sixth transistor T6 is electrically connected to the grayscale data storage subunit 1212.

[0068] After the gate of the sixth transistor T6 receives the scanning signal that turns on the sixth transistor T6 , the gate of the sixth transistor T6 outputs the grayscale data signal provided by the first sub-grayscale data signal terminal BL1 to the grayscale data storage subunit 1212 .

[0069] The gate of the seventh transistor T6_2 is electrically connected to the scan signal terminal WL, one of the source and the drain of the seventh transistor T6_2 is electrically connected to the second sub-grayscale data signal terminal BL2, and the other of the source and the drain of the seventh transistor T6_2 is electrically connected to the grayscale data storage subunit 1212.

[0070] After the gate of the seventh transistor T6_2 receives the scanning signal that turns on the seventh transistor T6_2 , the gate of the seventh transistor T6_2 outputs the grayscale data signal provided by the second sub-grayscale data signal terminal BL2 to the grayscale data storage subunit 1212 .

[0071] The sixth transistor T6 and the seventh transistor T6_2 provide the grayscale data signal in the source driving circuit to the grayscale data signal terminal BL when the scan driving unit in the gate driving circuit addresses the first driving unit 121 in the current row row by row.

[0072] like Figure 5 As shown, the grayscale data storage subunit 1212 is electrically connected to the second driving unit 221, the first power terminal VDD of the driving backplane 100, and the second power terminal VSS of the driving backplane 100. The grayscale data storage subunit 1212 is used to store grayscale data signals and output the grayscale data signals to the second driving unit 221.

[0073] like Figure 5 as well as Figure 6 As shown, the grayscale data storage subunit 1212 includes an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, and an eleventh transistor T11.

[0074] The gate of the eighth transistor T8 is electrically connected to the first grayscale data receiving subunit 1211, one of the source and the drain of the eighth transistor T8 is electrically connected to one of the source and the drain of the tenth transistor T10, and the other of the source and the drain of the eighth transistor T8 is electrically connected to the second power supply terminal VSS.

[0075] A gate of the tenth transistor T10 is electrically connected to a gate of the eighth transistor T8 , and the other of a source and a drain of the tenth transistor T10 is electrically connected to the first power supply terminal VDD.

[0076] One of the eighth transistor T8 and the tenth transistor T10 is an N-type transistor, and the other of the eighth transistor T8 and the tenth transistor T10 is a P-type transistor. The eighth transistor T8 and the tenth transistor T10 are electrically connected to form an inverter.

[0077] The gate of the ninth transistor T9 is electrically connected to the first grayscale data receiving subunit 1211, one of the source and the drain of the ninth transistor T9 is electrically connected to one of the source and the drain of the eleventh transistor T11, the other of the source and the drain of the ninth transistor T9 is electrically connected to the second power supply terminal VSS, one of the source and the drain of the ninth transistor T9 is also electrically connected to the gate of the eighth transistor T8, and the gate of the ninth transistor T9 is also electrically connected to one of the source and the drain of the eighth transistor T8.

[0078] The gate of the eleventh transistor T11 is electrically connected to the gate of the ninth transistor T9 , and the other of the source and the drain of the eleventh transistor T11 is electrically connected to the first power supply terminal VDD.

[0079] One of the ninth transistor T9 and the eleventh transistor T11 is an N-type transistor, and the other of the ninth transistor T9 and the eleventh transistor T11 is a P-type transistor. The ninth transistor T9 and the eleventh transistor T11 are electrically connected to form an inverter.

[0080] The two inverters composed of the eighth transistor T8, the ninth transistor T9, the tenth transistor T10 and the eleventh transistor T11 are cross-coupled to form a bistable trigger.

[0081] When the scan driving unit in the gate driving circuit addresses the first driving unit 121 of the current row row by row, the sixth transistor T6 and the seventh transistor T6_2 provide the grayscale data signal in the source driving circuit to the grayscale data signal terminal BL, and then store the grayscale data signal in the bistable trigger.

[0082] Figure 6 The circuit architecture of the first driving unit 121 electrically connected to a light emitting device includes a 1-bit binary static random access memory (SRAM) structure. However, in order to realize that each light emitting device displays at least 256 grayscales, it is necessary to integrate 8-bit binary data of each light emitting device into the first driving layer 12.

[0083] like Figure 7 As shown, the first driving layer 12 includes n first driving units 121. The n first driving units 121 are electrically connected to the same grayscale data signal terminal BL, that is, the n first driving units 121 are electrically connected to the same first sub-grayscale data signal terminal BL1, and the n first driving units 121 are electrically connected to the same second sub-grayscale data signal terminal BL2.

[0084] The n first driving units 121 and the n scanning signal terminals WL ( Figure 7 The first drive units 121 and the second drive units 121 are electrically connected to the first scan signal terminal WL_1, and the second drive units 121 are electrically connected to the second scan signal terminal WL_2. Similarly, the n-1-th first drive unit 121 is electrically connected to the n-1-th scan signal terminal WL_(n-1), and the n-th first drive unit 121 is electrically connected to the n-th scan signal terminal WL_n.

[0085] The n first driving units 121 are electrically connected to a first node P, and the first node P is also electrically connected to the second driving unit 221 .

[0086] exist Figure 7 In the driving circuit of the light emitting device shown, n first driving units 121 can use n word lines for addressing respectively and use the same set of bit lines for writing grayscale data. In order to realize that each light emitting device displays at least 256 grayscales, n is an integer greater than or equal to 8.

[0087] like Figure 8As shown, the first driving layer 12 includes n first driving units 121. The n first driving units 121 are electrically connected to the same scan signal terminal WL.

[0088] The n first driving units 121 and the n grayscale data signal terminals BL ( Figure 8 In the figure, the first driving unit 121 and the second driving unit 121 correspond to each other and are electrically connected, that is, the first driving unit 121 is electrically connected to the first first sub-grayscale data signal terminal BL1_1, and the first driving unit 121 is electrically connected to the first second sub-grayscale data signal terminal BL_2; by analogy, the nth first driving unit 121 is electrically connected to the nth first sub-grayscale data signal terminal BL1_n, and the nth first driving unit 121 is electrically connected to the nth second sub-grayscale data signal terminal BL2_n.

[0089] The n first driving units 121 are electrically connected to a first node P, and the first node P is also electrically connected to the second driving unit 221 .

[0090] exist Figure 8 In the driving circuit where the light emitting device is shown, n first driving units 121 use the same word line for addressing, that is, are selected at the same time, and use n groups of bit lines to write grayscale data signals. In order to realize that each light emitting device displays at least 256 grayscales, n is an integer greater than or equal to 8.

[0091] Figure 7 and Figure 8 The two data writing methods for writing grayscale display data into the light emitting device are shown, so at least an 8-bit binary static random access memory circuit can be set in the first driving layer 12 based on the specification of the driving backplane and the writing speed requirement.

[0092] like Figure 7 as well as Figure 8 As shown, the first driving layer 12 further includes n clock signal control units 122. The n clock signal control units 122 correspond one-to-one to and are electrically connected to the n first clock signal control terminals CK1 of the driving backplane 100, the n clock signal control units 122 correspond one-to-one to and are electrically connected to the n first driving units 121, and the n clock signal control units 122 are electrically connected to the first node P. The signal control unit 122 is used to output the grayscale data signals provided by the n first driving units 121 to the second driving unit 221 according to the first clock signal provided by the first clock signal control terminal CK1. In other words, each first driving unit 121 is electrically connected to a clock signal control unit 122 that controls the light-emitting duration of 1-bit binary display data.

[0093] Each clock signal control unit 122 may include a twelfth transistor T12, a gate of the twelfth transistor T12 is electrically connected to the first clock signal control terminal CK1, one of the source and the drain of the twelfth transistor T12 is electrically connected to the first driving unit 121, and the other of the source and the drain of the twelfth transistor T12 is electrically connected to the first node P.

[0094] like Fig. 9 As shown, the first stage t1 is the grayscale data writing duration of each first driving unit 121 in the n first driving units 121, and the second stage t2 is the light-emitting duration of the light-emitting device electrically connected to the n first driving units 121. The light-emitting duration of the light-emitting device is a pulse width modulation signal ( Fig. 9 The PWM in the circuit is used to determine the output voltage.

[0095] Based on the fact that the first driving layer 12 is provided with a plurality of first driving units 121 including a grayscale data receiving subunit 1211 and a grayscale data storage subunit 121, and at least some of the plurality of first driving units 121 are arranged in the display area AA, the light-emitting device driving backplane 100 provided in this embodiment is to arrange the circuit for storing the grayscale data signal of the light-emitting device at least under the light-emitting device, that is, this embodiment provides a light-emitting device driving backplane 100 with memory down pixel (MDP). Based on the MDP scheme, the light-emitting device driving backplane 100 can directly write the grayscale data signal of the display image into the corresponding light-emitting device, thereby simplifying the process and steps of the light-emitting device driving backplane transmitting the grayscale data signal, and saving the power consumption of the light-emitting device driving backplane 100.

[0096] like Fig.10 As shown, the first driving layer 12 further includes a comparison unit 123, and the first driving layer 12 or the second driving layer 22 further includes a counting unit 223. The comparison unit 123 is at least partially located in the display area AA, and the counting unit 223 is located in the non-display area NA. That is, the comparison unit 123 and the counting unit 223 can be respectively arranged in the first driving layer 12 and the second driving layer 22, or both of the comparison unit 123 and the counting unit 223 can be arranged in the first driving layer 12.

[0097] At least a portion of the comparison unit 123 is disposed in the display area AA, thereby reducing the space required for disposing the comparison unit 123 in the non-display area NA, thereby reducing the non-display area NA required for the driving backplane, and will not affect the pixel density, thereby achieving a narrow frame of the display panel.

[0098] When the counting unit 223 is arranged in the first driving layer 11 and located in the non-display area NA, the counting unit 223 and the comparing unit 123 are located in the same driving layer, which facilitates the arrangement of metal wiring in the first driving layer 11 to realize electrical connection between the counting unit 223 and the comparing unit 123 .

[0099] When the counting unit 223 is arranged in the second driving layer 12 and located in the non-display area NA, the counting unit 223 and the comparing unit 123 are located in different driving layers, which can reduce the number of electrical components of the first driving layer 11 and simplify the manufacturing process of the first driving layer 11.

[0100] The counting unit 223 is electrically connected to the second clock signal control terminal CK2 of the driving backplane 100 and the comparing unit 123 . The counting unit 223 is configured to output a comparing control signal to the comparing unit 123 according to the second clock signal provided by the second clock signal control terminal CK2 .

[0101] The comparison unit 123 is also electrically connected to the n first driving units 121 and the first node P. The comparison unit 123 is configured to output the grayscale data signals provided by the n first driving units 121 to the second driving unit 221 according to the comparison control signal.

[0102] In this embodiment, if the light-emitting device needs to display 256 grayscales, at least 8 first driving units 121 electrically connected to the light-emitting device are required to store at least 8-bit binary grayscale data signals. In addition, each light-emitting device also requires an 8-bit binary comparison unit 123, that is, the comparison unit 123 can specifically include an 8-bit data logic comparison circuit. The counting unit 223, the 8 first driving units 121 and the comparison unit 123 can generate a pulse width modulation signal that controls the light-emitting duration of the light-emitting device.

[0103] To make the light emitting device based on Fig.10 The 256 grayscale levels displayed by the circuit structure shown in the figure conform to Gamma2.2, and the second clock signal connected to the counting unit 223 is as follows: Fig.11 The nonlinear clock signal is shown.

[0104] Since multiple grayscale data receiving subunits, multiple grayscale data storage subunits, multiple clock signal control units and other units are set in the first driving layer 12, the first driving layer 12 includes a large number of transistors, and the wafer factory needs to adopt a higher precision process to prepare the first driving layer 12 on the first substrate 11.

[0105] like Figures 5 to 8 as well as Fig.10As shown, the second driving unit 221 for driving the light emitting device to emit light based on the grayscale data signal includes a light emitting control subunit 2211 and a driving current regulating subunit 2212 .

[0106] The driving current regulating subunit 2212 receives the reference voltage signal and is electrically connected to the first power supply terminal VDD and the light control subunit 2211. The driving current regulating subunit 2212 is used to output the first power supply signal of the first power supply terminal VDD to the light control subunit 2211 based on the reference voltage signal.

[0107] like Figure 5 to Figure 6 As shown, the driving current regulating subunit 2212 includes a second transistor T2. The gate of the second transistor T2 is connected to the reference voltage signal, one of the source and the drain of the second transistor T2 is electrically connected to the first power supply terminal VDD, and the other of the source and the drain of the second transistor T2 is electrically connected to the light emitting control subunit 2211.

[0108] like Figure 6 As shown, the second driving unit 221 for driving the light-emitting device to emit light based on the grayscale data signal further includes a current mirror unit 2213. The current mirror unit 2213 is electrically connected to the first power supply terminal VDD, the second power supply terminal VSS and the driving current regulating subunit 2212, and the current mirror unit 2213 is used to provide a reference voltage signal to the driving current regulating subunit 2212 and adjust the magnitude of the reference voltage signal.

[0109] The current mirror unit 2213 includes a third transistor T3 , a fourth transistor T4 , a fifth transistor T5 and a current source i.

[0110] The gate of the third transistor T3 is electrically connected to the reference voltage terminal and one of the source and the drain of the third transistor T3, one of the source and the drain of the third transistor T3 is also electrically connected to one of the source and the drain of the fourth transistor T4, and the other of the source and the drain of the third transistor T3 is electrically connected to the first power supply terminal VDD.

[0111] The third transistor T3 and the second transistor T2 are both N-type transistors, or the third transistor T3 and the second transistor T2 are both P-type transistors.

[0112] The gate of the fourth transistor T4 is electrically connected to the gate of the fifth transistor T5, one of the source and the drain of the fourth transistor T4 is electrically connected to one of the source and the drain of the third transistor T3, and the other of the source and the drain of the fourth transistor T4 is electrically connected to the second power supply terminal VSS.

[0113] One of the source and the drain of the fifth transistor T5 is electrically connected to the second power supply terminal VSS, the other of the source and the drain of the fifth transistor T5 is electrically connected to the gate of the fifth transistor T5, and the other of the source and the drain of the fifth transistor T5 is also electrically connected to the current source i.

[0114] The fourth transistor T4 and the fifth transistor T5 are both N-type transistors, or the fourth transistor T4 and the fifth transistor T5 are both P-type transistors.

[0115] In the current mirror unit 2213, based on the fact that the fifth transistor T5 and the fourth transistor T4 are both P-type transistors or both N-type transistors, and the gate of the fifth transistor T5 is electrically connected to the gate of the fourth transistor T4, when the current source i provides the other of the source and drain of the fifth transistor T5 with a current of I1, the gate-source voltage difference Vgs1 of the fourth transistor T4 is the same as the gate-source voltage difference Vgs2 of the fifth transistor T5, and therefore, one of the source and drain of the fourth transistor T4 will output a current of the magnitude of I1. The gate of the fifth transistor T5 is electrically connected to the other of the source and drain of the fifth transistor T5, forming a diode short circuit, thereby ensuring that the fifth transistor T5 always operates in the saturation region. When all process parameters of the fifth transistor T5 and the fourth transistor T4 are equal, the relationship between the current I1 and the current I2 flowing through the gate of the third transistor T3 and the electrical connection between the source and the drain of the third transistor T3 satisfies: I1: I2 = (W2 / L2) / (W1 / L1), wherein W1 is the channel width of the fourth transistor T4, L1 is the channel length of the fourth transistor T4, W2 is the channel width of the fifth transistor T5, and L2 is the channel length of the fifth transistor T5.

[0116] Based on the fact that the larger the reference voltage from the current mirror unit 2213 to the reference voltage terminal is, the larger the current flowing through the light-emitting device L is, and the larger the brightness of the light-emitting device L is, the brightness of the light-emitting device L can be adjusted by changing the reference voltage signal at the reference voltage terminal.

[0117] like Figure 5 to Figure 6 As shown, the light control subunit 2211 is also electrically connected to the grayscale data storage subunit 1212 and the light emitting device L. The light control subunit 2211 is used to output a first power signal to the light emitting device L based on the grayscale data signal to drive the light emitting device L to emit light.

[0118] The light emitting control subunit 2211 may include a first transistor T1, a gate of the first transistor T1 is electrically connected to the grayscale data storage subunit 1212, one of the source and the drain of the first transistor T1 is electrically connected to the driving current regulating subunit 2212, and the other of the source and the drain of the first transistor T1 is electrically connected to the anode of the light emitting device L. The cathode of the light emitting device L is electrically connected to the second power supply terminal VSS. The light emitting layer (not shown) where the light emitting device L is located is located on the surface of the second driving layer 22 away from the first substrate 11.

[0119] Since the second driving unit 221 includes fewer transistors, the second driving units can be disposed in the display area AA. Moreover, based on the fact that the second driving unit 221 includes fewer transistors, the foundry can use a lower precision process to prepare the second driving layer 22 on the second substrate 21.

[0120] like Figure 4 As shown, the second driving layer 22 further includes a peripheral driving unit located in the non-display area NA, and the peripheral driving unit includes at least one of a power control unit 2221, a gate driving unit 2222, a source driving unit 2223, and a timing control unit 2224. The power control unit 2221 provides the first driving layer 12 and the second driving layer 22 with a corresponding first power signal and a second power signal, the gate driving unit 2222 provides the first driving layer 12 and the second driving layer 22 with a corresponding scanning signal, the source driving unit 2223 provides the first driving layer 12 and the second driving layer 22 with a corresponding grayscale data signal, and the timing control unit 2224 provides the first driving layer 12 and the second driving layer 22 with a corresponding first clock signal and a second clock signal.

[0121] like Fig.12 As shown, the driving backplane 100 also includes a bonding layer 30, a first surface of the bonding layer 30 contacts a surface of the first driving layer 12 away from the first substrate 11, a second surface of the bonding layer 30 opposite to the first surface contacts a surface of the second substrate 21 close to the first driving layer 12, and the second driving unit 221 is electrically connected to the first driving unit 121 via the second substrate 21 and the bonding layer 30 in sequence.

[0122] In the embodiment provided in the present application, the first substrate 11 and the first driving layer 12 constitute a first driving plate 10, the second substrate 21 and the second driving layer 22 constitute a second driving plate 20, and the first driving plate 10 and the second driving plate 20 stacked along the thickness direction of the driving backplane 100 realize signal transmission through the bonding layer 30.

[0123] The first driving board 10 and the second driving board 20 may be bonded by hybrid bonding technology, and specifically, signal transmission may be achieved between the first driving unit 121 and the second driving unit 221 electrically connected to the same light-emitting device through at least one solder joint.

[0124] Combination Figure 7 , Figure 8 as well as Fig.12 As shown, the pad B of the first driving unit 121 and the second driving unit 221 is disposed between the first node P and the gate of the first transistor T1. Fig.10 as well as Fig.12 As shown, the solder joints of the first driving unit 121 and the second driving unit 221 are arranged between the comparison unit 123 and the gate of the first transistor T1. Hybrid bonding also has unique advantages in terms of electrical performance, because the signal loss rate caused by hybrid bonding for signal transmission is almost negligible, which has obvious advantages under the requirements of high-frequency signal transmission.

[0125] like Fig.13 As shown, the bonding layer 30 includes at least one conductive portion 301 and a dielectric portion 302 surrounding the conductive portion 301. The second driving unit 221 is electrically connected to the first driving unit 121 via the second substrate 21 and the conductive portion 301. The conductive portion 301 can be made of metal copper material, and the dielectric portion 302 can be made of silicon oxide material.

[0126] like Fig.14 As shown, when the first driving plate 10 and the second driving plate 20 are bonded based on the hybrid bonding technology, a first sub-bonding layer 31 is provided on the surface of the first driving plate 10 close to the second driving plate 20. The first sub-bonding layer 31 includes at least one first sub-conductive portion 311 and a first sub-dielectric portion 312 surrounding the first sub-conductive portion 311, and the first sub-conductive portion 311 is electrically connected to the first driving unit in the first driving layer 12. A second sub-bonding layer 32 is provided on the surface of the second driving plate 20 close to the first driving plate 10. The second sub-bonding layer 32 includes at least one second sub-conductive portion 321 and a second sub-dielectric portion 322 surrounding the second sub-conductive portion 321, and the second sub-conductive portion 321 is electrically connected to the second driving unit of the second driving layer 22 via the second substrate 21.

[0127] Fig.14 (a) shows the situation when the first driving plate 10 and the second driving plate 20 are not joined in the thickness direction of the driving back plate 100. Fig.14 (b) in FIG. 3 shows the first sub-dielectric portion 312 and the second sub-dielectric portion 322 being bonded to form the dielectric portion 302. Fig.14(c) shows a case where the temperature is raised to bond the first sub-conductive portion 311 and the second sub-conductive portion 321 to form the conductive portion 301 , so that the first sub-bonding layer 31 and the second sub-bonding layer 32 are bonded to form the bonding layer 30 .

[0128] Under the hybrid binding technology, the first sub-conductive part 311 and the second sub-conductive part 321 need to be bonded one by one at room temperature, and the first sub-dielectric part 312 and the second sub-dielectric part 322 also need to be bonded accordingly, so that there is no gap between the first sub-conductive part 311 and the second sub-conductive part 321 bonded based on the hybrid binding technology, and there is no gap between the first sub-dielectric part 312 and the second sub-dielectric part 322, so there is no need to fill epoxy resin between the first sub-bonding layer 31 and the second sub-bonding layer 32.

[0129] like Fig.15 As shown, in some other embodiments provided by the present application, the first driving unit 121 provided in the first driving layer 12 is used to drive the light-emitting device to emit light based on the grayscale data signal, and the second driving unit 221 provided in the second driving layer 22 is used to store the grayscale data signal of the light-emitting device. That is, the first driving unit 121 includes the following Figures 6 to 8 , Fig.10 The light emitting control subunit 2211 and the driving current regulating subunit 2212 shown in any one of the above, the second driving unit 221 includes the following Figures 6 to 8 , Fig.10 The grayscale data receiving subunit 1211 and the grayscale data storing subunit 1212 shown in any one of the above, and the second driving layer 22 may also include the following Figure 7 as well as Figure 8 Any of the clock signal control units 122 shown.

[0130] Whether Figure 4 The drive backplane 100 shown is still Fig.14 In the driving backplane 100 shown, the orthographic projection sizes of the first substrate 11 and the second substrate 21 in the thickness direction of the driving backplane 100 may be the same or different, and this application does not make any specific limitation.

[0131] Of course, the present application may have many other embodiments. Without departing from the spirit and essential points of the present application, technicians familiar with the field may make various corresponding changes and modifications based on the present application, but these corresponding changes and modifications should all fall within the scope of protection of the claims attached to the present application.

Claims

1. A light emitting device driving backplane, characterized in that: The drive backplane has a display area and a non-display area surrounding the display area, and the drive backplane includes: first base; A first driving layer, wherein the first driving layer is disposed on a surface of the first substrate, and the first driving layer at least includes a first driving unit; a second substrate, the second substrate being disposed on a side of the first driving layer away from the first substrate; A second driving layer, the second driving layer is arranged on a surface of the second substrate away from the first driving layer, the second driving layer comprises at least one second driving unit, and the second driving unit is electrically connected to the first driving unit via the second substrate; wherein, The first driving unit and the second driving unit at least partially overlap in the display area, one of the first driving unit and the second driving unit is used to store a grayscale data signal of the light-emitting device, and the other of the first driving unit and the second driving unit is used to drive the light-emitting device to emit light based on the grayscale data signal.

2. The driving backplane according to claim 1, characterized in that: The first driving unit is used to store the grayscale data signal of the light-emitting device, and the first driving unit includes a grayscale data receiving subunit and a grayscale data storage subunit, and at least one of the grayscale data receiving subunit and the grayscale data storage subunit is located in the display area; The grayscale data receiving subunit is electrically connected to the scanning signal end of the driving backplane, the grayscale data signal end of the driving backplane, and the grayscale data storage subunit, and the grayscale data receiving subunit is used to output the grayscale data signal provided by the grayscale data signal end to the grayscale data storage subunit according to the scanning signal provided by the scanning signal end; The grayscale data storage subunit is electrically connected to the second driving unit, and the grayscale data storage subunit is used to store the grayscale data signal and output the grayscale data signal to the second driving unit.

3. The driving backplane according to claim 2, characterized in that: The first driving layer includes n first driving units, the n first driving units are electrically connected to a first node, the first node is also electrically connected to the second driving unit, and n is an integer greater than or equal to 8; Among them, n first driving units are electrically connected to the same grayscale data signal end, and n first driving units correspond one-to-one and are electrically connected to n scan signal ends, or n first driving units are electrically connected to the same scan signal end, and n first driving units correspond one-to-one and are electrically connected to n grayscale data signal ends.

4. The driving backplane according to claim 3, characterized in that: The first driving layer also includes n clock signal control units, the n clock signal control units correspond one-to-one to and are electrically connected to the n first clock signal control terminals of the driving backplane, the n clock signal control units correspond one-to-one to and are electrically connected to the n first driving units, the n clock signal control units are electrically connected to the first node, and the clock signal control unit is used to output the grayscale data signal to the second driving unit according to the first clock signal provided by the first clock signal control terminal.

5. The driving backplane according to claim 3, characterized in that: The first driving layer further includes a comparison unit, and the comparison unit is at least partially located in the display area. The first driving layer or the second driving layer further includes a counting unit, and the counting unit is located in the non-display area. The counting unit is electrically connected to the second clock signal control terminal of the driving backplane and the comparing unit, and the counting unit is used to output a comparison control signal to the comparing unit according to the second clock signal provided by the second clock signal control terminal; The comparison unit is also electrically connected to the n first driving units and the first node, and the comparison unit is used to output the grayscale data signal to the second driving unit according to the comparison control signal.

6. The driving backplane according to claim 2, characterized in that: The second driving unit is located in the display area, and is used to drive the light-emitting device to emit light based on the grayscale data signal, and the second driving unit includes a light-emitting control subunit and a driving current adjustment subunit; The driving current regulating subunit is connected to a reference voltage signal and is electrically connected to a first power supply terminal of the driving backplane and the light emitting control subunit, and the driving current regulating subunit is used to output a first power supply signal of the first power supply terminal to the light emitting control subunit based on the reference voltage signal; The light emitting control subunit is also electrically connected to the grayscale data storage subunit and the light emitting device, and is used to output the first power supply signal to the light emitting device based on the grayscale data signal to drive the light emitting device to emit light.

7. The driving backplane according to claim 6, characterized in that: The light-emitting control subunit includes a first transistor, a gate of the first transistor is electrically connected to the grayscale data storage subunit, one of the source and the drain of the first transistor is electrically connected to the driving current regulating subunit, and the other of the source and the drain of the first transistor is electrically connected to the light-emitting device.

8. The driving backplane according to claim 6, characterized in that: The driving current regulating subunit includes a second transistor, a gate of the second transistor is electrically connected to the reference current source, one of the source and the drain of the second transistor is electrically connected to the first power supply terminal, and the other of the source and the drain of the second transistor is electrically connected to the light emitting control subunit.

9. The driving backplane according to claim 6, characterized in that: The second driving unit further comprises a current mirror unit, the current mirror unit is electrically connected to the driving current regulating subunit, and the current mirror unit is used to provide the reference voltage signal to the driving current regulating subunit; Wherein, the current mirror unit includes a third transistor, a fourth transistor, a fifth transistor and a current source; The gate of the third transistor is electrically connected to the driving current regulating subunit and one of the source and the drain of the third transistor, one of the source and the drain of the third transistor is also electrically connected to one of the source and the drain of the fourth transistor, and the other of the source and the drain of the third transistor is electrically connected to the first power supply terminal; The gate of the fourth transistor is electrically connected to the gate of the fifth transistor, and the other of the source and the drain of the fourth transistor is electrically connected to the second power supply terminal of the driving backplane; One of the source and the drain of the fifth transistor is electrically connected to the second power supply terminal, and the other of the source and the drain of the fifth transistor is electrically connected to the gate of the fifth transistor and the current source.

10. The driving backplane according to any one of claims 6 to 9, characterized in that: The second driving layer further includes a peripheral driving unit located in the non-display area, and the peripheral driving unit includes at least one of a power control unit, a gate driving unit, a source driving unit, and a timing control unit.

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