Process method for improving heat conduction capability of gallium oxide material

Abstract

The invention discloses a process method for improving the heat conduction capability of a gallium oxide material, and the method comprises the steps: embedding heat dissipation holes filled with a heat conduction material in a beta-Ga2O3 material, constructing a composite structure of gallium oxide and the heat conduction material, and matching the volume ratio of the heat dissipation holes to the gallium oxide material, thereby reducing the total thermal resistance of the composite structure, and achieving the improvement of the heat conduction capability. The method has no material fragmentation risk, and is low in processing difficulty and high in reliability. The method is applied to a beta-Ga2O3 high-power chip, heat dissipation holes filled with heat conduction materials are embedded in a chip substrate area, the heat conduction capability of the substrate area with the longest chip heat path is improved, substrate thinning or substrate material replacement is not needed, the process difficulty is low, and the chip fragmentation risk is low; the back surface of the chip can be welded on the heat sink by using the traditional packaging technology, heat is conducted to the heat sink from the substrate area embedded with the high-heat-conductivity holes, the problems of packaging cost rise, rapid aging of the front surface structure and the like caused by flip packaging of the chip are avoided, and the reliability of the chip is high.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a process method for improving the thermal conductivity of gallium oxide materials. Background Art

[0002] With the development of intelligent control, new energy electric vehicles, industrial inverters and other fields, the power and frequency of power semiconductor devices are constantly increasing. High power and high frequency call for the emergence of new materials to promote the development of high-power and high-frequency devices with higher critical breakdown field strength, lower non-equilibrium minority carrier concentration and better thermal stability. In addition, high power and high frequency will cause the device to generate a lot of heat. If the generated heat is not dissipated in time, the chip will have a high temperature rise. Excessive temperature will cause faults such as bond wire melting, solder failure, and substrate damage. Therefore, thermal conductivity is one of the important considerations for new semiconductor materials used in high-power and high-frequency devices.

[0003] Gallium oxide (Ga 2 O 3 ) materials have broad application prospects in the field of high-power electronic devices due to their wide bandgap, good thermal stability, high breakdown field strength and excellent physical and chemical properties. 2 O 3 There are six isomers in the structure, namely α, β, γ, δ, ε and κ. 2 O 3 It is the most stable at room temperature and pressure, and other phases of Ga 2 O 3 Under certain conditions, it can be converted into β-Ga 2 O 3 However, single crystal β-Ga 2 O 3 The thermal conductivity of single crystal β-Ga with (001), (100), (010), and (-201) crystal orientations is low. 2 O 3 The thermal conductivity of single crystal silicon is 150W / m·K, the thermal conductivity of 4H silicon carbide is 490W / m·K, and the thermal conductivity of 6H silicon carbide is 370W / m·K, which are much higher than the thermal conductivity of single crystal β-Ga2O3. 2 O 3 The thermal conductivity problem of basic power devices is one of the key factors affecting the development of such devices.

[0004] For semiconductor materials, the conventional method to improve the thermal conductivity between the upper and lower surfaces of the material is to thin the material. This method is commonly used in silicon-based and silicon carbide-based power semiconductor devices. After the device structure is completed, chemical mechanical polishing (CMP) is used to thin the semiconductor material in the substrate area to shorten the thermal path in the substrate area, thereby improving the thermal conductivity of the device. However, for β-Ga 2 O 3 The material is easily broken during CMP operation because of its anisotropic lattice. 2 O 3 The thermal conductivity of the material is very low, and the material must be made very thin to effectively dissipate heat, which makes the process difficult to implement.

[0005] The structures of power devices and high-frequency devices are mainly made near the upper surface of the chip, and the heat source is mainly the interface and junction near the upper surface of the device. It has been reported that by flip-chip packaging of gallium oxide power devices, the heat generated by the internal interface and junction of the device is quickly conducted to the outside of the package through the front of the chip. The heat dissipation path on the back of the chip can also be increased, and the front heat dissipation path and the back heat dissipation path are connected in parallel to improve the heat dissipation capacity. However, this packaging technology is relatively complex, and the ohmic contact, metal interconnection and other structures on the front of the device will accelerate aging due to being in a high temperature environment for a long time, affecting the life of the device.

[0006] There are also reports that β-Ga 2 O 3 Transfer to SiC substrate to improve thermal transport properties, annealing can significantly improve β-Ga 2 O 3 The thermal conductivity of the substrate and the thermal resistance of the interface with the substrate. However, this technology is difficult to implement and is not conducive to industrial application. Summary of the invention

[0007] The present application provides a process for improving the heat conduction capability of gallium oxide materials. 2 O 3 The material is embedded with through holes filled with thermal conductive materials (materials with thermal conductivity greater than 200W / m·K, such as metal materials such as copper, silver, gold, or mixed materials of metal and carbon nanotubes, or pure carbon nanotubes, etc.), so that the thermal resistance of the through holes is similar to that of the corresponding area β-Ga 2 O 3 The thermal resistance of the materials is connected in parallel, thereby improving the heat conduction capacity. Compared with the method of reducing thermal resistance by thinning the material through chemical mechanical polishing (CMP), this method does not have the risk of material fragmentation, has low process difficulty and high reliability. 2 O 3In high-power devices, holes filled with thermal conductive materials are embedded in the chip substrate area to improve the thermal conductivity of the chip substrate area with the longest thermal path. There is no need to thin the substrate or replace the substrate material. The process difficulty is low and the risk of chip fragmentation is low. In addition, this method is applied to β-Ga 2 O 3 Traditional packaging technology can be used to package chips in high-power devices. The back of the chip is welded on the heat sink, and the heat is conducted from the substrate area embedded with high thermal conductivity holes to the heat sink, avoiding problems such as increased packaging costs and rapid aging of the front structure caused by chip flip-chip packaging, and the chip reliability is high.

[0008] In view of this, the present application provides a process method for improving the heat conduction capability of gallium oxide materials, the method comprising:

[0009] S1, in β-Ga 2 O 3 An array of holes of a preset diameter and a preset depth are etched into the material;

[0010] S2, preparing a barrier layer on the inner wall of the hole array;

[0011] S3, preparing a metal seed layer on the barrier layer;

[0012] S4, filling a preset metal material inside the hole array;

[0013] S5, removing the preset filling heat-conducting material overflowing from the hole openings of the hole array, and flattening the plane where the hole openings are located.

[0014] Optionally, the etching method in step S1 is specifically ion etching or laser ablation.

[0015] Optionally, the step S2 is specifically:

[0016] A barrier layer is prepared on the inner wall of the hole array by physical vapor deposition or chemical vapor deposition.

[0017] Optionally, the barrier layer material is specifically titanium, tantalum, or nitrides of titanium and tantalum.

[0018] Optionally, the step S3 is specifically:

[0019] A metal seed layer is prepared on the barrier layer by physical vapor deposition.

[0020] Optionally, the step S4 is specifically:

[0021] The hole array is filled with a preset metal material by metal electroplating.

[0022] Optionally, if carbon nanotubes are mixed in the preset metal material, the carbon nanotubes are suspended in a metal electroplating solution to perform metal electroplating.

[0023] Optionally, removing the preset filling heat-conducting material overflowing from the hole openings of the hole array is specifically:

[0024] The predetermined metal material overflowing from the hole openings of the hole array is removed by CMP.

[0025] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0026] In this application, a process method for improving the thermal conductivity of gallium oxide materials is provided. 2 O 3 In the material, β-Ga 2 O 3 Holes filled with thermal conductive materials are embedded in the material to construct a "gallium oxide + thermal conductive material" composite structure, matching the volume ratio of the heat dissipation holes and the gallium oxide material, thereby reducing the total thermal resistance of the composite structure and improving the thermal conductivity. Compared with the method of reducing thermal resistance by thinning the material through chemical mechanical polishing (CMP), this method does not have the risk of material fragmentation, has low process difficulty, and has high reliability. This method is applied to β-Ga 2 O 3 In high-power devices, holes filled with thermal conductive materials are embedded in the chip substrate area to improve the thermal conductivity of the chip substrate area with the longest thermal path. There is no need to thin the substrate or replace the substrate material. The process difficulty is low and the risk of chip fragmentation is low. In addition, this method is applied to β-Ga 2 O 3 Traditional packaging technology can be used to package chips in high-power devices. The back of the chip is welded on the heat sink, and the heat is conducted from the substrate area embedded with high thermal conductivity holes to the heat sink, avoiding problems such as increased packaging costs and rapid aging of the front structure caused by chip flip-chip packaging, and the chip reliability is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a method flow chart of a process for improving the heat conduction capability of gallium oxide materials in an embodiment of the present application;

[0028] Figure 2 A schematic diagram of a process for improving the heat conduction capability of gallium oxide materials in an embodiment of the present application;

[0029] Figure 3 Schematic diagram of the thermal resistance structure in the embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0031] This application designs a process method to improve the heat conduction capacity of gallium oxide materials. Compared with the method of reducing thermal resistance by thinning the material through CMP, there is no risk of material fragmentation, the process difficulty is low, and the reliability is high. 2 O 3 In high-power devices, holes filled with thermal conductive materials are embedded in the chip substrate area to improve the thermal conductivity of the chip substrate area with the longest thermal path. There is no need to thin the substrate or replace the substrate material. The process difficulty is low and the risk of chip fragmentation is low. In addition, this method is applied to β-Ga 2 O 3 Traditional packaging technology can be used to package chips in high-power devices. The back of the chip is welded on the heat sink, and the heat is conducted from the substrate area embedded with high thermal conductivity holes to the heat sink, avoiding problems such as increased packaging costs and rapid aging of the front structure caused by chip flip-chip packaging, and the chip reliability is high.

[0032] For easier understanding, see Figure 1 and Figure 2 , Figure 1 This is a method flow chart of a process for improving the thermal conductivity of gallium oxide materials in an embodiment of the present application. Figure 2 FIG. 1 is a schematic diagram of a process for improving the heat conduction capability of gallium oxide materials in an embodiment of the present application. Figure 1 and Figure 2 As shown, specifically:

[0033] S1, in β-Ga 2 O 3 An array of holes of a preset diameter and a preset depth are etched into the material;

[0034] It should be noted that the thermal resistance distribution of the present application is as follows: Figure 3 As shown, the heat dissipation hole array and the β-Ga 2 O 3 The thermal resistance of the heat dissipation hole array is similar to that of the β-Ga 2 O 3 The thermal resistance of the materials is connected in parallel, which greatly reduces the thermal resistance of the "gallium oxide + thermal conductive material" composite structure.

[0035] according to Figure 3The thermal resistance matching and etching process limitations in the β-Ga2O3 are used to determine the preset diameter and preset depth of the hole. Further, reactive ion etching or laser ablation is used to obtain the preset depth of the hole. 2 O 3 An array of holes is etched into the material.

[0036] S2, preparing a barrier layer on the inner wall of the hole array;

[0037] It should be noted that a layer is prepared on the inner wall of the hole by physical vapor deposition or chemical vapor deposition to block the metal principle from moving to β-Ga 2 O 3 Diffusion barrier layers within materials, such as titanium, tantalum or their nitrides, are commonly used to block copper.

[0038] S3, preparing a metal seed layer on the barrier layer;

[0039] It should be noted that a uniform and dense metal seed layer is prepared on the inner wall of the hole by physical vapor deposition, which is used to apply electrodes when electroplating metal.

[0040] S4, filling the hole array with a preset thermal conductive material;

[0041] It should be noted that the heat conductive material is filled in the hole by adopting the metal electroplating method.

[0042] Furthermore, if carbon nanotubes are to be mixed in metal, the carbon nanotubes may be suspended in a metal electroplating solution for electroplating.

[0043] S5. Remove the preset metal material overflowing from the hole openings of the hole array, and flatten the plane where the hole openings are located.

[0044] It should be noted that CMP is used to remove the filling material overflowing from the hole mouth, and to flatten the "gallium oxide + high thermal conductivity" composite structure on the surface where the hole mouth is located.

[0045] In the embodiment of the present application, β-Ga 2 O 3 A "gallium oxide + high thermal conductivity" composite structure is constructed in the material to match the volume ratio of the heat dissipation holes and the gallium oxide material in the corresponding area, thereby reducing the total thermal resistance of the composite structure and improving the heat conduction capacity.

[0046] The method provided in the embodiment of the present application does not require thinning of materials to avoid mechanical damage; for gallium oxide-based power devices, simple, low-cost traditional packaging can be used, and the heat flow is channeled outward through the gallium oxide substrate material to avoid accelerated aging of structures such as front ohmic contacts and metal interconnects; reactive ion etching, physical vapor deposition, chemical vapor deposition, metal electroplating, CMP, etc. are all mature processes commonly used in microelectronics technology, which are low-cost and conducive to industrialization.

[0047] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A process for improving the heat conduction capacity of gallium oxide materials, characterized in that: include: S1, etching a hole array of a preset diameter and a preset depth in the β-Ga2O3 material; S2, preparing a barrier layer on the inner wall of the hole array; S3, preparing a metal seed layer on the barrier layer; S4, filling the hole array with a preset thermal conductive material; S5, removing the preset filling heat-conducting material overflowing from the hole openings of the hole array, and flattening the plane where the hole openings are located.

2. The process for improving the heat conduction capacity of gallium oxide materials according to claim 1, characterized in that: The etching method in step S1 is specifically ion etching or laser ablation.

3. The process for improving the heat conduction capacity of gallium oxide materials according to claim 1, characterized in that: The step S2 is specifically as follows: A barrier layer is prepared on the inner wall of the hole array by physical vapor deposition or chemical vapor deposition.

4. The process for improving the heat conduction capacity of gallium oxide materials according to claim 3, characterized in that: The barrier layer is specifically made of titanium, tantalum or nitrides of titanium and tantalum.

5. The process for improving the heat conduction capacity of gallium oxide materials according to claim 1, characterized in that: The step S3 is specifically as follows: A metal seed layer is prepared on the barrier layer by physical vapor deposition.

6. The process for improving the heat conduction capacity of gallium oxide materials according to claim 1, characterized in that: The step S4 is specifically as follows: The hole array is filled with a preset thermal conductive material by metal electroplating.

7. The process for improving the heat conduction capacity of gallium oxide materials according to claim 6, characterized in that: If carbon nanotubes are mixed in the preset metal material, the carbon nanotubes are suspended in a metal electroplating solution to perform metal electroplating.

8. The process for improving the heat conduction capacity of gallium oxide materials according to claim 1, characterized in that: The removal of the preset metal material overflowing from the hole openings of the hole array is specifically: The predetermined filling thermal conductive material overflowing from the hole openings of the hole array is removed by CMP.

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