Lead frame and manufacturing process thereof
By forming an electroplating suspended structure on the inner foot of the lead frame and removing the electroplating layer to form a step structure, the airtightness and reliability of the lead frame when packaging the chip is solved, and the quality stability and manufacturing accuracy of the product are improved.
Patent Information
- Application Number
- CN202411973528.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-18
AI Technical Summary
When packaging chips, existing lead frames are prone to bubbles and moisture erosion, resulting in breakage or corrosion of the solder wires, reducing the reliability of the chip. At the same time, the secondary alignment tolerance in the electroplating and etching processes leads to unstable product quality and limited manufacturing accuracy, making it impossible to manufacture products with large line density and narrow pins.
The plating layer is formed by electroplating on the surface of the metal substrate, which covers and exceeds the designed inner foot area so that the plating layer extends sideways on the inner foot after etching. Then, after etching the lines forming the lead frame, the protective layer is retained and the electroplating layer is removed to ensure that the area with the preset width of the inner foot edge is not covered by the electroplating layer, thereby forming a step structure and eliminating the influence of secondary position tolerance.
It achieves higher airtightness and chip reliability, ensures stable connection of solder wires during packaging, improves the quality stability and reliability of lead frame products, and can create denser lines and narrow pin structures.
Smart Images
Figure CN119852183A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a lead frame. Background Art
[0002] Leadframe is an important device for chip packaging. The size of the chip (also called grain) is often small, but there are often many interfaces. In order to lead out the interface of the chip and facilitate mounting on the circuit board to achieve electrical or communication connection with other modules, it is necessary to use a leadframe to lead out these interfaces. The leadframe usually includes a base and pins. The base is used to mount the chip, and the pins are connected to the interface of the chip through welding wires. After the chip is packaged, the pins are the interface for the chip to achieve electrical or communication connection with the outside.
[0003] The area where the pins are connected to the chip is generally called the inner pin, and the area where the circuit board is soldered is generally called the outer pin. The inner pin surface is usually electroplated with silver or nickel-palladium-gold and other precious metals to form a layer of electroplating to facilitate wire bonding. Figure 1 As shown in (a), in a conventional lead frame, the surface of the inner pin 21 is fully covered by the electroplating layer 4, and the edge of the electroplating layer 4 is flush with the edge of the inner pin 21. After the chip is packaged, the joint between the plastic package shell 3 and the pin has fewer bends and poor air tightness. Air penetrates along the joint and only needs to pass through one bend to reach the joint between the electroplating layer 4 and the plastic package shell 3, forming bubbles there. As the temperature changes, these bubbles expand and contract, and the plastic package shell 3 inside the chip is easily separated from the lead frame, breaking the solder wires on the pins, or impurities such as moisture in the air will also corrode the solder wires, causing chip failure and reducing chip reliability.
[0004] For this reason, a lead frame with improved structure has emerged, such as Figure 1 As shown in (b), the surface of the inner pin 21 is not fully covered by the electroplating layer 4, and the inner pin 21 and the electroplating layer 4 form a stepped structure. After the chip is packaged, the joint between the plastic package shell 3 and the pin has an additional bend, which improves the airtightness and the reliability of the packaged chip.
[0005] The lead frame of this structure is usually made by electroplating first and then etching. Specifically, the electroplating area on the inner pin surface is first electroplated to form a plating layer, and then the copper in the non-circuit part is etched to form the lead frame. However, exposure and development are required before the electroplating and etching processes. Limited by the accuracy of today's exposure and development technology, the alignment of the two exposures and developments will have a tolerance of 20μm±5μm. Therefore, the distance between the edge of the electroplating layer and the edge of the inner pin is the same in the original design, that is, the inner pin edge is uniformly exposed to copper. However, due to the secondary alignment tolerance of the two exposures and developments before the electroplating and etching processes, such as Figure 2 As shown, the position of the electroplating layer 4 on the surface of the inner foot 21 is random in different panels. Figure 2(a) and (b) show the inner pins of lead frames produced in different panels. It is even possible that the wires are not soldered on the electroplating layer 4 when the chip is packaged. The quality of lead frame products is not stable enough. The reliability of products produced by different panels varies greatly. The reliability of some products produced by panels is not affected, while the reliability of products produced by other panels is not. Moreover, the manufacturing accuracy is also limited by this secondary alignment tolerance, and it is impossible to manufacture lead frame products with high circuit density and narrow pins. Summary of the invention
[0006] In view of this, the lead frame and the manufacturing process thereof provided by the present invention can provide a lead frame product with more stable quality and higher reliability.
[0007] To achieve the above objectives, the present invention provides the following technical solutions.
[0008] 1. Lead frame manufacturing process, Electroplating forms an electroplating layer on the surface of the metal substrate, wherein the electroplating layer covers and exceeds the designed inner foot area, so that after etching the metal substrate, the electroplating layer extends sideways on the inner foot and hangs in the air; After etching the metal substrate to form the circuit of the lead frame, retain the protective layer covering the metal substrate and the electroplating layer when etching the metal substrate, remove the electroplating layer, and remove the electroplating layer covering the area of the preset width of the inner foot edge, so that the area of the preset width of the inner foot edge is not covered by the electroplating layer and is exposed.
[0009] First, make an electroplating layer with a larger area than the designed electroplating layer, which not only fully covers the designed inner foot area, but also exceeds this area. In this way, after the pin is formed by etching, the electroplating layer still extends sideways from the inner foot and is suspended in the air. After etching, the protective layer formed by exposure and development before etching is retained to ensure that the edge where the electroplating layer and the inner foot are combined is exposed. Then remove the electroplating layer. No matter what technical means are used to remove the electroplating layer, the electroplating layer will be removed starting from the edge where the electroplating layer and the inner foot are combined. In this way, the electroplating layer will be evenly removed from here toward the inside of the inner foot. By controlling the parameters of the electroplating layer removal process, the purpose of removing the electroplating layer covering the area with a preset width of the inner foot edge can be achieved. In this way, the influence of secondary alignment tolerance can be eliminated, ensuring that the area with a preset width on the edge of the inner foot of the lead frame product produced by each panel is not covered by the electroplating layer, so that the electroplating layer and the inner foot form a step structure. The position of the electroplating layer of each panel is consistent, and its center position coincides with the center position of the inner foot, ensuring that the welding wire is on the electroplating layer when packaging the chip. The quality of the lead frame products produced by each panel is stable and the reliability is higher.
[0010] 2. Based on Technical Solution 1, the electroplating layer is removed by etching, and the electroplating layer is etched from the edge where the electroplating layer and the inner foot meet to etch away the electroplating layer covering the area of the preset width of the inner foot edge.
[0011] 3. Based on technical solution 1, the width of the electroplated layer formed by electroplating on the surface of the metal substrate beyond the designed inner foot area is 30μm±5μm. This overcomes the influence of the secondary alignment tolerance and ensures that a structure with the electroplated layer suspended can be formed.
[0012] 4. On the basis of Technical Solution 1, when the electroplating layer is formed on the surface of the metal substrate, the electroplating layer that completely covers the preset area of the metal substrate is formed. After the protective layer is formed, the electroplating layer not covered by the protective layer is first removed, and then the metal substrate is etched to form the circuit of the lead frame.
[0013] For some lead frame products, some areas have densely populated circuits and a small spacing between two pins, so the secondary alignment tolerance has a greater impact. In these areas with densely populated circuits, electroplating forms a plating layer that fully covers these areas. After the protective layer is formed by exposure and development before etching, the transferred circuit is both the plated circuit and the etched circuit, which are combined into one. This means that in these areas, alignment is only required during the exposure and development before etching. With only one alignment, the secondary alignment tolerance is naturally completely eliminated. Therefore, a structure with uniform copper exposure around the inner pins can be made on dense circuits, so that the plating layer and the inner pins form a stepped structure.
[0014] 5. A lead frame, including a pin, wherein the pin has an inner pin and an outer pin, the inner pin is provided with a plating layer, and is made using the process described in any one of technical solutions 1-4, and an area of a preset width on the edge of the inner pin is not covered by the plating layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 The cross-sectional view of the pins of the two lead frames after the chip is packaged.
[0016] Figure 2 The figure is a schematic diagram of the pins of lead frames produced by different panels in the prior art.
[0017] Figure 3 It is a schematic diagram of the pins of the lead frame of the present invention.
[0018] Figure 4 In the lead frame manufacturing process of the present invention Figure 3 Cross-sectional view along the AA direction.
[0019] Figure 5 The figure is a schematic diagram of the pins in the circuit-intensive area of the lead frame of the present invention.
[0020] Figure 6 In the lead frame manufacturing process of the present invention Figure 5 Cross-sectional view along the BB direction.
[0021] Reference numerals include: Metal substrate 1, pin 2, inner pin 21, plastic shell 3, electroplating layer 4, protective layer 5. DETAILED DESCRIPTION
[0022] The present invention is described in detail below in conjunction with specific embodiments.
[0023] The lead frame of this embodiment has pins 2 such as Figure 3 As shown, a plating layer 4 is formed on the inner leg 21 by electroplating, but the plating layer 4 does not completely cover the inner leg 21 , and an area with a preset width at the edge of the inner leg 21 is not covered by the plating layer 4 , that is, the copper is evenly exposed at the edge of the inner leg 21 .
[0024] The lead frame of this embodiment is manufactured by the following process.
[0025] Combination Figure 3 and Figure 4 ,like Figure 4 As shown in (a), first, the electroplating layer 4 is formed at the position of the designed inner foot 21 on the surface of the metal substrate 1, and the electroplating layer 4 covers and exceeds the area of the designed inner foot 21. The width of the electroplating layer 4 exceeding the area of the designed inner foot 21 is 30μm±5μm, overcoming the influence of the secondary alignment tolerance and ensuring that a structure in which the electroplating layer 4 is suspended can be formed. Figure 4 The dotted lines in (a) and (b) indicate the designed inner pins 21. The metal substrate 1 is generally a copper substrate, and the electroplating circuit is usually transferred by laminating, exposing, and developing, and then the electroplating layer 4 is formed by electroplating.
[0026] like Figure 4 As shown in (b), the film is then attached, exposed, and developed to transfer the etching circuit. After development, the position of the metal substrate 1 that needs to be etched is exposed, and the electroplating layer 4 will be covered by the protective layer 5 (i.e., the film after development) formed after development, as shown in FIG. Figure 4 As shown in (c), the metal substrate 1 is etched to form the circuit of the lead frame, and the electroplating layer 4 extends sideways on the inner foot 21 to be suspended in the air. At this time, the protective layer 5 is retained first.
[0027] like Figure 4 As shown in (d), the electroplating layer 4 is removed by using the existing stripping process, for example, etching can be used to remove the electroplating layer 4, which will not be described in detail here. When removing the electroplating layer 4, the electroplating layer 4 will be etched away from the edge where it is combined with the inner foot 21, and the etching is uniform everywhere. The various process parameters are controlled so that the electroplating layer 4 covering the preset width area of the edge of the inner foot 21 can be removed, so that the copper at the edge of the inner foot 21 can be uniformly exposed. Finally, the film stripping process is performed to remove the protective layer 5, and the result is as shown in FIG. Figure 3 and Figure 4 (e) shows the inner foot 21.
[0028] First, make an electroplating layer 4 with a larger area than the designed electroplating layer 4, which not only fully covers the designed inner foot 21 area, but also exceeds this area. In this way, after the pin 2 is etched, the electroplating layer 4 still extends sideways from the inner foot 21 and is suspended in the air. After etching, retain the protective layer 5 formed by exposure and development before etching to ensure that the edge where the electroplating layer 4 and the inner foot 21 are combined is exposed, and then remove the electroplating layer 4. No matter what technical means are used to remove the electroplating layer 4, the electroplating layer 4 will be removed starting from the edge where the electroplating layer 4 and the inner foot 21 are combined. In this way, the electroplating layer 4 will be evenly removed from here toward the inside of the inner foot 21. By controlling the parameters of the process for removing the electroplating layer 4, the purpose of removing the electroplating layer 4 covering the area with a preset width on the edge of the inner foot 21 can be achieved. In this way, the influence of the secondary alignment tolerance can be eliminated, ensuring that the area with a preset width on the edge of the inner foot 21 of the lead frame product produced by each panel is not covered by the electroplating layer 4, so that the electroplating layer 4 and the inner foot 21 form a step structure. The position of the electroplating layer 4 of each panel is consistent, and its center position coincides with the center position of the inner foot 21, ensuring that the welding wire is on the electroplating layer 4 when the chip is packaged. The quality of the lead frame products produced by each panel is stable and the reliability is higher.
[0029] For some lead frame products, the circuits in some areas are dense, and the spacing between two pins 2 is very small, so the impact of secondary alignment tolerance is greater. For such lead frame products, the manufacturing process can be adjusted. Figure 5 and Figure 6 As shown, when the electroplating layer 4 is formed on the surface of the metal substrate 1, the electroplating layer 4 is formed in the preset area of the metal substrate 1 (that is, the area of the designed dense circuit) to fully cover the area, as shown in FIG. Figure 6 As shown in (a). It is also possible to electroplate not only the densely-lined area, but also the entire surface of the metal substrate 1. In this way, the electroplating process does not need to transfer the lines, and direct electroplating is sufficient, which saves some processes, but increases the amount of precious metal used in electroplating. Figure 6 As shown in (b) and (c), the film is then applied, exposed, developed, and the circuit is transferred and etched to form a protective layer 5. The electroplating layer 4 not covered by the protective layer 5 is first removed, and then the metal substrate 1 is etched to form the circuit of the lead frame. The electroplating layer 4 is then removed using the above-mentioned process to form a structure with uniform copper exposure at the edge of the inner foot 21, and the protective layer 5 is removed, as shown in FIG. Figure 6 As shown in (d) and (e).
[0030] Electroplating is performed in these areas with dense circuits to form an electroplating layer 4 that fully covers these areas. After the protective layer 5 is formed by exposure and development before etching, the transferred circuit is both the electroplated circuit and the etched circuit. The two are combined into one, which is equivalent to requiring alignment in these areas only during the exposure and development before etching. With only one alignment, the tolerance of the secondary alignment is naturally completely eliminated. Therefore, a structure with uniform copper exposure around the inner foot 21 can be made on the dense circuit, so that the electroplating layer 4 and the inner foot 21 form a stepped structure.
[0031] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention, rather than to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the essence and scope of the technical solution of the present invention.
Claims
1. A lead frame manufacturing process, characterized in that: Electroplating forms an electroplating layer on the surface of the metal substrate, wherein the electroplating layer covers and exceeds the designed inner foot area, so that after etching the metal substrate, the electroplating layer extends sideways on the inner foot and hangs in the air; After etching the metal substrate to form the circuit of the lead frame, retain the protective layer covering the metal substrate and the electroplating layer when etching the metal substrate, remove the electroplating layer, and remove the electroplating layer covering the area of the preset width of the inner foot edge, so that the area of the preset width of the inner foot edge is not covered by the electroplating layer and is exposed.
2. The lead frame manufacturing process according to claim 1, characterized in that: The electroplating layer is removed by etching, and the electroplating layer is etched from the edge where the electroplating layer and the inner foot are combined, so as to etch away the electroplating layer covering the area with a preset width of the inner foot edge.
3. The lead frame manufacturing process according to claim 1, characterized in that: The width of the electroplated layer formed by electroplating on the surface of the metal substrate beyond the designed inner foot area is 30μm±5μm.
4. The lead frame manufacturing process according to claim 1, wherein: When the electroplating layer is formed on the surface of the metal substrate, the electroplating layer that fully covers the preset area of the metal substrate is formed. After the protective layer is formed, the electroplating layer not covered by the protective layer is first removed, and then the metal substrate is etched to form the circuit of the lead frame.
5. A lead frame, comprising a lead, wherein the lead has an inner leg and an outer leg, and the inner leg is provided with an electroplating layer, wherein: The device is manufactured by the process described in any one of claims 1 to 4, and an area of a preset width on the edge of the inner foot is not covered by the electroplating layer.