A signal delay compensation method based on single bus active carrier phase synchronization

Abstract

The application discloses a signal delay compensation method based on single bus active carrier phase synchronization, after carrier synchronization is completed, high-frequency circulating current data is collected through high-frequency sampling mode, and high-frequency circulating current values are calculated; the high-frequency circulating current values are taken as feedback values of disturbance observation, and increase and decrease of delay compensation values are controlled; dynamic delay compensation values are obtained through disturbance iteration. The application can realize high-frequency circulating current value collection through high-frequency sampling based on existing hardware sampling circuit, and then indirectly change the delay compensation value of the synchronization signal, and reduce the circulating current value after carrier synchronization. The algorithm is simple, fast and high in precision, and is continuously dynamically adjusted during operation, so as to cope with changes of inverter hardware conditions, changes of operation environment and working conditions. The application increases control stability when multiple inverters are connected in parallel, and has high market promotion value.

Description

TECHNICAL FIELD

[0001] The application relates to a signal delay compensation method based on single-bus active carrier phase synchronization, and belongs to the technical field of parallel synchronization compensation control of multiple inverters. BACKGROUND

[0002] With the development of the photovoltaic industry, the market demand for energy storage is increasing, and the use of different power segments and power expansion / reduction scenarios is emerging. Therefore, the demand for multiple parallel inverters is increasing. When multiple inverters are connected in parallel, carrier synchronization needs to be performed in order to suppress the occurrence of high-frequency circulating current. A common carrier synchronization method is single-bus active carrier phase synchronization.

[0003] In the single-bus active carrier phase synchronization method, the delay of the synchronization signal needs to be compensated, otherwise, there will be a fixed phase difference based on the carrier synchronization, and this phase difference is equivalent to the signal delay time.

[0004] In addition, due to differences in hardware, operating conditions and environments of the inverters, there will be certain fluctuations in the synchronization signal compensation time, and a general compensation value cannot be obtained through experiments.

[0005] It is clear that the synchronization signal delay is dynamically changing, and undercompensation or overcompensation of the signal delay will cause the high-frequency circulating current of the inverter to increase. Therefore, the more accurate the synchronization signal delay time compensation is, the lower the high-frequency circulating current will be. SUMMARY

[0006] The purpose of the present application is to solve the problems of the prior art, such as the large compensation error caused by the interference of the synchronization signal delay compensation. The application provides a signal delay compensation method based on single-bus active carrier phase synchronization.

[0007] To achieve the above purpose, the technical scheme adopted by the present application is as follows:

[0008] A signal delay compensation method based on single-bus active carrier phase synchronization, after the completion of carrier synchronization, high-frequency circulating current data is collected through high-frequency sampling, and the high-frequency circulating current value is calculated; the high-frequency circulating current value is used as a feedback value for disturbance observation to control the increase and decrease of the delay compensation value; and the dynamic delay compensation value is obtained through disturbance iteration.

[0009] Preferably, the high-frequency circulating current value I cycle is calculated according to the following formula:

[0010] Where n is the frequency multiplication number of high-frequency sampling, In is the current circulating current value, and m is the number of collected samples.

[0011] Preferably, the dynamic delay compensation value

[0012] wherein, is the dynamic time delay compensation value of the last period; the feedback value T is a basic compensation value obtained by experiment.

[0013] Preferably, the dynamic time delay compensation value The calculation formula is:

[0014] wherein is the high-frequency circulating current value in the current period, is the high-frequency circulating current value in the last period, sgn() is a circulating current feedback value comparison function, and ΔT delay is the step value of time delay compensation, is the dynamic time delay compensation value of the last period.

[0015] Preferably, the value of is limited.

[0016] The beneficial effects of the present application mainly include:

[0017] 1. Based on the existing hardware sampling circuit, high-frequency circulating current values can be collected at high frequency, thereby indirectly changing the time delay compensation value of the synchronization signal and reducing the circulating current value after carrier synchronization.

[0018] 2. The algorithm is simple, fast and accurate, and continuously dynamically adjusted during operation to cope with changes in inverter hardware conditions, operating environment and working conditions.

[0019] 3. The control stability when multiple inverters are connected in parallel is increased, and has high market promotion value. BRIEF DESCRIPTION OF DRAWINGS

[0020] Other features, objects and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments made with reference to the accompanying drawings:

[0021] Figure 1 is a dynamic process diagram of the disturbance iterative time delay compensation value in the present application.

[0022] Figure 2 is a flowchart of a signal time delay compensation method based on single bus active carrier phase synchronization according to the present application.

[0023] Figure 3 is a calculation process block diagram of the dynamic time delay compensation value in the present application.

[0024] Figure 4 is a high-frequency circulating current schematic diagram of frequency multiplication sampling in the present application.

[0025] Figure 5is a schematic diagram of high-frequency circulating current and fundamental current in the application. DETAILED DESCRIPTION

[0026] To make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0027] The present application will be further described below in conjunction with the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the related application, but not to limit the application. In addition, it should be noted that only the parts related to the application are shown in the drawings for the convenience of description. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0028] The present application provides a signal delay compensation method based on single bus active carrier phase synchronization, as shown in Figure 1 After the carrier synchronization is completed, the high-frequency circulating current data is collected by high-frequency sampling, and the high-frequency circulating current value is calculated. The high-frequency circulating current value is taken as the feedback value of disturbance observation to control the increase and decrease of the delay compensation value. The dynamic delay compensation value is obtained through disturbance iteration.

[0029] The method of single bus active carrier phase synchronization belongs to the prior art, that is, the corresponding synchronization control is performed according to the carrier. In the synchronization control process, delay compensation is involved. In the traditional method, the delay compensation is generally obtained by experiment to obtain a relatively generalized fixed compensation value. However, the difference in working conditions and environment will cause large fluctuations, which cannot meet the accurate compensation demand.

[0030] In the present application, the high-frequency component in the output current is collected by high-frequency sampling. As shown in Figure 5 The circulating current ripple on the current fundamental wave is related to the switching frequency and other factors. The synchronous signal delay time of dynamic change compensation is obtained by changing the delay compensation value, dynamically disturbing the high-frequency component value in the output current, taking the high-frequency circulating current value as the feedback value of disturbance observation, controlling the increase and decrease of the delay compensation value, and finally determining the most suitable delay compensation value or the suitable interval of the delay compensation value through the disturbance iteration method under the hardware condition.

[0031] In one specific embodiment, the calculation formula of the high-frequency circulating current value I cycle

[0032] ​Wherein n is the frequency multiplication number of high frequency sampling, In is the current circulating value, and m is the number of collected samples.

[0033] n represents the frequency multiplication number of high frequency sampling, that is, the circulating value of n times the sampling frequency of the fundamental wave current is obtained based on the sampling frequency of the fundamental wave current of the inverter 20 kHz, and the high frequency current value is sampled, that is, n is 8.

[0034] Wherein the sampling mode is the conversion mode of the equal phase difference of SOC in the ADC sampling of DSP, and the specific sampling implementation process is as follows Figure 4 As shown in the figure, the difference between each sampling point is Δt.

[0035] m represents the number of samples of the average value of the high frequency circulating current calculated based on a certain determined delay compensation value, that is, the maximum value under n times frequency sampling each time, and the average value is calculated as the high frequency circulating current value under the delay compensation value after collecting m times n times frequency circulating current maximum value.

[0036] In a specific embodiment, the dynamic delay compensation value

[0037] Wherein, is the dynamic delay compensation value of the last period; the feedback value T is the basic compensation value obtained by experiment.

[0038] Specifically, the basic compensation value obtained by experiment is added as a feedforward to speed up the convergence speed of the overall calculation.

[0039] In a specific embodiment, the dynamic delay compensation value The calculation formula is:

[0040] Wherein is the high frequency circulating current value in the current period, is the high frequency circulating current value in the last period, sgn() is the circulating current feedback value comparison function, and ΔT delay is the step value of delay compensation, is the dynamic delay compensation value of the last period.

[0041] The sign function sgn() is used as an observer to compare the circulating current feedback value, to determine the increase and decrease of the delay compensation value, and to step (ΔTdelay) increase or decrease a fixed delay compensation amount based on the delay compensation value of the last period.

[0042] After the high frequency circulating current value is obtained and calculated by the compensation value formula, the delay compensation value will be stabilized in a small interval after multiple disturbance observation iterations.

[0043] The formula operation process is as followsFigure 3 As shown, the compensation operation is realized based on disturbance iteration.

[0044] In one embodiment, as shown, the method specifically comprises the following steps: Figure 2

[0045] Calculate the high-frequency circulating current sampling value in the current period:

[0046] Obtain the high-frequency circulating current sampling value in the previous period:

[0047] Differ the high-frequency circulating current values in the two periods, that is,

[0048] Put the difference result into the sign function sgn() to calculate, and obtain the calculation result as positive or negative.

[0049] Multiply the function calculation result by the step value ΔT of the delay compensation delay to obtain the adjustment amount of the delay compensation value observed from the feedback result.

[0050] Add the previous delay compensation value to the current obtained delay compensation step value to obtain the delay compensation value in the current period, wherein the initial value can be added once in the first period at the beginning of the calculation.

[0051] Delay the delay compensation value in the current period for one period.

[0052] Limit the delay compensation value to prevent abnormal output of the delay compensation value caused by the problem of circulating current sampling.

[0053] Output the calculated delay compensation value to the outside.

[0054] The embodiment of the application has obvious contrast before and after the intervention of the delay compensation value adjustment method. Before the intervention of the method after carrier synchronization, the delay compensation value obtained by simply using the experimental method is used for calculation, and it is found that after carrier synchronization, the circulating current value ranges from 1.5A to 2.5A, but under the same conditions, the circulating current value is less than 800mA after the intervention of the method, so the effect of the method is obvious.

[0055] As can be seen from the above description, based on the existing hardware sampling circuit, high-frequency circulating current values can be realized by high-frequency sampling, and then the delay compensation value of the synchronization signal is indirectly changed, and the circulating current value after carrier synchronization is reduced. The algorithm is simple, fast and accurate, and will continue to be dynamically adjusted during operation to cope with changes in inverter hardware conditions, changes in operating environment and working conditions. The control stability of multiple inverters in parallel is increased, and has high market promotion value.​

[0056] The term "comprising" or any other similar word is intended to encompass the inclusion of one or more steps, features, or elements but not to the exclusion of any other steps, features, or elements. The term "comprising" therefore indicates that the inclusion of one or more steps, features, or elements is not a requirement and that other steps, features, or elements can also be included.

[0057] So far, the technical solutions of the present application have been described in combination with the preferred embodiments shown in the drawings, but it is easy for those skilled in the art to understand that the protection scope of the present application is obviously not limited to these specific embodiments. Those skilled in the art can make equivalent changes or replacements to the related technical features without deviating from the principles of the present application, and the technical solutions after these changes or replacements will all fall within the protection scope of the present application.

Claims

1. A signal delay compensation method based on single bus active carrier phase synchronization, characterized in that: after the completion of carrier synchronization, high-frequency circulating current data is collected by high-frequency sampling, and high-frequency circulating current values are calculated; the high-frequency circulating current values are taken as the feedback values of disturbance observation to control the increase and decrease of delay compensation values; and dynamic delay compensation values are obtained through disturbance iteration.

2. The signal delay compensation method based on single bus active carrier phase synchronization according to claim 1, characterized in that: High frequency circulating current value I cycle Calculation formula: wherein n is the number of frequency multiplication of high frequency sampling, In is the current circulating value, and m is the number of collected samples. Dynamic delay compensation value + feedback value T;​ wherein, T is the dynamic delay compensation value of the previous cycle; the feedback value T is a basic compensation value obtained from experiments; Dynamic delay compensation value The formula for calculating: wherein is the high frequency current value in the current cycle, is the high frequency current value in the previous cycle, sgn() is the current feedback value comparison function, is the step value of the delay compensation, is the dynamic delay compensation value in the previous cycle. ​ right Limit the amplitude.

Images