Power conversion device

Abstract

The power conversion device provided in this application includes a DC terminal, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, at least three inverter bridge arms, a switching unit, a controller, and filter inductors, filter capacitors, and AC terminals corresponding to each of the at least three inverter bridge arms. The third terminal of each inverter bridge arm is connected to the midpoint of the bus after passing through the filter inductor, filter capacitor, and switching unit corresponding to that inverter bridge arm in sequence. When the grid voltage is less than or equal to a first voltage threshold, the controller controls the switching unit to open or increase its impedance; and after the switching unit is opened or its impedance is increased, the controller controls the modulation wave of each inverter bridge arm to be a modulation wave with a first common-mode modulation signal superimposed on the initial modulation wave of each inverter bridge arm, thereby increasing the amplitude of the modulation wave of each inverter bridge arm. This not only balances the losses of the switching transistors in each inverter bridge arm but also improves the common-mode oscillation problem caused by the change in the modulation wave.

Description

Technical Field

[0001] This application relates to the field of power supply technology, and in particular to a power conversion device. Background Technology

[0002] When a low-voltage ride-through fault occurs in the power grid, the amplitude of the three-phase grid-connected voltage output by the power conversion system (PCS) decreases, leading to a decrease in the modulation index (i.e., the ratio of the grid voltage to the half-DC bus voltage). Since the modulation index is positively correlated with the modulation amplitude of the inverter arms in the PCS, a decrease in the modulation index also reduces the modulation amplitude of the inverter arms, thus shortening the time the inverter arms output positive or negative levels and increasing the time the inverter arms output zero levels. Figure 1 Taking a PCS with a Neutral Point Clamped (NPC) three-level inverter topology as an example, for the inverter arm consisting of switches Q11 to Q14 and diodes D15 and D16, when the grid voltage is in the positive half-cycle, the time the inverter arm outputs a positive level decreases, corresponding to a decrease in the conduction time of switch Q11; the time the inverter arm outputs a zero level increases, corresponding to an increase in the conduction time of diode D15 and switch Q12 in the zero-level loop. When the grid voltage is in the negative half-cycle, the time the inverter arm outputs a negative level decreases, corresponding to a decrease in the conduction time of switch Q14; the time the inverter arm outputs a zero level increases, corresponding to an increase in the conduction time of diode D16 and switch Q13 in the zero-level loop. Based on this, it can be seen that when a low-voltage ride-through fault occurs in the grid, the losses of the switching devices in the zero-level loop of each inverter arm will increase, resulting in an imbalance in the losses of the switching devices in each inverter arm. Here, the zero-level loop refers to the current loop corresponding to the zero-level output of the inverter arm. Summary of the Invention

[0003] This application provides a power conversion device that can not only balance the losses of the switching transistors in each inverter bridge arm, but also improve the common-mode oscillation problem caused by changes in the modulation wave.

[0004] In a first aspect, this application provides a power conversion device, comprising a DC terminal, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, at least three inverter bridge arms, a switching unit, a controller, and filter inductors, filter capacitors, and AC terminals corresponding to each of the at least three inverter bridge arms. The DC terminal is used to connect to photovoltaic modules or energy storage batteries, and the AC terminals corresponding to the at least three inverter bridge arms are used to connect to the power grid. The positive and negative DC buses are connected to the DC terminal, and the positive and negative bus capacitors are connected in series between the positive and negative DC buses. The first and second ends of each of the at least three inverter bridge arms are connected to the positive and negative DC buses, respectively. The third end of each inverter bridge arm passes through the corresponding filter inductor, filter capacitor, and switching unit before connecting to the midpoint of the bus, which is the connection point between the positive and negative bus capacitors. The series connections of the filter inductors and filter capacitors corresponding to the at least three inverter bridge arms are used to connect to the AC terminals corresponding to the at least three inverter bridge arms. The controller is used to control the switching unit to open or increase the impedance of the switching unit when the voltage of the power grid is less than or equal to a first voltage threshold, indicating that a low voltage ride-through fault has occurred in the power grid; and after the switching unit is opened or the impedance of the switching unit is increased, the controller controls the modulation wave of each inverter bridge arm to be a modulation wave after superimposing a first common-mode modulation signal on the initial modulation wave of each inverter bridge arm, so as to increase the amplitude of the modulation wave of each inverter bridge arm, wherein the initial modulation wave is the modulation wave of each inverter bridge arm when the power conversion device is working normally.

[0005] In this embodiment, a switching unit is added to the common-mode branch of the power conversion device (the branch located between the third end of each inverter arm and the midpoint of the bus, including the filter inductor and filter capacitor corresponding to each inverter arm). When a low-voltage ride-through fault occurs in the power grid, the switching unit is first controlled to open or its impedance is increased to cut off the common-mode branch or increase its impedance, thereby directly avoiding or mitigating common-mode oscillation. After the switching unit is opened or its impedance is increased, a common-mode modulation signal is superimposed on the initial modulation wave of each inverter arm to increase the amplitude of the modulation wave of each inverter arm. Here, the modulation wave of the inverter arm refers to the modulation wave of the reference switch in the inverter arm, which is the switch directly connected to the positive or negative DC bus in the inverter arm. Specifically, when the grid voltage is in the positive half-cycle, the reference switch is the switch in the inverter bridge arm directly connected to the positive DC bus; when the grid voltage is in the negative half-cycle, the reference switch is the switch in the inverter bridge arm directly connected to the negative DC bus. The modulation amplitude of the reference switch determines the duration of the positive or negative output level of the inverter bridge arm. Specifically, the larger the modulation amplitude of the reference switch, the larger the duty cycle of the reference switch, the longer the conduction time of the reference switch, which means a longer duration of positive or negative output level of the inverter bridge arm; the smaller the modulation amplitude of the reference switch, the smaller the duty cycle of the reference switch, the shorter the conduction time of the reference switch, which means a shorter duration of positive or negative output level of the inverter bridge arm. For a three-level power conversion device, when the grid voltage is in the positive half-cycle, the inverter bridge arm outputs either a positive level or a zero level; when the grid voltage is in the negative half-cycle, the inverter bridge arm outputs either a zero level or a negative level. In other words, the duration of the zero-level output of each inverter arm is negatively correlated with the duration of the positive or negative output. Therefore, the power conversion device can increase the duration of the positive or negative output of each inverter arm and decrease the duration of the zero-level output by increasing the modulation amplitude of each inverter arm. In other words, it can increase the conduction time of the reference switch in each inverter arm and decrease the conduction time of the switch in the zero-level loop of each inverter arm, thereby achieving loss balancing of the switches in each inverter arm. In summary, when a low-voltage ride-through fault occurs in the power grid, the power conversion device can not only balance the losses of the switches in each inverter arm but also improve the common-mode oscillation problem caused by the change in modulation waveform, thus contributing to the stable operation of the power conversion device.

[0006] In one possible implementation, the controller is further configured to indicate a high voltage ride-through fault in the power grid when the voltage of the power grid is greater than or equal to a second voltage threshold, and then control the switching unit to open or increase the impedance of the switching unit; and after the switching unit is opened or the impedance of the switching unit is increased, control the modulation wave of each inverter bridge arm to be a modulation wave after superimposing a second common-mode modulation signal on the initial modulation wave of each inverter bridge arm, so as to reduce the amplitude of the modulation wave of each inverter bridge arm, wherein the second voltage threshold is greater than the first voltage threshold.

[0007] In this embodiment, the power conversion device can also directly avoid or mitigate common-mode oscillation by first controlling the switching unit to disconnect or increase its impedance when a high-voltage ride-through fault occurs in the power grid. This disconnects the common-mode branch or increases its impedance, thus preventing common-mode oscillation. After disconnecting or increasing the impedance of the switching unit, a common-mode modulation signal is superimposed on the initial modulation wave of each inverter arm to reduce the amplitude of the modulation wave of each inverter arm. This reduces the duration of the positive or negative output level of each inverter arm and increases the duration of the zero-level output level. In other words, it reduces the conduction time of the reference switch in each inverter arm and increases the conduction time of the switch in the zero-level circuit of each inverter arm, thereby achieving loss balancing of the switches in each inverter arm. Therefore, when a high-voltage ride-through fault occurs in the power grid, the power conversion device can not only balance the losses of the switches in each inverter arm but also improve the common-mode oscillation problem caused by the change in modulation wave, thus contributing to the stable operation of the power conversion device.

[0008] In one possible implementation, the switching unit includes a mechanical switch and a semiconductor switch connected in parallel. The controller is configured to first open the mechanical switch and then turn off the semiconductor switch, thereby disconnecting the switching unit, when the mains voltage is less than or equal to a first voltage threshold or greater than or equal to a second voltage threshold.

[0009] In this embodiment, when a voltage ride-through fault occurs in the power grid, the power conversion device uses a control method where the mechanical switch disconnects before the semiconductor switch disconnects, causing the switching unit to disconnect and thus putting the common-mode branch in an open-circuit state. Therefore, not only can the common-mode oscillation problem be completely solved, but the conduction loss of the semiconductor switch can also be effectively reduced, thereby reducing the loss of the power conversion device.

[0010] In one possible implementation, the switching unit includes a switching device and an impedance element connected in parallel. The switching device includes a mechanical switch or a semiconductor switch, and the impedance element includes an inductor, a capacitor, or a resistor. The controller is used to control the switching device to open when the voltage of the power grid is less than or equal to a first voltage threshold or greater than or equal to a second voltage threshold, thereby increasing the impedance of the switching unit.

[0011] In this embodiment, the switching unit adopts a structure in which the switching device and the impedance element are connected in parallel. When a voltage ride-through fault occurs in the power grid, the power conversion device can increase the impedance of the switching unit simply by controlling the switching device to open, thereby putting the common-mode branch in a high-impedance state and thus improving the common-mode oscillation problem. The control method is simple and easy to implement.

[0012] In one possible implementation, the controller is further configured to indicate that the grid voltage has returned to normal when the grid voltage is greater than a first voltage threshold and less than a second voltage threshold, and then control the switching unit to close; and after the switching unit is closed, control the modulation wave of each inverter bridge arm to be the initial modulation wave of each inverter bridge arm.

[0013] In this embodiment, once the grid voltage returns to normal, the problem of increased losses in some switching transistors in each inverter bridge arm disappears. Therefore, it is not necessary to superimpose a common-mode modulation signal on the initial modulation wave of each inverter bridge arm and restore the common-mode branch to a closed or low-impedance state, thereby restoring the power conversion device to its operating state when the grid voltage is normal.

[0014] In one possible implementation, the switching unit includes a mechanical switch and a semiconductor switch connected in parallel. The controller is configured to first turn on the semiconductor switch and then close the mechanical switch, thereby closing the switching unit, when the voltage of the power grid is greater than a first voltage threshold and less than a second voltage threshold.

[0015] In this embodiment, after the grid voltage returns to normal, the power conversion device uses a control method where the mechanical switch closes later than the semiconductor switch, so that the switching unit closes. This not only restores the common-mode branch to a closed state, but also effectively reduces the conduction loss of the semiconductor switch, thereby reducing the loss of the power conversion device.

[0016] In one possible implementation, the switching unit includes a switching device and an impedance element connected in parallel. The switching device includes a mechanical switch or a semiconductor switch, and the impedance element includes an inductor, a capacitor, or a resistor. The controller is used to control the switching device to close, thereby closing the switching unit, when the voltage of the mains power grid is greater than a first voltage threshold and less than a second voltage threshold.

[0017] In this embodiment, after the grid voltage returns to normal, the power conversion device can close the switching unit simply by controlling the switching device to close, thereby restoring the common-mode branch to a low-impedance state. The control method is simple and easy to implement.

[0018] In one possible implementation, at least three inverter arms in the power conversion device employ an Active Neutral Point Clamped (ANPC) three-level inverter topology. Specifically, the fourth terminal of each inverter arm is connected to the bus midpoint, and each inverter arm includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and a sixth switch. The first, second, third, and fourth switches of each inverter arm are connected in series between the first and second terminals of each inverter arm, and the connection between the second and third switches of each inverter arm is connected to the third terminal of each inverter arm. The fifth and sixth switches of each inverter arm are connected in series between the connection between the first and second switches of each inverter arm and the connection between the third and fourth switches of each inverter arm, and the connection between the fifth and sixth switches of each inverter arm is connected to the fourth terminal of each inverter arm.

[0019] In one possible implementation, at least three inverter arms in the power conversion device employ a T-type three-level inverter topology. Specifically, the fourth terminal of each inverter arm is connected to the midpoint of the bus, and each inverter arm includes a first switch, a second switch, a third switch, and a fourth switch. The first and second switches of each inverter arm are connected in series between the first and second terminals of each inverter arm, and the connection point between the first and second switches in each inverter arm is connected to the third terminal of each inverter arm. The third and fourth switches of each inverter arm are connected in reverse series between the third and fourth terminals of each inverter arm.

[0020] In one possible implementation, the power conversion device further includes an energy storage element, a seventh switch, and an eighth switch, wherein the seventh and eighth switches are connected in series between the positive DC bus and the negative DC bus, and the energy storage element is connected between the midpoint of the bus and the connection point of the seventh and eighth switches. The controller is configured to control the seventh switch to be turned on for a first preset duration and then turned off when the voltage of the positive bus capacitor is greater than the voltage of the negative bus capacitor; after the seventh switch is turned off, the controller controls the eighth switch to be turned on for a second preset duration and then turned off, so as to transfer the energy stored in the positive bus capacitor to the negative bus capacitor; or, the controller is configured to control the eighth switch to be turned on for a third preset duration and then turned off when the voltage of the positive bus capacitor is less than the voltage of the negative bus capacitor; after the eighth switch is turned off, the controller controls the seventh switch to be turned on for a fourth preset duration and then turned off, so as to transfer the energy stored in the negative bus capacitor to the positive bus capacitor.

[0021] In this embodiment, the circuit consisting of the energy storage element, the seventh switch, and the eighth switch can be understood as a bus voltage balancing circuit. The power conversion device can balance the voltage of the positive bus capacitor and the voltage of the negative bus capacitor by controlling the conduction time of the two switches in the bus voltage balancing circuit. This allows for the selection of switches with lower voltage withstand capability, thereby reducing the cost of the power conversion device. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of an energy storage converter provided by existing technology;

[0023] Figure 2 This is a schematic diagram of the application scenario of the power conversion device provided in this application;

[0024] Figure 3 This is a schematic diagram of the power conversion device provided in this application;

[0025] Figure 4a This is another structural schematic diagram of the power conversion device provided in this application;

[0026] Figure 4b This is another structural schematic diagram of the power conversion device provided in this application;

[0027] Figure 5 This is another structural schematic diagram of the power conversion device provided in this application;

[0028] Figure 6 This is another structural schematic diagram of the power conversion device provided in this application. Detailed Implementation

[0029] The power conversion device provided in this application is applicable to various fields such as photovoltaic power generation, energy storage power generation, new energy smart microgrids, and power transmission and distribution. The power conversion device provided in this application can be an inverter, PCS, uninterruptible power supply (UPS), etc., suitable for different application scenarios, such as photovoltaic power supply scenarios, energy storage power supply scenarios, photovoltaic-energy storage hybrid power supply scenarios, and UPS power supply scenarios. The following explanation uses the energy storage power supply scenario as an example.

[0030] See Figure 2 , Figure 2 This is a schematic diagram illustrating an application scenario of the power conversion device provided in this application. In an energy storage power supply scenario, the power conversion device provided in this application is... Figure 2The PCS shown includes a DC terminal, a positive DC bus BUS+, a negative DC bus BUS-, a positive bus capacitor C1, a negative bus capacitor C2, a first phase bridge arm, a second phase bridge arm, a third phase bridge arm, a switching unit, a controller, filter inductors L1 to L3 corresponding to each of the first to third phase bridge arms, filter capacitors C31 to C33, and a three-phase AC terminal. The DC terminal of the PCS is connected to the energy storage battery cluster, and the three-phase AC terminals of the PCS are sequentially connected to the AC power grid through a prefabricated substation and a step-up substation. The positive DC bus BUS+ and the negative DC bus BUS- are connected to the DC terminal of the PCS, and the positive bus capacitor C1 and the negative bus capacitor C2 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-. The first and second ends of each phase arm in the first, second, and third phase bridge arms are connected to the positive DC bus BUS+ and the negative DC bus BUS-, respectively. The third end of the first phase bridge arm passes through the corresponding filter inductor L1, filter capacitor C31, and switch unit before connecting to the bus midpoint N. The third end of the second phase bridge arm passes through the corresponding filter inductor L2, filter capacitor C32, and switch unit before connecting to the bus midpoint N. The third end of the third phase bridge arm passes through the corresponding filter inductor L3, filter capacitor C33, and switch unit before connecting to the bus midpoint N. The bus midpoint N is the connection point of the positive bus capacitor C1 and the negative bus capacitor C2. All phase bridge arms from the first to the third phase are inverter bridge arms. The series connection points of filter inductor L1 and filter capacitor C31, filter inductor L2 and filter capacitor C32, and filter inductor L3 and filter capacitor C33 are connected to the three-phase AC terminals of the PCS, respectively.

[0031] After the PCS starts operating, the switching unit is in the closed state. The controller controls the first to third phase bridge arms to invert the DC power output from the energy storage battery cluster into AC power, which is then output to the connected prefabricated substation. This prefabricated substation steps up the AC power input to its input terminal and outputs it to a step-up substation. The step-up substation then steps up the AC power input to its input terminal to obtain AC power that meets the requirements of the AC power grid, thereby enabling the supply of power to the AC power grid.

[0032] During the process of the PCS supplying stable power to the AC grid, if the AC grid voltage is less than or equal to a first voltage threshold, it indicates a low-voltage ride-through fault in the AC grid. In this case, the controller either disconnects the control switch unit or increases its impedance. After the switch unit disconnects or its impedance increases, the modulation wave of each phase arm is controlled by superimposing a first common-mode modulation signal onto the initial modulation wave of each phase arm to increase the amplitude of the modulation wave of each phase arm. The initial modulation wave of each phase arm is the same as the modulation wave of each phase arm during normal PCS operation.

[0033] Understandably, when a low-voltage ride-through fault occurs in the power grid, the PCS can increase the amplitude of the modulation wave of each phase arm by superimposing a common-mode modulation signal on the initial modulation wave of each phase arm. This increases the duration of the positive or negative output level of each phase arm and decreases the duration of the zero output level. In other words, it increases the conduction time of the reference switch in each phase arm and decreases the conduction time of the switch in the zero-level circuit of each phase arm, thereby achieving loss balancing of the switches in each phase arm. The reference switch is the switch in each phase arm directly connected to the positive DC bus BUS+ or the negative DC bus BUS-. However, if the above-mentioned control method for balancing switch losses is directly applied to the existing PCS, the superimposed common-mode modulation signal is equivalent to being directly applied to the two ends of the series branch of the filter inductor and filter capacitor corresponding to each phase arm, resulting in common-mode oscillation. Based on this, the PCS in this application adds a switching unit to the common-mode branch (located between the third end of each phase arm and the midpoint N of the bus, including the filter inductor and filter capacitor corresponding to each phase arm) compared to existing PCS. When a low-voltage ride-through fault occurs in the power grid, the switching unit is first controlled to open or its impedance is increased to disconnect the common-mode branch or increase its impedance, thereby directly avoiding or mitigating common-mode oscillations. After the switching unit is opened or its impedance is increased, a common-mode modulation signal is superimposed on the initial modulation wave of each phase arm to achieve loss balancing of the switching transistors in each phase arm. Therefore, when a low-voltage ride-through fault occurs in the power grid, the PCS can not only balance the losses of the switching transistors in each phase arm but also improve the common-mode oscillation problem caused by changes in the modulation wave, thus contributing to the stable operation of the PCS.

[0034] The above are merely examples of application scenarios for the power conversion device provided in this application, and are not exhaustive. This application does not limit the application scenarios.

[0035] This application primarily optimizes the control method of power conversion devices under grid ride-through fault scenarios. Specifically, this application categorizes grid ride-through fault scenarios into two types: one is a low-voltage ride-through fault scenario, where the modulation index decreases, increasing the losses of the switches located on the zero-level loop in each inverter arm; the other is a high-voltage ride-through fault scenario, where the modulation index increases, increasing the losses of the reference switches in each inverter arm. The power conversion device provided by this application can solve the problem of increased losses of some switches in the above two scenarios, thereby ensuring stable operation of the power conversion device.

[0036] The following is combined Figures 3 to 6 The working principle of the power conversion device provided in this application is illustrated by example.

[0037] See Figure 3, Figure 3 This is a schematic diagram of the power conversion device provided in this application. Figure 3 As shown, the power conversion device 1 includes a DC terminal (including DC terminal i11 and DC terminal i12), a positive DC bus BUS+, a negative DC bus BUS-, a positive bus capacitor C1, a negative bus capacitor C2, an inverter bridge arm 111, an inverter bridge arm 112, ..., an inverter bridge arm 11n, a switching unit 12, a controller 13, filter inductors L1, L2, ..., Ln, filter capacitors C1, C2, ..., Cn, and an AC terminal (including AC terminal o11, o12, ..., and o13). Inverter bridge arm 111 corresponds one-to-one with filter inductor L1, filter capacitor C31, and AC terminal o11; inverter bridge arm 112 corresponds one-to-one with filter inductor L2, filter capacitor C32, and AC terminal o12; ...; inverter bridge arm 11n corresponds one-to-one with filter inductor Ln, filter capacitor C3n, and AC terminal o1n. Here, Figure 3 The DC terminals i11 and i12 shown are merely simplified illustrations of the positive and negative DC terminals of the power conversion device 1 and do not represent the actual number of positive and negative DC terminals of the power conversion device 1. In practical applications, the power conversion device 1 has multiple sets of DC terminals, with each set including one positive DC terminal and one negative DC terminal.

[0038] In this power conversion device 1, DC terminals i11 and i12 are used to connect to a DC source (including photovoltaic modules, energy storage batteries, capacitors, etc.), and AC terminals o11 to o1n are used to connect to the power grid. The positive DC bus BUS+ is connected to DC terminal i11 of the power conversion device 1, and the negative DC bus BUS- is connected to DC terminal i12 of the power conversion device 1. The positive bus capacitor C1 and the negative bus capacitor C2 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-. The first end i111+ of inverter bridge arm 111 is connected to the positive DC bus BUS+, the second end i111- of inverter bridge arm 111 is connected to the negative DC bus BUS-, and the third end o111 of inverter bridge arm 111 is connected to the bus midpoint N after passing through filter inductor L1, filter capacitor C31 and switch unit 12 in sequence; the first end i112+ of inverter bridge arm 112 is connected to the positive DC bus BUS+, the second end i112- of inverter bridge arm 112 is connected to the negative DC bus BUS-, and the third end o112 of inverter bridge arm 112 is connected to the bus midpoint N after passing through filter inductor L2, filter capacitor C32 and switch unit 12 in sequence; ...; the first end i11n+ of inverter bridge arm 11n is connected to the positive DC bus BUS+, the second end i111- of inverter bridge arm 11n is connected to the positive DC bus BUS+, the second end i111- of inverter bridge arm 11n is connected to the negative DC bus BUS-, and the third end i111- of inverter bridge arm 11n is connected to the bus midpoint N after passing through filter inductor L2, filter capacitor C32 and switch unit 12 in sequence; ... 11n- connects to the negative DC bus BUS-. The third terminal o11n of inverter bridge arm 11n passes through filter inductor Ln, filter capacitor C3n, and switch unit 12 in sequence before connecting to the bus midpoint N. The series connection of filter inductor L1 and filter capacitor C31 is used to connect to the AC terminal o11 of power conversion device 1; the series connection of filter inductor L2 and filter capacitor C32 is used to connect to the AC terminal o12 of power conversion device 1; ...; the series connection of filter inductor Ln and filter capacitor C3n is used to connect to the AC terminal o1n of power conversion device 1. Optionally, the filter circuit formed by the filter inductor and filter capacitor corresponding to each inverter bridge arm can be replaced with an LCL filter network. A DC / DC converter can also be connected between power conversion device 1 and the DC source. In this case, the bus midpoint N in power conversion device 1 is connected to the N line of the DC / DC converter.

[0039] Here, n is an integer greater than or equal to 3, and typically n is 3 or 4. When n = 3, the three inverter arms in power conversion device 1 are phase A, phase B, and phase C, respectively, and power conversion device 1 is a three-phase three-wire power conversion device. When n = 4, the four inverter arms in power conversion device 1 are phase A, phase B, phase C, and phase N, respectively, and power conversion device 1 is a three-phase four-wire power conversion device. Furthermore, inverter arms 111 to 11n can adopt multi-level inverter topologies, including but not limited to two-level inverter topologies, NPC three-level inverter topologies, ANPC three-level inverter topologies, and T-type three-level inverter topologies.

[0040] In one implementation scenario, during the power conversion device 1's supply of power to the grid, if the grid voltage is less than or equal to a first voltage threshold, indicating a low-voltage ride-through fault, the controller 13 will either open the control switch unit 12 or increase its impedance. After the switch unit 12 is opened or its impedance is increased, the controller 13 controls the modulation wave of each inverter bridge arm 111 to 11n to be a modulation wave with a first common-mode modulation signal superimposed on its initial modulation wave, thereby increasing the amplitude of the modulation wave of each inverter bridge arm. The initial modulation wave of each inverter bridge arm is the modulation wave of each inverter bridge arm during normal operation of the power conversion device 1. Here, "normal operation of power conversion device 1" means that the AC terminal voltage of power conversion device 1 is basically consistent with the grid voltage when the grid is operating normally. In other words, it means that the AC terminal voltage of power conversion device 1 is within the normal grid voltage range. Specifically, the normal grid voltage range can be greater than a first voltage threshold and less than a second voltage threshold. The first voltage threshold is less than the grid's rated voltage, and the second voltage threshold is greater than the grid's rated voltage. The specific settings of the first and second voltage thresholds can be adjusted based on actual operating requirements. For example, the first voltage threshold is 0.9 times the grid's rated voltage, and the second voltage threshold is 1.1 times the grid's rated voltage. In addition, the initial modulation wave of each inverter bridge arm includes a discontinuous pulse width modulation (DPWM) wave, a sinusoidal pulse width modulation (SPWM) wave, or a space vector pulse width modulation (SVPWM) wave.

[0041] Understandably, when a low-voltage ride-through fault occurs in the power grid, the power conversion device 1 controls the switching unit 12 to disconnect the common-mode branch or increase its impedance, thereby directly avoiding or mitigating common-mode oscillation. Subsequently, the power conversion device 1 increases the amplitude of the modulation wave of each inverter arm by superimposing a first common-mode modulation signal onto the initial modulation wave of each inverter arm, i.e., increasing the amplitude of the modulation wave of the reference switch in each inverter arm. Since the amplitude of the modulation wave of the reference switch determines the duration of the positive or negative level output by the inverter arm, specifically, a larger amplitude of the modulation wave of the reference switch results in a larger duty cycle and a longer conduction time, meaning a longer duration of the positive or negative level output by the inverter arm; conversely, a smaller amplitude of the modulation wave of the reference switch results in a smaller duty cycle and a shorter conduction time, meaning a shorter duration of the positive or negative level output by the inverter arm. Since the duration of the zero level output of the inverter bridge arm is negatively correlated with the duration of the positive or negative level output, the power conversion device 1 can increase the duration of the positive or negative level output of each inverter bridge arm and decrease the duration of the zero level output of each inverter bridge arm by increasing the modulation amplitude value of each inverter bridge arm. In other words, it can increase the conduction time of the reference switch in each inverter bridge arm and decrease the conduction time of the switch in the zero level circuit of each inverter bridge arm, thereby achieving loss balance of the switch in each inverter bridge arm.

[0042] In another implementation scenario, during the power conversion device 1's supply of power to the grid, if the grid voltage is greater than or equal to a second voltage threshold, the controller 13 indicates a high-voltage ride-through fault in the grid. In this case, the controller 13 either controls the switching unit 12 to open or increases its impedance. After the switching unit 12 is opened or its impedance increases, the controller 13 controls the modulation wave of each inverter arm 111 to 11n to be a modulation wave with a second common-mode modulation signal superimposed on its initial modulation wave, thereby reducing the amplitude of the modulation wave of each inverter arm. The initial modulation wave of each inverter arm is the modulation wave of each inverter arm when the power conversion device 1 is operating normally. Both the first and second common-mode modulation signals can be understood as common-mode voltages, and the shapes and amplitudes of the second and first common-mode modulation signals are different.

[0043] Understandably, when a high-voltage ride-through fault occurs in the power grid, the power conversion device 1 controls the switching unit 12 to cut off the common-mode branch or increase the impedance of the common-mode branch, thereby directly avoiding the generation of common-mode oscillation or mitigating the common-mode oscillation phenomenon. Subsequently, the power conversion device 1 uses a method of superimposing a second common-mode modulation signal on the initial modulation wave of each inverter bridge arm to reduce the amplitude of the modulation wave of each inverter bridge arm, thereby reducing the duration of the positive or negative output level of each inverter bridge arm and increasing the duration of the zero-level output of each inverter bridge arm. In other words, it can reduce the conduction time of the switching transistors directly connected to the DC bus in each inverter bridge arm and increase the conduction time of the switching transistors on the zero-level circuit in each inverter bridge arm, thereby achieving loss balance of the switching transistors in each inverter bridge arm.

[0044] In this application, when a grid cross-pass fault occurs, the power conversion device 1 can control the switching unit 12 to disconnect the common-mode branch or increase its impedance, thereby improving the common-mode oscillation problem. Furthermore, by superimposing a common-mode modulation signal onto the initial modulation wave of each inverter arm, the amplitude of the modulation wave in each inverter arm is changed, achieving loss balancing of the switching transistors in each inverter arm. Moreover, since the common-mode modulation signal injected into each inverter arm is the same, and the power supply to the grid is based on line voltage (i.e., the difference between the phase voltages of the two inverter arms), the effect of the common-mode modulation signal can be canceled out, thus not affecting the power supply to the grid.

[0045] Since the working principle of the power conversion device 1 is the same regardless of whether n is greater than or equal to 3, for ease of description, the following example is given with n=3.

[0046] For example, see Figure 4a , Figure 4a This is another structural schematic diagram of the power conversion device provided in this application. For example... Figure 4aAs shown, inverter arms 111 to 113 adopt an NPC three-level inverter topology. Specifically, inverter arm 111 includes a first switch Q11, a second switch Q12, a third switch Q13, a fourth switch Q14, a clamping diode D15, and a clamping diode D16; inverter arm 112 includes a first switch Q21, a second switch Q22, a third switch Q23, a fourth switch Q24, a clamping diode D25, and a clamping diode D26; and inverter arm 113 includes a first switch Q31, a second switch Q32, a third switch Q33, a fourth switch Q34, a clamping diode D35, and a clamping diode D36. The switching transistors in each inverter bridge arm can be understood as semiconductor switches, including metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), or gallium nitride (GaN) transistors. The following description uses an IGBT as an example: Switches Q11, Q12, Q13, and Q14 are connected in series between the first terminal i111+ and the second terminal i111- of inverter bridge arm 111. Specifically, the collector of switch Q11 is connected to the first terminal i111+ of inverter bridge arm 111, and the emitter of switch Q11 is connected to the collector of switch Q14 via switches Q12 and Q13. The emitter of switch Q14 is connected to the second terminal i111- of inverter bridge arm 111. The connection between the second switch Q12 and the third switch Q13 is connected to the third terminal o111 of the inverter bridge arm 111. The cathode of clamping diode D15 is connected to the collector of the second switch Q12, and the anode of clamping diode D15 is connected to the cathode of clamping diode D16 and the fourth terminal i1110 of inverter bridge arm 111. The anode of clamping diode D16 is connected to the emitter of the third switch Q13. The first switch Q21, the second switch Q22, the third switch Q23, and the fourth switch Q24 are connected in series between the first terminal i112+ and the second terminal i112- of inverter bridge arm 112. Specifically, the collector of the first switch Q21 is connected to the first terminal i112+ of inverter bridge arm 112, and the emitter of the first switch Q21 is connected to the collector of the fourth switch Q24 after passing through the second switch Q22 and the third switch Q23. The emitter of the fourth switch Q24 is connected to the second terminal i112- of inverter bridge arm 112. The connection between the third switch Q23 and the fourth switch Q24 is connected to the third terminal o112 of the inverter bridge arm 112.The cathode of clamping diode D25 is connected to the collector of the second switch Q22. The anode of clamping diode D25 is connected to the cathode of clamping diode D26 and the fourth terminal i1120 of inverter bridge arm 112. The anode of clamping diode D26 is connected to the emitter of the third switch Q23. The first switch Q31, the second switch Q32, the third switch Q33, and the fourth switch Q34 are connected in series between the first terminal i113+ and the second terminal i113- of inverter bridge arm 113. Specifically, the collector of the first switch Q31 is connected to the first terminal i113+ of inverter bridge arm 113. The emitter of the first switch Q31 is connected to the collector of the fourth switch Q34 after passing through the second switch Q32 and the third switch Q33. The emitter of the fourth switch Q34 is connected to the second terminal i113- of inverter bridge arm 113. The connection between the third switch Q33 and the fourth switch Q34 is connected to the third terminal o113 of the inverter bridge arm 113. The cathode of the clamping diode D35 is connected to the collector of the second switch Q32, and the anode of the clamping diode D35 is connected to the cathode of the clamping diode D36 and the fourth terminal i1130 of the inverter bridge arm 113. The anode of the clamping diode D36 is connected to the emitter of the third switch Q33. Furthermore, the fourth terminals i1110 of the inverter bridge arm 111, i1120 of the inverter bridge arm 112, and i1130 of the inverter bridge arm 113 are all connected to the midpoint N of the bus. Additionally, the switching unit 12 includes a mechanical switch K1 and a semiconductor switch Q4 connected in parallel. These mechanical switches include, but are not limited to, relays and contactors. Figure 4a For the specific connection relationships of the power conversion device 1 shown, excluding inverter bridge arms 111 to 113 and switching unit 12, please refer to [link to relevant documentation]. Figure 3 The description of the corresponding part in the power conversion device 1 shown is not repeated here.

[0047] Specifically, after the power conversion device 1 is connected to the grid, the switching unit 12 closes, specifically the mechanical switch K1 is closed and the semiconductor switch Q4 is off. The controller 13 acquires the grid voltage in real time after the power conversion device 1 is connected to the grid, and controls the semiconductor switch Q4 to turn on when the grid voltage is less than or equal to a first voltage threshold or greater than or equal to a second voltage threshold. After the semiconductor switch Q4 turns on, the controller 13 first controls the mechanical switch K1 to open, and then controls the semiconductor switch Q4 to turn off, thereby controlling the switching unit 12 to open, thus cutting off the common-mode branch and completely resolving the common-mode oscillation problem caused by the superimposed common-mode modulation signal. Furthermore, for the specific operation of the controller 13 after the switching unit 12 is opened, please refer to [link to relevant documentation]. Figure 3The descriptions of the corresponding parts in the illustrated embodiments will not be repeated here. It is understood that since the power conversion device 1 uses a method where the mechanical switch K1 is turned off before the semiconductor switch Q4 when the control switch unit 12 is turned off, the conduction loss of the semiconductor switch Q4 can be effectively reduced.

[0048] Furthermore, when the grid voltage is greater than a first voltage threshold but less than a second voltage threshold, indicating that the grid voltage has returned to normal, the controller 13 controls the closing of the control switch unit 12. Specifically, it first controls the semiconductor switch Q4 to turn on, and then controls the mechanical switch K1 to close, thereby restoring the common-mode branch to its open state. After the switch unit 12 closes, i.e., after the mechanical switch K1 closes, the controller 13 controls the modulation wave of each inverter bridge arm 111 to 113 to be the initial modulation wave of each inverter bridge arm, and controls the semiconductor switch Q4 to turn off. It can be understood that after the grid voltage returns to normal, the problem of increased losses in some switching transistors in each inverter bridge arm disappears. Therefore, it is not necessary to superimpose a common-mode modulation signal on the initial modulation wave of each inverter bridge arm and restore the common-mode branch to its open state, thereby restoring the power conversion device 1 to its operating state when the grid voltage is normal. In addition, since the power conversion device 1 uses the method of closing the mechanical switch K1 after the semiconductor switch Q4 when controlling the switch unit 12 to close, the conduction loss of the semiconductor switch Q4 can be effectively reduced.

[0049] Optionally, the power conversion device 1 may further include a bus voltage balancing circuit. This circuit transfers the electrical energy stored in the bus capacitor with the higher voltage (positive bus capacitor C1) to the bus capacitor with the lower voltage (negative bus capacitor C2) when there is a voltage difference between the positive bus capacitor C1 and the negative bus capacitor C2. For example, the bus voltage balancing circuit 14 includes a seventh switch Q5, an eighth switch Q6, and an inductor L4. The seventh switch Q5 and the eighth switch Q6 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-, and the inductor L4 is connected between the bus midpoint N and the connection point of the seventh switch Q5 and the eighth switch Q6. Optionally, the inductor L4 may be replaced with other energy storage elements, such as a capacitor or a combination of an inductor and a capacitor.

[0050] In one embodiment, when the voltage of the positive bus capacitor C1 is greater than the voltage of the negative bus capacitor C2, the controller 13 controls the seventh switch Q5 to be turned on for a first preset time and then turned off, so as to transfer the energy stored in the positive bus capacitor C1 to the inductor L4. After the seventh switch Q5 is turned off, the controller 13 controls the eighth switch Q6 to be turned on for a second preset time and then turned off, so as to transfer the energy stored in the inductor L4 to the negative bus capacitor C2, thereby realizing the transfer of the energy stored in the positive bus capacitor C1 to the negative bus capacitor C2.

[0051] In another embodiment, when the voltage of the positive bus capacitor C1 is less than the voltage of the negative bus capacitor C2, the controller 13 controls the eighth switch Q6 to be turned on for a third preset time and then turned off, so as to transfer the energy stored in the negative bus capacitor C2 to the inductor L4. After the eighth switch Q6 is turned off, the controller 13 controls the seventh switch Q5 to be turned on for a fourth preset time and then turned off, so as to transfer the energy stored in the inductor L4 to the positive bus capacitor C1, thereby realizing the transfer of the energy stored in the negative bus capacitor C2 to the positive bus capacitor C1.

[0052] It is understandable that the power conversion device 1 can balance the voltage of the positive bus capacitor C1 and the voltage of the negative bus capacitor C2 by controlling the conduction time of the two switching transistors in the bus voltage balancing circuit. This allows the selection of switching transistors with lower withstand voltage, thereby reducing the cost of the power conversion device 1.

[0053] In this embodiment, when a grid cross-pass fault occurs, the power conversion device 1 can disconnect the common-mode branch by controlling the switching unit 12 to completely solve the common-mode oscillation problem caused by the superimposed common-mode modulation signal. Furthermore, by superimposing the common-mode modulation signal on the initial modulation wave of each inverter arm, the amplitude of the modulation wave of each inverter arm is changed, thereby achieving loss equalization of the switching transistors in each inverter arm. In addition, since the switching unit 12 adopts a structure of parallel mechanical and semiconductor switches, and the power conversion device 1 uses a control method where the mechanical switch opens before the semiconductor switch and closes after the semiconductor switch when controlling the switching unit 12, the conduction loss of the semiconductor switch can be effectively reduced, thereby reducing the loss of the power conversion device 1.

[0054] For example, see Figure 4b , Figure 4b This is another structural schematic diagram of the power conversion device provided in this application. For example... Figure 4b As shown, with Figure 4a Compared to the power conversion device 1 shown, the only difference between the two is the switching unit 12. Specifically, Figure 4b The switch unit 12 shown includes a switch device S1 and an impedance element Z1 connected in parallel. The switch device S1 includes a mechanical switch or a semiconductor switch, and the impedance element Z1 includes an inductor, a capacitor or a resistor.

[0055] Specifically, after the power conversion device 1 is connected to the grid, the switching unit 12 is closed, specifically, the switching device S1 is in a closed state. The controller 13 acquires the grid voltage in real time after the power conversion device 1 is connected to the grid, and when the grid voltage is less than or equal to a first voltage threshold or greater than or equal to a second voltage threshold, it controls the switching device S1 to open, thereby increasing the impedance of the switching unit 12. This increases the impedance of the common-mode branch, placing the common-mode branch in a high-impedance state, thus improving the common-mode oscillation problem caused by the superimposed common-mode modulation signal. In practical applications, the improvement effect of the common-mode oscillation problem is determined by the impedance value of the impedance element Z1. To achieve the best improvement effect, the impedance element Z1 is usually selected as a resistor with a large resistance value, an inductor with a large inductance value, or a capacitor with a small capacitance value, so that the common-mode branch is approximately open-circuited.

[0056] Furthermore, when the grid voltage is greater than a first voltage threshold but less than a second voltage threshold, indicating that the grid voltage has returned to normal, the controller 13 controls the closing of the control unit 12, specifically controlling the closing of the control device S1, thereby restoring the common-mode branch to a low-impedance state. After the control unit 12 closes, i.e., after the control device S1 closes, the controller 13 controls the modulation wave of each inverter bridge arm 111 to 113 to be the initial modulation wave of each inverter bridge arm. It can be understood that after the grid voltage returns to normal, the problem of increased losses in some switching transistors in each inverter bridge arm disappears, thus eliminating the need to superimpose a common-mode modulation signal on the initial modulation wave of each inverter bridge arm and restoring the common-mode branch to a low-impedance state, thereby restoring the power conversion device 1 to its operating state when the grid voltage is normal.

[0057] For details on the specific operations of controller 13 after switch unit 12 is disconnected and the specific operations for achieving bus voltage balancing, please refer to [link to relevant documentation]. Figure 3 and Figure 4a The descriptions of the corresponding parts in the illustrated embodiments will not be repeated here.

[0058] In this embodiment, when a grid cross-pass fault occurs, the power conversion device 1 can increase the impedance of the common-mode branch by connecting the impedance element Z1 in the switching unit 12 to the common-mode branch. This improves the common-mode oscillation problem caused by the superimposed common-mode modulation signal. Furthermore, by superimposing the common-mode modulation signal on the initial modulation wave of each inverter arm, the amplitude of the modulation wave of each inverter arm is changed, thereby achieving loss equalization of the switching transistors in each inverter arm. In addition, the switching unit 12 adopts a structure where the switching device and the impedance element are connected in parallel. The power conversion device 1 can improve the common-mode oscillation problem simply by controlling the switching device, making the control method simple and easy to implement.

[0059] It should be noted that the switching unit 12 in this application is any circuit used to implement on / off control of the common-mode branch, or to implement switching control between the high-impedance state and the low-impedance state of the common-mode branch, except for those including Figure 4a and Figure 4b In addition to the specific structure shown, it may also include a switch clamping circuit for a fixed potential point.

[0060] also, Figure 4a and Figure 4b The structure of the switching unit used to achieve switching loss balancing, the structure for achieving bus voltage balancing, and the control method of the power conversion device 1 shown are also applicable to the power conversion device 1. Figure 5 and Figure 6 The power conversion device 1 shown.

[0061] like Figure 5 As shown, inverter arms 111 to 113 adopt an ANPC three-level inverter topology. Figure 5 Each inverter arm shown is equivalent to... Figure 4a The bridge arm shown is modified by replacing the two clamping diodes in each inverter bridge arm with the fifth and sixth switching transistors. Specifically, in inverter bridge arm 111, the fifth switching transistor Q15 and the sixth switching transistor Q16 are connected in series between the connection point of the first switching transistor Q11 and the second switching transistor Q12 and the connection point of the third switching transistor Q13 and the fourth switching transistor Q14. The connection point of the fifth switching transistor Q15 and the sixth switching transistor Q16 is connected to the fourth terminal i1110 of inverter bridge arm 111. In inverter bridge arm 112, the fifth switching transistor Q25 and the sixth switching transistor Q26 are connected in series between the connection point of the first switching transistor Q21 and the second switching transistor Q22 and the connection point of the third switching transistor Q23 and the fourth switching transistor Q24. The connection point of the fifth switching transistor Q25 and the sixth switching transistor Q26 is connected to the fourth terminal i1110 of inverter bridge arm 112. 1120; The fifth switch Q35 and the sixth switch Q36 in inverter arm 113 are connected in series between the connection point of the first switch Q31 and the second switch Q32 and the connection point of the third switch Q33 and the fourth switch Q34. The connection point of the fifth switch Q35 and the sixth switch Q36 is connected to the fourth terminal i 1130 of inverter arm 113. Here, Figure 5 For a detailed description of the connection relationships and control methods of the power conversion device 1 shown, excluding the inverter arms, please refer to [link to relevant documentation]. Figure 4a and Figure 4b The description of the corresponding part in the power conversion device 1 shown is not repeated here.

[0062] like Figure 6As shown, inverter arms 111 to 113 employ a T-type three-level inverter topology. Specifically, inverter arm 111 includes a first switch Q11, a second switch Q12, a third switch Q13, and a fourth switch Q14; inverter arm 112 includes a first switch Q21, a second switch Q22, a third switch Q23, and a fourth switch Q24; and inverter arm 113 includes a first switch Q31, a second switch Q32, a third switch Q33, and a fourth switch Q34. The switches in each inverter arm can be understood as semiconductor switches, including MOSFETs, IGBTs, or GaN transistors. The following description uses an IGBT as an example of a switching transistor: The collector of the first switching transistor Q11 is connected to the first terminal i111+ of the inverter bridge arm 111, the emitter of the first switching transistor Q11 is connected to the second terminal i111- of the inverter bridge arm 111 through the second switching transistor Q12, and the emitter of the first switching transistor Q11 is connected to the third terminal o111 of the inverter bridge arm 111. The third switch Q13 and the fourth switch Q14 are connected in reverse series between the third terminal o111 and the fourth terminal i1110 of the inverter bridge arm 111. Specifically, the emitter of the fourth switch Q14 is connected to the third terminal o111 of the inverter bridge arm 111, the collector of the fourth switch Q14 is connected to the collector of the third switch Q13, and the emitter of the third switch Q13 is connected to the fourth terminal i1110 of the inverter bridge arm 111. The collector of the first switch Q21 is connected to the first terminal i112+ of the inverter bridge arm 112, the emitter of the first switch Q21 is connected to the second terminal i112- of the inverter bridge arm 112 through the second switch Q22, and the emitter of the first switch Q21 is connected to the third terminal o112 of the inverter bridge arm 112. The third switch Q23 and the fourth switch Q24 are connected in reverse series between the third terminal o112 and the fourth terminal i1120 of the inverter bridge arm 112. Specifically, the emitter of the fourth switch Q24 is connected to the third terminal o112 of the inverter bridge arm 112, the collector of the fourth switch Q24 is connected to the collector of the third switch Q23, and the emitter of the third switch Q23 is connected to the fourth terminal i1120 of the inverter bridge arm 112. The collector of the first switch Q31 is connected to the first terminal i113+ of the inverter bridge arm 113, the emitter of the first switch Q31 is connected to the second terminal i113- of the inverter bridge arm 113 through the second switch Q32, and the emitter of the first switch Q31 is connected to the third terminal o113 of the inverter bridge arm 113. The third switch Q33 and the fourth switch Q34 are connected in reverse series between the third terminal o113 and the fourth terminal i1130 of the inverter bridge arm 113. Specifically, the emitter of the fourth switch Q34 is connected to the third terminal o113 of the inverter bridge arm 113, the collector of the fourth switch Q34 is connected to the collector of the third switch Q33, and the emitter of the third switch Q33 is connected to the fourth terminal i1130 of the inverter bridge arm 113.Furthermore, the fourth terminal i1110 of inverter arm 111, the fourth terminal i1120 of inverter arm 112, and the fourth terminal i1130 of inverter arm 113 are all connected to the midpoint N of the bus. Here, ... Figure 6 For a detailed description of the connection relationships and control methods of the power conversion device 1 shown, excluding the inverter arms, please refer to [link to relevant documentation]. Figure 4a and Figure 4b The description of the corresponding part in the power conversion device 1 shown is not repeated here.

[0063] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power conversion device, characterized in that, The power conversion device includes a DC terminal, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, at least three inverter bridge arms, a switching unit, a controller, and filter inductors, filter capacitors, and AC terminals corresponding to each of the at least three inverter bridge arms, wherein: The DC terminal is used to connect to photovoltaic modules or energy storage batteries, and the AC terminals corresponding to the at least three inverter bridge arms are used to connect to the power grid. The positive DC bus and the negative DC bus are connected to the DC terminal, and the positive bus capacitor and the negative bus capacitor are connected in series between the positive DC bus and the negative DC bus. The first and second ends of each of the at least three inverter bridge arms are respectively connected to the positive DC bus and the negative DC bus. The third end of each inverter bridge arm passes through the corresponding filter inductor, filter capacitor and the switching unit in sequence and is connected to the midpoint of the bus. The midpoint of the bus is the connection point of the positive bus capacitor and the negative bus capacitor. The series connection points of the filter inductors and filter capacitors corresponding to the at least three inverter bridge arms are respectively used to connect to the AC terminals corresponding to the at least three inverter bridge arms. The controller is configured to, when the voltage of the power grid is less than or equal to a first voltage threshold, control the switching unit to open or increase the impedance of the switching unit; after the switching unit is opened or the impedance of the switching unit is increased, control the modulation wave of each inverter bridge arm to be a modulation wave after superimposing a first common-mode modulation signal on the initial modulation wave of each inverter bridge arm, so as to increase the amplitude of the modulation wave of each inverter bridge arm, wherein the initial modulation wave is the modulation wave of each inverter bridge arm when the power conversion device is working normally.

2. The power conversion device according to claim 1, characterized in that, The controller is further configured to, when the voltage of the power grid is greater than or equal to a second voltage threshold, control the switching unit to open or increase the impedance of the switching unit; after the switching unit is opened or the impedance of the switching unit is increased, control the modulation wave of each inverter bridge arm to be a modulation wave after superimposing a second common-mode modulation signal on the initial modulation wave of each inverter bridge arm, so as to reduce the amplitude of the modulation wave of each inverter bridge arm, wherein the second voltage threshold is greater than the first voltage threshold.

3. The power conversion device according to claim 2, characterized in that, The switching unit includes a mechanical switch and a semiconductor switch connected in parallel; The controller is configured to, when the voltage of the power grid is less than or equal to the first voltage threshold or greater than or equal to the second voltage threshold, first control the mechanical switch to open and then control the semiconductor switch to close.

4. The power conversion device according to claim 2, characterized in that, The switching unit includes a switching device and an impedance element connected in parallel. The switching device includes a mechanical switch or a semiconductor switch, and the impedance element includes an inductor, a capacitor, or a resistor. The controller is used to control the switching device to disconnect when the voltage of the power grid is less than or equal to the first voltage threshold or greater than or equal to the second voltage threshold.

5. The power conversion device according to any one of claims 2-4, characterized in that, The controller is further configured to control the switching unit to close when the voltage of the power grid is greater than the first voltage threshold and less than the second voltage threshold; and after the switching unit is closed, control the modulation wave of each inverter bridge arm to be the initial modulation wave of each inverter bridge arm.

6. The power conversion device according to claim 5, characterized in that, The switching unit includes a mechanical switch and a semiconductor switch connected in parallel; The controller is used to, when the voltage of the power grid is greater than the first voltage threshold and less than the second voltage threshold, first control the semiconductor switch to turn on and then control the mechanical switch to close.

7. The power conversion device according to claim 5, characterized in that, The switching unit includes a switching device and an impedance element connected in parallel. The switching device includes a mechanical switch or a semiconductor switch, and the impedance element includes an inductor, a capacitor, or a resistor. The controller is used to control the switching device to close when the voltage of the power grid is greater than the first voltage threshold and less than the second voltage threshold.

8. The power conversion device according to any one of claims 1-4, 6, and 7, characterized in that, The fourth end of each inverter bridge arm is connected to the midpoint of the bus. Each inverter bridge arm includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and a sixth switch, wherein: The first, second, third, and fourth switches of each inverter bridge arm are connected in series between the first and second ends of each inverter bridge arm, and the connection between the second and third switches of each inverter bridge arm is connected to the third end of each inverter bridge arm. The fifth and sixth switches of each inverter bridge arm are connected in series between the connection point of the first and second switches of each inverter bridge arm and the connection point of the third and fourth switches of each inverter bridge arm, and the connection point of the fifth and sixth switches of each inverter bridge arm is connected to the fourth end of each inverter bridge arm.

9. The power conversion device according to any one of claims 1-4, 6, and 7, characterized in that, The fourth end of each inverter bridge arm is connected to the midpoint of the bus. Each inverter bridge arm includes a first switch, a second switch, a third switch, and a fourth switch, wherein: The first and second switching transistors of each inverter bridge arm are connected in series between the first and second ends of each inverter bridge arm, and the connection point of the first and second switching transistors in each inverter bridge arm is connected to the third end of each inverter bridge arm. The third and fourth switches of each inverter bridge arm are connected in reverse series between the third and fourth ends of each inverter bridge arm.

10. The power conversion device according to any one of claims 1-4, 6, and 7, characterized in that, The power conversion device further includes an energy storage element, a seventh switch and an eighth switch, wherein the seventh switch and the eighth switch are connected in series between the positive DC bus and the negative DC bus, and the energy storage element is connected between the midpoint of the bus and the connection point of the seventh switch and the eighth switch. The controller is configured to, when the voltage of the positive bus capacitor is greater than the voltage of the negative bus capacitor, control the seventh switch to be turned on for a first preset time and then turned off; after the seventh switch is turned off, control the eighth switch to be turned on for a second preset time and then turned off, so as to transfer the energy stored in the positive bus capacitor to the negative bus capacitor; or... The controller is used to control the eighth switch to be turned on for a third preset time and then turned off when the voltage of the positive bus capacitor is less than the voltage of the negative bus capacitor; after the eighth switch is turned off, the controller controls the seventh switch to be turned on for a fourth preset time and then turned off, so as to transfer the energy stored in the negative bus capacitor to the positive bus capacitor.

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