Power-on reset circuit, chip and electronic equipment

Abstract

The invention provides a power-on reset circuit, a chip and electronic equipment, the power-on reset circuit comprises a first temperature coefficient module, one end of the first temperature coefficient module is used for receiving power supply voltage, the other end of the first temperature coefficient module is grounded, and the first temperature coefficient module comprises a first voltage node; one end of the second temperature coefficient module is used for receiving the power voltage, the other end of the second temperature coefficient module is grounded, and the second temperature coefficient module comprises a second voltage node; one end of the first voltage dividing module is connected to a first voltage node of the first temperature coefficient module, the other end of the first voltage dividing module is grounded, and the first voltage dividing module comprises a first voltage dividing node; the first input end of the processing module is connected to the first voltage dividing node, the second input end of the processing module is connected to the second voltage node, and the processing module is used for outputting a power-on reset signal. According to the power-on reset circuit provided by the invention, in the rising process of the power supply voltage, the power-on reset signal is output when the divided voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage, so that the power-on reset circuit can be suitable for an application scene of low-voltage detection.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a power-on reset circuit, a chip and an electronic device. Background Art

[0002] When the integrated circuit is powered on, it usually takes a long time for the power supply to reach a stable state. During this process, the status of the integrated circuit units such as registers and controllers is uncertain, which may cause the integrated circuit to not work properly. Therefore, a circuit is needed to initialize the various units of the integrated circuit when the power is turned on to eliminate the uncertain status of the various units of the integrated circuit. Usually, a power-on reset (POR) circuit is used to implement this function.

[0003] The traditional power-on reset circuit realizes power-on reset by detecting the power supply voltage, and outputs a power-on reset signal when the power supply voltage is detected to rise to a certain set threshold. The threshold voltage of the power-on reset circuit is determined by the threshold voltage of the NMOS tube or the PMOS tube, that is, when the power supply voltage rises to make one MOS tube conduct, the current mirror composed of other MOS tubes can start to conduct, and the current mirror charges the energy storage element. When the charging voltage is higher than a certain threshold, the circuit outputs the power-on reset signal. Based on the traditional power-on reset circuit, the power supply voltage must be greater than the threshold voltage of at least two MOS tubes to output the power-on reset signal, that is, the traditional power-on reset circuit requires a higher power supply voltage when outputting the power-on reset signal. Summary of the invention

[0004] In view of the above problems, the present application provides a power-on reset circuit, a chip and an electronic device to solve the above technical problems.

[0005] In a first aspect, the present application provides a power-on reset circuit, comprising:

[0006] A first temperature coefficient module, used to generate a first temperature coefficient voltage, wherein one end of the first temperature coefficient module is used to receive a power supply voltage and the other end is grounded, and the first temperature coefficient module includes a first voltage node;

[0007] A second temperature coefficient module, used for generating a second temperature coefficient voltage, wherein one end of the second temperature coefficient module is used for receiving the power supply voltage and the other end is grounded, and the second temperature coefficient module includes a second voltage node;

[0008] a first voltage dividing module, one end of which is connected to the first voltage node of the first temperature coefficient module, and the other end of which is grounded, and the first voltage dividing module includes a first voltage dividing node; and

[0009] A processing module, wherein a first input terminal of the processing module is connected to the first voltage-dividing node, a second input terminal of the processing module is connected to the second voltage node, and the processing module is used to output a power-on reset signal.

[0010] In a second aspect, the present application further provides a chip, comprising the power-on reset circuit as described in the first aspect above.

[0011] In a third aspect, the present application also provides an electronic device, comprising the chip as described in the second aspect above.

[0012] The power-on reset circuit, chip and electronic device provided by the present application, the power-on reset circuit includes a first temperature coefficient module, a second temperature coefficient module, a first voltage divider module and a processing module, the first temperature coefficient module and the second temperature coefficient module are connected to the power supply voltage to generate a first temperature coefficient voltage and a second temperature coefficient voltage that change with the power supply voltage, the first temperature coefficient voltage is output to the processing module after being divided by the first voltage divider node of the first voltage divider module, the second temperature coefficient voltage is output to the processing module from the second voltage node of the second temperature coefficient module, during the rising process of the power supply voltage, when the divided voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage, the processing module outputs a power-on reset signal according to the two input signals, and the power supply voltage is the reset threshold voltage for outputting the power-on reset signal at this time. The power-on reset circuit provided by the present application outputs a power-on reset signal when the divided voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage during the rising process of the power supply voltage, so that the power-on reset circuit can be suitable for the application scenario of low voltage detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0014] Figure 1 A module block diagram of a power-on reset circuit provided in an embodiment of the present application is shown.

[0015] Figure 2 Another module block diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0016] Figure 3 A schematic structural diagram of a power-on reset circuit provided in an embodiment of the present application is shown.

[0017] Figure 4 Another structural schematic diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0018] Figure 5 Another structural schematic diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0019] Figure 6 Another structural schematic diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0020] Figure 7 Another structural schematic diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0021] Figure 8 Another structural schematic diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0022] Fig. 9 Another structural schematic diagram of the power-on reset circuit provided in an embodiment of the present application is shown.

[0023] Fig.10 A timing diagram of a power-on reset circuit provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0025] In the embodiments of the present application, it should be noted that, in this article, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0026] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0027] The first pole of each transistor used in the embodiment of the present application is one of the emitter and the collector (source and drain), and the second pole of each transistor is the other of the emitter and the collector (source and drain). Since the emitter and collector (source and drain) of the transistor can be symmetrical in structure, the emitter and collector (source and drain) thereof can be indistinguishable in structure, that is, the first pole and the second pole of the transistor in the embodiment of the present application can be indistinguishable in structure. Exemplarily, in the case where the transistor is a P-type transistor, the first pole of the transistor is the emitter (source), and the second pole is the collector (drain); Exemplarily, in the case where the transistor is an N-type transistor, the first pole of the transistor is the collector (drain), and the second pole is the emitter (source).

[0028] In the circuit structure provided in the embodiment of the present application, the first voltage node, the second voltage node, the first voltage dividing node, the second voltage dividing node, the third voltage dividing node and other nodes do not represent actual existing components, but represent the junction points of related couplings in the circuit diagram, that is, these nodes are nodes formed by the equivalent junction points of related couplings in the circuit diagram.

[0029] The following describes the solution of this application in conjunction with the accompanying drawings. Figure 1 FIG. 4 shows a block diagram of a power-on reset circuit according to an embodiment of the present application. Figure 1 As shown, the power-on reset circuit provided in the embodiment of the present application includes:

[0030] The first temperature coefficient module is used to generate a first temperature coefficient voltage. One end of the first temperature coefficient module is used to receive the power supply voltage, and the other end is grounded. The first temperature coefficient module includes a first voltage node D1. The first voltage node D1 can be connected to an external circuit to output a first temperature coefficient voltage to the external circuit. The first temperature voltage changes with the power supply voltage. Optionally, when the power supply voltage starts to rise, the first temperature coefficient module has not yet generated a constant first temperature coefficient voltage. At this time, the first voltage node D1 can be connected to an external circuit to output a voltage that changes with the power supply voltage.

[0031] The second temperature coefficient module is used to generate a second temperature coefficient voltage. One end of the second temperature coefficient module is used to receive the power supply voltage, and the other end is grounded. The second temperature coefficient module includes a second voltage node D2. The second voltage node D2 can be connected to an external circuit to output a second temperature coefficient voltage to the external circuit. The second temperature coefficient voltage changes with the power supply voltage. Optionally, when the power supply voltage starts to rise, the second temperature coefficient module has not yet generated a constant second temperature coefficient voltage. At this time, the second voltage node D2 can be connected to an external circuit to output a voltage that changes with the power supply voltage.

[0032] A first voltage divider module, one end of the first voltage divider module is connected to the first voltage node D1 of the first temperature coefficient module, and the other end is grounded. The first voltage divider module includes a first voltage divider node E1, and the first voltage divider node E1 can be connected to an external circuit to output a divided voltage of the first temperature coefficient voltage to the external circuit; optionally, when the power supply voltage starts to rise, the first voltage divider node E1 can be connected to an external circuit to output a divided voltage of the first voltage node D1 to the external circuit.

[0033] A processing module, wherein the first input terminal of the processing module is connected to the first voltage dividing node E1, and the second input terminal of the processing module is connected to the second voltage node D2. During the rising process of the power supply voltage, when the voltage dividing voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage, the processing module outputs a power-on reset signal according to the two input signals. At this time, the power supply voltage is a reset threshold voltage for outputting the power-on reset signal.

[0034] As an implementation mode, in the power-on reset circuit provided in the embodiment of the present application, when the first temperature coefficient module and the second temperature coefficient module do not generate a temperature coefficient voltage, the rate of change of the first voltage dividing node E1 with the power supply voltage is set to be higher than the rate of change of the second voltage node D2 with the power supply voltage, and when the second temperature coefficient module and the first temperature coefficient module generate a temperature coefficient voltage, the rate of change of the second temperature coefficient voltage with the power supply voltage is higher than the rate of change of the first temperature coefficient voltage dividing voltage with the power supply voltage. At this time, the output voltages of the second voltage node D2 and the first voltage dividing node E1 can reach equality as the power supply voltage rises.

[0035] The power-on reset circuit provided in the embodiment of the present application outputs a power-on reset signal when the divided voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage during the rising process of the power supply voltage, so that the power-on reset circuit can be suitable for the application scenario of low voltage detection.

[0036] In some embodiments, Figure 2 Another module block diagram of the power-on reset circuit provided in the embodiment of the present application is shown in FIG. Figure 2 As shown, the power-on reset circuit provided in the embodiment of the present application also includes:

[0037] A second voltage divider module, one end of the second voltage divider module is connected to the second voltage node D2 of the second temperature coefficient module, and the other end is grounded. Optionally, the second voltage divider module is used to divide the voltage of the second voltage node D2 when the second temperature coefficient module does not generate a constant second temperature coefficient voltage to reduce the initial value of the second voltage node D2.

[0038] As an implementation method, the following problem is solved by lowering the initial voltage value of the second voltage node D2 through the second voltage divider module: when the first temperature coefficient module and the second temperature coefficient module do not generate a constant temperature coefficient voltage, the rate of change of the first voltage divider node E1 with the power supply voltage is higher than the rate of change of the second voltage node D2 with the power supply voltage. If the initial value of the output voltage of the second voltage node D2 is higher than the initial value of the output voltage of the first voltage divider node E1, the output voltages of the second voltage node D2 and the first voltage divider node E1 may be equal in advance when the power supply voltage is low, and when the second temperature coefficient module and the first temperature coefficient module generate a constant temperature coefficient voltage, the rate of change of the second temperature coefficient voltage with the power supply voltage is higher than the rate of change of the first temperature coefficient voltage divider with the power supply voltage. The output voltages of the second voltage node D2 and the first voltage divider node E1 can be equal twice as the power supply voltage rises, which will cause the processing unit to output a power-on reset signal when the power supply voltage has not reached the set reset threshold voltage.

[0039] In the power-on reset circuit provided in the embodiment of the present application, when the second temperature coefficient module does not output the temperature coefficient voltage, the second voltage dividing module divides the second voltage node D2 to reduce the output voltage of the second voltage node D2, thereby making the output voltage of the second voltage node D2 lower than the output voltage of the first voltage dividing node E1 in the initial stage, thereby avoiding the problem that the output voltage of the first voltage dividing node E1 and the output voltage of the second voltage node D2 are equal for many times as the power supply voltage rises, causing the processing unit to output a power-on reset signal when the power supply voltage does not reach the set voltage.

[0040] In some embodiments, Figure 3 A schematic diagram of the structure of a power-on reset circuit provided in an embodiment of the present application is shown. Figure 3 As shown, an embodiment of the present application provides a power-on reset circuit, and a first voltage dividing module includes a first resistance unit R1 and a second resistance unit R2.

[0041] One end of the first resistor unit R1 is connected to the first voltage node D1 of the first temperature coefficient module, and the other end is connected to one end of the second resistor unit R2. The other end of the second resistor unit R2 is grounded. A first voltage dividing node E1 is provided between the first resistor unit R1 and the second resistor unit R2.

[0042] The power-on reset circuit provided in the embodiment of the present application divides the output voltage of the first voltage node D1 of the first temperature coefficient module through the first voltage dividing node E1. During the rising process of the power supply voltage, the divided voltage of the first temperature coefficient voltage is adjusted by the size and proportional relationship of the first resistance unit R1 and the second resistance unit R2. When the divided voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage, a power-on reset signal is output, so that the power-on reset circuit of the embodiment of the present application can be suitable for the application scenario of low voltage detection.

[0043] In some embodiments, Figure 4 Another schematic diagram of the structure of the power-on reset circuit provided in the embodiment of the present application is shown in FIG. Figure 4 As shown, in the power-on reset circuit provided in the embodiment of the present application, the second voltage divider module includes a third resistor unit R3, one end of the third resistor unit R3 is connected to the second voltage node D2 of the second temperature coefficient module, and the other end is grounded.

[0044] The power-on reset circuit provided in the embodiment of the present application divides the voltage output by the second voltage node D2 through the third resistor unit R3, thereby reducing the initial voltage value of the second voltage node D2, and avoiding the output voltage of the second voltage node D2 and the output voltage of the first voltage-dividing node E1 being equal multiple times as the power supply voltage rises, which causes the processing unit to output a power-on reset signal when the power supply voltage does not reach the set voltage.

[0045] In some embodiments, by changing the resistance value or resistance ratio of the first resistance unit R1, the second resistance unit R2 and the third resistance unit R3, the rising slope of the first temperature coefficient voltage divider voltage and the second temperature coefficient voltage can be changed, so that the reset threshold voltage can be controlled by the first temperature coefficient voltage divider voltage and the second temperature coefficient voltage following the rising slope of the power supply voltage. The power-on reset circuit provided in the embodiment of the present application can set the reset threshold voltage below 1.1V. Specifically, the power-on reset circuit provided in the embodiment of the present application can set the reset threshold voltage to 80% to 90% of 1.1V, which is suitable for low voltage detection application scenarios.

[0046] In some embodiments, the power-on reset circuit provided by the embodiments of the present application is as follows: Figure 3 or Figure 4 As shown, the first temperature coefficient module includes a fourth resistor unit R4 and a first transistor unit Q1;

[0047] One end of the fourth resistor unit R4 is used to receive the power supply voltage, and the other end is connected to the first end of the first transistor unit Q1. The second end of the first transistor unit Q1 is grounded. A first voltage node D1 is provided between the fourth resistor unit R4 and the first transistor unit Q1.

[0048] The power-on reset circuit provided in the embodiment of the present application has a power-on reset process. When the first transistor Q1 is not turned on, the first voltage-dividing module connected to the first voltage node D1 has an output voltage of the first voltage-dividing node E1 that is a divided voltage of the power supply voltage. After the first transistor Q1 is turned on, the first voltage-dividing module connected to the first voltage node D1 has an output voltage of the first voltage-dividing node E1 that is a divided voltage of the on-state voltage of the first transistor Q1. Specifically, after the first transistor Q1 is turned on, the voltage outputted from the first voltage node D1 is the on-state voltage of the first transistor Q1, i.e., the first temperature coefficient voltage. The embodiment of the present application outputs the first temperature coefficient voltage through the temperature characteristics of the first transistor Q1.

[0049] In one example, the first transistor Q1 uses a PNP transistor, the emitter of the PNP transistor is connected to the fourth resistor unit R4, the collector of the PNP transistor is grounded, and the base of the PNP transistor is also grounded. In one example, the first transistor Q1 uses a PMOS tube, the source of the PMOS tube is connected to the fourth resistor unit R4, the drain of the PMOS tube is grounded, and the gate of the PMOS tube is grounded. In one example, the first transistor Q1 uses a diode, the positive electrode (anode) of the diode is connected to the fourth resistor unit R4, and the negative electrode (cathode) of the diode is grounded.

[0050] In some embodiments, the power-on reset circuit provided by the embodiments of the present application is as follows: Figure 3 or Figure 4 As shown, the second temperature coefficient module includes a fifth resistance unit R5, a sixth resistance unit R6 and a second transistor unit Q2;

[0051] One end of the fifth resistor unit R5 is used to receive the power supply voltage, and the other end is connected to one end of the sixth resistor unit R6; the other end of the sixth resistor unit R6 is connected to the first end of the second transistor unit Q2, the second end of the second transistor unit Q2 is grounded, and a second voltage node D2 is provided between the fifth resistor unit R5 and the sixth resistor unit R6.

[0052] In the power-on reset circuit provided in the embodiment of the present application, when the first transistor Q1 is not turned on, the first voltage-dividing module connected to the first voltage node D1 has an output voltage of the first voltage-dividing node E1 which is a divided voltage of the power supply voltage. After the first transistor Q1 is turned on, the first voltage-dividing module connected to the first voltage node D1 has an output voltage of the first voltage-dividing node E1 which is a divided voltage of the on-state voltage of the first transistor Q1. Specifically, after the first transistor Q1 is turned on, the voltage outputted from the first voltage node D1 is the on-state voltage of the first transistor Q1, i.e., the first temperature coefficient voltage. The embodiment of the present application outputs the first temperature coefficient voltage through the temperature characteristics of the first transistor Q1.

[0053] In the power-on reset circuit provided in the embodiment of the present application, during the power-on reset process, when the second transistor Q2 is not turned on, the output voltage of the second voltage node D2 is the divided voltage of the power supply voltage (the power supply voltage when there is no second voltage divider module). After the second transistor Q2 is turned on, the second temperature coefficient voltage output by the second voltage node D2 is the sum of the turn-on voltage of the second transistor Q2 and the voltage drop of the third resistance unit R3. The embodiment of the present application outputs the second temperature coefficient voltage through the temperature characteristics of the second transistor Q2.

[0054] In one example, the second transistor Q2 uses a PNP transistor, the emitter of the PNP transistor is connected to the sixth resistor unit R6, the collector of the PNP transistor is grounded, and the base of the PNP transistor is also grounded. In one example, the second transistor Q2 uses a PMOS tube, the source of the PMOS tube is connected to the sixth resistor unit R6, the drain of the PMOS tube is grounded, and the gate of the PMOS tube is grounded. In one example, the second transistor Q2 uses a diode, the positive electrode (anode) of the diode is connected to the sixth resistor unit R6, and the negative electrode (cathode) of the diode is grounded.

[0055] In some embodiments, the first transistor Q1 and the second transistor Q2 are transistors with exactly the same internal structure, and the quantity ratio of the first transistor Q1 and the second transistor Q2 in the power-on reset circuit is 1:M (M>1), which is used to enable the second temperature coefficient module to be turned on before the first temperature coefficient module, and to enable the second temperature coefficient module to generate a current with a positive temperature coefficient; optionally, the quantity ratio of the first transistor Q1 and the second transistor Q2 mentioned above can also be equivalent to the area ratio of the first transistor Q1 and the second transistor Q2.

[0056] The power-on reset circuit provided in the embodiment of the present application is based on the first temperature coefficient module and the second temperature coefficient module of the first transistor Q1 and the second transistor Q2. When the divided voltage of the first temperature coefficient voltage is equal to the second temperature coefficient voltage, the corresponding power supply voltage is the reset threshold voltage, and the reset threshold voltage is basically not affected by temperature and process.

[0057] In some embodiments, Figure 5 Another structural schematic diagram of the power-on reset circuit provided in the embodiment of the present application is shown. Figure 5 As shown, the power-on reset circuit provided in the embodiment of the present application, the processing module includes:

[0058] A comparison unit, wherein the first input terminal of the comparison unit is connected to the first voltage-dividing node E1, the second input terminal of the comparison unit is connected to the second voltage node D2, and the output terminal of the comparison unit outputs a power-on reset signal according to the comparison result of the received voltage signal; optionally, the comparison unit at least includes a comparator, the first input terminal of the comparator is a positive input terminal or an inverting input terminal, and the second input terminal is an input terminal opposite to the first input terminal. In the embodiment of the present application, through the virtual short and virtual break function of the comparator, specifically, the virtual short function of the comparator makes the voltage signals received at its input terminal equivalent, even if the output voltage of the first voltage-dividing node E1 and the output voltage of the second voltage node D2 are equivalent, at this time, the power-on reset circuit is not affected by temperature changes.

[0059] In some embodiments, Figure 6 Another structural schematic diagram of the power-on reset circuit provided in the embodiment of the present application is shown. Figure 6 As shown, the power-on reset circuit provided in the embodiment of the present application, the processing module also includes:

[0060] The first hysteresis module is connected between the comparison unit and the first voltage divider module, and is used to adjust the voltage value of the first voltage divider node of the first voltage divider module according to the power-on reset signal. Specifically, the first hysteresis module changes the resistance value of the second resistance unit R2 by short-circuiting part of the second resistance unit R2, thereby adjusting the voltage value of the first voltage divider node of the first voltage divider module, thereby eliminating the output hysteresis effect caused by possible power supply voltage fluctuations.

[0061] The second hysteresis module is connected between the comparison unit and the second voltage-dividing module, and is used to adjust the voltage value of the second voltage-dividing node of the second voltage-dividing module according to the power-on reset signal. Specifically, the second hysteresis module changes the resistance value of the third resistor unit R3 by short-circuiting part of the third resistor unit R3, thereby adjusting the voltage value of the second voltage-dividing node of the second voltage-dividing module, thereby eliminating the output hysteresis effect caused by the power supply voltage fluctuation that may occur.

[0062] In some embodiments, the first hysteresis module and the second hysteresis module may use two switch units, which are respectively connected to the second resistance unit R2 and the third resistance unit R3, and receive a power-on reset signal to conduct to short-circuit part of the second resistance unit R2 and part of the third resistance unit R3.

[0063] In some embodiments, the two switch units selected by the first hysteresis module and the second hysteresis module are transistor units, and the transistor units are turned on when receiving a power-on reset signal. Optionally, the transistor units may be MOS tubes or triodes.

[0064] In some embodiments, Figure 7 Another structural schematic diagram of the power-on reset circuit provided in the embodiment of the present application is shown. Figure 7 As shown, the power-on reset circuit provided in the embodiment of the present application, the processing module includes:

[0065] A comparison unit, wherein the first input terminal of the comparison unit is connected to the first voltage-dividing node E1, the second input terminal of the comparison unit is connected to the second voltage node D2, and the output terminal of the comparison unit outputs a power-on reset signal according to the comparison result of the received voltage signal; optionally, the comparison unit at least includes a comparator, the first input terminal of the comparator is a positive input terminal or an inverting input terminal, and the second input terminal is an input terminal opposite to the first input terminal. In an embodiment of the present application, through the virtual short and virtual break functions of the comparator, specifically, the virtual short function of the comparator can make the voltage signals received at its input terminal equivalent, even if the output voltage of the first voltage-dividing node E1 and the output voltage of the second voltage node D2 are equivalent, at this time, the power-on reset circuit is not affected by temperature changes.

[0066] The delay unit is used to receive the comparison signal, delay the comparison signal for a first time and output the delay signal. Optionally, the delay unit includes a first capacitor to utilize the charge and discharge function of the capacitor to achieve the delayed output of the comparison signal. However, it should be clear that in the embodiments of the present application, the delay unit is not limited to the capacitor element. In fact, the delay unit can be any delay circuit, such as the delay circuit is also set as a chip with a delay function, or the delay unit can also be replaced by a more complex delay circuit.

[0067] A logic unit, wherein a first input end of the logic unit is connected to the delay unit, a second input end of the logic unit is used to receive an enable signal, and the logic unit is used to perform a logic operation on the enable signal and the delay signal to output a power-on reset signal.

[0068] Optionally, the logic unit can be any logic gate or logic gate combination according to design requirements, such as the logic circuit is a logic AND gate, which is used to perform a logic AND operation on the first enable signal POR_EN and the third reset signal, or the logic circuit is a logic NOT gate and a logic AND gate, which is used to perform a logic AND operation on the first enable signal POR_EN and the logic NOT result of the third reset signal, and so on; it should be clear that for the power-on reset signal of the embodiment of the present application, the logic unit selects a suitable logic gate or logic gate combination according to the circuit design requirements, and is not limited to the two logic circuits proposed in the above embodiments. The power-on reset circuit of the embodiment of the present application is provided with a logic unit so as to be able to control the power-on reset signal through an enable signal.

[0069] In some embodiments, Figure 8 Another structural schematic diagram of the power-on reset circuit provided in the embodiment of the present application is shown. Figure 8 As shown, the power-on reset circuit provided in the embodiment of the present application is based on Figure 7 The power-on reset circuit, the processing module also includes:

[0070] A trigger unit, the input end of the trigger unit is connected to the output end of the comparison unit, and the output end of the trigger unit is connected to the delay unit, which is used to shape the comparison signal and output it to the delay unit. Optionally, the trigger unit includes at least one trigger, which is used to shape the comparison signal and then output it, further improving the stability of the power-on reset signal.

[0071] As an implementation mode, the power-on reset circuit provided in the embodiment of the present application, the trigger unit includes at least one Schmitt trigger, the input end of the Schmitt trigger receives the first reset signal, and the integer output is not performed until the voltage is stable, thereby further improving the stability of the power-on reset signal.

[0072] In some embodiments, Fig. 9 Another structural schematic diagram of the power-on reset circuit provided in the embodiment of the present application is shown. Fig. 9 As shown, the power-on reset circuit provided in the embodiment of the present application is based on Figure 8 The power-on reset circuit, the processing module also includes:

[0073] The third hysteresis module is connected between the comparison unit and the first voltage divider module, and is used to adjust the voltage value of the first voltage divider node of the first voltage divider module according to the power-on reset signal. Specifically, the third hysteresis module adjusts the voltage value of the first voltage divider node of the first voltage divider module by short-circuiting part of the second resistance unit R2, thereby eliminating the output hysteresis effect caused by possible power supply voltage fluctuations.

[0074] The fourth hysteresis module is connected between the comparison unit and the second voltage-dividing module, and is used to adjust the voltage value of the second voltage-dividing node of the second voltage-dividing module according to the power-on reset signal. Specifically, the fourth hysteresis module adjusts the voltage value of the second voltage-dividing node of the second voltage-dividing module by short-circuiting the third resistor unit R3, thereby eliminating the output hysteresis effect caused by the power supply voltage fluctuation that may occur.

[0075] In some embodiments, the third hysteresis module and the fourth hysteresis module may use two switch units, which are respectively connected to the second resistance unit R2 and the third resistance unit R3, and receive a power-on reset signal to conduct to short-circuit part of the second resistance unit R2 and part of the third resistance unit R3.

[0076] In some embodiments, the two switch units selected by the third hysteresis module and the fourth hysteresis module are transistor units, and the transistor units are turned on when receiving a power-on reset signal. Optionally, the transistor units may be MOS tubes or triodes.

[0077] It should be clear that in the embodiments of the present application, any of the above-mentioned resistance units can be set as a single resistance element or a resistance string with resistance elements connected in series, or a resistance circuit with adjustable resistance, etc.

[0078] Fig.10 A timing diagram of a power-on reset circuit provided in an embodiment of the present application is shown below. Fig.10 The power-on process of the power-on reset circuit provided in the embodiment of the present application is described as follows: Fig.10 As shown, the power-on process of the power-on reset circuit provided in the embodiment of the present application can be divided into three stages.

[0079] In the first stage, the first transistor Q1 and the second transistor Q2 are both turned off, and the output voltage V3 of the first voltage-dividing node E1 and the output voltage of the second voltage node D2 both rise with the power supply voltage VDD, wherein the rising slope of the voltage V2 is R3 / (R5+R3), and the rising slope of the voltage V3 is R2 / (R1+R2+R4). When designing the circuit, the resistance value of each impedance unit is set or adjusted so that R3 / (R5+R3) is less than R2 / (R1+R2+R4), so as to ensure that in the first stage, the output voltage V3 of the first voltage-dividing node E1 is always higher than the output voltage V2 of the second voltage node D2.

[0080] The second stage: the second transistor Q2 is turned on before the first transistor Q1, and the second transistor Q2 is not turned on. In the power-on reset circuit of the embodiment of the present application, the ratio of the number of the second transistor Q2 to the first transistor Q1 is M:1. Based on the conduction characteristics of the transistor, the second transistor Q2 is turned on before the first transistor Q1. After the first transistor Q1 is turned on, the output voltage V2 of the second voltage node D2 is: I2*R3+Vbe2; compared with the first stage, the rising slope of the output voltage V2 of the second voltage node D2 decreases; and the first transistor Q1Q1 is not turned on, so the rising slope of the output voltage V3 of the first voltage dividing node E1 is still R2 / (R1+R2+R4), so the output voltage V3 of the first voltage dividing node E1 in the second stage is still higher than the output voltage V2 of the second voltage node D2.

[0081] The third stage: the first transistor Q1Q1 is turned on, the second transistor Q2Q2 is turned on, and the rising slope of the output voltage V2 of the second voltage node D2 is the same as that of the second stage. Specifically, at this time, the output voltage V2 of the second voltage-dividing node E2 is related to Vbe2 and R6, and the output voltage V3 of the first voltage-dividing node E1 is the divided voltage of the first temperature coefficient voltage output by the first voltage node D1. The first temperature coefficient voltage output by the first voltage-dividing node E1 is only related to the turn-on voltage Vbe1 applied to the first transistor Q1. Therefore, the rising slope of the output voltage V3 of the first voltage-dividing node E1 is reduced, and will also be smaller than the rising slope of the output voltage V2 of the first voltage node D1. Finally, before the power supply voltage ends to rise, the voltage V2 will not be equal to the voltage V3, and after the power supply voltage ends to rise, that is, when the power supply voltage is stable, the voltage V2 will be greater than the voltage V3.

[0082] It should be clear that if Fig.10 As shown, when the voltage VDD, the voltage V2 and the voltage V3 are stable, it indicates the stage after the power-on reset, and when they decrease, it indicates the power-off reset process.

[0083] The power-on reset circuit provided in the embodiment of the present application outputs a power-on reset signal when the divided voltage of the first temperature coefficient voltage is equal to the first temperature coefficient voltage during the rising process of the power supply voltage, so that the power-on reset circuit can be suitable for the application scenario of low voltage detection. The power-on reset circuit of the embodiment of the present application, the reset threshold voltage is related to the divided voltage of the first temperature coefficient voltage, and a low reset threshold voltage can be obtained by setting the divided voltage of the first temperature coefficient voltage. By adjusting the resistance value or resistance value ratio of each resistance unit, the reset threshold voltage can be set below 1.1V, and specifically the reset threshold voltage can be set at 80% to 90% of 1.1V, which is suitable for the application scenario of low voltage detection. In addition, the reset threshold voltage of the power-on reset circuit provided in the embodiment of the present application will not be affected by temperature changes.

[0084] The present application also provides a chip, which includes the power-on reset circuit of the above embodiment. An integrated circuit (IC) is also called a chip, which can be, but is not limited to, a SOC (System on Chip) chip or a SIP (system in package) chip.

[0085] An embodiment of the present application also provides an electronic device, which includes a device body and a chip as described above disposed in the device body.

[0086] The above are only preferred embodiments of the present application and are not intended to limit the present application in any form. Although the present application has been disclosed as a preferred embodiment as above, it is not intended to limit the present application. Any technical personnel in this field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A power-on reset circuit, characterized in that: include: A first temperature coefficient module, used to generate a first temperature coefficient voltage, wherein one end of the first temperature coefficient module is used to receive a power supply voltage and the other end is grounded, and the first temperature coefficient module includes a first voltage node; A second temperature coefficient module, used for generating a second temperature coefficient voltage, wherein one end of the second temperature coefficient module is used for receiving the power supply voltage and the other end is grounded, and the second temperature coefficient module includes a second voltage node; A first voltage dividing module, wherein one end of the first voltage dividing module is connected to the first voltage node of the first temperature coefficient module, and the other end is grounded, and the first voltage dividing module includes a first voltage dividing node; as well as A processing module, wherein a first input terminal of the processing module is connected to the first voltage-dividing node, a second input terminal of the processing module is connected to the second voltage node, and the processing module is used to output a power-on reset signal.

2. The power-on reset circuit according to claim 1, characterized in that: Also includes: A second voltage divider module, one end of the second voltage divider module is connected to the second voltage node of the second temperature coefficient module, and the other end is grounded.

3. The power-on reset circuit according to claim 1, characterized in that: The first voltage dividing module includes a first resistance unit and a second resistance unit; One end of the first resistance unit is connected to the first voltage node of the first temperature coefficient module, and the other end is connected to one end of the second resistance unit. The other end of the second resistance unit is grounded, and the first voltage dividing node is provided between the first resistance unit and the second resistance unit.

4. The power-on reset circuit according to claim 2, characterized in that: The second voltage dividing module comprises: A third resistance unit, one end of the third resistance unit is connected to the second voltage node of the second temperature coefficient module, and the other end of the third resistance unit is grounded.

5. The power-on reset circuit according to claim 1, characterized in that: The first temperature coefficient module includes a fourth resistance unit and a first transistor unit; One end of the fourth resistor unit is used to receive a power supply voltage, and the other end is connected to the first end of the first transistor unit. The second end of the first transistor unit is grounded, and the first voltage node is provided between the fourth resistor unit and the first transistor unit.

6. The power-on reset circuit according to claim 1, characterized in that: The second temperature coefficient module includes a fifth resistance unit, a sixth resistance unit and a second transistor unit; One end of the fifth resistor unit is used to receive the power supply voltage, and the other end is connected to one end of the sixth resistor unit; the other end of the sixth resistor unit is connected to the first end of the second transistor unit, the second end of the second transistor unit is grounded, and the second voltage node is provided between the fifth resistor unit and the sixth resistor unit.

7. The power-on reset circuit according to claim 1, characterized in that: The processing module comprises: A comparison unit, wherein a first input terminal of the comparison unit is connected to the first voltage-dividing node, a second input terminal of the comparison unit is connected to the second voltage node, and an output terminal of the comparison unit is used to output the power-on reset signal.

8. The power-on reset circuit according to claim 7, characterized in that: The power-on reset circuit also includes: a first hysteresis module, the first hysteresis module being connected between the comparison unit and the first voltage dividing module and being used for adjusting a voltage value of a first voltage dividing node of the first voltage dividing module according to the power-on reset signal; A second hysteresis module, wherein the second hysteresis module is connected between the comparison unit and the second voltage dividing module, and is used for adjusting a voltage value of a second voltage dividing node of the second voltage dividing module according to the power-on reset signal.

9. The power-on reset circuit according to claim 1, characterized in that: The processing module comprises: a comparison unit, wherein a first input terminal of the comparison unit is connected to the first voltage-dividing node, a second input terminal of the comparison unit is connected to the second voltage node, and an output terminal of the comparison unit is used to output a comparison signal; A delay unit, the delay unit is used to receive the comparison signal, delay the comparison signal for a first time and output a delay signal; A logic unit, wherein a first input end of the logic unit is connected to the delay unit, a second input end of the logic unit is used to receive an enable signal, and the logic unit is used to perform a logic operation on the enable signal and the delay signal to output the power-on reset signal.

10. The power-on reset circuit according to claim 9, characterized in that: The processing module also includes: A trigger unit, wherein the input end of the trigger unit is connected to the output end of the comparison unit, and the output end of the trigger unit is connected to the delay unit, and is used to shape and output the comparison signal to the delay unit.

11. The power-on reset circuit according to claim 9 or 10, characterized in that: The power-on reset circuit also includes: A third hysteresis module is connected between the delay unit and the first voltage dividing module, and is used to adjust the voltage value of the first voltage dividing node of the first voltage dividing module according to the delay signal. A fourth hysteresis module, the fourth hysteresis module is connected between the delay unit and the second voltage dividing module, and is used to adjust the voltage value of the second voltage dividing node of the second voltage dividing module according to the delay signal.

12. A chip, characterized in that: The invention comprises a power-on reset circuit as described in any one of claims 1 to 11.

13. An electronic device, characterized in that: The invention comprises a device body and the chip as claimed in claim 12 arranged in the device body.

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