Light emitting diode for improving metal peeling and preparation method thereof

Abstract

The invention provides a light-emitting diode for improving metal peeling and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light-emitting diode comprises an epitaxial layer, a passivation layer, a first reflecting layer and a second reflecting layer, the passivation layer is located on the surface of the epitaxial layer, and the passivation layer is provided with a first through hole penetrating through the passivation layer; the first reflecting layer is located on the surface, away from the epitaxial layer, of the passivation layer, and the first reflecting layer is electrically connected with the epitaxial layer through the first through hole; the second reflecting layer is located in the passivation layer and located between the surface, away from the epitaxial layer, of the passivation layer and the surface, close to the epitaxial layer, of the passivation layer; the surface, away from the epitaxial layer, of the first reflecting layer is provided with a concave hole exposing the passivation layer; and the orthographic projection of the second reflecting layer on the surface of the epitaxial layer is overlapped with the orthographic projection of the concave hole on the surface of the epitaxial layer. According to the embodiment of the invention, the adhesion of the silver mirror reflecting layer can be improved, the silver mirror reflecting layer is prevented from stripping from the passivation layer, and the reliability of the light-emitting diode is improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of optoelectronic manufacturing, and in particular to a light emitting diode with improved metal peeling and a preparation method thereof. Background Art

[0002] Light Emitting Diode (LED) is a common product. LED is usually manufactured by manufacturing various film layers on a substrate, performing graphic processing, and then cutting to form individual LED core particles.

[0003] In the related art, a light-emitting diode generally includes an epitaxial layer, a transparent conductive layer, a passivation layer, a silver mirror reflective layer and a protective layer. The epitaxial layer, the transparent conductive layer and the passivation layer are stacked in sequence, and the silver mirror reflective layer is located on the surface of the passivation layer away from the epitaxial layer. Since the metal Ag in the silver mirror reflective layer is easy to migrate, a protective layer is formed on the surface of the passivation layer to cover the silver mirror reflective layer to prevent the metal Ag from migrating.

[0004] Since the adhesion between metal Ag and the passivation layer is poor, the silver mirror emission layer is easy to loosen from the passivation layer; although the silver mirror reflection layer is also covered with a protective layer, and the adhesion between the protective layer and the passivation layer is good, since most of the surface of the protective layer is connected to the silver mirror emission layer, and only a small amount of the surface at the edge is connected to the passivation layer, it is difficult for the protective layer to stabilize the silver mirror reflection layer on the passivation layer, which will cause the silver mirror reflection layer to peel off from the passivation layer, affecting the reliability of the light-emitting diode. Summary of the invention

[0005] The embodiments of the present disclosure provide a light-emitting diode with improved metal peeling and a method for preparing the same, which can improve the adhesion of the silver mirror reflection layer, prevent the silver mirror reflection layer from peeling off from the passivation layer, and improve the reliability of the light-emitting diode. The technical solution is as follows:

[0006] On the one hand, an embodiment of the present disclosure provides a light-emitting diode, which includes: an epitaxial layer, a passivation layer, a first reflective layer, and a second reflective layer; the passivation layer is located on the surface of the epitaxial layer, and the passivation layer has a first through hole penetrating the passivation layer; the first reflective layer is located on the surface of the passivation layer away from the epitaxial layer, and the first reflective layer is electrically connected to the epitaxial layer through the first through hole; the second reflective layer is located in the passivation layer, and is located between the surface of the passivation layer away from the epitaxial layer and the surface close to the epitaxial layer; the surface of the first reflective layer away from the epitaxial layer has a concave hole exposing the passivation layer; the orthographic projection of the second reflective layer on the surface of the epitaxial layer overlaps with the orthographic projection of the concave hole on the surface of the epitaxial layer.

[0007] Optionally, an orthographic projection of the recessed hole on the surface of the epitaxial layer is located within an orthographic projection of the second reflective layer on the surface of the epitaxial layer.

[0008] Optionally, the surface of the first reflective layer has a plurality of the concave holes arranged at intervals; the second reflective layer wraps a plurality of metal blocks arranged at intervals, the metal blocks correspond one-to-one to the concave holes, and the orthographic projections of the concave holes on the surface of the epitaxial layer are located within the orthographic projections of the corresponding metal blocks on the surface of the epitaxial layer.

[0009] Optionally, the first reflective layer and the second reflective layer both include an Ag layer; or, the first reflective layer and the second reflective layer both include an adhesion metal layer and an Ag layer, and the adhesion metal layer is located on at least one surface of the Ag layer.

[0010] Optionally, the adhesion metal layer includes a Ti layer.

[0011] Optionally, the light emitting diode further includes a transparent conductive layer, wherein the transparent conductive layer is located between the epitaxial layer and the passivation layer, the first through hole exposes the transparent conductive layer, and the first reflective layer is connected to the transparent conductive layer through the first through hole.

[0012] Optionally, the light emitting diode further includes a protective layer, and the protective layer is at least located on a surface of the first reflective layer away from the epitaxial layer and in the concave hole.

[0013] Optionally, an area of ​​an orthographic projection of a portion of the protective layer located in the recessed hole on the surface of the epitaxial layer is larger than an area of ​​an orthographic projection of a portion of the protective layer located on the surface of the first reflective layer on the surface of the epitaxial layer.

[0014] The embodiment of the present disclosure provides a method for preparing a light-emitting diode, the method comprising: preparing an epitaxial layer; forming a passivation layer and a second reflective layer on the surface of the epitaxial layer, the passivation layer having a first through hole penetrating the passivation layer, the second reflective layer being located in the passivation layer and between a surface of the passivation layer away from the epitaxial layer and a surface close to the epitaxial layer; forming a first reflective layer on the surface of the epitaxial layer, the first reflective layer being electrically connected to the epitaxial layer through the first through hole, the surface of the first reflective layer away from the epitaxial layer having a concave hole exposing the passivation layer, the orthographic projection of the second reflective layer on the surface of the epitaxial layer intersecting with the orthographic projection of the concave hole on the surface of the epitaxial layer.

[0015] Optionally, forming a passivation layer and a second reflective layer on the surface of the epitaxial layer includes: forming a first silicon oxide layer on the surface of the epitaxial layer; forming a plurality of spaced metal blocks on the surface of the first silicon oxide layer to obtain a second reflective layer, wherein the metal blocks correspond to the concave holes one-to-one, and the orthographic projection of the concave holes on the surface of the epitaxial layer is located within the orthographic projection of the corresponding metal block on the surface of the epitaxial layer; forming a second silicon oxide layer on the surface of the first silicon oxide layer to cover the second reflective layer, and forming a first through hole on the surface of the second silicon oxide layer that penetrates to the first silicon oxide layer, wherein the first through hole is spaced from the metal blocks.

[0016] The beneficial effects brought by the technical solution provided by the embodiments of the present disclosure include at least:

[0017] The light-emitting diode provided by the embodiment of the present disclosure forms a concave hole in the first reflective layer on the surface of the passivation layer, so that the concave hole exposes the passivation layer, so that the protective layer located on the surface of the first reflective layer can be connected to the passivation layer through the concave hole, thereby increasing the contact area between the protective layer and the passivation layer.

[0018] Compared with the related art, the contact area between the first reflective layer and the passivation layer is reduced, and the contact area between the protective layer and the passivation layer is increased. Since the adhesion between the passivation layer and the protective layer is better than the adhesion between the passivation layer and the first reflective layer, the protective layer is more firmly fixed on the passivation layer, so that the first reflective layer can be wrapped with the protective layer to prevent the first reflective layer from peeling off from the passivation layer, thereby improving the reliability of the light-emitting diode.

[0019] At the same time, a second reflective layer is also provided, so that the orthographic projection of the second reflective layer on the surface of the epitaxial layer overlaps with the orthographic projection of the concave hole on the surface of the epitaxial layer. That is, the second reflective layer is directly opposite to at least part of the concave hole, so that the second reflective layer can be used to compensate for the reflection area lost by the first reflective layer after the concave hole is opened. By complementing the first reflective layer and the second reflective layer, the purpose of the reflective layer covering the epitaxial layer to the greatest extent can be achieved, so as to enhance the overall reflective effect of the reflective layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0021] Figure 1 It is a structural schematic diagram of a light emitting diode provided by the related technology;

[0022] Figure 2is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;

[0023] Figure 3 is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;

[0024] Figure 4 is a flow chart of manufacturing a light emitting diode provided by an embodiment of the present disclosure;

[0025] Figure 5 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0026] Figure 6 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0027] Figure 7 This is a diagram of the preparation state of a light emitting diode provided in an embodiment of the present disclosure.

[0028] The descriptions of the marks in the figure are as follows:

[0029] 10. Substrate;

[0030] 20. epitaxial layer; 21. first semiconductor layer; 22. multi-quantum well layer; 23. second semiconductor layer;

[0031] 30. passivation layer; 31. first through hole;

[0032] 40, silver mirror reflection layer; 41, first reflection layer; 410, concave hole;

[0033] 42. second reflective layer; 420. metal block;

[0034] 43. Protective layer;

[0035] 50. transparent conductive layer; 51. first insulating layer; 52. second insulating layer;

[0036] 60. Electrode;

[0037] 70. Soldering pad. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0039] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", "top", "bottom" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0040] Figure 1 It is a schematic diagram of the structure of a light emitting diode provided by the related technology. Figure 1 As shown, in the related art, the light emitting diode includes an epitaxial layer 20, a transparent conductive layer 50, a passivation layer 30, a silver mirror reflection layer 40 and a protective layer 43. The epitaxial layer 20, the transparent conductive layer 50 and the passivation layer 30 are stacked in sequence, and the silver mirror reflection layer 40 is located on the surface of the passivation layer 30 away from the epitaxial layer 20. The passivation layer 30 covers the silver mirror reflection layer 40 to prevent the migration of metal Ag.

[0041] like Figure 1 As shown, most of the surface of the protection layer 43 is connected to the silver mirror emission layer. Since the adhesion between the metal Ag and the passivation layer 30 is poor, the silver mirror emission layer is easily loosened from the passivation layer 30.

[0042] The protective layer 43 includes a Ni layer and a TiW layer, and the metal Ni and TiW have good adhesion to the passivation layer 30. However, only a small amount of the peripheral edge of the protective layer 43 is connected to the passivation layer 30, so it is difficult for the protective layer 43 to stabilize the silver mirror reflection layer 40 on the passivation layer 30, which will cause the silver mirror reflection layer 40 to peel off from the passivation layer 30, affecting the reliability of the light-emitting diode.

[0043] To this end, an embodiment of the present disclosure provides a light emitting diode. Figure 2 Schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 2As shown, the light emitting diode comprises: an epitaxial layer 20 , a passivation layer 30 , a first reflective layer 41 and a protective layer 43 . The passivation layer 30 is located on the surface of the epitaxial layer 20 , and the passivation layer 30 has a first through hole 31 penetrating the passivation layer 30 .

[0044] like Figure 2 As shown, the first reflective layer 41 is located on the surface of the passivation layer 30 away from the epitaxial layer 20, the first reflective layer 41 is electrically connected to the epitaxial layer 20 through the first through hole 31, the surface of the first reflective layer 41 away from the epitaxial layer 20 has a concave hole 410 exposing the passivation layer 30, and the protective layer 43 is at least located on the surface of the first reflective layer 41 away from the epitaxial layer 20 and in the concave hole 410.

[0045] The light-emitting diode provided by the embodiment of the present disclosure forms a concave hole 410 in the first reflective layer 41 on the surface of the passivation layer 30, so that the concave hole 410 exposes the passivation layer 30, so that the protective layer 43 located on the surface of the first reflective layer 41 can be connected to the passivation layer 30 through the concave hole 410, thereby increasing the contact area between the protective layer 43 and the passivation layer 30.

[0046] Compared with the related art, the contact area between the first reflective layer 41 and the passivation layer 30 is reduced, and the contact area between the protective layer 43 and the passivation layer 30 is increased. Since the adhesion between the passivation layer 30 and the protective layer 43 is better than the adhesion between the passivation layer 30 and the first reflective layer 41, the protective layer 43 is more firmly fixed on the passivation layer 30, so that the first reflective layer 41 can be wrapped by the protective layer 43 to prevent the first reflective layer 41 from peeling off from the passivation layer 30, thereby improving the reliability of the light-emitting diode.

[0047] Optionally, an orthographic projection area of ​​a portion of the first reflective layer 41 outside the first through hole 31 on the surface of the epitaxial layer 20 is smaller than an orthographic projection area of ​​a portion of the first reflective layer 41 inside the first through hole 31 on the surface of the epitaxial layer 20 .

[0048] Optionally, the orthographic projection area of ​​the portion of the protection layer 43 located in the recess 410 on the surface of the epitaxial layer 20 is larger than the orthographic projection area of ​​the portion of the protection layer 43 located on the surface of the first reflective layer 41 on the surface of the epitaxial layer 20 .

[0049] In this way, most of the protective layer 43 falls into the concave hole 410, so that most of the protective layer 43 can be connected to the passivation layer 30 with better adhesion, thereby improving the connection reliability of the protective layer 43. At the same time, allowing less protective layer 43 to adhere to the surface of the first reflective layer 41 can also wrap the first reflective layer 41, firmly press the first reflective layer 41 on the passivation layer 30, and prevent the first reflective layer 41 from peeling off from the passivation layer 30.

[0050] Exemplarily, the ratio of the area of ​​the orthographic projection of the portion of the protective layer 43 located in the concave hole 410 on the surface of the epitaxial layer 20 to the area of ​​the orthographic projection of the portion of the protective layer 43 located on the surface of the first reflective layer 41 on the surface of the epitaxial layer 20 may be 1.5 to 4. This ensures that the area of ​​the protective layer 43 in the concave hole 410 is large enough, thereby enhancing the connection reliability of the protective layer 43 and the passivation layer 30.

[0051] Alternatively, if Figure 2 As shown, the light emitting diode further includes a second reflective layer 42 . The second reflective layer 42 is located in the passivation layer 30 , and the second reflective layer 42 is located between a surface of the passivation layer 30 away from the epitaxial layer 20 and a surface close to the epitaxial layer 20 .

[0052] The orthographic projection of the second reflective layer 42 on the surface of the epitaxial layer 20 overlaps with the orthographic projection of the recessed hole 410 on the surface of the epitaxial layer 20 .

[0053] In the embodiment of the present disclosure, the second reflective layer 42 is provided, and the orthographic projection of the second reflective layer 42 on the surface of the epitaxial layer 20 overlaps with the orthographic projection of the concave hole 410 on the surface of the epitaxial layer 20. That is, the second reflective layer 42 is directly opposite to at least part of the concave hole 410, so that the second reflective layer 42 can be used to compensate for the reflection area lost by the first reflective layer 41 after the concave hole 410 is provided. By complementing the first reflective layer 41 and the second reflective layer 42, the purpose of the reflective layer covering the epitaxial layer 20 to the greatest extent can be achieved, so as to enhance the overall reflective effect of the reflective layer.

[0054] Optionally, an orthographic projection of the recessed hole 410 on the surface of the epitaxial layer 20 is located within an orthographic projection of the second reflective layer 42 on the surface of the epitaxial layer 20 .

[0055] For example, Figure 2 As shown, the surface of the first reflective layer 41 has a plurality of recessed holes 410 arranged at intervals.

[0056] For example, Figure 2 As shown, the second reflective layer 42 located in the passivation layer 30 also wraps a plurality of metal blocks 420 arranged at intervals, and the metal blocks 420 correspond to the recessed holes 410 one by one.

[0057] The orthographic projection of the concave hole 410 on the surface of the epitaxial layer 20 is located within the orthographic projection of the corresponding metal block 420 on the surface of the epitaxial layer 20. That is, the area of ​​the concave hole 410 is smaller than the area of ​​the metal block 420. In this way, it can be ensured that the orthographic projections of the first reflective layer 41 and the second reflective layer 42 on the surface of the epitaxial layer 20 can cover most of the surface of the epitaxial layer 20, thereby improving the overall reflective effect of the reflective layer.

[0058] Optionally, both the first reflective layer 41 and the second reflective layer 42 include Ag layers.

[0059] Since Ag has a good reflective effect, providing an Ag layer in the reflective layer can enhance the reflection of light by the reflective layer and improve the light output brightness of the light emitting diode.

[0060] Exemplarily, the thickness of the Ag layer is 2000 angstroms to 3000 angstroms. For example, the thickness of the Ag layer is 2500 angstroms.

[0061] It should be noted that the thicknesses of the first reflective layer 41 and the second reflective layer 42 may be the same or different, which is not limited in the embodiment of the present disclosure.

[0062] Optionally, the first reflective layer 41 and the second reflective layer 42 both include an adhesion metal layer and an Ag layer, and the adhesion metal layer is located on at least one surface of the Ag layer.

[0063] Exemplarily, the first reflective layer 41 and the second reflective layer 42 include two adhesion metal layers, and the two adhesion metal layers are respectively located on two opposite surfaces of the Ag layer.

[0064] Among them, the first reflective layer 41 and the second reflective layer 42 both include two adhesion metal layers, and the two adhesion metal layers are respectively located on opposite sides of the Ag layer. The adhesion metal layers have good adhesion to the passivation layer 30, so that the first reflective layer 41 and the second reflective layer 42 can be stably connected to the passivation layer 30.

[0065] Exemplarily, the adhesion metal layer includes a Ti layer. Metal Ti has good adhesion and can firmly connect the first reflection layer 41 and the second reflection layer 42 with the passivation layer 30 .

[0066] Exemplarily, the thickness of the Ag layer is 800 angstroms to 2000 angstroms. For example, the thickness of the Ag layer is 1000 angstroms.

[0067] Exemplarily, the thickness of the adhesion metal layer is 100 angstroms to 500 angstroms. Providing a thinner adhesion metal layer can save costs.

[0068] Optionally, a ratio of the thickness of the second reflective layer 42 to the thickness of the passivation layer 30 is less than or equal to 0.8.

[0069] By setting the ratio of the thickness of the second reflective layer 42 to the thickness of the passivation layer 30 within the above range, it is possible to avoid the second reflective layer 42 being too thick, which would cause the passivation layer 30 on both sides of the second reflective layer 42 to be too thin, thereby preventing the passivation layer 30 from being easily worn away and exposing the second reflective layer 42, thereby causing the problem of short circuit of the light-emitting diode.

[0070] Exemplarily, the ratio of the thickness of the second reflective layer 42 to the thickness of the passivation layer 30 is 0.5.

[0071] Optionally, the light emitting diode further includes a transparent conductive layer 50 , which is located between the epitaxial layer 20 and the passivation layer 30 , the first through hole 31 exposes the transparent conductive layer 50 , and the first reflective layer 41 is connected to the transparent conductive layer 50 through the first through hole 31 .

[0072] For example, the transparent conductive layer 50 may be an indium tin oxide (ITO) layer, which has good transmittance and low resistivity.

[0073] For example, the transparent conductive layer 50 may be an indium zinc oxide (IZO) layer, which has good transmittance and low resistivity.

[0074] Since the ITO layer or IZO layer has good adhesion to metal Ag, the ITO layer or IZO layer is used as the transparent conductive layer 50 so that the first reflective layer 41 contacts the ITO layer, which can improve the adhesion between the first reflective layer 41 and other film layers and effectively avoid the problem of the first reflective layer 41 peeling off.

[0075] At the same time, using an ITO layer or an IZO layer as the transparent conductive layer 50 can allow more light to be transmitted from the transparent conductive layer 50, thereby ensuring the light output effect; at the same time, due to the low resistivity, the first reflective layer 41 is stacked on the transparent conductive layer 50, so that the carriers can be more efficiently conducted from the first reflective layer 41 to the epitaxial layer 20, thereby improving the injection efficiency.

[0076] Exemplarily, the thickness of the transparent conductive layer 50 may be 600 angstroms to 2000 angstroms. For example, the thickness of the transparent conductive layer 50 is 1500 angstroms.

[0077] Optionally, the passivation layer 30 may be at least one of a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0078] Exemplarily, the passivation layer 30 may be a silicon oxide layer.

[0079] Alternatively, if Figure 2 As shown, the epitaxial layer 20 includes a first semiconductor layer 21, a multi-quantum well layer 22 and a second semiconductor layer 23 stacked in sequence, and the second semiconductor layer 23 has a groove exposing the first semiconductor layer 21. The passivation layer 30 is also located in the groove, and the passivation layer 30 located in the groove has a via hole exposing the first semiconductor layer 21.

[0080] Optionally, one of the first semiconductor layer 21 and the second semiconductor layer 23 is an n-type layer, and the other of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer.

[0081] Exemplarily, the first semiconductor layer 21 is an n-type layer, and the second semiconductor layer 23 is a p-type layer.

[0082] Optionally, the n-type layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer may be 0.5 μm to 3 μm.

[0083] Optionally, the multi-quantum well layer 22 includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. The multi-quantum well layer 22 may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0084] As an example, in the embodiment of the present disclosure, the multi-quantum well layer 22 includes five periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0085] Optionally, the thickness of the multi-quantum well layer 22 may be 150 nm to 200 nm.

[0086] Optionally, the p-type layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer may be 0.5 μm to 3 μm.

[0087] In one implementation of the present disclosure, Figure 2 As shown, the second reflective layer 42 is located on the second semiconductor layer 23, and the second reflective layer 42 is located outside the groove.

[0088] In the above implementation, the second reflective layer 42 is only disposed above the second semiconductor layer 23 and does not extend into the groove. Since the light emitting area of ​​the epitaxial layer 20 is located in the multi-quantum well layer 22, the area with the largest amount of light emitted from the epitaxial layer 20 is concentrated in the area where the second semiconductor layer 23 on the multi-quantum well layer 22 is located. Therefore, only disposing the second reflective layer 42 above the second semiconductor layer 23 can achieve the purpose of reflecting most of the light, and reduce the preparation area of ​​the second reflective layer 42, thereby reducing the difficulty of preparation.

[0089] Figure 3 Schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 3 As shown, the light emitting diode further includes an electrode 60 and a first insulating layer 51, which is located on the passivation layer 30 and the protective layer 43, extends into the groove, and covers the first semiconductor layer 21. The first insulating layer 51 is also provided with a via hole exposing the first semiconductor layer 21 and the protective layer 43.

[0090] like Figure 3 As shown, a portion of the electrode 60 is at least located in the groove and connected to the first semiconductor layer 21 through the via hole, and another portion of the electrode 60 is located outside the groove and connected to the protective layer 43 through the via hole.

[0091] Exemplarily, the electrode 60 may include at least one of a Cr layer, an Al layer, a Pt layer, and a Ti layer. The reflectivity of these metals is between 60% and 90%.

[0092] Exemplarily, the protective layer 43 may be made of metals such as Ti and TiW, and the reflectivity of these metals is less than 60%.

[0093] By using an electrode 60 with a reflectivity greater than that of the protective layer 43 , the electrode 60 reflects light in the area not covered by the second reflective layer 42 and the first reflective layer 41 , thereby achieving maximum light reflection and improving the light reflection effect of the light emitting diode.

[0094] Optionally, the first insulating layer 51 may be at least one of a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0095] Exemplarily, the first insulating layer 51 may be a silicon oxide layer.

[0096] Alternatively, if Figure 3 As shown, the light-emitting diode may further include a second insulating layer 52 and a pad 70, wherein the second insulating layer 52 is located on the surface of the first insulating layer 51 and the surface of the electrode 60, the second insulating layer 52 has a via hole exposing the electrode 60, and the pad 70 is located on the second insulating layer 52 and connected to the electrode 60 through the via hole.

[0097] Alternatively, the second insulating layer 52 may be at least one of a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0098] Exemplarily, the second insulating layer 52 may be a silicon oxide layer.

[0099] Optionally, the pad 70 includes a first Al layer, a first Ti layer, a second Al layer, a second Ti layer, and an Au layer stacked in sequence.

[0100] The thickness of the first Al layer is 8000 angstroms to 12000 angstroms, the thickness of the first Ti layer is 100 angstroms to 500 angstroms, the thickness of the second Al layer is 8000 angstroms to 12000 angstroms, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms, and the thickness of the Au layer is 2000 angstroms to 5000 angstroms.

[0101] For example, the thickness of the first Al layer is 10000 angstroms, the thickness of the first Ti layer is 200 angstroms, the thickness of the second Al layer is 10000 angstroms, the thickness of the second Ti layer is 1000 angstroms, and the thickness of the Au layer is 3000 angstroms.

[0102] Alternatively, if Figure 2 , 3 As shown, the light emitting diode further includes a substrate 10 , and an epitaxial layer 20 is stacked on the substrate 10 .

[0103] For example, the substrate may be a sapphire substrate. The sapphire substrate has a relatively high light transmittance, that is, the substrate is a transparent substrate. In addition, the sapphire material is relatively hard and has relatively stable chemical properties, so that the LED has good luminous effect and stability.

[0104] Figure 4 FIG. 1 is a flow chart of manufacturing a light emitting diode according to an embodiment of the present disclosure. Figure 4 As shown, the preparation method comprises:

[0105] Step S11: preparing an epitaxial layer.

[0106] The process of preparing the epitaxial layer can include the following steps:

[0107] The first step, such as Figure 5 As shown, the epitaxial layer 20 grown on the sapphire substrate includes a first semiconductor layer 21, a multi-quantum well layer 22 and a second semiconductor layer 23 stacked in sequence.

[0108] The sapphire substrate may be pre-treated, placed in a MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber, and baked for 12 to 18 minutes. As an example, in the embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.

[0109] Specifically, the baking temperature may be 1000° C. to 1200° C., and the pressure in the MOCVD reaction chamber during baking may be 100 mbar to 200 mbar.

[0110] For example, the first semiconductor layer 21 may be an n-type layer, and the second semiconductor layer 23 may be a p-type layer.

[0111] Optionally, the n-type layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer may be 0.5 μm to 3 μm.

[0112] The growth temperature of the n-type GaN layer may be 1000° C. to 1100° C., and the growth pressure of the n-type GaN layer may be 100 torr to 300 torr.

[0113] Optionally, the multi-quantum well layer 22 includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. The multi-quantum well layer 22 may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0114] When growing the multi-quantum well layer 22, the pressure of the MOCVD reaction chamber is controlled at 200 torr. When growing the InGaN quantum well layer, the temperature of the reaction chamber is 760° C. to 780° C. When growing the GaN quantum barrier layer, the temperature of the reaction chamber is 860° C. to 890° C.

[0115] As an example, in the embodiment of the present disclosure, the multi-quantum well layer 22 includes five periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0116] Optionally, the thickness of the multi-quantum well layer 22 may be 150 nm to 200 nm.

[0117] Optionally, the p-type layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer may be 0.5 μm to 3 μm.

[0118] When growing the p-type GaN layer, the growth pressure of the p-type GaN layer may be 200 Torr to 600 Torr, and the growth temperature of the p-type GaN layer may be 800° C. to 1000° C.

[0119] In the second step, the epitaxial layer 20 is etched to form a groove on the surface of the second semiconductor layer 23 to expose the first semiconductor layer 21 .

[0120] In the third step, a transparent conductive layer 50 is formed on the surface of the epitaxial layer 20 .

[0121] like Figure 5 As shown, it may specifically include: forming a transparent conductive layer 50 on the surface of the second semiconductor layer 23 .

[0122] The transparent conductive layer 50 is located outside the groove.

[0123] Exemplarily, the transparent conductive layer 50 is an indium tin oxide layer or an indium zinc oxide layer.

[0124] Exemplarily, the thickness of the transparent conductive layer 50 is 100 angstroms to 300 angstroms. For example, the thickness of the transparent conductive layer 50 is 200 angstroms.

[0125] Step S12 : forming a passivation layer 30 on the surface of the epitaxial layer 20 .

[0126] like Figure 6 As shown, the passivation layer 30 has a first through hole 31 penetrating through the passivation layer 30 .

[0127] The process of preparing the passivation layer 30 may specifically include the following steps:

[0128] In the first step, a first silicon oxide layer is formed on the surface of the epitaxial layer 20 .

[0129] In the second step, a plurality of metal blocks 420 arranged at intervals are formed on the surface of the first silicon oxide layer to obtain a second reflective layer 42 .

[0130] In the third step, a second silicon oxide layer covering the second reflective layer 42 is formed on the surface of the first silicon oxide layer, and a first through hole 31 penetrating to the first silicon oxide layer is formed on the surface of the second silicon oxide layer.

[0131] The first through hole 31 and the metal block 420 are arranged at intervals, that is, the first through hole 31 and the metal block 420 do not overlap, so as to avoid the first through hole 31 exposing the metal block 420 and causing a short circuit problem.

[0132] like Figure 6 As shown, the second reflective layer 42 is disposed inside the formed passivation layer 30 , that is, the second reflective layer 42 is located between the surface of the passivation layer 30 away from the epitaxial layer 20 and the surface close to the epitaxial layer 20 .

[0133] Step S13 : forming a first reflective layer 41 on the surface of the epitaxial layer 20 .

[0134] like Figure 7 As shown, a first reflective layer 41 is formed on the surface of the passivation layer 30 away from the epitaxial layer 20. The first reflective layer 41 is connected to the transparent conductive layer 50 through the first through hole 31, and the surface of the first reflective layer 41 away from the epitaxial layer 20 has a concave hole 410 exposing the passivation layer 30.

[0135] The metal blocks 420 correspond to the recessed holes 410 one by one, and the orthographic projection of the recessed holes 410 on the surface of the epitaxial layer 20 is located within the orthographic projection of the corresponding metal block 420 on the surface of the epitaxial layer 20 .

[0136] Step S14 : forming a protection layer 43 on the surface of the passivation layer 30 .

[0137] like Figure 2 As shown, the protection layer 43 is located on the surface of the first reflective layer 41 away from the epitaxial layer 20 , in the recessed hole 410 , and on the surface of the passivation layer 30 away from the epitaxial layer 20 .

[0138] After step S14, the following steps may also be included:

[0139] First, a first insulating layer 51 covering the protective layer 43 is formed on the surface of the passivation layer 30, and the first insulating layer 51 is etched to form a via hole exposing the protective layer 43 and the bottom of the groove; then, at least two electrodes 60 are formed on the surface of the first insulating layer 51, a part of the electrode 60 is connected to the first semiconductor layer 21 in the groove through the via hole, and the other part of the electrode 60 is connected to the protective layer 43 through the via hole; then, a second insulating layer 52 covering the electrode 60 is formed on the surface of the first insulating layer 51, and the second insulating layer 52 is etched to form a via hole exposing the electrode 60; finally, at least two pads 70 are formed on the surface of the second insulating layer 52, and the at least two pads 70 are respectively connected to different electrodes 60 through the via holes.

[0140] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial layer (20), a passivation layer (30), a first reflective layer (41) and a second reflective layer (42); The passivation layer (30) is located on the surface of the epitaxial layer (20), and the passivation layer (30) has a first through hole (31) penetrating the passivation layer (30); The first reflective layer (41) is located on a surface of the passivation layer (30) away from the epitaxial layer (20), and the first reflective layer (41) is electrically connected to the epitaxial layer (20) through the first through hole (31); The second reflective layer (42) is located in the passivation layer (30), and between a surface of the passivation layer (30) away from the epitaxial layer (20) and a surface close to the epitaxial layer (20); The surface of the first reflective layer (41) away from the epitaxial layer (20) has a concave hole (410) exposing the passivation layer (30); An orthographic projection of the second reflective layer (42) on the surface of the epitaxial layer (20) overlaps with an orthographic projection of the recessed hole (410) on the surface of the epitaxial layer (20).

2. The light emitting diode according to claim 1, characterized in that: The orthographic projection of the concave hole (410) on the surface of the epitaxial layer (20) is located within the orthographic projection of the second reflective layer (42) on the surface of the epitaxial layer (20).

3. The light emitting diode according to claim 2, characterized in that: The surface of the first reflective layer (41) has a plurality of recessed holes (410) arranged at intervals; The second reflective layer (42) wraps a plurality of spaced-apart metal blocks (420), the metal blocks (420) corresponding one to the concave holes (410), and the orthographic projections of the concave holes (410) on the surface of the epitaxial layer (20) are located within the orthographic projections of the corresponding metal blocks (420) on the surface of the epitaxial layer (20).

4. The light emitting diode according to claim 3, characterized in that: The first reflective layer (41) and the second reflective layer (42) both include Ag layers; or, The first reflective layer (41) and the second reflective layer (42) both include an adhesion metal layer and an Ag layer, and the adhesion metal layer is located on at least one surface of the Ag layer.

5. The light emitting diode according to claim 4, characterized in that: The adhesion metal layer includes a Ti layer.

6. The light emitting diode according to any one of claims 1 to 5, characterized in that: The light emitting diode further comprises a transparent conductive layer (50), the transparent conductive layer (50) being located between the epitaxial layer (20) and the passivation layer (30), the first through hole (31) exposing the transparent conductive layer (50), and the first reflective layer (41) being connected to the transparent conductive layer (50) via the first through hole (31).

7. The light emitting diode according to any one of claims 1 to 5, characterized in that: The light emitting diode further comprises a protective layer (43), wherein the protective layer (43) is at least located on a surface of the first reflective layer (41) away from the epitaxial layer (20) and in the concave hole (410).

8. The light emitting diode according to claim 7, characterized in that: The area of ​​the orthographic projection of the portion of the protective layer (43) located in the recessed hole (410) on the surface of the epitaxial layer (20) is greater than the area of ​​the orthographic projection of the portion of the protective layer (43) located on the surface of the first reflective layer (41) on the surface of the epitaxial layer (20).

9. A method for preparing a light emitting diode, characterized in that: The preparation method comprises: preparing an epitaxial layer (20); A passivation layer (30) and a second reflective layer (42) are formed on the surface of the epitaxial layer (20), wherein the passivation layer (30) has a first through hole (31) penetrating the passivation layer (30), and the second reflective layer (42) is located in the passivation layer (30) and between a surface of the passivation layer (30) away from the epitaxial layer (20) and a surface close to the epitaxial layer (20); A first reflective layer (41) is formed on the surface of the epitaxial layer (20), the first reflective layer (41) being electrically connected to the epitaxial layer (20) via the first through hole (31), the surface of the first reflective layer (41) away from the epitaxial layer (20) having a concave hole (410) exposing the passivation layer (30), and an orthographic projection of the second reflective layer (42) on the surface of the epitaxial layer (20) intersecting with an orthographic projection of the concave hole (410) on the surface of the epitaxial layer (20).

10. The preparation method according to claim 9, characterized in that: Forming a passivation layer (30) and a second reflective layer (42) on the surface of the epitaxial layer (20) comprises: forming a first silicon oxide layer on the surface of the epitaxial layer (20); A plurality of spaced metal blocks (420) are formed on the surface of the first silicon oxide layer to obtain a second reflective layer (42), wherein the metal blocks (420) correspond to the concave holes (410) one by one, and the orthographic projections of the concave holes (410) on the surface of the epitaxial layer (20) are located within the orthographic projections of the corresponding metal blocks (420) on the surface of the epitaxial layer (20); A second silicon oxide layer covering the second reflective layer (42) is formed on the surface of the first silicon oxide layer, and a first through hole (31) penetrating to the first silicon oxide layer is formed on the surface of the second silicon oxide layer, wherein the first through hole (31) and the metal block (420) are arranged at intervals.

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