Optimization of bottom electrodes with back end of line (BEOL) compatible processes to enhance ferroelectric performance of hafnium-based oxides

Abstract

The disclosed and claimed subject matter relates to a ferroelectric device having a bottom electrode, a film comprising a crystalline ferroelectric material comprising a mixture of hafnium oxide and zirconium oxide, a ferroelectric phase in which a substantial portion (i.e., about 40% or more) or a majority of the material is in a deposited state, a top electrode; and to methods for preparing and depositing these materials. The bottom electrode is thin and has a low roughness. The ferroelectric device is compatible with back-end-of-line (BEOL) because all process steps are performed at a temperature of 400 degrees Celsius or less.

Description

[0001] Related Applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 368,891, filed on July 20, 2022, which is incorporated herein by reference. Technical Field

[0003] The disclosed and claimed subject matter relates to ferroelectric materials deposited using vapor techniques, including atomic layer deposition (ALD). More particularly, the disclosed and claimed subject matter relates to ferroelectric devices having a bottom electrode comprising tungsten and a thin film crystalline ferroelectric material comprising a mixture of hafnium oxide and zirconium oxide, a substantial portion (i.e., about 40% or more) of the material being in a ferroelectric phase, and to methods of preparing and depositing these materials. Importantly, these materials exhibit ferroelectric properties within the thermal budget of back-end processing. Background Art

[0004] Due to their strong nonlinear capacitance and remanent polarization, ferroelectric materials based on hafnium and zirconium oxides enable a variety of computing devices, including nonvolatile memory and energy-efficient logic devices. These materials can also be used in a variety of other thermal and magnetic applications. Materials containing hafnium oxide and zirconium oxide are well suited for these applications due to their compatibility with many CMOS manufacturing processes and materials. They are also ideal due to their ability to be deposited into thin films from the vapor phase, including by ALD processes (e.g., chemical vapor deposition (CVD) or pulsed CVD) involving the stepwise introduction and removal of precursors, followed by the introduction and removal of reactive gases and other known processes. Hafnium and zirconium oxide-based materials are polycrystalline. Therefore, their atoms can be arranged in several crystal structures (i.e., different ordered atomic arrangements). It is well known that the most stable bulk structure of materials based on hafnium and zirconium oxides is a monoclinic phase; however, this phase does not support ferroelectricity. Other polymorphs (e.g., some orthorhombic and rhombohedral phases) have the symmetry required to support ferroelectric switching properties, while some phases (e.g., the tetragonal phase commonly seen in zirconium oxide films) may be antiferroelectric-like. The list of related art appended hereto identifies references that describe these general features and technical aspects in more detail.

[0005] In many vapor phase and atomic layer deposition processes used for mixed hafnium oxide and zirconium oxide materials, these materials are amorphous when deposited.

[0006] Even after thermal treatment, crystallization into a monoclinic or other non-ferroelectric phase is common, reducing the fraction of the material that can achieve ferroelectric properties. Several techniques have been developed to suppress the monoclinic phase in favor of a phase that can support ferroelectricity. For example, incorporation of other elements (including but not limited to Si, Al, Gd, La, and Y) into the material by sequentially or simultaneously introducing precursors for the other elements into the gas phase has been reported as a means of suppressing the monoclinic phase.

[0007] A study showed that thick films (about 30 nm) of hafnium and zirconium oxides can exhibit weak ferroelectricity of the ferroelectric phase. See Y. Li et al., "A Ferroelectric Thin Film Transistor Based on Annealing-Free HfZrO Film", IEEE Journal of the Electron Devices Society, vol. 5, no. 5, pp. 378-383, Sept. 2017, doi: 10.1109 / JEDS.2017.2732166. This performance is due to the reduction of surface energy effects compared to thinner films and the long exposure to heat (which plays the functional equivalent of annealing) to produce such thick films. However, this study recognizes the general understanding in the field: that is, thin films (about 20 nm or less) will not exhibit ferroelectric properties without annealing at high temperature (alone or in combination with doping) and the above-mentioned encapsulation methods.

[0008] Thus, obtaining the desired ferroelectric phase has traditionally depended on a complex and compound combination of: (i) deposition conditions of the material itself; (ii) choice of dopants, interfaces (especially top interfaces); and (iii) post-deposition thermal treatment. As can be readily appreciated, this combination of factors significantly limits the applicability of such materials to possible substrates, interlayers, electrodes, compositions, and processes. Indeed, the thermal distribution in devices implementing such ferroelectric materials may be incompatible with all necessary or desired applications for which the ferroelectric materials may be useful. For example, it has been observed that specific electrodes may be required to tune the electronic work function, interfaces may be required to establish barriers to chemical reactions and atomic diffusion, and thermal processing conditions may be limited by stresses introduced into other layers in the multilayer stack.

[0009] Ferroelectric devices include a ferroelectric tunnel junction (FTJ), which is a two-terminal memory device (in which a ferroelectric material is sandwiched between two similar / dissimilar electrodes along with other interfacial dielectric materials) that stores data based on the switching of the device's resistance (i.e., low resistance and high resistance states indicate two different storage states and, therefore, store one bit of information). The change in resistance is caused by a change in the height of the tunneling barrier between the two electrodes due to a change in the orientation of permanent charge dipoles in the ferroelectric material. Ferroelectric materials are typically crystalline / polycrystalline materials that have permanent charge dipoles formed due to asymmetric dipole charge centers within the lattice, which can be switched by applying an electric field. Due to the permanent orientation switching of the dipoles, in the absence of an electric field, such materials exhibit a polarization (remanent polarization) that can change the direct tunnel barrier between the electrodes.

[0010] Generally, for FTJs to work, an intrinsic asymmetry between the two electrodes is necessary. This asymmetry can be achieved in two ways: (i) using two different types of contact materials for the two electrodes (two different metals or a metal and a semiconductor), or (ii) using an interface dielectric material that is non-ferroelectric.

[0011] The basic concept of the ferroelectric tunnel junction (FTJ) (then known as the polarity switch) can be attributed to Esaki et al. and was elucidated in 1971. FTJs have been extensively studied in the literature over the past decade and have used several materials such as lead zirconate titanate – Pb (Zr x Ti 1-x )O3(PZT), bismuth ferrite (BiFeO3-BFO), barium titanate (BaTiO3-BTO), strontium lanthanum manganate (La 0.67 Sr 0.33 MnO3–LSMO), organic polyvinylidene fluoride (PVDF), and organic poly(vinylidene fluoride-trifluoroethylene)-P(VDF-TrFE). Due to the poor BEOL process compatibility and integration complexity of these materials, hafnium oxide-based FTJs have been intensively studied recently due to its good compatibility with CMOS processes, especially with certain dopants (Zr, Si), which improve the ferroelectricity of the material. Interfacial layers (SiO2, Al2O3, WO x ) were used to introduce asymmetry in the FTJ stack and improve the memory performance in terms of tunneling resistance (TER) window and retention, but the results were still insufficient to achieve programming of more than 2-3 memory levels and acceptable retention for times exceeding a few hours. Summary of the invention

[0012] In a first main aspect, a ferroelectric device is provided. The ferroelectric device includes a substrate; a first electrode and a second electrode, wherein the first electrode is disposed on the substrate; a thin film comprising a crystalline material disposed between the first electrode and the second electrode, the crystalline material comprising hafnium oxide and zirconium oxide, wherein the crystalline material exhibits ferroelectric properties as deposited; and wherein the first electrode comprises tungsten, titanium nitride, molybdenum, ruthenium, or a combination thereof, the thin film having a relative humidity greater than about 50 μC / cm 2 of the residual polarization.

[0013] In a further aspect of the first main aspect, the film is capable of exhibiting ferroelectric activity without a wake-up period. In a further aspect of the first main aspect, the second electrode comprises titanium nitride, tungsten, molybdenum, or a combination thereof. In a further aspect of the first main aspect, the thickness of the first electrode is between about 4 nm and about 50 nm. In a further aspect of the first main aspect, greater than 50% of the total volume of the first electrode is alpha phase. In a further aspect of the first main aspect, the crystalline material comprises a ratio of hafnium oxide to zirconium oxide between about 1:3 and about 3:1. In a further aspect of the first main aspect, no process steps are performed at a temperature greater than about 400 degrees Celsius.

[0014] In a further aspect of the first main aspect, the crystalline material is derived from one or more metallocene precursors having the formula I:

[0015]

[0016] Formula II:

[0017]

[0018] Or formula III:

[0019]

[0020] wherein (i) M is selected from Zr and Hf, (ii) R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 are each independently selected from C1-C6 straight chain alkyl, C1-C6 branched chain alkyl, C1-C6 halogenated straight chain alkyl and C1-C6 halogenated branched chain alkyl, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group.

[0021] In a further aspect of the first main aspect, the crystalline material is derived from one or more metallocene precursors having the formula I:

[0022]

[0023] Formula II:

[0024]

[0025] Or formula III:

[0026]

[0027] wherein (i) M is selected from Zr and Hf, (ii) R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 are each independently a C1-C6 straight chain alkyl group, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group.

[0028] In a further aspect of the first main aspect, the crystalline material is derived from one or more metallocene precursors having the formula I:

[0029]

[0030] Formula II:

[0031]

[0032] Or formula III:

[0033]

[0034] wherein (i) M is selected from Zr and Hf, (ii) R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 each is methyl, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12Each is independently a C1-C6 straight chain alkyl group.

[0035] In a further aspect of the first main aspect, hysteresis and remanent polarization are present in polarization-electric field measurements. In a further aspect of the first main aspect, the film has a thickness of about 0.2 nm to about 10 nm.

[0036] In a second main aspect, a method of making a ferroelectric device is provided. The method comprises: (i) providing a substrate; (ii) depositing a first electrode onto the substrate, the first electrode comprising tungsten, titanium nitride, molybdenum, ruthenium, or a combination thereof; (iii) depositing a ferroelectric layer onto the first electrode at a deposition temperature, the ferroelectric layer comprising zirconium and hafnium; (iv) depositing a second electrode onto the ferroelectric layer; and (v) annealing the first electrode at a temperature of 400 degrees Celsius or less.

[0037] In a further aspect of the second main aspect, the annealing step is performed at a temperature greater than about 350 degrees Celsius. In a further aspect of the second main aspect, no process steps are performed at a temperature greater than about 400 degrees Celsius. In a further aspect of the second main aspect, the ferroelectric layer comprises hafnium zirconium oxide. In a further aspect of the second main aspect, greater than 50% of the total volume of the first electrode is alpha phase. In a further aspect of the second main aspect, the first electrode has a thickness between about 4 nm and about 50 nm.

[0038] In a third main aspect, a method of manufacturing a ferroelectric device is provided. The method comprises: (i) providing a substrate; (ii) depositing a first electrode onto the substrate at a first temperature; (iii) depositing a ferroelectric layer onto the first electrode at a second temperature; and (iv) depositing a second electrode onto the ferroelectric layer; and (v) performing an annealing step at a third temperature; wherein the first temperature, the second temperature and the third temperature are less than or equal to 400 degrees Celsius.

[0039] In a further aspect of the third main aspect, the first temperature is between about 15 degrees Celsius and about 400 degrees Celsius. In a further aspect of the third main aspect, the thickness of the first electrode is between about 4 nm and about 50 nm. In a further aspect of the third main aspect, in the annealing step, the third temperature is greater than or equal to about 350 degrees Celsius and less than or equal to 400 degrees Celsius. In a further aspect of the third main aspect, no process steps are performed at a temperature greater than about 400 degrees Celsius. In a further aspect of the third main aspect, the first electrode comprises tungsten, titanium nitride, molybdenum, ruthenium, or a combination thereof; and wherein the second electrode comprises titanium nitride, tungsten, molybdenum, or a combination thereof;

[0040] In a fourth main aspect, a ferroelectric device is provided. The ferroelectric device is made by a method comprising: (i) providing a substrate; (ii) depositing a first electrode onto the substrate, the first electrode comprising tungsten; (iii) depositing a ferroelectric layer onto the first electrode at a deposition temperature, the ferroelectric layer comprising zirconium and hafnium; (iv) depositing a second electrode onto the ferroelectric layer; and (v) annealing the first electrode at a temperature of 400 degrees Celsius or less; wherein the first electrode comprises tungsten and has a relative humidity greater than 50 μC / cm 2 of the residual polarization.

[0041] In a further aspect of the fourth main aspect, no process step is performed at a temperature above about 400 degrees Celsius. In a further aspect of the fourth main aspect, the ferroelectric layer comprises Hf doped with La, Y, Gd, Ge, Si or Sr. x Zr 1-x O2 or HfO2.

[0042] In a further aspect of the fourth main aspect, the ferroelectric device has a critical dimension of 100 nm or less, preferably about 300 μm or less.

[0043] A unit cell of a ferroelectric random access memory device comprises the ferroelectric device according to any one of the above aspects.

[0044] A crossbar memory array comprising a ferroelectric device according to any one of the preceding aspects or a ferroelectric device produced by a method according to any one of the preceding aspects, comprising a memory unit cell.

[0045] A neuromorphic computing chip comprises the ferroelectric device of any one of the aforementioned aspects, wherein the ferroelectric device is a synaptic device.

[0046] In another aspect, the higher metallocene precursor is one or more of the precursors disclosed and / or claimed in US Pat. No. 8,568,530, the contents of which are incorporated herein in their entirety.

[0047] This Summary of the Invention section does not specifically describe every embodiment and / or incrementally novel aspect of the disclosed and claimed subject matter. Instead, this Summary of the Invention section only provides a preliminary discussion of different embodiments and corresponding novel points relative to conventional and known technologies. For additional details and / or possible viewpoints of the disclosed and claimed subject matter and embodiments, the reader is referred to the Detailed Description section and the corresponding drawings of the disclosure discussed further below.

[0048] For the sake of clarity, the order in which the various steps described herein are discussed has been presented. In general, the steps disclosed herein may be performed in any suitable order. Furthermore, while each of the various features, techniques, configurations, etc. disclosed herein may be discussed in different places of the disclosure, it is intended that each concept may be performed independently of one another, or in combination with one another as appropriate. Thus, the disclosed and claimed subject matter may be implemented and viewed in many different ways. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The accompanying drawings, which are included to provide a further understanding of the disclosed subject matter and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosed subject matter and together with the description serve to explain the principles of the disclosed subject matter. In the drawings:

[0050] Figure 1 Embodiments of ferroelectric devices disclosed herein are described;

[0051] Figure 2A is a diagram showing the transition from the α phase to the β phase.

[0052] Figure 2B is a graph showing the peak shift after annealing.

[0053] Figure 2C is a graph showing the remnant polarization after annealing.

[0054] Figure 3A The effects of surface roughness and temperature are explained;

[0055] Figure 3B The temperature-dependent α phase is illustrated;

[0056] Figure 3C illustrates the remnant polarization after annealing at 400 degrees Celsius;

[0057] Figure 4 The wake-up effect of BEOL phase container devices is explained;

[0058] Figure 5 The multi-level performance in FeCAP is explained;

[0059] Figure 6 Demonstrates the effect of the top electrode on the durability of ferroelectric devices; and

[0060] Figure 7 The effect of the bottom electrode on the leakage response of a ferroelectric device is shown.

[0061] definition

[0062] Unless otherwise stated, the following terms used in the specification and claims have the following meanings for this application.

[0063] In this application, the use of the singular includes the plural, and "a", "an" and "the" mean "at least one", unless otherwise specifically stated. In addition, the use of the term "include" and other forms such as "comprise" and "including" are not restrictive. Moreover, unless otherwise stated, terms such as "element" or "component" cover elements or components that include one unit and elements or components that include more than one unit. Unless otherwise stated, the conjunction "and" used herein is intended to be inclusive, and the conjunction "or" is not intended to be exclusive. For example, the phrase "or optionally" is intended to be exclusive. As used herein, the term "and / or" refers to any combination of the aforementioned elements, including the use of a single element.

[0064] The terms "about" or "approximately," when used in conjunction with a measurable numerical variable, refer to the indicated value of the variable, and all values ​​of the variable that are within the experimental error of the indicated value (e.g., within 95% confidence limits for the mean) or within a percentage of the indicated value (e.g., ±10%, ±5%), whichever is greater.

[0065] For purposes of this invention and the claims thereto, the numbering scheme used for the Periodic Table Groups is according to the IUPAC Periodic Table.

[0066] The term "and / or" as used herein in phrases such as "A and / or B" is meant to include "A and B", "A or B", "A" and "B".

[0067] The terms "substituent," "radical," "group," and "moiety" are used interchangeably.

[0068] As used herein, the terms "metal-containing complex" (or more simply, "complex") and "precursor" are used interchangeably and refer to metal-containing molecules or compounds that can be used to prepare metal-containing films by deposition processes (e.g., ALD or CVD). The metal-containing complex can be deposited, adsorbed on a substrate or a surface thereof, decomposed on a substrate or a surface thereof, transported to a substrate or a surface thereof, and / or passed through a substrate or a surface thereof to form a metal-containing film.

[0069] As used herein, the term "metal-containing film" includes not only elemental metal films as more fully defined below, but also films containing a metal and one or more elements, such as metal nitride films, metal silicide films, metal carbide films, and the like.

[0070] As used herein, the terms "elemental metal," "elemental metal film," and "pure metal film" are used interchangeably and refer to films consisting of or consisting essentially of pure metal. For example, an elemental metal film may include 100% pure metal, or an elemental metal film may include at least about 70%, at least about 80%, at least about 90%, at least about 95%, at least about 96%, at least about 97%, at least about 98%, at least about 99%, at least about 99.9%, or at least about 99.99% pure metal and one or more impurities. However, films comprising elemental metals are distinguished from binary films comprising a metal and a non-metal (e.g., C, N, O) and ternary films comprising a metal and two non-metals (e.g., C, N, O), although films comprising elemental metals may include a certain amount of impurities. Unless the context indicates otherwise, the term "metal film" should be interpreted as referring to an elemental metal film.

[0071] As used herein, the terms "deposition process" and "thermal deposition" are used to refer to any type of deposition technique, including but not limited to CVD and ALD. In various embodiments, CVD can take the form of conventional (i.e., continuous flow) CVD, liquid injection CVD, plasma enhanced CVD, or light assisted CVD. CVD can also take the form of a pulsed technique, i.e., pulsed CVD. ALD is used to form a metal-containing film by vaporizing at least one metal complex disclosed herein and / or by passing it over a substrate surface. For conventional ALD processes, see, for example, George SM et al., J. Phys. Chem., 1996, 100, 13121-13131. In other embodiments, ALD can take the form of conventional (i.e., pulsed injection) ALD, liquid injection ALD, light assisted ALD, plasma assisted ALD, or plasma enhanced ALD. The term "vapor deposition process" further includes various vapor deposition techniques described in the following literature: Chemical Vapour Deposition: Precursors, process, and Applications; Jones, AC; Hitchman, ML, Eds. The Royal Society of Chemistry: Cambridge, 2009; Chapter 1, pp 1-36.

[0072] Unless otherwise indicated, "alkyl" refers to a hydrocarbon group that can be straight chain, branched (e.g., methyl, ethyl, propyl, isopropyl, tert-butyl, etc.), cyclic (e.g., cyclohexyl, cyclopropyl, cyclopentyl, etc.), or polycyclic (e.g., norbornyl, adamantyl, etc.). Suitable acyclic groups can be methyl, ethyl, n-propyl or isopropyl, n-butyl, isobutyl or tert-butyl, straight or branched pentyl, hexyl, heptyl, octyl, decyl, dodecyl, tetradecyl, and hexadecyl. Unless otherwise indicated, alkyl refers to a portion of 1-10 carbon atoms. Cyclic alkyl groups can be monocyclic or polycyclic. Suitable examples of monocyclic alkyl groups include substituted cyclopentyl, cyclohexyl, and cycloheptyl. Substituents can be any acyclic alkyl group described herein. As described herein, cyclic alkyl groups can have any acyclic alkyl group as a substituent. These alkyl moieties can be substituted or unsubstituted.

[0073] "Haloalkyl" refers to a straight chain, cyclic or branched saturated alkyl group in which one or more hydrogen atoms are replaced by halogen (e.g., F, Cl, Br and I). Thus, for example, a fluoroalkyl group (also known as a "fluoroalkyl group") refers to a straight chain, cyclic or branched saturated alkyl group as defined above in which one or more hydrogen atoms are replaced by fluorine (e.g., trifluoromethyl, perfluoroethyl, 2,2,2-trifluoroethyl, perfluoroisopropyl, perfluorocyclohexyl, etc.). Such a haloalkyl moiety (e.g., a fluoroalkyl moiety), if not perhalogenated / polyhalogenated, may be unsubstituted or further substituted.

[0074] The section headings used in this application are for organizational purposes only and should not be construed as limitations on the described subject matter. All documents or portions of documents cited in this application, including but not limited to patents, patent applications, articles, books, and papers, are expressly incorporated by reference in their entirety for any purpose. If any incorporated documents and similar materials define a term in a manner that contradicts the definition of that term in this application, the present application shall prevail. DETAILED DESCRIPTION

[0075] It should be understood that both the above general description and the following detailed description are illustrative and explanatory and do not limit the subject matter claimed. According to the description of this specification, the purpose, features, advantages and concepts of the disclosed subject matter will be obvious to those skilled in the art, and those skilled in the art can easily implement the disclosed subject matter according to the description herein. The description of any "preferred embodiment" and / or example showing the preferred mode for implementing the disclosed subject matter is included for the purpose of explanation and is not intended to limit the scope of the claims.

[0076] It will also be apparent to those skilled in the art that various modifications may be made to the embodiments of the disclosed subject matter based on the aspects described in the specification without departing from the spirit and scope of the subject matter disclosed herein.

[0077] I. Ferroelectric Devices with Multi-Level Switching

[0078] The ferroelectric device of the present disclosure can take a variety of forms. In a preferred embodiment, the ferroelectric device is integrated into a ferroelectric random access memory (FeRAM, F-RAM or FRAM). In addition, the ferroelectric device can also be used as a capacitor to program different residual charge polarization states by applying different electric fields. This specific embodiment is generally used in ferroelectric RAM (FeRAM) applications. In an alternative embodiment, the ferroelectric device is a ferroelectric tunnel junction (FTJ). Due to its unique analog programming necessary for neuromorphic computing applications, FTJ has recently been studied as one of the best candidates for memristors or artificial synapses. The use of ALD HZO films deposited at high T with specific Hf and Zr precursors sandwiched between TiN electrodes and W electrodes and specific post-metal annealing (PMA) allows up to 4 levels of multi-level programming, wherein FTJs that are superior to the current state of the art (which typically use a double-layer stack with higher complexity) are retained. The present disclosure paves the way for the implementation of FTJs in neuromorphic computing chips in the future.

[0079] This disclosure demonstrates a new technique to introduce asymmetry between top and bottom electrodes. This is facilitated by high temperature (>300°C) atomic layer deposition (ALD) of hafnium zirconium oxide (HZO), using alternating cycles of Hf and Zr precursors with ozone pulses in between for oxidation.

[0080] In prior art systems for manufacturing ferroelectric memory devices, typically the FE material is deposited using low temperature ALD, which renders the film amorphous and therefore non-FE when deposited, followed by a high temperature anneal (>500°C) to crystallize the film and activate the FE properties of the film. For FTJs with an interfacial layer, additional processing steps may be required to deposit the interfacial material. Due to the ability of the precursors to operate at high temperatures (>300°C), current process integration and stacking allow for as-deposited FE films. In addition, the method inherently oxidizes the bottom electrode (due to its high temperature and highly reactive ozone process) to produce an interfacial metal oxide, which introduces the asymmetry required for FTJ operation. Further annealing at temperatures above the deposition temperature may be introduced to improve the FE memory window and reliability metrics such as retention and durability.

[0081] Furthermore, the optimization of HZO films and the ferroelectric stacks show good tunability. Appropriate selection of ALD deposition temperature, ozone dilution, and metal post-annealing conditions are fundamental to obtain the desired orthorhombic phases necessary for multi-domain switching in ferroelectric devices, which is crucial for multi-level switching in ferroelectric devices.

[0082] This disclosure shows for the first time a BEOL compatible process with a hafnium zirconium oxide (HZO) switching layer sandwiched between symmetric W and W electrodes and multi-level programming of up to 4 states and at least 10 of these states. 4 During the HZO deposition process, an oxidized interface layer (WO x ). The advantage of this step is that it occurs simultaneously during the deposition process and no additional process steps are required.

[0083] Figure 1 The ferroelectric device 100 includes a top electrode 102, a ferroelectric material layer 104, a bottom electrode 106, and a substrate 108. In a preferred embodiment, the top and bottom electrodes comprise tungsten, and the ferroelectric material comprises a thin film of hafnium and zirconium oxide (HZO).

[0084] Intrinsic ferroelectric thin film materials and methods of using the same that solve the aforementioned problems are disclosed herein and in U.S. Provisional Patent Application No. 63 / 040,097 (Attorney Docket No. P20-094 US-PRO), filed on June 17, 2020, and PCT Application No. PCT / EP2021 / 066028 (P20-094 WO-PCT), filed on June 15, 2021. The entire contents of these applications are incorporated by reference. Thus, the materials and methods described herein reduce processing time, making them particularly suitable for the needs of current manufacturing procedures. The present disclosure relates to FTJs having 9 or more different resistance levels. Those skilled in the art can readily appreciate the potential for subsequent optimization of interfaces, electrodes, and thermal treatment conditions after deposition of these materials.

[0085] II. Intrinsic ferroelectric materials

[0086] As described above, the disclosed and claimed subject matter relates to crystalline ferroelectric thin film materials comprising a mixture of hafnium oxide and zirconium oxide, materials having a substantial portion (i.e., about 40% or more) of a ferroelectric phase, and methods for preparing and depositing these materials. In a further aspect, the ferroelectric materials have a large volume fraction of a ferroelectric phase. Importantly, these materials exhibit ferroelectric properties without the need for further processing, such as a subsequent capping step or annealing step. To be ferroelectric, the resulting material has one or more of: (i) a remnant polarization or (ii) a polarization field curve having hysteresis and a loop opening.

[0087] In order to be ferroelectric, a material must have an atomic arrangement that can support ferroelectricity in a certain fraction of the film. It is preferred that a substantial portion of the volume of the film has an atomic arrangement that can support ferroelectricity. It should be understood that for thin films, doped materials, and certain layered materials, the phase distribution in the material may not be easily determined by X-ray diffraction. In such cases, the phase distribution may be determined using any other suitable technique for determining the phase of the film, such as Raman spectroscopy, infrared spectroscopy, X-ray absorption spectroscopy, transmission electron microscopy, or a combination thereof. For example, https: / / onlinelibrary.wiley.com / doi / full / 10.1002 / pssb.201900285 describes a technique for determining the phase of a film to within about 10%.

[0088] The material may be composed of hafnium oxide and zirconium oxide in any suitable molar ratio - ratios between 1:3 and 3:1 are preferred. The thickness of the ferroelectric material is any thickness suitable for a given application; the material may be made thicker to increase the remnant polarization or to reduce leakage current through the thickness of the material, or may be made thinner due to geometric constraints or to increase the capacitance of the film.

[0089] The preferred thickness range of such ferroelectric films is from about 0.2 nm to about 20 nm, and more preferably from about 0.2 nm to 10 nm. It is also preferred that the material forms a film with a thickness of about 10 nm or less. In certain embodiments, it is preferred that the material forms a film with a thickness of about 5 nm or less.

[0090] However, as described above, the preferred and / or required thickness varies depending on the specific application. Thus, as previously described, in certain embodiments, the material exhibits ferroelectric properties of a film such as about 20 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 15 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 10 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 5 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 3 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 1 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 0.5 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 0.2 nm or less. In a further aspect, the material exhibits ferroelectric properties of a film such as about 0.2 nm to about 20 nm. In a further aspect, the material exhibits ferroelectric properties of a film such as about 0.2 nm to about 15 nm. In a further aspect, the material exhibits ferroelectric properties as a thin film of about 0.2 nm to about 10 nm. In a further aspect, the material exhibits ferroelectric properties as a thin film of about 0.2 nm to about 5 nm. In a further aspect, the material exhibits ferroelectric properties as a thin film of about 0.2 nm to about 3 nm. In a further aspect, the material exhibits ferroelectric properties as a thin film of about 0.2 nm to about 1 nm. In a further aspect, the material exhibits ferroelectric properties as a thin film of about 0.2 nm to about 1 nm.

[0091] Bottom electrode

[0092] The preferred thickness range of the bottom electrode is from about 1 nm to about 25 nm, more preferably from about 4 nm to 15 nm. It is also preferred that the material forms a film having a thickness of about 10 nm or less. In certain embodiments, it is preferred that the material forms a film having a thickness of about 5 nm or less.

[0093] In the disclosed and claimed materials, about 40% or more of the substantial portion constituting the crystalline material is in the ferroelectric phase, so that the total non-ferroelectric atomic arrangement composition is less than about 60% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 50% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 40% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 30% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 25% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 20% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 15% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 10% of the total volume of the material. In another embodiment, the total non-ferroelectric atomic arrangement composition is less than about 5% of the total volume of the material.

[0094] In addition, in the disclosed and claimed materials, less than about 60% of the total volume of the material constitutes a non-ferroelectric monoclinic phase component. Thus, in one embodiment of the disclosed and claimed material, the monoclinic phase component is less than about 50% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 40% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 30% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 25% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 20% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 15% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 10% of the total volume of the material. In another embodiment, the monoclinic phase component is less than about 5% of the total volume of the material.

[0095] The intrinsic ferroelectric material is derived from a metallocene precursor from an advanced metallocene precursor having the formula: 1 -Cp)(R 2 -Cp)-M-(OR 3 )(R 4 )" wherein Cp is cyclopentadienyl) and / or formula II ("(R 5 -Cp)(R 6 -Cp)-M-(R 7 )(R 8 )" wherein Cp is cyclopentadienyl):

[0096]

[0097] Where: M = Zr or Hf; and

[0098] R 1 , R2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is independently selected from C1-C6 straight chain alkyl, C1-C6 branched chain alkyl, C1-C6 halogenated straight chain alkyl and C1-C6 halogenated branched chain alkyl.

[0099] In another aspect, in Formula I, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably a C1-C6 straight chain alkyl. In a further aspect, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably the same C1-C6 straight chain alkyl. In a further aspect, in Formula I, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, R in Formula I is preferably methyl. 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, R 1 , R 2 , R 5 and R 6 In a further aspect, R 3 , R 4 , R 7 and R 8 In a further aspect, R in Formula I is preferably methyl. 1 , R 2 , R 5 and R 6 Each is preferably ethyl, and R 3, R 4 , R 7 and R 8 Each is preferably methyl.

[0100] On the other hand, in Formula II, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably a C1-C6 straight chain alkyl. In a further aspect, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably the same C1-C6 straight chain alkyl. In a further aspect, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, R in Formula II is 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, R in Formula II is 1 , R 2 , R 5 and R 6 In a further aspect, R in Formula II is 3 , R 4 , R 7 and R 8 In a further aspect, R in Formula II is 1 , R 2 , R 5 and R 6 Each is preferably ethyl and R 3 , R 4 , R 7 and R 8 Each is preferably methyl.

[0101] On the other hand, the advanced metallocene precursor is one or more of (MeCp)2Zr(OMe)Me, (MeCp)2Hf(OMe)Me, (MeCp)2Zr(Me)2, (MeCp)2Hf(Me)2, (EtCp)2Zr(OMe)Me, (EtCp)2Hf(OMe)Me, (EtCp)2Zr(Me)2, (EtCp)2Hf(Me)2 and combinations thereof.

[0102] On the other hand, the advanced metallocene precursor is one or more of a mixture of (MeCp)2Zr(OMe)Me and (MeCp)2Hf(OMe)Me, a mixture of (MeCp)2Hf(Me)2 and (MeCp)2Hf(Me)2, a mixture of (EtCp)2Zr(OMe)Me and (EtCp)2Hf(OMe)Me, and a mixture of (EtCp)2Hf(Me)2 and (EtCp)2Hf(Me)2.

[0103] In another aspect, the higher metallocene precursor is one or more precursors having formula III.

[0104]

[0105] Wherein (i) M is selected from Zr and Hf, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group. 9 Preferred is a -CH2CH2- group.

[0106] III. Methods of Preparing and Depositing Intrinsic Ferroelectric Materials

[0107] As described above, in another aspect, the disclosed and claimed subject matter relates to a method of preparing and / or depositing the disclosed intrinsic ferroelectric material. In the method, the disclosed and claimed intrinsic ferroelectric material is prepared by repeated deposition and purging of (i) a metallocene precursor and (ii) a reactant.

[0108] A. Metallocene Precursors

[0109] As described above, ferroelectric materials are derived from advanced metallocene precursors having the formula I ("(R 1 -Cp)(R 2 -Cp)-M-(OR 3 )(R 4)”, wherein Cp is cyclopentadienyl) and / or formula II (“(R 5 -Cp)(R 6 -Cp)-M-(R 7 )(R 8 )", wherein Cp is cyclopentadienyl):

[0110]

[0111] Wherein M=Zr or Hf; and

[0112] R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is independently selected from C1-C6 straight chain alkyl, C1-C6 branched chain alkyl, C1-C6 halogenated straight chain alkyl and C1-C6 halogenated branched chain alkyl.

[0113] On the other hand, in Formula I, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably a C1-C6 straight chain alkyl group. In a further aspect, in Formula I, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably the same C1-C6 straight chain alkyl. In a further aspect, in Formula I, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, in Formula I, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, in Formula I, R1 , R 2 , R 5 and R 6 In a further aspect, in Formula I, R 3 , R 4 , R 7 and R 8 In a further aspect, in Formula I, R 1 , R 2 , R 5 and R 6 Each is preferably ethyl and R 3 , R 4 , R 7 and R 8 Each is preferably methyl.

[0114] On the other hand, in Formula II, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably a C1-C6 straight chain alkyl group. In a further aspect, in Formula II, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 Each is preferably the same C1-C6 straight chain alkyl. In a further aspect, in Formula II, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, in Formula II, each R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 In a further aspect, in Formula II, R 1 , R 2 , R 5 and R 6In a further aspect, in Formula II, R 3 , R 4 , R 7 and R 8 In a further aspect, in Formula II, R 1 , R 2 , R 5 and R 6 Each is preferably ethyl and R 3 , R 4 , R 7 and R 8 Each is preferably methyl.

[0115] On the other hand, the advanced metallocene precursor is one or more of (MeCp)2Zr(OMe)Me, (MeCp)2Hf(OMe)Me, (MeCp)2Zr(Me)2, (MeCp)2Hf(Me)2, (EtCp)2Zr(OMe)Me, (EtCp)2Hf(OMe)Me, (EtCp)2Zr(Me)2, (EtCp)2Hf(Me)2 and combinations thereof.

[0116] On the other hand, the advanced metallocene precursor is one or more of a mixture of (MeCp)2Zr(OMe)Me and (MeCp)2Hf(OMe)Me, a mixture of (MeCp)2Hf(Me)2 and (MeCp)2Hf(Me)2, a mixture of (EtCp)2Zr(OMe)Me and (EtCp)2Hf(OMe)Me, and a mixture of (EtCp)2Hf(Me)2 and (EtCp)2Hf(Me)2.

[0117] In another aspect, the higher metallocene precursor is one or more precursors having formula III.

[0118]

[0119] wherein (i) M is selected from Zr and Hf, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group.

[0120] In another aspect, the higher metallocene precursor having formula III is (MeNCH2CH2Cp)Hf(NMe2)2, (MeNCH2CH2Cp)Hf(NEtMe)2, (MeNCH2CH2CH2Cp)Hf(NMe2)2, (MeNCH2CH2CH2Cp)Hf(NEtMe)2, (MeNC(Me)HCH2Cp)Hf(NMe2)2, (MeNC(Me)HCH2Cp)Hf(NEtMe)2, (MeNCH2CH(Me)Cp)Hf(NMe2)2, (MeNCH2CH(Me)Cp)Hf(NEtMe)2 tMe)2, (MeNCH2CH2Cp)Zr(NMe2)2, (MeNCH2CH2Cp)Zr(NEtMe)2, (MeNCH2CH2CH2Cp)Zr(NMe2)2, (MeNCH2CH2CH2Cp)Zr(NEtMe)2, (MeNC(Me)HCH2Cp)Zr(NMe2)2, (MeNC(Me)HCH2Cp)Zr(NEtMe)2, (MeNCH2CH(Me)Cp)Zr(NMe2)2, and one or more mixtures thereof.

[0121] Generally speaking, suitable precursors for preparing intrinsic ferroelectric materials are capable of being deposited at or near the crystallization temperature of the desired ferroelectric material, typically between about 200°C and about 570°C, depending on the composition of the material, the substrate and the reactor design, and other factors. The preferred temperature is about 300°C (or generally between about 280°C and about 300°C), and the preferred temperature range is below about 450°C, more preferably below about 340°C. However, it will be recognized by those skilled in the art that other temperatures may be possible depending on the specific precursors used, and such precursors also fall within the scope of the disclosed and claimed subject matter. It should be further noted that for certain precursors other than those listed herein, decomposition of the precursor may occur within the temperature range described. Decomposition products, particularly carbon and organic matter, may be incorporated into the deposited hafnium oxide or zirconium oxide material. Although such carbon incorporation may contribute to the stabilization of the ferroelectric phase, this may be undesirable for reasons of material purity. Therefore, as described above, the preferred carbon content of the material is less than about 6 atomic %.

[0122] B. Reactants

[0123] The reactant is a reaction gas containing one or more of oxygen (such as ozone, elemental oxygen, molecular oxygen / O2), water, hydrogen peroxide and nitrous oxide. In one embodiment, ozone is a preferred reaction gas. In another embodiment, water is a preferred reaction gas.

[0124] C. Process steps

[0125] The method for preparing and depositing the intrinsic ferroelectric material described herein includes undergoing a sputtering PVD cycle to deposit the substrate of the tungsten bottom electrode. Other methods of bottom electrode deposition include, but are not limited to, CVD, ALD, or electron beam deposition. After the bottom electrode deposition is an ALD cycle in which the bottom electrode is exposed to vapor to form and deposit the intrinsic ferroelectric material as a thin film layer. Layer 200 is formed and exhibits ferroelectric properties as is (i.e., as deposited). Of course, those skilled in the art recognize that the layer can then be annealed and / or covered as needed, but this is not necessary for observing the ferroelectric properties of the layer deposited as is. For example, energy can then be applied to the material by, but not limited to, heat, plasma, pulsed plasma, helicon plasma, high-density plasma, inductively coupled plasma, X-rays, electron beams, photons, remote plasma methods, and combinations thereof.

[0126] The composition of the vapor changes during the ALD cycle. In particular, the bottom electrode is alternately exposed to a metallocene precursor and then purged, then exposed to a reactant and then another purge. This process continues until the desired thickness of the ferroelectric layer is obtained. Although ALD is the preferred vapor deposition technique, any suitable vapor deposition technique may be utilized, such as CVD or pulsed CVD. Thus, for example, the ALD cycle may be replaced by a CVD process in which the metallocene precursor and reactant are provided as a mixture in the vapor phase and simultaneously provided to the substrate.

[0127] The appropriate molar ratio of hafnium oxide to zirconium oxide can be produced by several methods, including introducing the hafnium-containing precursor during a portion of these cycles, and introducing the zirconium-containing precursor during other cycles. The cycles can be alternated, combined together, or arranged in any other suitable order to produce the overall desired molar ratio, as both intimately mixed materials and nano-layered materials have been shown to have desirable ferroelectric properties. It should be noted that other elements can be added to the hafnium oxide-zirconium oxide material by adding appropriate drivers (either with the hafnium and zirconium precursors, or in separate cycles).

[0128] The bottom electrode on which the intrinsic ferroelectric material is formed as a layer can include any suitable material, including semiconductor materials such as silicon, germanium, III-V materials, transition metal dichalcogenides, and mixtures thereof, metals such as titanium nitride, titanium, tantalum, tantalum nitride, tungsten, platinum, rhodium, molybdenum, cobalt, ruthenium, palladium, or mixtures thereof, or conductive ceramics, or dielectrics such as silicon oxide, silicon nitride, aluminum oxide, titanium oxide, other ferroelectric materials (including combinations of hafnium oxide and zirconium oxide), magnetic materials, and mixtures or stacks thereof. In an illustrative embodiment, the bottom electrode comprises tungsten.

[0129] Optionally, the bottom electrode may be patterned or textured, where appropriate, with any suitable morphology, including a flat surface, grooves, through holes, or a nanostructured surface. This list represents typical substrates that may be useful in ferroelectric applications, but should not be considered limiting, as many other suitable compositions and surface patterns are apparent to those skilled in the art. In this regard, it is known that the substrate has a certain influence on the atomic arrangement and phase of the film formed thereon, including affecting the crystal orientation and crystallization temperature of the film. Regardless of the specific substrate and the extent of this influence, the intrinsic ferroelectric material described herein and deposited on such a substrate still has a substantial portion of its volume in the deposited ferroelectric phase. In an illustrative embodiment, the bottom electrode has a low roughness.

[0130] Another embodiment of a method for preparing and depositing an intrinsic ferroelectric material is described herein. In this embodiment, a mixed hafnium oxide and zirconium oxide intrinsic ferroelectric material is prepared and deposited as a layer with a thickness of about 7.5 nm on a stacked substrate of PVD W (which is in direct contact with the ferroelectric material), a thermally grown SiO2 layer, and a Si wafer. The formation of the layer does not require further heat treatment or capping. In this embodiment, the molar ratio of hafnium oxide to zirconium oxide is about 1:1, with an error range of about 10%. The ferroelectric material is prepared and deposited as a layer 301 from vapor by ALD alternating a first cycle 303 (which includes the steps of (i) pulsing (MeCp)2Zr(OMe)Me 304, (ii) purging, (iii) pulsing ozone 305, and (iv) purging) and a second cycle 306 (which includes the steps of (i) pulsing (MeCp)2Hf(OMe)Me 307, (ii) purging, (iii) pulsing ozone 308, and (iv) purging).

[0131] Those skilled in the art will recognize that other precursors such as (MeCp)2HfMe2 and (MeCp)2ZrMe2 and other reactants such as water, hydrogen peroxide or plasma oxygen may also or alternatively be used. Those skilled in the art will further recognize that the pulse and purge times may each vary accordingly depending on the equipment. In one embodiment, the pulse lasts from about 2 to about 3 seconds, followed by a purge of about 10 seconds. In another embodiment, the pulse lasts from about 10 seconds to about 15 seconds, followed by a purge of about 30 seconds to about 60 seconds. In another embodiment, the order of precursor deposition may be reversed.

[0132] Embodiments of methods for preparing and depositing the bottom electrode described herein using CVD. The method includes several steps that can be enhanced with additional and / or optional steps. Step 1 includes providing a substrate at a deposition temperature between about 200° C. and about 500° C., but preferably at or near about 350° C. (e.g., above about 225° C. and at or below about 300° C.) and below 340° C.

[0133] Embodiments of methods for preparing and depositing intrinsic ferroelectric materials described herein using ALD. The method includes several steps that can be enhanced with additional and / or optional steps. Step 1 includes providing a substrate at a deposition temperature between about 265°C and about 500°C, but preferably at or near about 300°C (e.g., above about 285°C and at or below about 300°C) and below 340°C. Step 2 includes: (i) exposing the substrate to a first precursor containing hafnium or zirconium or both hafnium and zirconium that does not decompose at the deposition temperature and (ii) purging. Step 3 includes: (i) exposing the substrate to an oxygen-containing reactive gas and (ii) purging. Step 4 includes: (i) exposing the substrate to a second precursor containing zirconium or hafnium or both hafnium and zirconium that does not decompose at the deposition temperature and (ii) purging. Step 5 includes exposing the substrate to an oxygen-containing reactive gas. Optional step 6 includes repeating steps 2-5 until a film of desired thickness of hafnium oxide and zirconium oxide is formed with a molar ratio between about 1:3 and about 3:1.

[0134] In the methods of the present disclosure, intrinsic ferroelectric materials are formed and deposited as films having a substantial volume fraction of a ferroelectric phase in the as-deposited state (i.e., without further annealing and / or capping), as measured by phase determination techniques or electrical testing (e.g., XRD, XAS, TEM, polarization-voltage testing, piezoelectric force microscopy, or a combination thereof) known to those skilled in the art. Figure 6 The metallocene precursors used and / or available in the method include all those disclosed and discussed above, and particularly include (MeCp)2Zr(OMe)Me, (MeCp)2Hf(OMe)Me, (MeCp)2Zr(Me)2 and (MeCp)2Hf(Me)2. The oxygen-containing reaction gas of step 3 and / or step 5 is preferably ozone. Those skilled in the art will recognize that other reaction gases, including those specifically described above (e.g., water, hydrogen peroxide), may be used.

[0135] In some embodiments, the ferroelectric device 100 can be integrated into a unit cell of a ferroelectric random access memory (FeRAM). In further embodiments, the ferroelectric device can be integrated into a crossbar array or a memory unit cell of a memory device. In some embodiments, the ferroelectric device 100 can be integrated into a neuromorphic computing chip or a synaptic device, such as a synaptic memristor or a synaptic transistor.

[0136] Figure 1 An embodiment of a HZO ferroelectric stack 100 of the present disclosure is illustrated. Figure 1 Shown are a top electrode 102, a ferroelectric material layer 104, a bottom electrode 106, and a substrate 108. In a preferred embodiment, after annealing at 400°C for 2 min in N2, the stack comprises W(5 nm) / HZO(5 nm) / W(5 nm).

[0137] The bottom (first) electrode and the top (second) electrode can be metal or semiconductor electrodes, the thickness of which ensures good conduction. In the illustrated embodiment, the top electrode comprises tungsten. In other embodiments, the top electrode may comprise any of titanium nitride, tungsten, molybdenum, nickel, ruthenium, platinum and aluminum. In the illustrated embodiment, 5nm or 10nm thick W is used. The circular test electrode comprises 50nm of TiN.

[0138] Example

[0139] Reference will now be made to more specific embodiments of the present disclosure and to experimental results providing support for such embodiments.This example given below is intended to more fully illustrate the disclosed subject matter and should not be construed as limiting the disclosed subject matter in any way.

[0140] Device fabrication

[0141] The bottom electrode was grown on a sample with a carrier wafer in a sputtering system. The temperature stated is the set temperature of the chamber. The HZO film was grown by ALD at 330 degrees Celsius and 4% ozone using bis(methylcyclopentadienyl)methoxymethyl-hafnium and bis(methylcyclopentadienyl)methoxymethyl-zirconium precursors. The HZO deposition was followed by W top electrode was deposited. Circular electrodes for electrical testing were defined by shadow mask or by contact photolithography and TiN grown by Endura sputtering chamber at 250 °C. After the W top electrode deposition, a post-metal annealing was performed at 400 °C for 5 min.

[0142] HZO film growth

[0143] The FE HZO film was grown by atomic layer deposition at 330°C with an exposure sequence of (bis(methylcyclopentadienyl)methoxymethyl-hafnium) / ozone / (bis(methylcyclopentadienyl)methoxymethyl-zirconium) / ozone constituting one HZO supercycle. The Hf precursor can also be (MeNCH2CH2Cp)Hf(NMe2)2 and the Zr precursor can also be (MeNCH2CH2Cp)Zr(NMe2)2. Bis(methylcyclopentadienyl)methoxymethyl-hafnium, bis(methylcyclopentadienyl)methoxymethyl-zirconium, (MeNCH2CH2Cp)Hf(NMe2)2 and (MeNCH2CH2Cp)Zr(NMe2)2 are all proprietary chemicals from EMD Electronics. Compared to amide-type precursors, these cyclopentadiene precursors have an ALD window at higher (300°C-400°C) temperatures, allowing a low-temperature PMA process to obtain the desired HZO grains. We deposited the films at 4% ozone concentration. The bis(methylcyclopentadienyl)methoxymethyl-hafnium and bis(methylcyclopentadienyl)methoxymethyl-zirconium precursors were maintained at ampoule temperatures of 125°C and 70°C, respectively, during deposition. Both (MeNCH2CH2Cp)Hf(NMe2)2 and (MeNCH2CH2Cp)Zr(NMe2)2 were maintained at an ampoule temperature of 100°C.

[0144] Embodiment 1

[0145] Figures 2A-2C The results of the optimization process for the bottom electrode are shown in Figure 2. Grown on W. Figure 2A The intensity before and after post-annealing of the metal is shown, demonstrating the transformation of W from the α phase to the β phase. The α phase is more ideal as a bottom electrode because its impedance is about 10 times smaller than that of the β phase.

[0146] Figure 2C The figure shows the grazing incidence XRD patterns of the intrinsic bottom electrode and the ferroelectric material prepared and deposited on the bottom electrode before and after annealing. Figure 2B As shown. The crystal peaks of the materials constituting the layers show monoclinic and non-monoclinic components. By fitting the peaks using the technique described by McBriarty et al., https: / / onlinelibrary.wiley.com / doi / full / 10.1002 / pssb.201900285 and using the peak areas, the calculated monoclinic volume fraction of the materials constituting the layers is less than 25%, which is the preferred maximum volume fraction for monoclinic, non-ferroelectric materials.

[0147] Figure 2B The non-monoclinic peak shift after annealing is shown, indicating the change of HZO crystallinity. Figure 2Cshows an improvement in the remnant polarization after annealing, indicating the stabilization of the desired ferroelectric phase.

[0148] Example II

[0149] Figures 3A-3C The optimization results of the bottom electrode are shown. Figure 3A The surface roughness of the bottom W electrode calculated from the X-ray reflectivity is shown, indicating that the roughness increases with increasing thickness. Figure 3B It shows that W grown at high temperature has a higher α phase ratio. Figure 3C HZO( The remanent magnetization after annealing at 250 degrees Celsius (10 nm) shows a significant improvement.

[0150] Figure 4 The clear ferroelectric polarization of the ferroelectric device at the end of process integration is shown, without the need for a wake-up process to activate the ferroelectricity of the film. After electrical stress, a slight increase in the remnant polarization and a shift in the coercive field are observed.

[0151] For simple metal-FE-metal (MFM) stack fabrication, we deposited W (10 nm) as the bottom electrode (BE) using a PVD process. Then, the HZO film was deposited by ALD. This was followed by a capping layer (5 nm W deposited by PVD) and a 5-minute PMA at 400 degrees Celsius in a N2 atmosphere. The circular top electrode (TE) for electrical testing was TiN defined by a shadow mask and grown in an Endura sputtering chamber at 250 degrees Celsius. The capping layer is then etched by SF6 on this field.

[0152] In the illustrated embodiment, the bottom electrode comprises tungsten. In other embodiments, the top electrode may comprise any one of titanium nitride, molybdenum, ruthenium, platinum and aluminum. In the illustrated embodiment, 5 or 10 nm thick W is used.

[0153] The ferroelectric layer contains Hf x Zr 1-x In alternative embodiments, the ferroelectric layer may include HfO2 doped with La, Y, Gd, Sr, or a combination thereof.

[0154] In the illustrated embodiment, a post metal anneal (PMA) is performed at 400 degrees Celsius for 5 minutes.

[0155] Figure 4 An important observation is that ferroelectric behavior is observed even before the wake-up cycle of the open loop hysteresis. Stress 2.5V 1000 bipolar cycles 1KHz is used for this frequency.

[0156] Figure 5Multi-bit programming (>4 states) to tune the remnant polarization of a ferroelectric capacitor is shown. The device was programmed from + / -1V to + / -2.75V, with programming steps of + / -0.25V. The frequency used for all these experiments was 1KHz.

[0157] Example III

[0158] Figure 6 The effect of the top electrode on the endurance of the ferroelectric device is illustrated. The device was programmed to undergo up to 7.2e+6 cumulative cycles of sweeping from 2.25 V to -2.25 V. The pulse width used for all these experiments was 500 ns. Figure 6 The ferroelectric device with titanium nitride top electrode showed endurance up to 7.2e+6 cycles without failure, compared to early failure at 4.1e+6 cycles for the ferroelectric device with tungsten electrode.

[0159] Figure 7 The effect of the bottom electrode on the leakage response of a ferroelectric device is shown. Figure 7 It was shown that ferroelectric devices with titanium nitride bottom electrodes have lower leakage response (amperes / cm2) at 2 V compared to ferroelectric devices with tungsten bottom electrodes. 2 unit of current density).

[0160] The ferroelectric layer contains Hf x Zr 1-x In alternative embodiments, the ferroelectric layer may include HfO2 doped with La, Y, Gd, Sr, or a combination thereof.

[0161] In the illustrated embodiment, a post metal anneal (PMA) is performed at 400 degrees Celsius for 5 minutes.

[0162] In the illustrated embodiment, the top electrode comprises tungsten or titanium nitride. In other embodiments, the top electrode may comprise any of molybdenum, ruthenium, platinum, and aluminum. In the illustrated embodiment, a 5 nm thick top electrode is used.

[0163] In the illustrated embodiment, the bottom electrode comprises tungsten or titanium nitride. In other embodiments, the bottom electrode may comprise any of molybdenum, ruthenium and platinum. In the illustrated embodiment, a 5 or 20 nm thick bottom electrode is used.

[0164] A further advantage of the present FTJ system is the overall lower thermal budget. It is important for back-end-of-line (BEOL) compatible memories on wafer to be manufactured at temperatures below 400 degrees Celsius in any of its process steps. Typical HZO films are deposited as amorphous due to low temperature ALD processes, which then require high temperature annealing to activate the FE domains. The illustrated method utilizes high temperature ALD precursors, which allow the film to be highly ferroelectric as deposited. Typically, the preferred deposition temperature is between 300°C-350°C, and then a 400°C anneal is sufficient to make it highly stable. This makes the process flow BEOL compatible.

[0165] A further advantage of the present FTJ system is faster read / write operations. Since FTJ relies on tunneling resistance, the device is high impedance in both the low resistance and high resistance states compared to other non-volatile memory technologies such as ReRAM and PCM. While this is desirable from an energy consumption perspective, excessively high impedance requires high voltages to read, leading to reliability issues, and slower pulses resulting in unreasonably slow reads and writes and greater noise generation. Since no dielectric layers are required to establish asymmetry, and the film has a high remnant polarization, the stack can be designed to be thin, but still have enough FE dipoles to create a storage window. This makes the illustrated FTJ stack highly scalable in terms of both the thickness of the ferroelectric device and the area of ​​the device.

[0166] It will be apparent to those skilled in the art that various modifications and variations may be made to the disclosed subject matter and the specific embodiments provided herein without departing from the spirit or scope of the disclosed subject matter. Therefore, the disclosed subject matter, including the description provided by the following embodiments, is intended to cover modifications and variations of the disclosed subject matter within the scope of any claims and their equivalents.

[0167] Materials and methods:

[0168] The metallocene precursor is or may otherwise be prepared according to US Pat. No. 8,568,530, the contents of which are incorporated herein in their entirety.

[0169] After deposition, the films were analyzed on a Bruker D8 Discover diffractometer using a monochromatic Cu X-ray tube (Cu Kα, ) were characterized by grazing incidence RD diffraction. The incident beam angle was fixed at 0.7° and the XRD patterns were collected with a position sensitive detector in the range of 2θ20°-40° with a step size of 0.05°. For ferroelectric testing, TiN top contacts (50 nm thick) were deposited by PVD at 250°C (i.e., a non-annealing temperature lower than that used for ALD growth) in an Applied Materials Endura PVD tool. Circular contacts (diameter 0.203 mm; area 0.032 mm 2) is defined by a shadow mask. Polarization curves were collected using a Radiance Precision II ferroelectric tester and a Cascade probe station. Polarization field data were collected using a bipolar triangle waveform (5kHz, -3V to 3V, 0.25V step size) before and after a ±3V wake-up stress was applied at 1kHz for 1 second. Figure 3C As shown, the remanent polarization (Pr) of the as-deposited layer is greater than 30 μC / cm when measured using a triangular bipolar waveform with a maximum applied field of about 3.8 MV / cm 2 , or greater than 60μC / cm 2 Without being bound by theory, it is expected that the as-deposited layer may have a total loop opening of 2Pr when measured using a triangular bipolar waveform with a maximum applied field of about 3.8 MV / cm 2 or greater, or 30μC / cm 2 or greater, or 40μC / cm 2 or greater remanent polarization (Pr), or 50μC / cm 2 or greater, or 60μC / cm 2 or greater, or 70μC / cm 2 or greater total circulation opening 2Pr.

[0170] Although the present invention has been described and illustrated with a certain degree of detail, it is to be understood that what has been disclosed is illustrative only and that those skilled in the art may make numerous changes in conditions and sequence of steps without departing from the spirit and scope of the present invention.

Claims

1. A ferroelectric device, comprising: Base material; a first electrode and a second electrode, wherein the first electrode is disposed on the substrate; a thin film comprising a crystalline material disposed between the first electrode and the second electrode, the crystalline material comprising hafnium oxide and zirconium oxide, wherein the crystalline material exhibits ferroelectric properties in an as-deposited state; and The first electrode comprises tungsten, titanium nitride, molybdenum, ruthenium or a combination thereof, and the film has a conductivity greater than about 50 μC / cm 2 of the residual polarization.

2. The ferroelectric device of claim 1, wherein the thin film is capable of exhibiting ferroelectric activity without a wake-up period.

3. The ferroelectric device of claim 1, wherein the second electrode comprises titanium nitride, tungsten, molybdenum, or a combination thereof.

4. The ferroelectric device of claim 1, wherein the first electrode has a thickness between about 4 nm and about 50 nm.

5. The ferroelectric device of claim 1, wherein greater than 50% of the total volume of the first electrode is in the alpha phase.

6. The ferroelectric device of claim 1, wherein the crystalline material comprises a ratio of hafnium oxide to zirconium oxide between about 1:3 and about 3:

1.

7. The ferroelectric device of claim 1, wherein the crystalline material is derived from one or more metallocene precursors having Formula I: Formula II: Or formula III: wherein (i) M is selected from Zr and Hf, (ii) R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 are each independently selected from C1-C6 straight-chain alkyl, C1-C6 branched-chain alkyl, C1-C6 halogenated straight-chain alkyl and C1-C6 halogenated branched-chain alkyl, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group.

8. The ferroelectric device of claim 1, wherein the crystalline material is derived from one or more metallocene precursors having Formula I: Formula II: Or formula III: wherein (i) M is selected from Zr and Hf, (ii) R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 are each independently a C1-C6 straight chain alkyl group, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group.

9. The ferroelectric device of claim 1, wherein the crystalline material is derived from one or more metallocene precursors having Formula I: Formula II: Or formula III: wherein (i) M is selected from Zr and Hf, (ii) R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 each is a methyl group, (iii) R 9 is a C1-C4 group selected from -CH2CH2-, -CH2CH2CH2-, -CH(Me)CH2-, -CH2CH(Me)-, -CH2CH2CH2-, -CHMeCH2CH2-, and (iv) R 10 , R 11 and R 12 Each is independently a C1-C6 straight chain alkyl group.

10. The ferroelectric device of claim 1, wherein hysteresis and remanent polarization are present in polarization electric field measurements.

11. The ferroelectric device of claim 1, wherein the film has a thickness of about 0.2 nm to about 10 nm.

12. A method for manufacturing a ferroelectric device, comprising: (i) providing a substrate; (ii) depositing a first electrode on the substrate, wherein the first electrode comprises tungsten, titanium nitride, molybdenum, ruthenium or a combination thereof; (iii) depositing a ferroelectric layer onto the first electrode at a deposition temperature, the ferroelectric layer comprising zirconium and hafnium; (iv) depositing a second electrode onto the ferroelectric layer; as well as (v) annealing the first electrode at a temperature of 400 degrees Celsius or less.

13. The method of claim 12, wherein the annealing step is performed at a temperature greater than about 350 degrees Celsius.

14. The method of claim 12, wherein no process step is performed at a temperature greater than about 400 degrees Celsius.

15. The method of claim 12, wherein the ferroelectric layer comprises hafnium zirconium oxide.

16. The method of claim 12, wherein greater than 50% of the total volume of the first electrode is in the alpha phase.

17. The method of claim 12, wherein the first electrode has a thickness between about 4 nm and about 50 nm.

18. A method for manufacturing a ferroelectric device, comprising: (i) providing a substrate; (ii) depositing a first electrode onto the substrate at a first temperature; (iii) depositing a ferroelectric layer onto the first electrode at a second temperature; and (iv) depositing a second electrode onto the ferroelectric layer; (v) performing an annealing step at a third temperature; The first temperature, the second temperature and the third temperature are lower than or equal to 400 degrees Celsius.

19. The method of claim 18, wherein the first temperature is between about 15 degrees Celsius and about 400 degrees Celsius.

20. The method of claim 18, wherein the first electrode has a thickness between about 4 nm and about 50 nm.

21. The method of claim 18, wherein in the annealing step, the third temperature is greater than or equal to approximately 350 degrees Celsius and less than or equal to 400 degrees Celsius.

22. The method of claim 18, wherein no process step is performed at a temperature above about 400 degrees Celsius.

23. The method of claim 18, wherein the first electrode comprises tungsten, titanium nitride, molybdenum, ruthenium, or a combination thereof; and The second electrode comprises titanium nitride, tungsten, molybdenum or a combination thereof.

24. A ferroelectric device prepared by a process comprising: (i) providing a substrate; (ii) depositing a first electrode onto the substrate, wherein the first electrode comprises tungsten; (iii) depositing a ferroelectric layer onto the first electrode at a deposition temperature, the ferroelectric layer comprising zirconium and hafnium; (iv) depositing a second electrode onto the ferroelectric layer; and (v) annealing the first electrode at a temperature of 400 degrees Celsius or less; The first electrode comprises tungsten, which has a relative humidity greater than 50 μC / cm 2 of the residual polarization.

25. The ferroelectric device of claim 24, wherein no process steps are performed at a temperature greater than about 400 degrees Celsius.

26. The ferroelectric device of claim 24, wherein the ferroelectric layer comprises Hf doped with La, Y, Gd, Ge, Si or Sr. x Zr 1-x O2 or HfO2.

27. The ferroelectric device of claim 24 having a critical dimension of 1000 nm or less, preferably about 300 μm or less.

28. A unit cell of a ferroelectric random access memory device, comprising the ferroelectric device according to claim 1.

29. A crossbar memory array comprising memory unit elements, comprising the ferroelectric device as claimed in claim 1.

30. A neuromorphic computing chip comprising the ferroelectric device of claim 1, wherein the ferroelectric device is a synaptic device.

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