A MEMS device architecture and method of fabrication

Abstract

The application discloses a kind of MEMS device architecture, including cap layer, device layer and substrate layer, cap layer and device layer are bonded, the whole after bonding is bonded with substrate layer, cap layer is manufactured based on first silicon substrate, cavity structure is provided at the bottom of cap layer, high-depth groove structure is provided in cap layer, groove wall of high-depth groove structure is provided with silicon dioxide film, high-depth groove structure is filled with polycrystalline silicon and deposited, the upper surface of first silicon substrate is provided with silicon dioxide layer;Device layer is made based on SOI wafer, including the first silicon structure layer consisting of top layer silicon, buried oxide layer and the second silicon structure layer consisting of back substrate silicon;Substrate layer includes second silicon substrate, bottom cavity is provided on the top surface of second silicon substrate, exhaust hole is opened on the bottom surface of second silicon substrate.The application combines deep groove etching, polycrystalline silicon slot filling and bonding technology, utilizes advanced materials such as SOI wafer and polyimide layer, and realizes excellent signal isolation and flexibility of various MEMS IMU applications.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor technology, and particularly relates to a MEMS device architecture and a preparation method. BACKGROUND

[0002] MEMS (Micro-Electro-Mechanical System) IMU (Inertial Measurement Unit) has a wide range of applications in modern technology, such as smart phones, drones, autonomous driving, industrial automation, aerospace, etc. IMU can detect the acceleration and angular velocity information of an object in real time by integrating accelerometers and gyroscopes. However, there are many challenges in the existing MEMS IMU design, which limits its performance improvement and diversified application requirements.

[0003] Firstly, it is usually necessary to integrate accelerometers and gyroscopes in the same package in MEMS IMU to realize multi-axis measurement function. However, traditional IMU package design usually only supports a single cavity environment (such as vacuum packaging or gas packaging). Accelerometers usually need to work in an environment full of gas to enhance stability and impact resistance by utilizing the damping characteristics of gas; while gyroscopes need to work in a vacuum environment to reduce the influence of air damping, thereby improving sensitivity and signal quality. The different requirements for working environment make it very complex and costly to provide different environments for the two sensors in the same package. The Chinese patent with publication number CN113816331B discloses a hermetic packaging structure with a cavity device, which discloses a packaging structure supporting different gas pressures of double cavities.

[0004] Secondly, the design of MEMS IMU devices needs to balance the sensitivity and stability in each axis direction, but it is often difficult to balance in design. The traditional single-layer or simple multi-layer structure limits the independent adjustment of device layer thickness and geometry, resulting in the sensitivity and response speed being affected in multi-axis measurement. In addition, the implementation of multi-axis measurement usually requires complex mechanical structure design to ensure proper flexibility and movement range in certain directions, while maintaining sufficient rigidity in other directions to reduce interference.

[0005] In addition, as the requirements of modern applications for sensor size, performance and integration are becoming higher and higher, the electrical isolation, signal transmission efficiency and integrated packaging requirements of MEMS IMU devices are also increasing. How to maintain the stability of the mechanical structure while realizing efficient isolation and transmission of electrical signals and avoiding signal interference between different sensors is a key challenge to improve the performance of MEMS IMU. SUMMARY

[0006] The application aims to provide a MEMS device architecture and a preparation method, which can effectively solve the problems of multi-axis measurement, vacuum and gas coexistence packaging, independent device layer design and efficient signal transmission, and have wide application prospect and technical value.

[0007] In order to solve the above problems, the application discloses a MEMS device architecture, which comprises a cap layer, a device layer and a substrate layer, the cap layer and the device layer are bonded, the cap layer and the device layer are bonded with the substrate layer as a whole after bonding, and finally an integrated structure is formed, the bottom of the cap layer in the final formed structure is provided with a cavity structure, a high-depth groove structure is arranged in the cap layer, a silicon dioxide film is arranged on the groove wall of the high-depth groove structure, the high-depth groove structure is filled with polycrystalline silicon, a silicon dioxide layer exists on the surface of the cap layer, a polyimide insulating material layer is coated on the silicon dioxide layer, and a conductive layer is arranged on the polyimide insulating material layer; the device layer in the final formed structure comprises two independent adjustable silicon structure layers, a mixed elastic structure is selectively arranged in the silicon structure, mechanical connection and electrical isolation can be realized on the same mass block, thereby supporting the development of multi-axis devices; meanwhile, the comb tooth structures with different heights can realize high-sensitivity vertical driving and sensing. The top surface of the substrate layer in the final formed structure is provided with a bottom cavity, and the bottom surface of the substrate layer is provided with an exhaust hole. The bottom surface of the second silicon substrate is provided with a silicon epitaxial growth layer. The MEMS device architecture can be used as a potential scheme of a high-performance MEMS accelerometer and gyroscope, can support the common processing of the accelerometer and the gyroscope, and can provide vacuum and gas packaging on the same chip, thereby serving as an effective architecture of a high-performance MEMS IMU.

[0008] The application further discloses a preparation method of the MEMS device architecture.

[0009] S1, a first silicon substrate is provided as the cap layer, and the first silicon substrate is put into an oxidation furnace for thermal oxidation to generate a silicon dioxide layer on the surface of the first silicon substrate;

[0010] S2, a high-depth groove structure is formed on the first silicon substrate by using photoetching and etching;

[0011] S3, secondary thermal oxidation is performed in the high-depth groove structure to form a silicon dioxide film on the groove wall, polycrystalline silicon is filled into the high-depth groove structure by using a low-pressure chemical vapor deposition method, and then the upper surface of the polycrystalline silicon is polished to be flush with the surface of the silicon dioxide layer by using chemical mechanical polishing;

[0012] S4, thinning is first performed on the specified area on the back surface of the first silicon substrate, then photoetching and etching are performed, the oxidation layer is removed at the preset position, and then cavity structures with different depths are formed in sequence, which are used for bonding with the device layer;

[0013] S5, provide SOI wafer as device layer, the SOI wafer includes top layer silicon, buried oxide layer and backing substrate; the SOI wafer is placed in oxidation furnace and is oxidized, and a layer of silicon dioxide insulation layer is generated on the surface; in order to realize different height silicon structure later, first, the selected different regions are selectively thinned oxide layer.

[0014] S6, the device layer is coated with photoresist, and the patterns of the accelerometer and the gyroscope are transferred to the photoresist layer by a stepper photolithography machine; using a plasma etching device, deep silicon etching is carried out in the area exposed by the lithography pattern, forming the device structure of the first silicon structure layer, and etching to the SOI buried oxide layer;

[0015] S7, continue to thin the top oxide layer until the silicon structure layer of the selected region is exposed, and etch the silicon structure layer to a preset height. By wet etching or dry etching, the oxide layer is removed to obtain a silicon device structure with different heights.

[0016] S8, provide a second silicon substrate as a substrate layer, etch a bottom cavity on the top surface of the second silicon substrate for accommodating the movement of the device structure, etch an exhaust hole on the back surface of the second silicon substrate, and form an oxide layer by thermal oxidation process;

[0017] S10, before bonding, the cap layer and the device layer are surface cleaned, and then surface activated, the cap layer and the device layer are directly bonded in a dust-free environment; the cap layer and the device layer are melt-bonded in a dust-free environment; the bottom silicon layer after bonding is ground and thinned to a preset height.

[0018] S11, the back of the whole is deep silicon etched, and then the oxide layer is removed by dry etching or wet etching to release the designed cantilever beam and free mass structure, ensuring the free movement of the device structure. At this time, the backing substrate of the original SOI wafer can also be used as a second silicon structure layer to provide flexibility for the design of the device. The first and second silicon structures can be selectively provided with a hybrid elastic structure, and mechanical connection and electrical isolation can be realized on the same mass block, thereby supporting the development of multi-axis devices.

[0019] S12, the bonded cap layer and device layer assembly are high-temperature fusion bonded with the substrate layer, and annealed at 800 DEG C for 3 hours.

[0020] As a further improvement of the above technical solution:

[0021] Further comprising:

[0022] After melt-bonding the cap layer and the device layer in a dust-free environment, annealing at 400 DEG C for 2 hours is further included.

[0023] Further comprising:

[0024] S13, after the bonding is completed, the oxide layer of the substrate sealing portion is removed by using a wet etching or dry etching, a local vacuum environment or inert gas such as nitrogen is filled in the epitaxial growth cavity by adjusting the pressure and gas environment in the epitaxial growth cavity through a silicon epitaxial process, and after the epitaxial growth is completed, the trench and the channel are quickly sealed, so that the vacuum or gas packaging is realized in the closed cavity, the epitaxial layer is used as a sealing material, a stable airtight packaging layer can be formed on the substrate, so that the exhaust hole is closed, the required vacuum cavity of the gyroscope is formed, the area where the accelerometer is located is kept in a gas environment, a gas cavity is formed, and the wafer packaging of vacuum and gas coexistence is realized.

[0025] Preferably, unlike the sealing method in S13, it further comprises:

[0026] S14, the optional vacuum packaging method can also be realized by laser packaging, the oxide layer of the substrate sealing portion is removed by using a wet etching or dry etching, the sealing area is locally melted and sealed by heating the sealing area through a precise laser beam, and a stable sealing structure-laser sealing layer is formed. During the laser heating process, the silicon in the exhaust hole area is quickly melted and solidified again, so that the hole is sealed, and the vacuum state in the device cavity is ensured. The process realizes the local area melting and sealing by controlling the laser power, exposure time and focus position, and does not affect the performance of other areas of the device, and can effectively maintain the required gas or vacuum environment.

[0027] Further comprising:

[0028] S15, an oxide layer is deposited on the surface of the packaged wafer, and a polyimide insulating material layer is coated, and a metal wiring pattern is formed in a specified area through photolithography, a conductive layer is deposited on the surface by using sputtering or electroplating technology, and the thickness is 1 mu m, which is used to form a redistribution layer, and then, surface planarization treatment is performed through chemical mechanical polishing.

[0029] Further comprising:

[0030] S16, the wafer is cut, each IMU unit is separated from the wafer, and the IMU chip is packaged on a substrate with pins by using flip chip technology.

[0031] Compared with the prior art, the beneficial effects of the present application are:

[0032] 1. Improve design flexibility: through two independently adjustable device layers, the thickness and structure of the device layer can be independently optimized to meet the specific needs of different sensors, greatly improving the design adaptability.

[0033] 2. Optimized sensor performance: The design of the flexible structure enables the device to have controllable movement ability in certain directions while maintaining high rigidity in other directions, thereby improving the measurement accuracy and anti-interference ability of the MEMSIMU, suitable for multi-axis measurement applications.

[0034] 3. Realization of vacuum and gas coexistence packaging: Through the design of double cavity and partition packaging, it realizes the support of vacuum cavity and gas cavity in the same packaging, provides the best working environment for accelerometer and gyroscope respectively, thereby effectively improving the accuracy and stability of the sensor.

[0035] 4. Enhanced electrical isolation: Through TSV technology and multi-layer metallization design, efficient signal transmission and electrical isolation between device layers and external circuits are realized, reducing signal interference and improving the stability and accuracy of the sensor.

[0036] 5. Lower manufacturing cost and higher integration: Using bonding and laminated packaging process, the manufacturing process is simplified, the production cost is reduced, and at the same time, the accelerometer and gyroscope can be efficiently integrated in the same chip, realizing a smaller size high-performance MEMSIMU.

[0037] 6. Higher reliability and packaging quality: Using epitaxial sealing or laser sealing technology, high-quality hermetic packaging is realized, ensuring the stability and reliability of the device in long-term work, effectively prolonging the service life of the IMU. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figure 1 The whole structure schematic diagram of the invention using silicon epitaxial packaging;

[0039] Figure 2 The whole structure schematic diagram of the invention using laser packaging;

[0040] Figure 3 One of the cap layer process flow schematic diagrams of the invention;

[0041] Figure 4 The second cap layer process flow schematic diagram of the invention;

[0042] Figure 5 The device layer process flow schematic diagram of the invention;

[0043] Figure 6 The substrate layer process flow schematic diagram of the invention.

[0044] Reference numerals: 1, cap layer; 100, first silicon substrate; 101, silicon dioxide layer; 102, silicon dioxide film; 103, polysilicon; 104, cavity structure; 2, device layer; 201, top layer silicon; 202, buried oxide layer; 203, back substrate; 3, substrate layer; 300, second silicon substrate; 301, bottom layer cavity; 302, exhaust hole; 303, silicon epitaxial growth layer; 304, substrate oxide layer; 305, laser sealing layer; 401, polyimide insulating material layer; 402, conductive layer; 403, oxide layer. DETAILED DESCRIPTION

[0045] In order to make the technical means, creative features, purposes and effects realized by the present application easy to understand, the present application will be further described below in conjunction with specific embodiments.

[0046] In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are only for the purpose of description and cannot be understood as indicating or implying relative importance.

[0047] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "provided with", "connection" and the like should be understood broadly, for example, "connection" can be fixed connection, can also be detachable connection, or integral connection; can be mechanical connection, can also be electrical connection; can be directly connected, can also be indirectly connected through an intermediate medium, can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0048] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0049] As Figure 1As shown, the MEMS device architecture of the embodiment includes a cap layer 1, a device layer 2 and a substrate layer 3, the cap layer 1 and the device layer 2 are bonded, and the device layer 2 and the substrate layer 3 are bonded, and the three layers form an overall structure through multiple bonding. The cap layer 1, the device layer 2 and the substrate layer 3 are manufactured respectively, and then assembled, and the whole packaged device forms a zero-level air-tightness, which ensures stable environmental control of the device during operation.

[0050] The cap layer 1 includes a first silicon substrate 100, the bottom of the first silicon substrate 100 is provided with a cavity structure 104, a high-depth groove structure is arranged in the first silicon substrate 100, a silicon dioxide film 102 is arranged on the groove wall of the high-depth groove structure, the high-depth groove structure is filled with polycrystalline silicon 103, a silicon dioxide layer 101 is arranged on the upper surface of the first silicon substrate 100, a polyimide insulating material layer 401 is coated on the silicon dioxide layer 101, and a conductive layer 402 is arranged on the polyimide insulating material layer 401; The manufacturing of the cap layer is based on a highly doped silicon substrate. First, the silicon substrate is subjected to thermal oxidation treatment to form a uniform silicon dioxide layer on the surface. Then, a deep silicon etching process is used to form a deep groove structure with a high aspect ratio in the silicon wafer. A silicon dioxide film is generated on the inner wall of the deep groove through thermal oxidation, which not only provides electrical insulation but also passivates dangling bonds and relieves stress. Next, chemical vapor deposition is used to fill the polycrystalline silicon, and then chemical mechanical polishing is used to flatten the surface to ensure accurate control of flatness and thickness. Finally, by performing two deep etchings on the back surface in selected areas, cavity structures with different depths are manufactured to support subsequent device packaging.

[0051] The device layer 2 includes a top layer silicon 201, a buried oxide layer 202 and a back substrate 203, and the device layer is manufactured using an SOI (Silicon-On-Insulator) substrate. A uniform silicon dioxide layer is formed on the surface of the single crystal silicon of the SOI substrate through thermal oxidation or chemical vapor deposition process. Then, a deep silicon etching process is used in specific areas through photolithography, and the structure is released through dry or wet etching process, and finally the complete MEMS device structure (first silicon structure layer) is formed. The present application specially designs two independently adjustable device layers. The back substrate 203 of the SOI can be used as the second silicon structure layer, or two independent device layers can be manufactured in the same chip through double SOI wafer, and the thickness, geometry and function of the two device layers can be independently designed and optimized, which enhances the design flexibility. In the manufacturing process of the device layer, by designing microstructures such as cantilever beam, elastic support and folded beam, combined with the anisotropic properties of the material, a directional flexible structure is constructed. This structure enables the device to move freely in a specified direction while maintaining high rigidity in other directions. This design greatly improves the sensitivity and anti-interference ability of the accelerometer and gyroscope, which helps to improve the measurement accuracy of the device.

[0052] The substrate 3 includes a second silicon substrate 300. A bottom cavity 301 is formed on the top surface of the second silicon substrate 300, and vent holes 302 are formed on the bottom surface of the second silicon substrate 300. A silicon epitaxial growth layer 303 is formed on the bottom surface of the second silicon substrate 300. The substrate manufacturing process is based on the silicon substrate. Through two deep silicon etching processes on the front and back sides, the cavity and vent hole structures for packaging are formed, respectively. These cavities and vent holes help to create a vacuum environment during the packaging process, while ensuring the hermeticity of the package.

[0053] This embodiment discloses a method for fabricating a MEMS device architecture, including the following steps:

[0054] S1. Select a highly doped first silicon substrate 100 with a diameter of 100 mm and a thickness of 500 μm as the capping layer 1, such as Figure 3 As shown, it is placed in an oxidation furnace for thermal oxidation, and a silicon dioxide layer 101 with a thickness of 500 nm is generated at a high temperature of 1100℃.

[0055] S2. A deep trench structure with a depth of 300 μm is formed on the first silicon substrate 100 using photolithography and etching to facilitate subsequent filling with polysilicon.

[0056] S3. Secondary thermal oxidation is performed in the deep trench structure to form a silicon dioxide thin film 102 with a thickness of 200nm on the trench wall to provide electrical insulation and stress buffer. Polycrystalline silicon 103 is filled into the deep trench using a low-pressure chemical vapor deposition method to realize signal transmission and improve the mechanical strength and impact resistance of the structure. The upper surface of polycrystalline silicon 103 is polished to be flush with the surface of silicon dioxide layer 101 using chemical mechanical polishing to ensure flatness.

[0057] S4, such as Figure 4 As shown, the back side of the first silicon substrate 100 is first thinned in a designated area, followed by photolithography and etching. After removing the oxide layer at a preset location, two cavity structures 104 with different depths of 50 μm and 100 μm are formed. These structures provide sufficient space for the internal micromechanical structures (such as mass blocks, cantilever beams, etc.) to move freely, allowing them to vibrate or deflect without restriction. This cavity also isolates the influence of the external environment, protecting sensitive components from dust, moisture, or other contaminants. Cavities of different depths meet the different space requirements of moving parts, providing suitable ranges of motion, thereby avoiding collisions and optimizing gas damping effects. Deep cavities are typically used to reduce damping and improve the Q value, while shallow cavities may be designed as stable regions requiring a certain level of damping. Simultaneously, structural strength can be optimized by adjusting stress distribution and isolating motion or electrical signal paths, achieving higher performance and reliability. After removing the oxide layer and performing surface treatment, the capping layer 1 is flipped over for bonding with the device layer 2.

[0058] S5, select a 100 mm diameter, thickness of 500 μm SOI wafer as device layer 2, the top layer of silicon 201 thickness of 40 μm, buried oxide layer 202 thickness of 2 μm, back substrate 203 thickness of 460 μm; the SOI wafer is put into the oxidation furnace, oxidation treatment is carried out at 1100 DEG C high temperature, and the oxidation time is 2 hours, and a thickness of 200 nm silicon dioxide insulation layer is generated. In order to realize the different height of silicon structure later, the selected different area is first subjected to selective oxidation layer thinning, as shown in Figure 5 .

[0059] S6, the device layer is coated with photoresist, and the designed accelerometer and gyroscope pattern is transferred to the photoresist layer by using a stepper photolithography machine. Deep silicon etching is carried out in the area exposed by the photoetching pattern using a plasma etching device, and the etching depth is 40 μm, until the thickness of the top layer of silicon 201 is reached, forming the suspension beam and free mass block structure of the accelerometer and gyroscope.

[0060] S7, continue to thin the top silicon dioxide insulation layer until the silicon structure layer of the selected area is exposed, and etch the silicon structure layer to the preset height. The top oxide layer is removed by wet etching or dry etching to obtain a silicon device structure with different heights.

[0061] S8, select a second silicon substrate 300 with a thickness of 500 μm as the substrate layer 3, as shown in Figure 6 , a bottom cavity 301 with a depth of 300 μm is formed on the top surface, which is used to accommodate the movement of the device structure and provide protection for the sensitive structure. Subsequently, an exhaust hole 302 with a depth of 200 μm is etched on the back surface to provide a gas flow channel during the subsequent vacuum sealing process.

[0062] S10, before bonding, the cap layer 1 and the device layer 2 are surface cleaned, and then surface activated treatment is carried out. The cap layer 1 and the device layer 2 are fusedly bonded in a dust-free environment, and annealed at 400 DEG C for 2 hours to improve the bonding strength. The bottom silicon layer after bonding is ground and thinned to 100 μm.

[0063] S11, back deep silicon etching is carried out on the whole after bonding, and then the oxide layer is removed by dry etching or wet etching to release the designed suspension beam and free mass block structure, ensuring the free movement of the device structure. At this time, the back substrate 203 of the original SOI wafer can also be used as the second silicon structure layer to provide flexibility for the design of the device. The first and second silicon structures can be selectively provided with a hybrid elastic structure, and mechanical connection and electrical isolation can be realized on the same mass block, thereby supporting the development of multi-axis devices.

[0064] S12, high-temperature fusion bonding of the combined cap layer 1 and device layer 2 body and the substrate layer 3, annealing at 800°C for 3 hours.

[0065] S13, after bonding, remove the oxide layer of the substrate sealing part by wet etching or dry etching, use silicon epitaxy process to form a local vacuum environment or fill inert gas such as nitrogen by adjusting the pressure and gas environment in the epitaxial growth cavity, after epitaxial growth, quickly seal the trench and channel, so as to realize vacuum or gas packaging in the closed cavity, the epitaxial layer as a sealing material can form a stable airtight packaging layer on the substrate, thereby sealing the exhaust hole, forming the required vacuum cavity of the gyroscope, and the area where the accelerometer is located maintains a gas environment, forming a gas cavity, thereby realizing the coexistence of vacuum and gas packaging.

[0066] In addition, the optional vacuum packaging method can also be realized by laser packaging, as shown in Figure 2 The oxide layer of the substrate sealing part is removed by wet etching or dry etching, and the sealing area is locally melted and sealed by precise laser beam heating to form a stable laser sealing layer 305. During laser heating, the silicon in the exhaust hole area is quickly melted and solidified again, thereby realizing hole sealing and ensuring the vacuum state in the device cavity. This process precisely realizes local area sealing by controlling laser power, exposure time and focal point position, without affecting the performance of other areas of the device, and can effectively maintain the required gas or vacuum environment.

[0067] S14, coat a layer of polyimide insulating material 401 on the surface of the packaged wafer, and form a metal wiring pattern in the specified area by photolithography, and deposit a conductive layer 402 on the surface by sputtering or electroplating technology, with a thickness of 1 μm, for forming a redistribution layer. Subsequently, surface planarization treatment is performed by chemical mechanical polishing.

[0068] S15, cut the wafer to separate each IMU unit from the wafer, and use flip-chip technology to package the IMU chip onto a substrate with pins.

[0069] The above description is merely that of the embodiments of the present application, and the common knowledge and characteristics in the art are not described in detail. It is obvious for those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, and the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in all aspects as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and all changes falling within the meaning and range of the equivalent elements of the claims are intended to be encompassed by the present application. Any reference signs in the claims should not be considered as limiting the involved claims.

Claims

1. A MEMS device architecture, characterized by, It comprises a cap layer (1), a device layer (2) and a substrate layer (3), the cap layer (1) and the device layer (2) are bonded, and the whole after bonding and the substrate layer (3) are bonded, The cap layer (1) is manufactured based on a first silicon substrate (100), the bottom of the cap layer (1) is provided with a cavity structure (104), a high-depth groove structure is arranged in the cap layer (1), the groove wall of the high-depth groove structure is provided with a silicon dioxide film (102), the high-depth groove structure is filled with polycrystalline silicon (103), and the upper surface of the first silicon substrate (100) is provided with a silicon dioxide layer (101); The device layer (2) is made of an SOI wafer, comprising a first silicon structure layer composed of a top layer of silicon (201), a buried oxide layer (202) and a second silicon structure layer composed of a back substrate (203); on the device layer (2), a cantilever beam and a free mass block structure of an accelerometer and a gyroscope are formed; The substrate layer (3) comprises a second silicon substrate (300), the top surface of the second silicon substrate (300) is provided with a bottom cavity (301), and the bottom surface of the second silicon substrate (300) is provided with an exhaust hole (302); the bottom cavity (301) is used for partition packaging, and the exhaust hole (302) and a packaging process are used to obtain a gas cavity and a vacuum cavity corresponding to the accelerometer and the gyroscope.

2. The MEMS device architecture of claim 1, wherein, A polyimide insulating material layer (401) is coated on the silicon dioxide layer (101), and a conductive layer (402) is formed in the polyimide insulating material layer (401).

3. The MEMS device architecture of claim 1 or 2, wherein, The packaging process comprises a silicon epitaxial growth layer (303) arranged on the bottom surface of the second silicon substrate (300).

4. The MEMS device architecture of claim 1 or 2, wherein, The packaging process comprises a laser sealing layer (305) arranged on the bottom surface of the second silicon substrate (300) for sealing the exhaust hole (302).

5. A method of fabricating a MEMS device architecture as claimed in claim 1 or 2, characterized in that, The method comprises the following steps: S1, the manufacturing of the cap layer (1) is based on a highly doped first silicon substrate (100), which is first put into an oxidation furnace for thermal oxidation to generate a uniform silicon dioxide layer (101) on the surface of the first silicon substrate (100); S2, a high-depth groove structure with a high aspect ratio is formed on the first silicon substrate (100) by using photolithography and deep silicon etching process; S3, secondary thermal oxidation is carried out in the high-depth groove structure to form a silicon dioxide film (102) on the groove wall, and then polycrystalline silicon (103) is filled into the high-depth groove structure by using low-pressure chemical vapor deposition method, and then the upper surface of the polycrystalline silicon (103) is polished to be flush with the surface of the silicon dioxide layer (101) by using chemical mechanical polishing; S4, the back surface of the first silicon substrate (100) is first thinned, then photolithography and etching are carried out, the oxide layer is removed at the preset position, then cavity structures (104) with different depths are formed in sequence, and the oxide layer is removed and the surface is treated, and the cap layer (1) is flipped for bonding with the device layer (2); S5, provide SOI wafer as device layer (2), the SOI wafer includes top layer silicon (201), buried oxide layer (202) and back substrate (203), the SOI wafer is placed in oxidation furnace and is oxidized, and a layer of silicon dioxide insulation layer is generated on the surface, and the first selective oxidation layer thinning is carried out to selected different regions, so as to prepare for realizing different height silicon structures later; S6, the top of the oxidation layer of device layer (2) is coated with photoresist, and the patterns of the accelerometer and the gyroscope are transferred to the photoresist layer by using a stepper photolithography machine, and a deep silicon etching is carried out in the area exposed by the lithography pattern using a plasma etching equipment, so as to form the device structure of the first silicon structure layer and etch to the SOI buried oxide layer (202); S7, continue to thin the top oxidation layer until the silicon structure layer of the selected region is exposed, and the silicon structure layer is etched to a preset height, and the oxidation layer is removed by wet etching or dry etching to obtain a silicon device structure with inconsistent height; S8, provide a second silicon substrate (300) as a substrate layer (3), etch a bottom cavity (301) on the top surface of the second silicon substrate (300) for accommodating the movement of the device structure, etch an exhaust hole (302) on the back surface of the second silicon substrate (300), and form an oxidation layer (304) by a thermal oxidation process; S10, before bonding, the cap layer (1) and the device layer (2) are surface cleaned, and then surface activation treatment is carried out, and the cap layer (1) is fusedly bonded with the device layer (2) in a dust-free environment; Grind and thin the bottom silicon layer after bonding to a preset height; S11, backside deep silicon etching is carried out on the whole after bonding, and then the oxidation layer is removed by dry etching or wet etching to release the designed cantilever beam and free mass structure, so as to ensure the free movement of the device structure, at this time, the back substrate (203) of the original SOI wafer becomes a second silicon structure layer; The first silicon structure layer and the second silicon structure are provided with a hybrid elastic structure; S12, the bonded combination of the cap layer (1) and the device layer (2) is high-temperature fusion bonded with the substrate layer (3), and annealing is carried out at 800°C for 3 hours.

6. The production method according to claim 5, characterized by, After the cap layer (1) and the device layer (2) are fusedly bonded in a dust-free environment, annealing is further carried out at 400°C for 2 hours.

7. The production method according to claim 6, characterized by, Further comprising: S13, after bonding, a local vacuum environment or inert gas such as nitrogen is formed by adjusting the pressure and gas environment in the epitaxial growth cavity through silicon epitaxial process, after epitaxial growth is completed, the trench and the channel are quickly sealed, so as to realize vacuum or gas packaging in the closed cavity, the epitaxial layer acts as a sealing material, and a stable airtight packaging layer can be formed on the substrate, so as to close the exhaust hole, form a vacuum cavity required by the gyroscope, and the area where the accelerometer is located remains a gas environment, so as to form a gas cavity, thereby realizing wafer packaging coexisting with vacuum and gas.

8. The production method according to claim 7, characterized by, Further comprising: S14, the packaging method is realized by laser packaging, the sealing area is heated by precise laser beam, the exhaust hole (302) is locally melted and sealed, a stable laser sealing layer (305) is formed, and in the laser heating process, the silicon in the exhaust hole area is quickly melted and re-solidified, so that the hole is sealed and the vacuum state in the device cavity is ensured.

9. The production method according to claim 8, characterized by, Also includes: S15, after the wafer is packaged, the surface of the deposited oxide layer (403) is coated with a layer of polyimide insulating material (401), and a metal wiring pattern is formed in the specified area by photolithography. Sputtering or electroplating technology is used to deposit a conductive layer (402) on the surface, and then surface planarization treatment is performed by chemical mechanical polishing.

10. The method of claim 9, wherein, Also includes: S16, the wafer is cut, each IMU unit is separated from the wafer, and the IMU chip is packaged onto a substrate with pins using flip-chip technology.

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