Method and device for detecting flatness of silicon polished wafer

Abstract

The invention relates to a method and a device for detecting the flatness of a silicon polished section, and the method comprises the following steps: a point light source is expanded by a beam expander and then passes through a spectroscope G1 with one side plated with a semi-transparent and semi-reflective film to generate reflected light and transmitted light, and the reflected light is vertically incident to a plane total reflection mirror M1; transmission light passes through a compensating mirror G2 parallel to the spectroscope G1 and then is vertically incident to a plane total reflection mirror M2, M1 and M2 are arranged vertically to reflect the incident light and then return to the semitransparent and semi-reflective film of the spectroscope G1, and after transmission and reflection, a reference interference fringe image is presented at an imaging area F through a focusing lens L2; replacing the plane total reflection mirror M2 with a silicon wafer to be detected, adjusting the position of the plane total reflection mirror M1, and presenting an interference fringe image of the silicon wafer to be detected at the imaging area F; and the image is processed and calculated through a computer to obtain the flatness parameter of the silicon polished wafer to be measured. The method has the characteristics of non-contact property, good automation degree and the like, and has a very considerable development prospect.

Description

Technical Field

[0001] The invention relates to the technical field of micro-displacement measurement, and in particular to a detection method and a detection device for measuring the flatness of a silicon polishing sheet based on the moiré fringe principle. Background Art

[0002] As we all know, in the semiconductor field, silicon wafers play a vital role as the basic component of various components. For processed silicon polished wafers, the surface flatness directly affects the yield and energy efficiency of components. In the past silicon wafer polishing process, most people used high-power microscopes for local inspection and strong light to check scratches and pits on the surface of silicon wafers. However, this operation is not only slow and low in accuracy, but also difficult to automate. Therefore, with the large-scale development of integrated circuits today, it is necessary to design a better and more accurate detection technology to be applied to the detection process of silicon polished wafer flatness. Summary of the invention

[0003] The purpose of the present invention is to provide a method and a device for detecting the flatness of a silicon polishing wafer.

[0004] The technical solution adopted by the present invention is: a method for detecting the flatness of a silicon polishing wafer, the steps are as follows: The light beam emitted by the point light source S1 is expanded by the beam expander L1 and then passes through the beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light. The reflected light is vertically incident on the plane total reflection mirror M1, and the transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and then is vertically incident on the plane total reflection mirror M2. M1 and M2 are arranged perpendicularly to each other to reflect the incident light and then return to the semi-transparent and semi-reflective film of the beam splitter G1. After transmission and reflection, respectively, the reference interference fringe image is presented at the imaging area F through the focusing lens L2, and the image is stored for later use; S2, replace the plane total reflection mirror M2 with the silicon polished wafer to be tested, and then adjust the position of the plane total reflection mirror M1 through the displacement adjustment mechanism so that the interference fringe image of the silicon wafer to be tested appears in the imaging area F, and store the image for later use; S3. The reference interference fringe image and the interference fringe image of the silicon wafer to be tested obtained in the above steps are input into a computer. The computer performs grayscale processing on the two images respectively and superimposes and rotates them to form a moiré fringe image. The grayscale matrix of the grayscale image is formed by grayscale calculation, and then the flatness parameters of the silicon polished wafer to be tested are obtained by computer processing.

[0005] As a preferred solution, in step S1, the compensation mirror G2 is set to make the two beams participating in the interference pass through the beam splitter the same number of times, and no additional optical path difference is caused by the glass material when reaching the imaging area.

[0006] As a preferred solution, in step S1, the position of the plane total reflection mirror M2 is fixed.

[0007] As a preferred solution, in step S3, the specific process of computer processing is as follows: S3.1. Use a CCD camera to obtain the reference interference fringe image and the interference fringe image of the silicon wafer to be tested respectively and input them into a computer. Use software to perform uniform processing of brightness saturation to increase the resolution of the image. The generated grayscale matrix has a cell value within 10 in the dark area and is clearly distinguished from the bright area. S3.2, the grayscale image is obtained and the center and width of the bright stripes are identified. The image uses vertical stripes as detection samples, and the position of the stripes is retrieved by horizontal grayscale value retrieval. First, a light and dark separation value w1 is introduced. The separation value w1 is about 20-45. Grayscale cells are retrieved row by row. When the grayscale value is greater than the set separation value, the length is added by 1 and recorded until the brightness is lower than the separation value. The length is recorded, and the position of half the length is used as the center point of the stripes and the data is recorded at the same time. Then the length variable is cleared and the detection is continued. This process is repeated until the entire row is retrieved, and then the next row is retrieved and the results are uniformly recorded in another matrix. S3.3, collecting the spacing and filtering out unreasonable spacing, and obtaining a reasonable moiré fringe grayscale image; S3.4. Sort the stripe spacings generated in the previous step, select the median as the standard spacing, and compare all reasonable spacings with the standard spacing in turn to obtain the difference in order between them. Then calculate the corresponding concave and convex depths, and take the maximum value of these depths to obtain the maximum concave and convex depth of the plane. The maximum concave and convex depth value is the flatness parameter of the silicon polished wafer to be tested.

[0008] The present scheme also includes a detection device used in a method for detecting the flatness of a silicon polished wafer, wherein the detection device is composed of a point light source S, a beam expander L1, a compensation mirror G2, a plane total reflection mirror M1, a plane total reflection mirror M2, a focusing lens L2, and a silicon polished wafer to be tested, wherein the plane total reflection mirror M1 is installed on a displacement adjustment mechanism and its position is adjustable, the light beam emitted by the point light source S is expanded by the beam expander L1 and then passes through a beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light, the reflected light is vertically incident on the plane total reflection mirror M1, the transmitted light passes through a compensation mirror G2 parallel to the beam splitter G1 and then is vertically incident on the plane total reflection mirror M2, M1 and M2 are arranged perpendicular to each other, reflect the incident light and then return it to the semi-transparent and semi-reflective film of the beam splitter G1, and after transmission and reflection respectively, a reference interference fringe image is presented at an imaging area F through the focusing lens L2, during detection, the plane total reflection mirror M2 is replaced with the silicon polished wafer to be tested, and finally the interference fringe image of the silicon wafer to be tested is displayed at the imaging area F.

[0009] As a preferred solution, the compensating mirror G2 of the beam splitter G1 has the same shape, the same material and the same thickness.

[0010] As a preferred solution, a side of the beam splitter G1 close to the plane total reflection mirror M2 is coated with a semi-transparent and semi-reflective film.

[0011] As a preferred solution, the displacement adjustment mechanism includes an outer shell that accommodates the plane total reflection mirror M1, a precision screw and a drum wheel. One end of the precision screw is connected to the plane total reflection mirror M1, and the other end passes through the outer shell and is connected to the drum wheel. The plane total reflection mirror M1 is driven up and down by rotating the drum wheel.

[0012] As a preferred solution, the detection device also includes a computer for processing the obtained reference interference fringe image and the interference fringe image of the silicon wafer to be tested and calculating data, and the flatness parameters of the silicon polished wafer to be tested are obtained through computer processing.

[0013] The beneficial effects of the present invention are: Based on the defects of the prior art, the present application provides a method for detecting the flatness of silicon polished wafers. The method uses a simple optical path combined with the principle of moiré fringe formation, and assists computer grayscale recognition to detect the surface flatness of the silicon wafer. The outline and center position of the bright stripes are read by grayscale with the help of computer grayscale recognition technology, and then the spacing of the normal stripes is divided into 10 equal parts and 100 equal parts that are difficult for the human eye to detect. This makes it possible to achieve a 0.1 or 0.01 energy level for the extreme difference in the energy of the stripes between the abnormal point and the surrounding normal point. In this way, the detection accuracy is improved by 10 times or even 100 times compared with the prior art. This method has the characteristics of non-contact and good automation. In the future, it is expected to be applied in the fields of surface flatness detection of precision instruments and nanomaterial flatness detection, and has a very promising development prospect.

[0014] At the same time, the detection device has the advantages of simple structure, high detection accuracy, small space occupation, low cost, fast measurement speed and easy automation. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 It is a structural schematic diagram of the detection device of the present invention; Figure 2It is a schematic diagram of the principle of the moiré fringe measurement technology in the present invention; Figure 3 It is a schematic diagram of the principle of the detection device of the present invention; Figure 4 A schematic diagram of the distortion of interference fringes obtained after replacing the silicon wafer to be tested; Figure 5 Interference fringe images obtained by detecting silicon wafer No. 1 and silicon wafer No. 2. DETAILED DESCRIPTION

[0017] The present invention is described in detail below by way of exemplary embodiments. However, it should be understood that, without further description, elements, structures and features in one embodiment may also be beneficially combined in other embodiments.

[0018] It should be noted that, unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the invention belongs. The words "one", "an" or "the" and the like used in the patent application specification and claims of the present invention do not express quantitative limitations, but indicate the existence of at least one. Words such as "include" or "comprise" indicate that the elements or objects appearing before "include" or "comprises" include the elements or objects listed after "include" or "comprises" and their equivalents, but do not exclude other elements or objects with the same function.

[0019] In order to more clearly describe the specific detection process of a method for detecting the flatness of a silicon polished wafer and the structural composition of the detection device, Figure 1-5 The detailed description is as follows: As shown in the figure, a device for detecting the flatness of a silicon polishing wafer is shown. Figure 1 As shown, the detection device consists of a point light source S, a beam expander L1, a compensation mirror G2, a plane total reflection mirror M1, a plane total reflection mirror M2, a focusing lens L2 and a silicon polished wafer to be tested, wherein the plane total reflection mirror M1 is installed on a displacement adjustment mechanism and its position is adjustable, the light beam emitted by the point light source S is expanded by the beam expander L1 and then passes through a beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light, the reflected light is vertically incident on the plane total reflection mirror M1, the transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and then is vertically incident on the plane total reflection mirror M2, M1 and M2 are arranged perpendicular to each other, reflect the incident light and then return it to the semi-transparent and semi-reflective film of the beam splitter G1, and after transmission and reflection respectively, a reference interference fringe image is presented at the imaging area F through the focusing lens L2, during detection, the plane total reflection mirror M2 is replaced with the silicon polished wafer to be tested, and finally the interference fringe image of the silicon wafer to be tested is displayed at the imaging area F.

[0020] In the device, the beam splitter G1 and the compensating mirror G2 have the same shape, the same material and the same thickness.

[0021] In the device, a side of the beam splitter G1 close to the plane total reflection mirror M2 is coated with a semi-transparent and semi-reflective film.

[0022] It should be noted that the displacement adjustment mechanism H in the device is an existing mature technology, and its purpose is to achieve the adjustment of the displacement of the plane total reflection mirror M1. Technical personnel in this field can select suitable mechanical components to achieve the above purpose. In this embodiment, the displacement adjustment mechanism H is implemented using the following structure: it includes an outer shell that accommodates the plane total reflection mirror M1, a precision screw and a drum wheel, one end of the precision screw is connected to the plane total reflection mirror M1, and the other end passes through the outer shell and is connected to the drum wheel, and the plane total reflection mirror M1 is driven up and down by rotating the drum wheel.

[0023] The detection device also includes a computer that processes the obtained fringe image and calculates data. By processing the obtained Moire fringe image with the help of computer grayscale recognition technology, the flatness parameters of the silicon polished wafer to be tested are finally obtained, thereby realizing the detection of surface defects of the silicon wafer and amplifying the defects at that location.

[0024] The principle of the above-mentioned moiré fringe measurement technology is as follows: Moiré fringes are fringes formed at the intersection of two groups of line clusters overlapping each other. Since moiré fringes reflect the difference in spatial frequency between the two groups of line clusters (i.e., the beat frequency), they have synchronization and amplification effects, so they can be used to measure some small changes in angles, phases, etc. With the improvement of optoelectronic technology, moiré fringe measurement technology has developed rapidly and has been widely used in displacement measurement, digital control, etc.

[0025] There are two striped paper with similar frequencies, such as Figure 2 As shown in (a), after tilting one of the stripes, two pieces of document paper are slowly overlapped, and smaller stripes will appear. Figure 2 (b) According to the principle of right triangle, the grating pitch d is equal to half the sine value of the two grating feet compared to the distance B of the moiré fringes. Figure 2 As shown in (c), when this angle is small, it can be approximated that sin(a / 2)=a / 2. , the distance B between adjacent moiré fringes can be obtained.

[0026] Based on the above content, we can know that moiré fringes have the following two properties: First, synchronization: while keeping the intersection angle of the two gratings constant, one grating is fixed and the other grating moves in the vertical direction of the grating lines. For every movement of a grating pitch d, the moiré fringes move a fringe pitch B; Second, amplification effect: from the formula, we can know that when the intersection angle a of the two gratings is very small, it is equivalent to magnifying the grating pitch by 1 / a times. The moiré fringes can synchronously amplify the very small grating displacement into the displacement of the moiré fringes.

[0027] Based on the moiré fringe principle, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested are input into the computer. The computer performs grayscale processing on the two images respectively, and then superimposes and rotates them to form a moiré fringe grayscale image. The grayscale matrix of the grayscale image is formed by grayscale calculation, and the fringe spacing is detected according to the grayscale value. The specific method is as follows: In order to simplify the computer workload, we uniformly use fringes with approximate values ​​as processing images.

[0028] Step 1: Image and processing. In this experiment, a CCD camera is used to obtain the reference interference fringe image and the interference fringe image of the silicon wafer to be tested and input them into the computer. Photoshop software is used to uniformly process the brightness saturation to increase the resolution of the image. The generated grayscale matrix has a cell value within 10 in the dark area and a clear fault distinction with the bright area. The second step is to obtain the grayscale image and identify the center and width of the bright stripes. Since the image uses vertical stripes as detection samples, we use the horizontal grayscale value retrieval method to retrieve the position of the stripes. First, we need to introduce a light and dark separation value w1 (that is, the fault point of the light and dark stripes in grayscale). The selected separation value is about 20 to 45. The core idea of ​​the algorithm for retrieving the center position and width of the bright stripes is to search the grayscale cells one by one by row. When the grayscale value is greater than the separation value we set, the length is recorded with 1, until the brightness is lower than the separation value, the length is recorded, and the position of half the length is used as the center point of the stripes. Record the data at the same time, then clear the length variable and continue the detection, and so on. Until the entire row is retrieved, search the next row and record the results in another matrix; The third step is to collect the spacing and filter out unreasonable spacing. The method used is still to traverse row by row, and perform difference processing on the positions of the center points of the stripes in the same row in turn. The result should be the spacing of each row of stripes. We take the average of all spacings and set the third parameter w3 as the range in which reasonable spacing should exist in theory. We use (1-w3)*mean<reasonable spacing<(1+w3)*mean as the theoretical reasonable range of spacing. Points outside the range will be identified as abnormal points and filtered out to obtain a reasonable moiré fringe grayscale image; The fourth step is to sort the stripe spacing generated in the previous step, select the median as the standard spacing, and compare all reasonable spacings with the standard spacing in turn to obtain the difference in order between them, and then calculate the corresponding concave and convex depths, and take the maximum value of these depths to obtain the maximum concave and convex depth of the plane. The maximum concave and convex depth value is the flatness parameter of the silicon polished wafer to be tested.

[0029] Based on the above content, we designed a non-contact, large-scale, high-precision silicon polishing wafer flatness detection method based on the moiré fringe principle. The steps are as follows: Step 1: Figure 3 As shown, the point light source S is transformed into an expanded light source through the beam expander L1, and the expanded light source generates reflected light and transmitted light through the beam splitter G1 coated with a semi-transparent and semi-reflective film on one side, and the reflected light is vertically incident on the plane total reflection mirror M1, and the transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and then vertically incident on the plane total reflection mirror M2, and M1 and M2 are arranged perpendicular to each other to reflect the incident light and then return to the semi-transparent and semi-reflective film of the beam splitter G1, and after transmission and reflection respectively, a reference interference fringe image is presented at the imaging area F through the focusing lens L2; Step 2: Replace the plane total reflection mirror M2 with the silicon polished wafer to be tested, and then adjust the position of the plane total reflection mirror M1 through the displacement adjustment mechanism so that the interference fringe image of the silicon wafer to be tested appears at the imaging area F; Step 3: Input the reference interference fringe image obtained in the above steps and the interference fringe image of the silicon wafer to be tested into a computer. The computer performs grayscale processing on the two images respectively, superimposes and rotates them to form a Moire fringe image, forms a grayscale matrix of the grayscale image through grayscale calculation, and then obtains the flatness parameters of the silicon polished wafer to be tested through computer processing.

[0030] In step 1 of the method, the position of the plane total reflection mirror M2 is fixed.

[0031] In step 1 of the method, a compensating mirror G2 is set so that the two beams of light participating in the interference pass through the beam splitter the same number of times, and no additional optical path difference is caused by the glass material when reaching the imaging area; at the same time, when G1 and G2 are strictly parallel, circular ring fringes corresponding to equal-inclination interference will be generated.

[0032] In step 2 of this method, since the surface of the silicon wafer is not flat and has depressions or protrusions, the thickness of the air film formed is no longer uniform, which will inevitably cause the interference fringe image distortion, such as Figure 4 shown.

[0033] Test Example 1: Select silicon wafer No. 1 from a batch of processed silicon polished wafers, calibrate the detection device, place its plane total reflection mirrors M1 and M2 according to the device diagram and adjust them until the reference interference fringes can be observed in the imaging area; then replace the M2 mirror with silicon wafer No. 1, and keep the M1 mirror unchanged, and test and obtain the interference fringes image of the silicon wafer to be tested, such as Figure 5 As shown, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested are input into the computer, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested after computer grayscale processing are superimposed and rotated to form moiré fringes, and computer-assisted processing is used to obtain 28782 available data, and the maximum deformation depth is 22.168nm.

[0034] Test Example 2: Select silicon wafer No. 2 from a batch of processed silicon polished wafers, calibrate the detection device, place its plane total reflection mirrors M1 and M2 according to the device diagram and adjust them until the reference interference fringes can be observed in the imaging area; replace the M2 mirror with silicon wafer No. 2, perform the test and obtain the interference fringes image of the silicon wafer to be tested, such as Figure 5 As shown, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested are input into the computer, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested after computer grayscale processing are superimposed and rotated to form moiré fringes, and computer-assisted processing is used to obtain 25,370 available data with a maximum deformation depth of 28.957 nm.

[0035] The parts not described in detail in this embodiment are prior art.

[0036] It should be noted that although the present invention is described by the above embodiments, the present invention may also have other various embodiments. Without departing from the spirit and scope of the present invention, it is obvious that those skilled in the art may make various corresponding changes and deformations to the present invention, but these changes and deformations should all fall within the scope of protection of the appended claims of the present invention and their equivalents.

Claims

1. A method for detecting the flatness of a silicon polished wafer, characterized in that: Here are the steps: The light beam emitted by the point light source S1 is expanded by the beam expander L1 and then passes through the beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light. The reflected light is vertically incident on the plane total reflection mirror M1, and the transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and then is vertically incident on the plane total reflection mirror M2. M1 and M2 are arranged perpendicularly to each other to reflect the incident light and then return to the semi-transparent and semi-reflective film of the beam splitter G1. After transmission and reflection, respectively, the reference interference fringe image is presented at the imaging area F through the focusing lens L2, and the image is stored for later use; S2, replace the plane total reflection mirror M2 with the silicon polished wafer to be tested, and then adjust the position of the plane total reflection mirror M1 through the displacement adjustment mechanism so that the interference fringe image of the silicon wafer to be tested appears in the imaging area F, and store the image for later use; S3. The reference interference fringe image and the interference fringe image of the silicon wafer to be tested obtained in the above steps are input into a computer. The computer performs grayscale processing on the two images respectively and superimposes and rotates them to form a moiré fringe image. The grayscale matrix of the grayscale image is formed by grayscale calculation, and then the flatness parameters of the silicon polished wafer to be tested are obtained by computer processing.

2. A method for detecting the flatness of a silicon polishing wafer according to claim 1, characterized in that: In step S1, the compensation mirror G2 is set to ensure that the two light beams participating in the interference pass through the beam splitter the same number of times, and no additional optical path difference is caused by the glass material when they reach the imaging area.

3. A method for detecting the flatness of a silicon polishing wafer according to claim 1, characterized in that: In step S1, the position of the plane total reflection mirror M2 is fixed.

4. A method for detecting the flatness of a silicon polishing wafer according to claim 1, characterized in that: In step S3, the specific process of computer processing is as follows: S3.

1. Use a CCD camera to obtain the reference interference fringe image and the interference fringe image of the silicon wafer to be tested respectively and input them into a computer. Use software to perform uniform processing of brightness saturation to increase the resolution of the image. The generated grayscale matrix has a cell value within 10 in the dark area and is clearly distinguished from the bright area. S3.2, the grayscale image is obtained and the center and width of the bright stripes are identified. The image uses vertical stripes as detection samples, and the position of the stripes is retrieved by horizontal grayscale value retrieval. First, a light and dark separation value w1 is introduced. The separation value w1 is about 20-45. Grayscale cells are retrieved row by row. When the grayscale value is greater than the set separation value, the length is added by 1 and recorded until the brightness is lower than the separation value. The length is recorded, and the position of half the length is used as the center point of the stripes and the data is recorded at the same time. Then the length variable is cleared and the detection is continued. This process is repeated until the entire row is retrieved, and then the next row is retrieved and the results are uniformly recorded in another matrix. S3.3, collecting the spacing and filtering out unreasonable spacing, and obtaining a reasonable moiré fringe grayscale image; S3.

4. Sort the stripe spacings generated in the previous step, select the median as the standard spacing, and compare all reasonable spacings with the standard spacing in turn to obtain the difference in order between them. Then calculate the corresponding concave and convex depths, and take the maximum value of these depths to obtain the maximum concave and convex depth of the plane. The maximum concave and convex depth value is the flatness parameter of the silicon polished wafer to be tested.

5. A detection device used in a method for detecting the flatness of a silicon polished wafer according to any one of claims 1 to 4, characterized in that: The detection device consists of a point light source S, a beam expander L1, a compensation mirror G2, a plane total reflection mirror M1, a plane total reflection mirror M2, a focusing lens L2 and a silicon polished wafer to be tested, wherein the plane total reflection mirror M1 is installed on a displacement adjustment mechanism and its position is adjustable, the light beam emitted by the point light source S is expanded by the beam expander L1 and then passes through a beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light, the reflected light is vertically incident on the plane total reflection mirror M1, the transmitted light passes through a compensation mirror G2 parallel to the beam splitter G1 and then is vertically incident on the plane total reflection mirror M2, M1 and M2 are arranged vertically to each other, reflect the incident light and then return it to the semi-transparent and semi-reflective film of the beam splitter G1, and after transmission and reflection respectively, a reference interference fringe image is presented at an imaging area F through the focusing lens L2, during detection, the plane total reflection mirror M2 is replaced with the silicon polished wafer to be tested, and finally the interference fringe image of the silicon wafer to be tested is displayed at the imaging area F.

6. The detection device according to claim 5, characterized in that: The beam splitter G1 and the compensating mirror G2 have the same shape, the same material and the same thickness.

7. The detection device according to claim 5, characterized in that: A side of the beam splitter G1 close to the plane total reflection mirror M2 is coated with a semi-transparent and semi-reflective film.

8. The detection device according to claim 5, characterized in that: The displacement adjustment mechanism includes an outer shell accommodating a plane total reflection mirror M1, a precision screw and a drum wheel. One end of the precision screw is connected to the plane total reflection mirror M1, and the other end passes through the outer shell and is connected to the drum wheel. The plane total reflection mirror M1 is driven up and down by rotating the drum wheel.

9. The detection device according to claim 5, characterized in that: The detection device also includes a computer for processing the obtained reference interference fringe image and the interference fringe image of the silicon wafer to be tested and calculating data, and the flatness parameters of the silicon polished wafer to be tested are obtained through computer processing.

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