Addressable nanoelectrodes fabricated using nanowire arrays and methods thereof

Abstract

The application relates to an addressable nanoelectrode prepared by using a nanowire array and a method thereof, and belongs to the technical field of nanoelectrodes. The substrate is provided with a nanowire array, a metal lead, a metal pad and a copper wire, the nanowire array is flush with the substrate, the nanowire array is connected with the metal lead, the metal lead is connected with the metal pad, the metal pad is connected with the copper wire, and the copper wire extends to the outside of the substrate; the nanowire array, the metal lead, the metal pad and the copper wire are provided with a resin layer. The method is as follows: substrate preparation; nanowire array processing; metal lead and metal pad processing; addressable nanoelectrode processing; electrochemical performance test. The application can efficiently and repeatedly prepare the nanowire array with high consistency, the processed nanowire array has an ultralong size and a controllable size interval, is easy to transfer and position, and is convenient for subsequent packaging. The addressable nanoelectrode is prepared simply, efficiently and at low cost, and the application of the addressable nanoelectrode in multiple fields is realized.

Description

Technical Field

[0001] This invention relates to an addressable nanoelectrode and its method fabricated using a nanowire array, belonging to the field of nanoelectrode technology. Background Technology

[0002] Nanoelectrodes have been widely used in electrochemical sensing technology due to their significant advantages, such as high current density, fast response rate, low detection limit, and low ohmic voltage drop. However, single nanoelectrodes face challenges in practical applications, including weak current signals, limited detection range, and low detection throughput. These issues restrict the application potential of nanoelectrodes in efficient and high-precision electrochemical sensing.

[0003] Array electrodes, by integrating multiple nanoelectrodes, effectively enhance the current signal and broaden the detection range, overcoming the limitations of single nanoelectrodes. However, array electrodes typically exhibit a monolithic response characteristic in electrochemical sensing processes, meaning all electrodes are at the same potential or operating state, lacking independent control mechanisms. Therefore, although array electrode technology improves the current signal and detection range to some extent, the detection throughput remains limited, and the need for multiple detections increases the risk of electrode contamination.

[0004] Addressable nanoelectrodes enable independent control of each electrode simultaneously, allowing different voltages or currents to be applied to different electrodes to explore various electrochemical reaction mechanisms. This parallel operation capability significantly shortens electrochemical detection time, improves detection efficiency, and reduces the risk of contamination during a single detection process, thereby enhancing detection accuracy. Addressable nanoelectrodes typically consist of three parts: a nanoelectrode array, metal leads, and metal pads. During fabrication, to obtain nanoelectrode arrays with controllable dimensions and high precision, researchers often employ top-down methods, such as chemical etching and photolithography. Meanwhile, the fabrication of the leads is crucial for ensuring the stability and reliability of signal transmission; therefore, high-precision fabrication methods such as focused electron beam (FEB), focused ion beam (FIB), and electron beam lithography (EBL) are commonly used. However, these fabrication processes typically involve multi-step precision machining, requiring sophisticated equipment and processes, resulting in high costs and poor scalability.

[0005] In summary, although addressable nanoelectrode technology shows great potential in the field of electrochemical sensing, the high requirements of its fabrication process limit its widespread application. Therefore, how to simply and efficiently fabricate structurally stable and scalable addressable nanoelectrodes has become an urgent technical challenge to be solved. Summary of the Invention

[0006] To address the problems existing in the background art, the present invention provides an addressable nanoelectrode and its method for fabrication using a nanowire array.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] A method for fabricating addressable nanoelectrodes using nanowire arrays, the method comprising the following steps:

[0009] S1: Substrate preparation;

[0010] S101: Select the surface with S on the upper surface i Single-crystal silicon wafers with an O2 layer;

[0011] S102: Cut the monocrystalline silicon wafer into a rectangle;

[0012] S103: The rectangular monocrystalline silicon wafer is ultrasonically cleaned sequentially by anhydrous ethanol-acetone-anhydrous ethanol-ultrapure water.

[0013] S104: Use high-purity air to dry the rectangular single-crystal silicon wafer obtained in S103;

[0014] S105: The rectangular single-crystal silicon wafer obtained in S104 is subjected to oxygen plasma treatment to obtain a hydrophilic substrate.

[0015] S2: Nanowire array fabrication;

[0016] S201: After mixing PDMS and curing agent at a mass ratio of 10:1, place them in a vacuum dryer for degassing treatment;

[0017] S202: Pour the PDMS obtained in S201 onto a silicon template with micron-scale array trenches and then cure it to obtain a PDMS mold with micron-scale array trenches.

[0018] S203: After mixing the resin and curing agent at a mass ratio of 25:3, place them in a vacuum dryer for degassing treatment;

[0019] S204: Resin is poured onto the surface of a PDMS mold and then cured to obtain a resin block containing micron-scale arrayed grooves;

[0020] S205: Gold plating on the surface of resin blocks;

[0021] S206: After cutting the gold-coated resin block, place it in a silicone embedding mold, inject resin, and then cure it to obtain a cuboid embedding block.

[0022] S207: Nano-slice the embedded block to obtain a nanowire array.

[0023] S20701: After rotating the embedding block, polish the bottom of the embedding block until the bottom surface of the gold film is exposed;

[0024] S20702: Trim the embedded block into a rectangular shape with a square bottom;

[0025] S20703: Slice the bottom surface of the gold film at the bottom of the embedded block to obtain a resin sheet containing a nanowire array, i.e., a nanowire array.

[0026] S3: Metal lead wire and metal pad processing;

[0027] S301: First spin-coat photoresist on the substrate at a speed of 500 r / min for 5 s, then spin-coat photoresist at a speed of 4000 r / min for 120 s;

[0028] S302: Perform pre-baking, exposure, post-baking, and development on the process part obtained in S301;

[0029] S303: Photoresist in non-exposed areas dissolves and detaches;

[0030] S304: Deposit a gold layer on a substrate;

[0031] S305: The remaining photoresist is removed from the process device obtained in S304 using oxygen plasma etching to prepare the required metal leads and metal pads.

[0032] S4: Addressable nanoelectrode fabrication;

[0033] S401: Transfer the nanowire array to the hydrophilically treated substrate surface and adjust the nanowire array and metal leads to complete the alignment and overlap;

[0034] S402: Overlap the corresponding copper wire at the center of each metal pad;

[0035] S403: Place the process part obtained in S402 into a silicone embedding mold, pour in resin to cover the nanowire array, metal leads and metal pads, and obtain an addressable nanoelectrode sample after curing.

[0036] S404: The addressable nanoelectrode sample is trimmed and polished. The end of the nanowire array that is not connected to the metal lead is trimmed until the end face of the addressable nanoelectrode sample is flush with the end face of the nanowire array to obtain the addressable nanoelectrode.

[0037] S5: Electrochemical performance test.

[0038] The present invention discloses an addressable nanoelectrode fabricated using a nanowire array, comprising a substrate, a nanowire array, metal leads, metal pads, copper wires, and a resin layer. The upper end of the substrate is provided with the nanowire array, metal leads, metal pads, and copper wires. The upper end of the nanowire array is flush with the upper end of the substrate. The lower ends of the nanowire array are connected to the upper ends of corresponding metal leads. The lower end of each metal lead is connected to the upper end of a corresponding metal pad. The middle portion of each metal pad is connected to the upper end of a corresponding copper wire. The lower end of each copper wire extends to the outside of the substrate. A resin layer is provided at the upper ends of the nanowire array, metal leads, metal pads, and copper wires.

[0039] Compared with the prior art, the beneficial effects of the present invention are:

[0040] This invention uses S with a thickness of 280nm i Using a single-crystal silicon wafer with an O2 layer as the test substrate, and a silicon wafer with micron-scale array trenches as a template, nanowire arrays are fabricated by combining soft lithography, magnetron sputtering, and nanoslicing techniques. This allows for the repeated and efficient fabrication of highly consistent nanowire arrays. The fabricated nanowire arrays have ultra-long dimensions and controllable spacing, are easy to transfer and position, and facilitate subsequent packaging. Metal leads and pads are then fabricated on the substrate using ultraviolet lithography combined with physical vapor deposition. Finally, a simple alignment technique is used to connect the nanowire array and the leads, completing the fabrication of addressable nanoelectrodes. This method provides a simple, efficient, and low-cost fabrication of addressable nanoelectrodes, and allows for applications in multiple fields by controlling the number, spacing, and length of the nanowire array and metal leads. Attached Figure Description

[0041] Figure 1 This is a flowchart of the nanowire array fabrication process;

[0042] Figure 2 This is a flowchart of the fabrication process for metal leads and metal pads;

[0043] Figure 3 This is a process diagram of addressable nanoelectrode fabrication. Detailed Implementation

[0044] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0045] A method for fabricating addressable nanoelectrodes using nanowire arrays, the method comprising the following steps:

[0046] S1: Preparation of substrate 1;

[0047] S101: Select S with an upper surface thickness of 280nm. i Single-crystal silicon wafers with an O2 layer;

[0048] S102: Cut the monocrystalline silicon wafer into a rectangle of 2cm × 3cm;

[0049] S103: The rectangular single-crystal silicon wafer is ultrasonically cleaned for 6 minutes each by passing it through anhydrous ethanol, acetone, anhydrous ethanol, and ultrapure water.

[0050] S104: Use high-purity air to dry the rectangular single-crystal silicon wafer obtained in S103;

[0051] S105: The rectangular single-crystal silicon wafer obtained in S104 is subjected to oxygen plasma treatment to obtain a surface-hydrophilized substrate 1.

[0052] S2: The fabrication of the nanowire array 2 is mainly achieved through soft photolithography transfer technology, magnetron sputtering technology and nano-slicing technology;

[0053] S201: Mix PDMS Sylgard 184 (manufactured by DowCorining, USA) at a mass ratio of 10:1 with the curing agent, and then place the mixture in a vacuum dryer for 30 minutes to remove air bubbles.

[0054] S202: After casting the PDMS obtained in S201 onto a silicon template with micron-scale array trenches, it is placed in an 80°C oven for 3 hours to cure, thereby obtaining a PDMS mold with micron-scale array trenches.

[0055] S203: Mix Epo-fix resin (produced by Struers A / S, Denmark) with curing agent at a mass ratio of 25:3, stir thoroughly, and then place in a vacuum dryer for 30 minutes to remove air bubbles.

[0056] S204: After pouring resin onto the surface of a PDMS mold, cure at room temperature for 12 hours to obtain a resin block containing micron-scale array trenches;

[0057] S205: A 100nm gold film is deposited on the surface of the resin block using magnetron sputtering technology;

[0058] S206: After the gold-coated resin block is appropriately cut, it is placed in a silicone embedding mold and resin is injected. After curing at room temperature for 12 hours, a rectangular embedding block with dimensions of 14×5×3mm (length×width×height) is obtained.

[0059] S207: Nanoscale slicing of the embedded block to obtain nanowire array 2. The slicing process was mainly carried out using a commercial ultramicrotome (EMUC7) from Leica GmbH, Germany.

[0060] S20701: After rotating the embedding block with a glass cutter, polish the bottom of the embedding block until the bottom surface of the gold film is exposed. The polishing speed is 100mm / s and the polishing thickness is 200nm.

[0061] S20702: Trim the embedding block into a rectangular shape with a square base (300um × 300um);

[0062] S20703: Use a straight-edged diamond scalpel to slice the bottom surface of the gold film at the bottom of the embedded block. The slicing speed is 1 mm / s, the slicing direction is parallel to the surface of the metal microstructure, and the slice thickness is 100 nm; obtain a resin sheet containing a nanowire array, i.e., nanowire array 2.

[0063] S3: The metal lead 3 and metal pad 4 are processed mainly by ultraviolet lithography combined with thermal evaporation process;

[0064] S301: Spin coat the photoresist onto the prepared substrate 1 at a speed of 500 r / min for 5 s, and then spin coat the photoresist at a speed of 4000 r / min for 120 s. Use negative photoresist (SU-82015) produced by MicroChem, USA for UV lithography.

[0065] S302: Perform pre-baking, exposure, post-baking, and development on the process part obtained in S301;

[0066] S303: Photoresist in non-exposed areas dissolves and detaches;

[0067] S304: A 150nm thick gold layer is deposited on substrate 1 using a thermal evaporation process;

[0068] S305: The remaining photoresist is removed by oxygen plasma etching of the process device obtained in S304, thus preparing the required metal leads 3 and metal pads 4 on the substrate.

[0069] S4: Addressable nanoelectrode fabrication: This includes processes such as the connection of nanowire arrays and metal leads, the connection of copper wire 5 and metal pads, overall encapsulation, and polishing.

[0070] S401: The nanowire array 2 is scooped up using the scooping ring of the slicer, and the nanowire array 2 is transferred from the water tank to the surface of the hydrophilic substrate 1. Under a stereomicroscope, a hair fiber pen is used to make controllable micro-adjustments to the resin sheet so that the nanowire array 2 and the metal lead 3 are aligned and overlapped.

[0071] S402: A copper wire 5 with a diameter of 0.1mm is overlapped at the center of each metal pad 4, and conductive silver paste 7 is used to connect them to ensure current conduction. AB glue is used as a fixing material to bond the copper foil to the center of the metal pad.

[0072] S403: Place the process part obtained in S402 into a silicone embedding mold, pour in resin to cover the nanowire array 2, metal lead 3 and metal pad 4, cure at room temperature for 12 hours, and then obtain a well-encapsulated addressable nanoelectrode sample.

[0073] S404: The addressable nanoelectrode sample is trimmed and polished using an ultrathin slicer. The end of the nanowire array 2 that is not connected to the metal lead 3 is trimmed until the end face of the addressable nanoelectrode sample is flush with the end face of the nanowire array 2, thus exposing the end face of the nanowire array 2 and obtaining the addressable nanoelectrode.

[0074] S5: Electrochemical performance test.

[0075] The addressable nanoelectrode was subjected to cyclic voltammetry in a 1 mmol / L ferrocene methanol aqueous solution, with a supporting electrolyte of 0.5 mol / L KCl aqueous solution, a potential range of -0.1 V to 0.6 V, and a scan rate of 0.1 V / s. The obtained cyclic voltammetric pattern was a standard S-shape, indicating that the addressable nanoelectrode had been successfully prepared.

[0076] The present invention discloses an addressable nanoelectrode fabricated using a nanowire array, comprising a substrate 1, a nanowire array 2, metal leads 3, metal pads 4, copper wires 5, and a resin layer 6. The upper end of the substrate 1 is provided with the nanowire array 2, metal leads 3, metal pads 4, and copper wires 5. The upper end of the nanowire array 2 is flush with the upper end of the substrate 1. The lower ends of the nanowire array 2 are connected to the upper ends of corresponding metal leads 3. The lower end of each metal lead 3 is connected to the upper end of a corresponding metal pad 4. The middle portion of each metal pad 4 is connected to the upper end of a corresponding copper wire 5. The lower end of each copper wire 5 extends to the outside of the substrate 1. The upper ends of the nanowire array 2, metal leads 3, metal pads 4, and copper wires 5 are provided with the resin layer 6.

[0077] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of the equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0078] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for fabricating addressable nanoelectrodes using nanowire arrays, characterized in that: The method includes the following steps: S1: Preparation of substrate (1); S1 includes the following steps: S101: Select a single-crystal silicon wafer with a SiO2 layer on the upper surface; S102: Cut the monocrystalline silicon wafer into a rectangle; S103: The rectangular monocrystalline silicon wafer is ultrasonically cleaned sequentially by anhydrous ethanol-acetone-anhydrous ethanol-ultrapure water. S104: Use high-purity air to dry the rectangular single-crystal silicon wafer obtained in S103; S105: The rectangular single-crystal silicon wafer obtained in S104 is subjected to oxygen plasma treatment to obtain a surface-hydrophilized substrate (1). S2: Fabrication of nanowire array (2); S2 includes the following steps: S201: After mixing PDMS and curing agent at a mass ratio of 10:1, place them in a vacuum dryer for degassing treatment; S202: Pour the PDMS obtained in S201 onto a silicon template with micron-scale array trenches and then cure it to obtain a PDMS mold with micron-scale array trenches. S203: After mixing the resin and curing agent at a mass ratio of 25:3, place them in a vacuum dryer for degassing treatment; S204: Resin is poured onto the surface of a PDMS mold and then cured to obtain a resin block containing micron-scale arrayed grooves; S205: Gold plating on the surface of resin blocks; S206: After cutting the gold-coated resin block, place it in a silicone embedding mold, inject resin, and then cure it to obtain a cuboid embedding block. S207: Nano-slice the embedded block to obtain a nanowire array (2); S207 includes the following steps: S20701: After rotating the embedding block, polish the bottom of the embedding block until the bottom surface of the gold film is exposed; S20702: Trim the embedded block into a rectangular shape with a square bottom; S20703: Slice the bottom surface of the gold film at the bottom of the embedded block to obtain a resin sheet containing a nanowire array, i.e., a nanowire array (2). S3: Processing of metal leads (3) and metal pads (4); S3 includes the following steps: S301: First spin-coat photoresist on substrate (1) at a speed of 500r / min for 5s, then spin-coat photoresist at a speed of 4000r / min for 120s; S302: Perform pre-baking, exposure, post-baking, and development on the process part obtained in S301; S303: Photoresist in non-exposed areas dissolves and detaches; S304: Deposit a gold layer on the substrate (1); S305: The remaining photoresist is removed from the process device obtained in S304 by oxygen plasma etching to prepare the required metal leads (3) and metal pads (4). S4: Addressable nanoelectrode fabrication; S4 includes the following steps: S401: Transfer the nanowire array (2) to the surface of the hydrophilically treated substrate (1) and adjust the nanowire array (2) and metal leads (3) to complete the alignment and overlap; S402: Overlap the corresponding copper wire (5) at the center of each metal pad (4); S403: Place the process part obtained in S402 into a silicone embedding mold, pour in resin to cover the nanowire array (2), metal leads (3) and metal pad (4), and obtain an addressable nanoelectrode sample after curing; S404: The addressable nanoelectrode sample is trimmed and polished. The end of the nanowire array (2) that is not connected to the metal lead (3) is trimmed until the end face of the addressable nanoelectrode sample is flush with the end face of the nanowire array (2) to obtain the addressable nanoelectrode. S5: Electrochemical performance test.

2. An addressable nanoelectrode prepared by the method for preparing addressable nanoelectrodes using nanowire arrays according to claim 1, characterized in that: The substrate includes a substrate (1), a nanowire array (2), metal leads (3), metal pads (4), copper wires (5), and a resin layer (6). The upper end of the substrate (1) is provided with a nanowire array (2), metal leads (3), metal pads (4), and copper wires (5). The upper end of the nanowire array (2) is flush with the upper end of the substrate (1). The lower end of the nanowire array (2) is connected to the upper end of the corresponding metal leads (3). The lower end of each metal lead (3) is connected to the upper end of the corresponding metal pad (4). The middle part of each metal pad (4) is connected to the upper end of the corresponding copper wire (5). The lower end of each copper wire (5) extends to the outside of the substrate (1). The upper end of the nanowire array (2), metal leads (3), metal pads (4), and copper wires (5) is provided with a resin layer (6).

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