Surface plasmon photolithography imaging structure, method and computer readable medium

Abstract

The application provides a surface plasmon lithography imaging structure, a method and a computer readable medium, comprising: a reflective layer, a photoresist, a first resonant cavity structure and a mask layer; the reflective layer is arranged on one side of a structure to be etched; the photoresist is arranged on the side of the reflective layer away from the structure to be etched; the first resonant cavity structure is arranged on the side of the photoresist away from the structure to be etched; and the mask layer is arranged on the side of the first resonant cavity structure away from the structure to be etched; by arranging the first resonant cavity structure between the mask layer and the photoresist of the surface plasmon lithography imaging structure, the localization effect of the light field is enhanced, the diffraction limit is further broken, the imaging performance is optimized, and the resolution is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductors, and in particular to a surface plasmon lithography imaging structure, method and computer readable medium. BACKGROUND

[0002] With the development of semiconductor-related technologies, one of the important technologies for manufacturing semiconductor devices, lithography technology, is also rapidly developing. Traditional optical lithography technology relies on optical imaging principles, and by irradiating a mask with a light source and projecting the mask pattern onto a substrate coated with photoresist, the mask pattern is copied and transferred. However, as integrated circuits continue to develop towards higher density and smaller size, traditional lithography technology faces a serious resolution bottleneck and is difficult to meet the needs of micron-level or even nanometer-level manufacturing. Traditional optical lithography technology mainly includes deep ultraviolet lithography (DUVL) and extreme ultraviolet lithography (EUVL).

[0003] Surface plasmon lithography technology, as a supplement to mainstream lithography technology, is very different from traditional optical lithography technology. Surface plasmon lithography technology uses evanescent near-field imaging containing high-frequency information, thereby breaking through the diffraction limit in traditional lithography.

[0004] However, how to further break through the diffraction limit and improve the resolution using surface plasmon lithography technology is a problem that needs to be solved. SUMMARY

[0005] Therefore, the purpose of the present application is to provide a surface plasmon lithography imaging structure, method and computer readable medium, which can further break through the diffraction limit and improve the resolution using the surface plasmon lithography imaging structure.

[0006] To achieve the above-mentioned purpose, the present application has the following technical solutions:

[0007] The present application provides a surface plasmon lithography imaging structure, comprising:

[0008] a reflective layer disposed on one side of a structure to be etched;

[0009] The reflective layer is provided with a photoresist on the side away from the structure to be etched;

[0010] The photoresist is provided with a first resonant cavity structure on the side away from the structure to be etched;

[0011] The first resonant cavity structure is provided with a mask layer on the side away from the structure to be etched.

[0012] Optionally, the first resonant cavity structure comprises a first laminated structure, the first laminated structure comprises a first metal layer and a first dielectric layer, and the first dielectric layer is arranged on a side of the first metal layer away from the structure to be etched.

[0013] Optionally, a second resonant cavity structure is arranged between the reflective layer and the structure to be etched.

[0014] Optionally, the second resonant cavity structure comprises at least one second laminated structure, the second laminated structure comprises a second metal layer and a second dielectric layer, and the second dielectric layer is arranged on a side of the second metal layer away from the structure to be etched.

[0015] Optionally, the thickness of the second resonant cavity structure is greater than the thickness of the first resonant cavity structure.

[0016] Optionally, the thickness of the first metal layer ranges from 5 nm to 50 nm, and the thickness of the first dielectric layer ranges from 1 nm to 50 nm.

[0017] Optionally, under the mask pattern of the same mask layer, the pattern period formed when the structure to be etched is etched is adjusted by adjusting the thickness of the photoresist.

[0018] Optionally, a transparent substrate is arranged on a side of the mask layer away from the structure to be etched.

[0019] The present application provides a surface plasmon lithography imaging method, comprising:

[0020] forming a reflective layer on a side of the structure to be etched;

[0021] forming a photoresist on a side of the reflective layer away from the structure to be etched;

[0022] forming a first resonant cavity structure on a side of the photoresist away from the structure to be etched;

[0023] forming a mask layer on a side of the first resonant cavity structure away from the structure to be etched; the reflective layer, the photoresist, the first resonant cavity structure and the mask layer form a surface plasmon lithography imaging structure;

[0024] illuminating the surface plasmon lithography imaging structure in a direction of the mask layer towards the structure to be etched, so as to transfer the mask pattern of the mask layer to the photoresist to form a patterned photoresist;

[0025] etching the structure to be etched by using the patterned photoresist.

[0026] The present application provides a computer readable medium comprising instructions which, when executed on a computer, cause the computer to perform the method described above.

[0027] The application provides a surface plasmon lithography imaging structure, comprising: a reflective layer, a photoresist, a first resonant cavity structure and a mask layer; the reflective layer is arranged on one side of a structure to be etched, the photoresist is arranged on the side of the reflective layer away from the structure to be etched, and the first resonant cavity structure is arranged on the side of the photoresist away from the structure to be etched; the mask layer is arranged on the side of the first resonant cavity structure away from the structure to be etched; by arranging the first resonant cavity structure between the mask layer and the photoresist of the surface plasmon lithography imaging structure, the localization effect of the light field is enhanced, the diffraction limit is further broken, the imaging performance is optimized, and the resolution is improved. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0029] Figure 1 A structure schematic diagram of a surface plasmon lithography imaging structure provided by an embodiment of the present application is shown;

[0030] Figure 2 A structure schematic diagram of another surface plasmon lithography imaging structure provided by an embodiment of the present application is shown;

[0031] Figure 3 A schematic diagram of imaging effect of a rigorous coupled wave analysis algorithm at a wavelength of 436nm provided by an embodiment of the present application is shown;

[0032] Figure 4 A schematic diagram of imaging effect of a finite element method algorithm at a wavelength of 436nm provided by an embodiment of the present application is shown;

[0033] Figure 5 A schematic diagram of imaging effect of a rigorous coupled wave analysis algorithm at a wavelength of 532nm provided by an embodiment of the present application is shown;

[0034] Figure 6 A schematic diagram of imaging effect of a finite element method algorithm at a wavelength of 532nm provided by an embodiment of the present application is shown;

[0035] Figure 7 A schematic diagram of imaging effect of a rigorous coupled wave analysis algorithm at a wavelength of 633nm provided by an embodiment of the present application is shown;

[0036] Figure 8A schematic diagram of the imaging effect of the finite element method algorithm provided by the embodiment of the application at a wavelength of 633nm is shown.

[0037] Figure 9 A schematic diagram of the imaging effect of the photoresist with a thickness of 25nm at a wavelength of 436nm provided by the embodiment of the application is shown.

[0038] Figure 10 A schematic diagram of the imaging effect of the photoresist with a thickness of 40nm at a wavelength of 436nm provided by the embodiment of the application is shown.

[0039] Figure 11 A schematic diagram of the light intensity distribution of the photoresist at a wavelength of 532nm provided by the embodiment of the application is shown.

[0040] Figure 12 A schematic diagram of the light intensity distribution of the photoresist at a wavelength of 633nm provided by the embodiment of the application is shown.

[0041] Figure 13 A flowchart of the surface plasmon lithography imaging method provided by the embodiment of the application is shown. DETAILED DESCRIPTION

[0042] In order to make the above-mentioned purposes, features and advantages of the application more obvious and easy to understand, the specific embodiments of the application will be described in detail below with reference to the drawings.

[0043] In the following description, many specific details are set forth in order to provide a thorough understanding of the application, but the application can also be practiced without other different ways from those described herein, and those skilled in the art can make similar extensions without departing from the connotation of the application, therefore the application is not limited by the specific embodiments disclosed below.

[0044] The application is described in detail in conjunction with the schematic diagram, and in the detailed description of the embodiments of the application, the cross-sectional view of the device structure will be partially enlarged without the general proportion for the convenience of description, and the schematic diagram is only an example, which should not limit the scope of protection of the application herein. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in actual manufacturing.

[0045] Lithography technology is one of the indispensable core technologies in modern micro-nano manufacturing, and is widely used in the production process of integrated circuits, optoelectronic devices and nanotechnology. Traditional optical lithography technology relies on the principle of optical imaging, which projects the mask pattern onto the substrate coated with photoresist by illuminating the mask with a light source, thereby completing the replication and transfer of the mask pattern. However, with the continuous development of integrated circuits towards higher density and smaller size, traditional optical lithography technology is facing a serious resolution bottleneck, and it is difficult to meet the micro-nano manufacturing requirements.

[0046] According to the optical diffraction principle, the resolution of the conventional optical lithography technology is limited by the diffraction limit, which is usually given by the following formula.

[0047]

[0048] According to the above formula, for the deep ultraviolet waveband lithography technology, the current immersion lithography technology (using a light source with a wavelength of 193 nm) has been able to achieve a resolution of about 38 nanometers (period 76 nanometers), and the limit resolution of commercial mass production is 40 nanometers (period 80 nanometers), that is, the resolution of the immersion lithography technology is close to one-fifth of the wavelength. However, this resolution is still difficult to meet the manufacturing needs of future nanoscale, even sub-nanoscale electronic and optoelectronic devices, especially in the process of integrated circuits with smaller size and higher integration.

[0049] At present, surface plasmon lithography (SPL) technology is an emerging nanoscale optical technology. By using the local enhancement effect of surface plasmons, finer optical manipulation can be achieved on a sub-wavelength scale. Therefore, some studies have proposed to use the negative refraction characteristics of materials to achieve a resolution of wavelength level or even smaller, which has the potential to reduce the resolution of lithography to one-tenth of the wavelength or even smaller, but these technologies have not been applied to lithography technology.

[0050] Therefore, how to further break through the diffraction limit by using the surface plasmon lithography technology to improve the resolution is a problem to be solved.

[0051] Based on this, the present application provides a surface plasmon lithography imaging structure, comprising: a reflective layer, a photoresist, a first resonant cavity structure and a mask layer; the reflective layer is arranged on one side of a to-be-etched structure, the photoresist is arranged on the side of the reflective layer away from the to-be-etched structure, and the first resonant cavity structure is arranged on the side of the photoresist away from the to-be-etched structure; the mask layer is arranged on the side of the first resonant cavity structure away from the to-be-etched structure; by arranging the first resonant cavity structure between the mask layer and the photoresist of the surface plasmon lithography imaging structure, the local effect of the optical field is enhanced, the diffraction limit is further broken through, the imaging performance is optimized, and the resolution is improved.

[0052] In order to better understand the technical solutions and technical effects of the present application, specific embodiments will be described in detail below in combination with the drawings.

[0053] Reference Figure 1 As shown in the figure, a surface plasmon lithography imaging structure provided by the embodiment of the present application is shown, which comprises a reflective layer 110, a photoresist 120, a first resonant cavity structure 130 and a mask layer 140.

[0054] In embodiments of the present application, the reflective layer 110 is disposed on one side of the structure to be etched 100, i.e. the reflective layer 110 covers the structure to be etched 100. The structure to be etched 100 can be a single film layer, or a semiconductor structure comprising multiple film layers obtained through multiple manufacturing processes.

[0055] As an example, the structure to be etched 100 is a wafer, and the material of the wafer is silicon (Si), germanium (Ge), gallium arsenide (GaAs), quartz glass, sapphire glass or other materials suitable for microelectronic manufacturing.

[0056] The reflective layer 110 is used to improve the adhesion of the photoresist 120 disposed thereon, and to provide electrical conductivity, reflectivity or other optical properties during the photolithography and development processes to enhance the imaging effect and pattern transfer accuracy. The material of the reflective layer 110 can be a metal material, such as silver.

[0057] In embodiments of the present application, the photoresist 120 is disposed on the side of the reflective layer 110 away from the structure to be etched 100, i.e. the photoresist 120 covers the reflective layer 110. The photoresist 120 is used for patterning to perform mask pattern transfer. The photoresist 120 includes positive photoresist and negative photoresist. After exposure, the positive photoresist in the exposed area is removed by development, while the unexposed area remains; the negative photoresist is the opposite, i.e. the negative photoresist in the exposed area remains, while the unexposed area is removed by development. The photoresist 120 is selected according to photosensitivity, resolution, viscosity and etching selectivity ratio with the material of the structure to be etched 100.

[0058] In embodiments of the present application, the first resonant cavity structure 130 is disposed on the side of the photoresist 120 away from the structure to be etched 100, i.e. the first resonant cavity structure 130 covers the photoresist 120. The first resonant cavity structure 130 is used to adjust the reflection, transmission and enhancement effect of light, and has a resonant cavity effect.

[0059] In embodiments of the present application, the mask layer 140 is disposed on the side of the first resonant cavity structure 130 away from the structure to be etched 100, i.e. the mask layer 140 covers the first resonant cavity structure 130. The mask layer 140 refers to a mask structure used to define and transfer micro-nano patterns in the photolithography process. The mask layer 140 can accurately transfer the designed pattern to the photoresist or other photosensitive material through the exposure and development steps, thereby forming the required microstructure. To achieve plasma excitation, the mask layer 140 is usually composed of a transparent material and a metal pattern, and the metal pattern is made on the mask substrate through photolithography technology, and the transparent material and the metal pattern are used to control the passage and shielding of light, respectively.

[0060] As an example, referring to Figure 1 or Figure 2As shown, the material of the metal pattern of the mask layer 140 is silver, and the transparent material is air. The mask pattern of the mask layer 140 is a strip shape that changes periodically in one dimension.

[0061] As described above, by providing the first resonant cavity structure 130 between the mask layer 140 and the photoresist 120 of the surface plasmonic lithography imaging structure, the first resonant cavity structure 130 is used to enhance the localization effect of the light field, further break the diffraction limit, optimize the imaging performance, and improve the resolution.

[0062] In the embodiment of the present application, the first resonant cavity structure 130 includes a first laminated structure, and the first laminated structure includes a first metal layer 131 and a first dielectric layer 132. The first dielectric layer 132 is arranged on the side of the first metal layer 131 away from the structure to be etched 100, that is, the first dielectric layer 132 covers the first metal layer 131, as shown in Figure 1 and Figure 2 .

[0063] By providing the first laminated structure including the first metal layer 131 and the first dielectric layer 132, the optical performance of the resonant cavity is optimized to meet the design requirements. The first metal layer 131 is used to provide reflectivity and electrical conductivity, and the first dielectric layer 132 is used to adjust the propagation characteristics and wavelength response of light, such as adjusting the propagation, reflection, and transmission characteristics of light.

[0064] Specifically, the material of the first metal layer 131 can be a metal material or a material with negative refractive index and high reflectivity characteristics at the optical wavelength used for imaging, such as silver, aluminum, or gold. The material of the first dielectric layer 132 can be air, high-purity water, or other dielectric materials, such as silicon oxide or silicon nitride.

[0065] The thickness of the first metal layer 131 ranges from 5 to 50 nm, and the thickness of the first dielectric layer 132 ranges from 1 to 50 nm. That is, by providing the first metal layer 131 and the first dielectric layer 132 with appropriate thicknesses, the resonant cavity effect of the first resonant cavity structure 130 is achieved.

[0066] The thickness, material, and manufacturing method of the first metal layer 131 and the first dielectric layer 132 can be optimized according to the working wavelength, reflection requirements, and resonant frequency of the first resonant cavity structure 130, so as to obtain an efficient first resonant cavity structure 130.

[0067] In the embodiment of the present application, the second resonant cavity structure 210 is arranged between the reflective layer 110 and the structure to be etched 100, as shown in Figure 2As shown, the second resonant cavity structure 210 is arranged opposite to the first resonant cavity structure 130, and the reflective layer 110 and the photoresist are arranged between the second resonant cavity structure 210 and the first resonant cavity structure 130. Through the cooperation of the first resonant cavity structure 130 and the second resonant cavity structure 210, the light field is further enhanced and the light wave propagation characteristics are controlled, so as to further enhance the localization effect of the light field, further break through the diffraction limit, optimize the imaging performance, and improve the resolution.

[0068] In the embodiment of the present application, the second resonant cavity structure 210 includes at least one second laminated structure, and the second laminated structure includes a second metal layer 211 and a second dielectric layer 212. The second dielectric layer 212 is arranged on the side of the second metal layer 211 away from the structure to be etched 100, that is, the second dielectric layer 212 covers the second metal layer 211, as shown in Figure 2

[0069] By arranging the second laminated structure including the second metal layer 211 and the second dielectric layer 212, the optical performance of the resonant cavity is optimized, so as to meet the design requirements. The second metal layer 211 is used to provide reflectivity, and the second dielectric layer 212 is used to adjust the propagation characteristics and wavelength response of light, for example, to adjust the propagation, reflection and transmission characteristics of light.

[0070] Specifically, the material of the second metal layer 211 can be a metal material or a material having negative refractive index and high reflectivity characteristics at the optical wavelength used in imaging, for example, silver, aluminum or gold, and the material of the second dielectric layer 212 can be a dielectric material, for example, silicon oxide or silicon nitride.

[0071] The thickness of the second metal layer 211 ranges from 5 to 50 nm, and the thickness of the second dielectric layer 212 ranges from 1 to 50 nm. That is, by arranging the second metal layer 211 and the second dielectric layer 212 with appropriate thicknesses, the resonant cavity effect of the second resonant cavity structure 210 is realized.

[0072] The thickness, material and refractive index of the second metal layer 211 and the second dielectric layer 212 can be optimized according to the working wavelength, reflection requirement and resonant frequency of the second resonant cavity structure 210 and other parameters, so as to obtain an efficient second resonant cavity structure 210.

[0073] The second resonant cavity structure 210 can include at least one second laminated structure, and the number of layers of the specific second laminated structure can be determined according to the design requirements of the second resonant cavity structure 210, so as to obtain an efficient second resonant cavity structure 210.

[0074] As an example, as shown in Figure 2 The second resonant cavity structure 210 includes two second laminated structures.

[0075] ​In the embodiments of the present application, the thickness of the second resonant cavity structure 210 is greater than the thickness of the first resonant cavity structure 130. The thickness of the second resonant cavity structure 210 is greater than the thickness of the first resonant cavity structure 130, and therefore at least one second stack structure can be arranged to improve the localization effect of the enhanced light field in cooperation with the first resonant cavity structure 130.

[0076] In the embodiments of the present application, the mask layer 140 is provided with a transparent substrate 150 away from the side of the structure to be etched 100, that is, the transparent substrate 150 covers the mask layer 140. The transparent substrate 150 can protect the mask layer 140 and allow light transmission. The material of the transparent substrate 150 can be quartz material or glass material.

[0077] In the embodiments of the present application, the surface plasmonic lithography imaging structure can be irradiated with surface plasmonic light in the direction of the mask layer 140 towards the structure to be etched 100, that is, the surface plasmonic lithography imaging structure is irradiated with perpendicular incident parallel light to transfer the mask pattern of the mask layer 140 to the photoresist 120 to form a patterned photoresist 120, and then the structure to be etched 100 is etched by using the patterned photoresist 120, and finally the mask pattern is transferred to the structure to be etched 100.

[0078] The surface plasmonic lithography imaging structure can be applied to surface plasmonic lithography imaging at wavelengths of 436 nm, 532 nm and 633 nm. Details are described below.

[0079] At a wavelength of 436 nm and a period of the mask pattern of 740 nm, the surface plasmonic lithography imaging structure provided by the embodiments of the present application can achieve a stripe resolution of 32 nm (~1 / 13.5 lithography wavelength), as shown in the rigorous coupled wave analysis (RCWA) algorithm imaging effect at a wavelength of 436 nm in Figure 3 and the finite element method (FEM) algorithm imaging effect at a wavelength of 436 nm in Figure 4 .

[0080] At a wavelength of 532 nm and a period of the mask pattern of 1000 nm, the surface plasmonic lithography imaging structure provided by the embodiments of the present application can achieve a stripe resolution of 41.6 nm (~1 / 12.8 lithography wavelength), as shown in the rigorous coupled wave analysis algorithm imaging effect at a wavelength of 532 nm in Figure 5 and the finite element method algorithm imaging effect at a wavelength of 532 nm in Figure 6 .

[0081] At a wavelength of 633 nm and a period of the mask pattern of 1152 nm, the surface plasmonic lithography imaging structure provided by the embodiments of the present application can achieve a stripe resolution of 28.8 nm (~1 / 11 lithography wavelength), as shown in the rigorous coupled wave analysis algorithm imaging effect at a wavelength of 633 nm in Figure 7The strict coupled wave analysis algorithm imaging effect at 633 nm wavelength is shown in FIG. 6, and Figure 8 The finite element method algorithm imaging effect at 633 nm wavelength is shown in FIG. 7.

[0082] Therefore, in the surface plasmon lithography imaging structure provided by the embodiment of the present application, the self-excitation effect can be generated and super-resolution imaging is achieved, and the imaging resolution much smaller than the lithography wavelength at 436 nm, 532 nm and 633 nm wavelengths is achieved.

[0083] In the embodiment of the present application, under the same mask pattern of the mask layer 140 and the same light wavelength, the thickness of the photoresist 120 is adjusted to adjust the formed pattern period when the to-be-etched structure 100 is etched.

[0084] As an example, under the wavelength of 436 nm and the period of the mask pattern of 740 nm, different resolution stripes can be generated by changing the thickness of the photoresist 120. When the thickness of the photoresist is 50 nm, the critical dimension (CD) is 32 nm, that is, CD = 32 nm, as shown in FIG. 8; when the thickness of the photoresist is 25 nm, CD = 26.5 nm, as shown in FIG. 9; and when the thickness of the photoresist is 40 nm, CD = 34 nm, as shown in FIG. 10. Figure 3 Figure 9 Figure 10

[0085] In the embodiment of the present application, the contrast of the imaging by using the surface plasmon lithography imaging structure is higher than that required by the conventional optical lithography. As shown in FIG. 11 and FIG. 12, the imaging light intensity in the photoresist exposed at 532 nm and 633 nm is respectively calculated according to the contrast calculation formula, and the contrast at 532 nm and 633 nm is respectively 0.985 and 0.991, which is much higher than the conventional optical lithography requirement of 0.4, representing that the imaging effect of the surface plasmon lithography imaging structure provided by the embodiment of the present application is better. Figure 11 Figure 12

[0086] ​​​​​As described above, the surface plasmon lithography imaging structure provided in the embodiments of the present application can improve the imaging resolution by setting the first resonant cavity structure 130 and the second resonant cavity structure 210. For example, the imaging half period (resolution) is reduced to 7.33% of the wavelength (CD = 32 nm) at a wavelength of 436 nm, which is much smaller than the current limit of optical imaging, and super-resolution imaging is successfully achieved. The surface plasmon lithography imaging structure provided in the embodiments of the present application can also be applied to light sources of various wavelengths, which can not only obtain super-resolution imaging effect at a wavelength of 436 nm, but also achieve a resolution of less than 1 / 10 of the wavelength at wavelengths of 532 nm and 633 nm, showing good universality. The pattern obtained by imaging using the surface plasmon lithography imaging structure provided in the embodiments of the present application has the characteristics of high resolution, high intensity and high contrast, which significantly improves the quality and precision of lithography. By combining the rigorous coupled wave analysis and the finite element method algorithm, the imaging results are analyzed in depth, and the practicability and reliability of the surface plasmon lithography imaging structure provided in the embodiments of the present application are ensured from the theoretical and experimental aspects. The imaging using the surface plasmon lithography imaging structure not only can stably run in the actual production environment, but also has high repeatability and consistency. In addition, the surface plasmon lithography imaging structure provided in the embodiments of the present application can adjust the period of the pattern, for example, by changing the thickness of the photoresist, the period can be flexibly adjusted, which provides more design freedom for the processing technology of semiconductor components.

[0087] Based on the surface plasmon lithography imaging structure provided in the above embodiments, the embodiments of the present application also provide a surface plasmon lithography imaging method. Referring to FIG. 11, it is a flowchart of a surface plasmon lithography imaging method provided in the embodiments of the present application. The surface plasmon lithography imaging method provided in the embodiments of the present application includes the following steps: Figure 13

[0088] S101, forming a reflective layer on one side of a structure to be etched.

[0089] In the embodiments of the present application, a reflective layer can be formed on one side of the structure to be etched. Specifically, the reflective layer can be manufactured by using a deposition process.

[0090] In the embodiments of the present application, before the reflective layer is formed, a second resonant cavity structure can also be formed on one side of the structure to be etched. The second resonant cavity structure includes at least one second laminated structure, and the second laminated structure includes a second metal layer and a second dielectric layer. The second dielectric layer is arranged on the side of the second metal layer away from the structure to be etched, that is, the second dielectric layer covers the second metal layer.

[0091] ​The second metal layer can be formed by physical vapor deposition (PVD), sputtering deposition, or electron beam evaporation. The second dielectric layer can be formed by chemical vapor deposition (CVD), atomic layer deposition (ALD), or sputtering.

[0092] S102, forming photoresist on the side of the reflective layer away from the structure to be etched.

[0093] In the embodiments of the present application, after the reflective layer is formed, photoresist can be formed on the side of the reflective layer away from the structure to be etched, that is, photoresist is formed on the reflective layer.

[0094] The photoresist can be formed by a spin coating process. Since the photoresist will affect the accuracy of subsequent mask pattern transfer and the quality and resolution of the final imaging pattern, the spin coating process is a key process for manufacturing surface plasmonic lithography imaging structures.

[0095] S103, forming a first resonant cavity structure on the side of the photoresist away from the structure to be etched.

[0096] In the embodiments of the present application, after the photoresist is formed, a first resonant cavity structure can be formed on the side of the photoresist away from the structure to be etched, that is, the first resonant cavity structure is formed on the photoresist.

[0097] The first resonant cavity structure includes a first stack structure, and the first stack structure includes a first metal layer and a first dielectric layer. The first dielectric layer is disposed on the side of the first metal layer away from the structure to be etched, that is, the first dielectric layer covers the first metal layer.

[0098] The first metal layer can be formed first, and then the first dielectric layer is formed. The first metal layer can be formed by physical vapor deposition (PVD), sputtering deposition, or electron beam evaporation. The first dielectric layer can be formed by chemical vapor deposition (CVD), atomic layer deposition (ALD), or sputtering.

[0099] S104, forming a mask layer on the side of the first resonant cavity structure away from the structure to be etched.

[0100] In the embodiments of the present application, after the first resonant cavity structure is formed, a mask layer can be formed on the side of the first resonant cavity structure away from the structure to be etched, that is, the mask layer is formed on the first resonant cavity structure.

[0101] Specifically, the mask layer is usually composed of a transparent material and a metal pattern. The metal pattern can be made on a mask substrate by photolithography technology. The transparent material and the metal pattern are used to control the passing and blocking of light, respectively.

[0102] After the mask layer is manufactured, a transparent substrate can be further formed on the mask layer. The second resonant cavity structure, the reflective layer, the photoresist, the first resonant cavity structure, the mask layer, and the transparent substrate form a surface plasmonic lithography imaging structure.

[0103] S105, irradiating the surface plasmonic lithography imaging structure in a direction in which the mask layer faces the structure to be etched, so as to transfer the mask pattern of the mask layer to the photoresist, and form a patterned photoresist.

[0104] In the embodiments of the present application, the surface plasmonic lithography imaging structure is irradiated in a direction in which the mask layer faces the structure to be etched, that is, the surface plasmonic lithography imaging structure is irradiated by perpendicular incident parallel light, so as to transfer the mask pattern of the mask layer to the photoresist, and form a patterned photoresist.

[0105] Specifically, forming a patterned photoresist includes exposure and development operations. The exposure operation refers to that, in the photolithography process, parallel light sources are used to be perpendicular incident to the surface plasmonic lithography imaging structure, so as to ensure that the light beam is uniformly irradiated and the mask pattern is accurately transferred. Considering that TM wave is more effective than TE wave in imaging, TM polarized 436 nm, 532 nm and 633 nm parallel light can be used for exposure.

[0106] The development operation refers to that, after exposure, the unexposed part or the exposed part (depending on the type of photoresist used) in the photoresist needs to be removed by a developing solution. The development process is to treat the photoresist with a chemical solution (developing solution), so that the photoresist in the exposed area is removed, and the unexposed area remains unchanged, thereby forming a pattern structure consistent with the mask pattern, that is, forming a patterned photoresist.

[0107] S106, etching the structure to be etched by using the patterned photoresist.

[0108] In the embodiments of the present application, after the patterned photoresist is formed, the structure to be etched is etched by using the patterned photoresist, and finally the mask pattern is transferred to the structure to be etched. That is, after development is completed, the mask pattern has been transferred to the photoresist, and enters the etching stage, that is, the thin film material under the photoresist is removed through chemical reaction or physical collision, so as to transfer the mask pattern to the structure to be etched.

[0109] Based on the surface plasmonic lithography imaging method provided in the above embodiments, the embodiments of the present application further provide a surface plasmonic lithography imaging device, which comprises:

[0110] The processor and the memory can be connected by a bus or other means. In some embodiments of the present application, the number of processors can be one or more.

[0111] The memory can include a read-only memory and a random access memory, and provide the processor with instructions and data. A portion of the memory can also include a NVRAM. The memory stores operating systems and operating instructions, executable modules or data structures, or subsets thereof, or expanded sets thereof, wherein the operating instructions can include various operating instructions for implementing various operations. The operating system can include various system programs for implementing various basic services and processing hardware-based tasks.

[0112] The processor controls the operation of the terminal device, and the processor can also be referred to as a CPU.

[0113] The method disclosed in the embodiments of the present application can be applied to a processor or implemented by a processor. The processor can be an integrated circuit chip with a signal processing capability. In the implementation process, each step of the above method can be completed by an integrated logic circuit or an instruction in the form of software in the processor. The processor mentioned above can be a general processor, a DSP, an ASIC, an FPGA, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. Each method, step and logic block diagram disclosed in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as a hardware code processor for execution, or a combination of hardware and software modules in the code processor for execution. The software module can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, or other mature storage media in the art. The storage medium is located in the memory, and the processor reads the information in the memory and combines the hardware to complete the steps of the above method.

[0114] The embodiments of the present application also provide a computer readable medium for storing program codes, the program codes being used to execute any one of the methods of the various embodiments.

[0115] In the context of this application, a computer readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable medium can be a computer readable signal medium or a computer readable storage medium. The computer readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the computer readable storage medium can include, but are not limited to, an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0116] Note that the computer readable medium described above in this application can be a computer readable signal medium or a computer readable storage medium or any combination thereof. The computer readable storage medium, for example, can be, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the computer readable storage medium can include, but are not limited to, an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this application, the computer readable storage medium can be any tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device. In this application, the computer readable signal medium can include a computer readable program code propagated in or on a carrier wave, in baseband signal, or using any suitable medium, including but not limited to wireless, wireline, optical, electromagnetic, infrared, or semiconductor systems. The computer readable signal medium can also be any computer readable medium that can send, receive, or transfer a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer readable medium can be transmitted using any suitable medium, including but not limited to wire, cable, fiber optic, RF, etc., or any suitable combination of the foregoing.

[0117] The computer readable medium described above can be contained in the electronic device described above; or can exist separately without being assembled into the electronic device.

[0118] The various embodiments described in this specification are presented by way of example, and each embodiment is not necessarily composed of all features described. Each embodiment describes a different set of features, and the application can include a single embodiment or a combination of different embodiments. Each embodiment is directed to what is currently believed to be a novel and non-obvious application. In view of the many possible embodiments to which the principles of the application can be applied, it will be recognized that the embodiments described herein are shown by way of example only. Numerous changes and modifications can be made to the application as described without departing from the underlying technical concept and scope thereof.

[0119] The above description is only the preferred embodiment of the present application, although the present application has been disclosed as above with the preferred embodiment, however, it is not intended to limit the present application. Any skilled person in the art, without departing from the scope of the technical scheme of the present application, can make many possible changes and modifications to the technical content disclosed above, or modify it as equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application, without departing from the content of the technical scheme of the present application, still belongs to the scope of protection of the technical scheme of the present application.

Claims

1. A surface plasmon lithography imaging structure, characterized in that, include: A reflective layer is placed on one side of the structure to be etched; The reflective layer is provided with photoresist on the side away from the structure to be etched; A first resonant cavity structure is provided on the side of the photoresist away from the structure to be etched; A mask layer is provided on the side of the first resonant cavity structure away from the structure to be etched; The first resonant cavity structure includes a first stacked structure, the first stacked structure includes a first metal layer and a first dielectric layer, the first dielectric layer is disposed on the side of the first metal layer away from the structure to be etched; A second resonant cavity structure is provided between the reflective layer and the structure to be etched; The second resonant cavity structure includes at least one second stacked structure, the second stacked structure including a second metal layer and a second dielectric layer, the second dielectric layer being disposed on the side of the second metal layer away from the structure to be etched.

2. The surface plasmon lithography imaging structure according to claim 1, characterized in that, The thickness of the second resonant cavity structure is greater than the thickness of the first resonant cavity structure.

3. The surface plasmon lithography imaging structure according to claim 1, characterized in that, The thickness of the first metal layer ranges from 5 to 50 nm, and the thickness of the first dielectric layer ranges from 1 to 50 nm.

4. The surface plasmon lithography imaging structure according to claim 1, characterized in that, Under the same mask pattern, the pattern period formed when the structure to be etched is etched is adjusted by adjusting the thickness of the photoresist.

5. The surface plasmon lithography imaging structure according to any one of claims 1-4, characterized in that, A transparent substrate is disposed on the side of the mask layer away from the structure to be etched.

6. A surface plasmon lithography imaging method, characterized in that, include: A second resonant cavity structure is formed on one side of the structure to be etched; The second resonant cavity structure includes at least one second stacked structure, the second stacked structure includes a second metal layer and a second dielectric layer, the second dielectric layer being disposed on the side of the second metal layer away from the structure to be etched; A reflective layer is formed on one side of the structure to be etched; Photoresist is formed on the side of the reflective layer away from the structure to be etched; A first resonant cavity structure is formed on the side of the photoresist away from the structure to be etched; the first resonant cavity structure includes a first stacked structure, the first stacked structure includes a first metal layer and a first dielectric layer, and the first dielectric layer is disposed on the side of the first metal layer away from the structure to be etched. A mask layer is formed on the side of the first resonant cavity structure away from the structure to be etched; The reflective layer, the photoresist, the first resonant cavity structure, and the mask layer form a surface plasmon lithography imaging structure; The surface plasma lithography imaging structure is irradiated with the mask layer in the direction of the structure to be etched, so as to transfer the mask pattern of the mask layer to the photoresist to form a patterned photoresist; The patterned photoresist is used to etch the structure to be etched.

7. A computer-readable medium, characterized in that, Includes instructions that, when run on a computer, cause the computer to perform the method as described in claim 6.

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