Linear voltage regulator, parallel current sharing circuit and method thereof, and display drive or touch sensing chip

Abstract

The invention provides a linear voltage regulator, a parallel current sharing circuit and method thereof, and a display driving or touch sensing chip, a first circuit module and / or a second circuit module are / is arranged for a target linear voltage regulator connected in parallel, and when the current shared by the target linear voltage regulator exceeds a preset bearing range, the first circuit module and / or the second circuit module are / is connected with the first circuit module and / or the second circuit module. The first circuit module of the target linear voltage regulator can automatically limit the grid voltage of the output tube of the target linear voltage regulator not to be higher than the upper limit of a preset range, and the second circuit module of the target linear voltage regulator can automatically limit the grid voltage of the output tube of the target linear voltage regulator not to be lower than the lower limit of the preset range. By limiting the magnitude of the grid voltage of the output tube, the load current of the linear voltage regulator is limited within a certain range, so that the distribution of the load current among the linear voltage regulators connected in parallel is automatically adjusted, the voltage difference of the output voltage of the linear voltage regulators at different positions in a chip is prevented from being too large, and the reliability of the chip is improved. And the voltage drop of the output voltage on the wiring is prevented from being too large.

Description

Technical Field

[0001] The present invention belongs to the technical field of voltage stabilizers, and in particular relates to a linear voltage stabilizer and a parallel current equalizing circuit and method thereof, and a display driver or touch sensing chip. Background Art

[0002] With the continuous development of integrated circuit technology, more and more functional modules are integrated inside the chip, which puts forward higher requirements for stable power supply voltage. As a linear regulator, LDO (Low drop out regulator) circuit has been widely used in the field of power management because of its advantages such as low power consumption, small area, low noise and simple structure. However, in large-size chips, it is necessary to supply power to large-area circuits at the same time. At this time, only one linear regulator cannot meet the power supply requirements of the remote circuit, so it is necessary to place multiple linear regulators in parallel at different positions of the chip to achieve distributed power supply. However, when multiple linear regulators are used for power supply at the same time, due to the influence of process deviation, reference deviation and power ground jitter between each linear regulator, the load current tends to be concentrated on the output of one or several linear regulators, resulting in the inability to evenly divide the current of each linear regulator, affecting the output voltage of the local linear regulator, and the same output voltage seen at different positions of the chip has obvious differences. What is more serious is that when individual linear regulators carry excessive load current for a long time, their heat will be particularly obvious, resulting in slow circuit operation and even burnout.

[0003] In the field of display driving, due to various application restrictions, display driver chips are usually designed into narrow and long strips and other deformed shapes. When the power supply designed for such chips needs to power a large-area circuit of this shape, the aforementioned current concentration on one or several linear regulators is particularly obvious. In addition, the industry is also committed to integrating display driving and touch sensing into one driver chip (i.e., display touch driver chip). The increase in circuit complexity further aggravates the aforementioned influence, resulting in excessive output voltage difference of linear regulators at different positions in the chip, and the output voltage drop on the wiring is becoming more and more obvious. Summary of the invention

[0004] The purpose of the present invention is to provide a linear voltage regulator and a parallel current equalization circuit and method thereof, a display driver, or a touch sensing chip, which limits the gate voltage of its output tube so that the load current of the linear voltage regulator is limited to a certain range, thereby automatically adjusting the distribution of the load current between the various linear voltage regulators in parallel, thereby avoiding excessive voltage difference of the output voltage of the linear voltage regulator at different positions in the chip and avoiding excessive voltage drop of the output voltage on the wiring.

[0005] To achieve the above-mentioned object, a first aspect of the present invention provides a method for current sharing of linear regulators in parallel, wherein a first circuit module and / or a second circuit module are provided for the parallel target linear regulators, wherein:

[0006] When the current shared by the target linear regulator exceeds a preset bearing range, the first circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be higher than the upper limit of the preset range;

[0007] The second circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be lower than the lower limit of a preset range.

[0008] Preferably, the preset range is determined according to the upper and lower limits of the current to be distributed and the driving capability of the output tube of the target linear voltage regulator.

[0009] Preferably, the preset range of the target linear regulator is the same as or different from the preset range of the linear regulator connected in parallel therewith.

[0010] Preferably, when the current shared by the target linear regulator is relatively large, the first circuit module thereof can automatically limit the gate voltage of the N-type output tube to not be higher than the upper limit of a preset range; and / or,

[0011] When the current shared by the target linear regulator is small, the second circuit module thereof can automatically limit the gate voltage of the N-type output tube to not be lower than the lower limit of the preset range.

[0012] Preferably, when the current shared by the target linear regulator is relatively large, the second circuit module thereof can automatically limit the gate voltage of the P-type output tube to not be lower than the lower limit of a preset range; and / or,

[0013] When the current shared by the target linear regulator is small, the first circuit module can automatically limit the gate voltage of the P-type output tube to not be higher than the upper limit of the preset range.

[0014] Preferably, the linear regulators connected in parallel all use linear regulators with N-type output tubes, or all use linear regulators with P-type output tubes, or both use linear regulators with N-type output tubes and linear regulators with P-type output tubes.

[0015] Preferably, the first circuit module and / or the second circuit module is at least connected to the gate end of the output tube.

[0016] Preferably, the first circuit module and / or the second circuit module is connected to the gate terminal of the output tube and is also connected to the output terminal of the target linear regulator.

[0017] In a second aspect, a linear regulator is provided, characterized in that the linear regulator includes an output tube, and the output tube is N-type or P-type; it is suitable for applying the method of parallel current sharing of linear regulators described in any of the aforementioned embodiments.

[0018] Preferably, the first circuit module comprises a first diode module connected to a first voltage; or,

[0019] The first circuit module includes a first clamping module, a pull-down module, and a first follower module. The first clamping module is connected to the gate end of the output tube of the target linear regulator, and the first follower module is connected to the output end of the linear regulator. The first clamping module and the pull-down module are fed back by the first follower module to connect the pull-down module and the gate end of the output tube.

[0020] Preferably, the second circuit module comprises a second diode module connected to a second voltage; or,

[0021] The second circuit module includes a second clamping module, a pull-up module, and a second follower module. The second clamping module is connected to the gate end of the output tube of the target linear regulator, and the second follower module is connected to the output end of the linear regulator. The second clamping module and the pull-up module receive feedback from the second follower module to connect the pull-up module and the gate end of the output tube.

[0022] Preferably, the first clamping module comprises a first transistor, one electrode of which is connected to the gate terminal of the output tube, the other electrode of which is connected to the pull-down module, and the gate terminal of which is connected to the first follower module; and / or,

[0023] The second clamping module comprises a second transistor, one electrode of which is connected to the gate terminal of the output tube, the other electrode of which is connected to the pull-up module, and the gate terminal of which is connected to the second follower module.

[0024] Preferably, the first follower module comprises a third transistor, one electrode of the third transistor is connected to the output end of the linear regulator, the other electrode is connected to the first bias module, and the gate end is connected to the first clamping module; and / or,

[0025] The second follower module includes a fourth transistor, one electrode of the fourth transistor is connected to the output end of the linear regulator, the other electrode is connected to the second bias module, and the gate end of the fourth transistor is connected to the second clamping module.

[0026] Preferably, the first follower module further includes a first resistor, and the first transistor is connected to the output end of the linear regulator through the first resistor; or / and,

[0027] The second follower module further includes a second resistor, and the second transistor is connected to the output end of the linear regulator through the second resistor.

[0028] Preferably, the first diode module and / or the second diode module comprises a diode or a plurality of series-connected diodes with one end connected to the gate end of the output tube.

[0029] Preferably, the error amplifier has a first input terminal, a second input terminal, and an output terminal, wherein the output terminal is connected to the gate of the output tube, the first input terminal is connected to a reference voltage, and the second input terminal is connected to the output terminal of the linear regulator.

[0030] Preferably, the linear regulator is a Class A output type linear regulator.

[0031] In a third aspect, a linear regulator parallel current sharing circuit is provided, which includes a plurality of linear regulators connected in parallel, wherein the output ends of the plurality of linear regulators connected in parallel are connected to the same node; wherein some or all of the linear regulators connected in parallel use the linear regulator described in any of the aforementioned embodiments, thereby:

[0032] When the current shared by the target linear regulator exceeds a preset bearing range, the first circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be higher than the upper limit of the preset range; and / or,

[0033] The second circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be lower than the lower limit of a preset range.

[0034] In a fourth aspect, a display driver or touch sensing chip is provided, characterized in that it includes the aforementioned linear regulator parallel current sharing circuit.

[0035] Compared with the prior art, the present invention sets a first circuit module and / or a second circuit module for the parallel target linear regulator, wherein when the current shared by the target linear regulator exceeds the preset bearing range, the first circuit module of the target linear regulator can automatically limit the gate voltage of the output tube of the target linear regulator to not be higher than the upper limit of the preset range; the second circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be lower than the lower limit of the preset range. By limiting the gate voltage of its output tube, the load current of the linear regulator is limited to a certain range, thereby automatically adjusting the distribution of the load current between the parallel linear regulators, thereby avoiding excessive voltage difference of the output voltage of the linear regulator at different positions in the chip, and reducing the voltage drop of the output voltage on the wiring. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic diagram of the structure of a single linear regulator provided by an embodiment of the present invention;

[0037] Figure 2 to Figure 8An exemplary structural diagram of a single linear regulator with N output tubes provided in an embodiment of the present invention;

[0038] Fig. 9 A schematic diagram of the structure of a linear regulator parallel current sharing circuit provided in an embodiment of the present invention;

[0039] Fig.10 This is a structural example diagram of a single linear regulator with a P output tube provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0040] The following will be combined with the attached embodiment of the present invention Figure 1 ~Attached Fig.10 , the technical solutions, structural features, objectives achieved and effects in the embodiments of the present invention are described in detail.

[0041] It should be noted that the drawings are in a very simplified form and use non-precise proportions. They are only used to conveniently and clearly assist in explaining the embodiments of the present invention, and are not used to limit the conditions for the implementation of the present invention. Therefore, they have no substantive technical significance. Any structural modification, change in proportional relationship or adjustment of size, without affecting the effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical content disclosed by the present invention.

[0042] It should be noted that, in the present invention, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or equipment including a series of elements includes not only the elements explicitly listed, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment.

[0043] In order to solve the problem of uneven current distribution of parallel linear regulators, an embodiment of the present invention provides a method for parallel current sharing of linear regulators, wherein a first circuit module and / or a second circuit module are set for the parallel target linear regulator, wherein when the current shared by the target linear regulator exceeds a preset bearing range, the first circuit module of the target linear regulator can automatically limit the gate voltage of its output tube (it can also be an overdrive voltage, which is not specifically limited, and the overdrive voltage is the gate-source voltage of the output tube, and the N-type output tube is V GSN , P-type output tube is V SGP) is not higher than the upper limit of the preset range; the second circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be lower than the lower limit of the preset range. Exemplarily, the preset range is determined according to the upper and lower limits of the current to be distributed combined with the driving capability of the output tube of the target linear regulator. Preferably, the preset range of the target linear regulator and the preset range of the linear regulator connected in parallel therewith can be the same or different. The linear regulator is preferably a Class A output type linear regulator. The gate-source voltage of the output tube limited to a certain range can drive the common output voltage of multiple linear regulators to automatically adjust the size, and the result of the adjustment makes the load current evenly distributed among multiple linear regulators. It should be noted that all embodiments provided by the present invention are applicable to the case where only the first circuit module is set, or only the second circuit module is set, or both the first circuit module and the second circuit module are set. These cases can all achieve the effect of current balancing, and the case where both the first circuit module and the second circuit module are set can best guarantee the effect of current balancing; but the case where only the first circuit module is set, or only the second circuit module is set, can ensure the effect of current balancing to a certain extent, while also avoiding a substantial increase in circuit scale, which is conducive to miniaturization of the circuit scale.

[0044] Further, when the linear regulator is suitable for an N-type output tube, when the current shared by the target linear regulator is large, the first circuit module can automatically limit the gate voltage of the N-type output tube to not be higher than the upper limit of a preset range; and / or, when the current shared by the target linear regulator is small, the second circuit module can automatically limit the gate voltage of the N-type output tube to not be lower than the lower limit of the preset range.

[0045] When the linear regulator is suitable for a P-type output tube, when the current shared by the target linear regulator is large, the second circuit module of the target linear regulator can automatically limit the gate voltage of the P-type output tube to not be lower than the lower limit of a preset range; and / or, when the current shared by the target linear regulator is small, the first circuit module of the target linear regulator can automatically limit the gate voltage of the P-type output tube to not be higher than the upper limit of a preset range.

[0046] Optionally, the linear regulators connected in parallel may all use linear regulators with N-type output tubes, or all use linear regulators with P-type output tubes, or both use linear regulators with N-type output tubes and linear regulators with P-type output tubes. Moreover, the first circuit module and / or the second circuit module are at least connected to the gate terminal of the output tube, and may further be connected to the output terminal of the linear regulator.

[0047] The present invention mainly takes an N-type output tube, and the case where both the first circuit module and the second circuit module are provided as an example and is explained as follows, but the protection scope of the present invention should not be limited to the specific embodiments of the N-type output tube example. These embodiments can also be reasonably changed in the linear regulator using the P-type output tube based on the simple principle of P and N-type outputs to design the circuit module and / or the second circuit module of the linear regulator suitable for the P-type output tube, which are all within the protection scope of the present invention.

[0048] like Figure 1 As shown, the first circuit module 102 and (or) the second circuit module 103 are configured for the parallel target linear regulator, wherein when the current shared by the target linear regulator is large, the first circuit module 102 can automatically limit the gate voltage of the output tube of the target linear regulator to not be higher than the upper limit of the preset range; when the current shared by the target linear regulator is small, the second circuit module 103 can automatically limit the gate voltage of the output tube of the linear regulator to not be lower than the lower limit of the preset range. The preset range can be reasonably set according to the actual application needs. As an explanatory example, the preset range can be 1.4V to 3V, that is, the upper limit of the gate voltage is 3V and the lower limit is 1.4V.

[0049] Optional, such as Figures 1 to 4 As shown, the first circuit module 102 is at least connected to the gate of the output tube 101, and the second circuit module 103 is at least connected to the gate of the output tube 101. In other optional embodiments, as an example, Figure 1 , 3 , 4, the first circuit module 102 can be connected only to the gate of the output tube 101, such as Figure 2 The first circuit module 102 can also be connected to the gate and source of the output tube 101. Figure 1 , 3 The second circuit module 103 shown in FIG. 1 may also be connected only to the gate of the output tube 101. Figure 1 , 2 4. The second circuit module 103 can also be connected to the gate and source of the output tube 101. In addition, the first circuit module 102 and the second circuit module 103 can be connected to the gate and source of the output tube 101 in different ways, such as Figure 4 As shown ( Figure 4 The first circuit module 102 is used to limit the gate voltage (gate-source voltage V gs ) is too large, the second circuit module 103 is used to limit the gate voltage (gate-source voltage V gs ) is too small.

[0050] Optionally, the first circuit module 102 and the second circuit module 103 are connected to the source end of the output tube, and the first circuit module 102 or the second circuit module 103 can be turned on more accurately by following the output of the linear regulator. Thus, when the current shared by the target linear regulator is large, the first circuit module 102 can be automatically turned on more accurately to limit the gate voltage of the output tube to not exceed the upper limit of a preset range, so that the gate voltage of the output tube is reduced until it returns to the preset range; when the current shared by the target linear regulator is small, the second circuit module 103 can be automatically turned on more accurately to limit the gate voltage of the output tube to not exceed the lower limit of the preset range, so that the gate voltage of the output tube increases until it returns to the preset range.

[0051] In short, when a target linear regulator among several linear regulators connected in parallel shares a larger current, it means that the gate-source voltage V gs If the current is too large, for example, it exceeds the preset range configured for it, and the current shared by other linear regulators is small, the current is too concentrated in the target linear regulator. In view of this situation, the gate voltage (or gate-source voltage V gs ) does not exceed the upper limit of the preset range, thereby reducing the current load shared by the target linear regulator, thereby reducing the common output voltage of multiple linear regulators, and allowing other linear regulators to share more load current, so that the linear regulators connected in parallel can distribute the current load more reasonably. When the current shared by the target linear regulator is small, it means that the gate-source voltage V gs The target linear regulator is too small, resulting in a smaller current shared by the target linear regulator, which makes the current distribution unbalanced. The second circuit module 103 can automatically limit the gate voltage (gate-source voltage V gs ) does not exceed the lower limit of the preset range, thereby achieving the goal that the current load shared by the linear regulator increases, thereby increasing the common output voltage of multiple linear regulators, thereby causing other linear regulators to share less load current, so that the linear regulators connected in parallel can distribute the current load more reasonably, thereby avoiding excessive voltage difference of the output voltage of the linear regulator at different positions in the chip and reducing the voltage drop of the output voltage on the wiring.

[0052] Optionally, in this embodiment, the linear regulator is preferably a Class A output type linear regulator.

[0053] Based on the above-mentioned method of parallel current sharing of linear regulators, an embodiment of the present invention further provides a linear regulator for outputting an analog power supply V out , still taking the N-type output tube as an example, Figures 1 to 8As shown, it includes an output tube 101, the output tube 101 includes a source, a drain and a gate, the drain of the output tube 101 is connected to the analog power output terminal through the output node to output the analog power V out The first circuit module 102 is used for automatically starting to limit the gate voltage (gate-source voltage V gs ) does not exceed the upper limit of the preset range; the second circuit module 103 is used for automatically starting to limit the gate voltage (or gate-source voltage V of the output tube 101) when the current shared by the linear regulator is small. gs ) does not exceed the lower limit of the preset range. By setting the first circuit module 102 and the second circuit module 103, the gate voltage (gate-source voltage V gs ) so that the gate voltage (gate-source voltage V gs ) is always within an appropriate range, thereby adjusting the real-time output current of the output tube 101, so that the target linear regulator can assume a suitable output.

[0054] Further, if Figures 1 to 8 As shown, the linear regulator further includes an error amplifier 104, the error amplifier 104 has a first input terminal, a second input terminal and an output terminal, the output terminal is connected to the gate of the output tube 101, the first input terminal is connected to the reference voltage V ref , the second input terminal is connected to the output terminal of the linear regulator through the output node; wherein the first circuit module 102 is connected to the gate of the output tube 101 or is also connected to the source of the output tube 101 at the same time, and the second circuit module 103 is connected to the gate of the output tube 101 or is also connected to the source of the output tube 101 at the same time, and the details are not repeated here.

[0055] Furthermore, the linear regulator further includes a pull-down unit 105 , one end of the pull-down unit 105 is connected to the output end of the linear regulator, and the other end is grounded.

[0056] The circuit example structures of the first circuit module 102 and the second circuit module 103 are exemplarily introduced below:

[0057] like Figure 7 , 8 As shown, the first circuit module 102 includes a first diode module 1021 connected to a first voltage V1. The diode module can be one or more series-connected diode devices. The diode device can also be other devices that are substantially equivalent to the diode function, and no limitation is made here. For example, the first circuit module 102 includes a series-connected transistor 121 and a transistor 122 (such as Figure 8As shown). The gates of the transistors 121 and 122 are connected to the output of the error amplifier 104; the source of the transistor 121 is connected to the output of the error amplifier 104, and the source of the transistor 122 is connected to the first power supply voltage V1. At this time, the transistors 121 and 122 are substantially equivalent to the functions of diodes. When the current shared by the linear regulator is too large, the first voltage V1 can form a path with the gate of the output tube 101, so that the gate voltage of the output tube 101 returns to a preset range, so as to achieve balanced current distribution when multiple linear regulators are connected in parallel.

[0058] like Figure 5 As shown, a feasible example of the first circuit module 102 is shown. The first circuit module 102 may include a first clamping module 121, a pull-down module 124, a first follower module 122, and a first bias module 123. The first clamping module 121 is connected to the gate end of the output tube of the target linear regulator, and the first follower module 122 is connected to the analog power output end. The first clamping module 121 and the pull-down module 124 receive feedback from the first follower module. When the first follower module feeds back that the current shared by the linear regulator is too large, the pull-down module 124 and the gate end of the output tube can form a path, so that the gate end voltage of the output tube 101 returns to a preset range. Exemplarily (not shown), the first clamping module 121 may include a first transistor, one of the electrodes of which is connected to the gate terminal of the output tube, the other electrode of which is connected to the pull-down module, and the gate terminal of which is connected to the first follower module; the first follower module may include a third transistor, one of the electrodes of which is connected to the output terminal of the linear regulator, the other electrode of which is connected to the first bias module 123, and the gate terminal of which is connected to the first clamping module 121; the first follower module 122 may also include a first resistor, and the first transistor is connected to the output terminal of the linear regulator through the first resistor.

[0059] Further, if Figure 7 As shown, the second circuit module as a linear regulator for an N-type output tube includes a second diode module 1031 connected to a second voltage V2; the second diode module 1031 can be a diode device or a device substantially equivalent to a diode function, which is not limited here.

[0060] Optional, such as Figures 6 to 8As shown, the second circuit module 103 includes a second clamping module 131, a second following module 132, a second biasing module 133, and a pull-up module 134. The second clamping module 131 is connected to the gate end of the output tube of the target linear regulator, and the second following module 132 is connected to the output end of the linear regulator. The second clamping module 131 and the pull-up module 134 receive feedback from the second following module 132 to connect the pull-up module 134 and the gate end of the output tube. When the current shared by the linear regulator followed by the second following module 132 is too small, the pull-up module 134 and the gate end of the output tube can form a path, so that the gate end voltage of the output tube 101 returns to the preset range. For example, as Figure 8 As shown, the second clamping module 131 includes a second transistor 1311, one of which is connected to the gate of the output tube, and the other is connected to the pull-up module 134, the gate of the second transistor 1311 is connected to the second follower module 132, and the second follower module 132 includes a fourth transistor 1321, one of which is connected to the output of the linear regulator, the other is connected to the second bias module 133, and the gate is connected to the second clamping module. The second follower module also includes a second resistor 1322, and the fourth transistor 1321 is connected to the output of the linear regulator through the second resistor 1322. Exemplarily, the pull-up module 134 may further include a transistor 1341, and the second bias module 133 may further include a transistor 1342, the source of the transistor 1341 and the transistor 1342 are connected to the power supply voltage AVDD, the gate and drain of the transistor 1341 are short-circuited, the gate of the transistor 1341 is connected to the bias voltage VB, and the drain is connected to the second follower module 132.

[0061] Furthermore, the second transistor 1311 as a clamping transistor includes a source, a drain and a gate, the drain of the clamping transistor 1311 is connected to the power supply voltage AVDD, and the source is connected to the gate of the output tube 101; when the load current feedback distributed by the second follower module 132 is too small, the second follower module 132 controls the gate-source voltage of the clamping transistor 1311, so that the clamping transistor 1311 is in a conductive state, so that the power supply voltage AVDD forms a path with the gate end of the output tube, so that the voltage at the gate end of the output tube 101 rises back to a preset range, and then the gate voltage of the output tube 101 returns to a preset range.

[0062] Specifically, Figure 8As shown, the second follower module 132 includes: a fourth transistor 1321, and preferably, a second resistor 1322. The gate and source of the fourth transistor 1321 are short-circuited, and the gate of the fourth transistor 1321 is connected to the gate of the clamp transistor 1311, so as to control the gate voltage of the clamp transistor 1311, so as to control the on and off of the clamp transistor 1311.

[0063] Furthermore, when the clamp transistor 1311 detects that the output tube gate voltage is too low, the clamp transistor 1311 will be turned on, so that the power supply AVDD can apply pressure to the gate of the output tube 101, so that the voltage at the gate end of the output tube 101 returns to a preset range, thereby preventing the output current of the output tube 101 from being too small.

[0064] Furthermore, the pull-up module 134 may further include a plurality of transistors 1341 , but is not limited thereto.

[0065] In addition, the first and second circuit modules of the linear regulator of the P-type output tube are given as an example. Fig.10 As shown, the linear regulator includes a P-type output tube 101, the first circuit module 1021 is specifically a diode, the diode is connected to the first voltage V1, the second circuit module 1031 can be specifically a diode, the diode is connected to the second voltage V2, when the current shared by the linear regulator is large, the second circuit module 1031 can automatically limit the gate voltage of the P-type output tube 101 to not be lower than the lower limit of the preset range; when the current shared by the linear regulator is small, its first circuit module 1021 can automatically limit the gate voltage of the P-type output tube 101 to not be higher than the upper limit of the preset range. In other embodiments, other examples of the first and second circuit modules can be derived based on the similar principle of the N-type output tube, which will not be repeated here.

[0066] An embodiment of the present invention further provides a linear regulator parallel current sharing circuit, which includes a plurality of linear regulators connected in parallel, wherein the output ends of the plurality of linear regulators connected in parallel are connected to the same node; wherein some or all of the linear regulators connected in parallel use the linear regulators mentioned in any of the aforementioned embodiments. Thus, when the current shared by the target linear regulator exceeds the preset bearing range, the first circuit module of the target linear regulator can automatically limit the gate voltage of the output tube of the linear regulator to not be higher than the upper limit of the preset range; and / or, the second circuit module of the target linear regulator can automatically limit the gate voltage of the output tube of the linear regulator to not be lower than the lower limit of the preset range. The plurality of linear regulators connected in parallel may all be N-type output tubes, may all be P-type output tubes, or may some be N-type output tubes and some be P-type output tubes. Fig. 9As shown, taking N-type output tubes as an example, the linear regulator parallel current sharing circuit includes the linear regulators described in any of the above embodiments connected in parallel. In this embodiment, N (N≥2) linear regulators 1, ..., N-1, N are connected in parallel, and the output ends of the N parallel linear regulators are connected to an output node 201 to supply power to the outside. When the current shared by a certain (target) linear regulator is too large, its matching first circuit module 102 can automatically start to limit the gate voltage (gate-source voltage V gs ) so that the gate voltage of the output tube returns to the preset range; when the current shared by the target linear regulator is small, the second circuit module 103 can automatically start to limit the gate voltage (gate-source voltage V gs ), so that the gate voltage of the output tube returns to the preset range. The gate-source voltage V of the output tube 101 is limited by the first circuit module 102 and the second circuit module 103. gs The output current shared by each linear regulator is adjusted to balance the load distribution of each linear regulator, and a relatively uniform load current sharing between multiple linear regulators is achieved. Different linear regulators in parallel can also work within their own appropriate capacity range, thereby ensuring stable power supply to various parts of the load, thereby avoiding excessive voltage difference of the output voltage of the linear regulator at different positions in the chip, and avoiding excessive voltage drop of the output voltage on the wiring.

[0067] An embodiment of the present invention further provides a display driver or touch sensing chip including the aforementioned linear regulator parallel current balancing circuit. Through the aforementioned linear regulator parallel current balancing circuit, the linear regulators distributed throughout the narrow strip chip can provide stable and uniform power supply to different locations of the load, thereby avoiding excessive voltage difference of the output voltage of the linear regulator at different locations in the chip, and also avoiding excessive voltage drop of the output voltage on the wiring.

[0068] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the present invention. After reading the above content, it will be apparent to those skilled in the art that various modifications and substitutions of the present invention will occur. Therefore, the protection scope of the present invention should be limited by the appended claims.

Claims

1. A method for parallel current sharing of linear regulators, characterized in that: A first circuit module and / or a second circuit module are provided for the parallel target linear regulator, wherein when the current shared by the target linear regulator exceeds a preset bearing range, The first circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be higher than the upper limit of a preset range; The second circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be lower than the lower limit of a preset range.

2. The method for parallel current sharing of linear regulators according to claim 1, characterized in that: The preset range is determined according to the upper and lower limits of the current to be distributed and the driving capability of the output tube of the target linear voltage regulator.

3. The method for parallel current sharing of linear regulators according to claim 1, characterized in that: The preset range of the target linear regulator is the same as or different from the preset range of the linear regulator connected in parallel therewith.

4. The method for parallel current sharing of linear regulators according to claim 1, characterized in that: When the current shared by the target linear regulator is relatively large, the first circuit module thereof can automatically limit the gate voltage of the N-type output tube to not be higher than the upper limit of a preset range; and / or, When the current shared by the target linear regulator is small, the second circuit module thereof can automatically limit the gate voltage of the N-type output tube to not be lower than the lower limit of the preset range.

5. The method for parallel current sharing of linear regulators according to claim 1, characterized in that: When the current shared by the target linear regulator is relatively large, the second circuit module thereof can automatically limit the gate voltage of the P-type output tube to not be lower than the lower limit of a preset range; and / or, When the current shared by the target linear regulator is small, the first circuit module can automatically limit the gate voltage of the P-type output tube to not be higher than the upper limit of the preset range.

6. The method for parallel current sharing of linear regulators according to claim 1, characterized in that: The linear regulators connected in parallel all use linear regulators with N-type output tubes, or all use linear regulators with P-type output tubes, or both use linear regulators with N-type output tubes and linear regulators with P-type output tubes.

7. The method for parallel current sharing of linear regulators according to claim 1, characterized in that: The first circuit module and / or the second circuit module is at least connected to the gate end of the output tube.

8. The method for parallel current sharing of linear regulators according to claim 7, characterized in that: The first circuit module and / or the second circuit module is connected to the gate terminal of the output tube and also connected to the output terminal of the target linear regulator.

9. A linear regulator, characterized in that: The linear regulator comprises an output tube, and the output tube is N-type or P-type; it is suitable for applying the method for parallel current sharing of linear regulators as described in any one of claims 1 to 6.

10. The linear regulator according to claim 9, characterized in that: The first circuit module includes a first diode module connected to a first voltage; or, The first circuit module includes a first clamping module, a pull-down module, and a first follower module. The first clamping module is connected to the gate end of the output tube of the target linear regulator, and the first follower module is connected to the output end of the linear regulator. The first clamping module and the pull-down module are fed back by the first follower module to connect the pull-down module and the gate end of the output tube.

11. The linear regulator according to claim 9, characterized in that: The second circuit module includes a second diode module connected to a second voltage; or, The second circuit module includes a second clamping module, a pull-up module, and a second follower module. The second clamping module is connected to the gate end of the output tube of the target linear regulator, and the second follower module is connected to the output end of the linear regulator. The second clamping module and the pull-up module receive feedback from the second follower module to connect the pull-up module and the gate end of the output tube.

12. The linear regulator according to claim 10 or 11, characterized in that: The first clamping module comprises a first transistor, one electrode of which is connected to the gate terminal of the output tube, the other electrode of which is connected to the pull-down module, and the gate terminal of which is connected to the first follower module; and / or, The second clamping module comprises a second transistor, one electrode of which is connected to the gate terminal of the output tube, the other electrode of which is connected to the pull-up module, and the gate terminal of which is connected to the second follower module.

13. The linear regulator according to claim 12, characterized in that: The first follower module comprises a third transistor, one electrode of the third transistor is connected to the output end of the linear regulator, the other electrode is connected to the first bias module, and the gate end is connected to the first clamping module; and / or, The second follower module includes a fourth transistor, one electrode of the fourth transistor is connected to the output end of the linear regulator, the other electrode is connected to the second bias module, and the gate end of the fourth transistor is connected to the second clamping module.

14. The linear regulator according to claim 13, characterized in that: The first follower module further includes a first resistor, and the first transistor is connected to the output end of the linear regulator through the first resistor; or / and, The second follower module further includes a second resistor, and the second transistor is connected to the output end of the linear regulator through the second resistor.

15. The linear regulator according to claim 10 or 11, characterized in that: The first diode module and / or the second diode module comprises a diode or a plurality of series-connected diodes with one end connected to the gate end of the output tube.

16. The linear regulator according to claim 9, characterized in that: Also includes, The error amplifier has a first input terminal, a second input terminal, and an output terminal, wherein the output terminal is connected to the gate of the output tube, the first input terminal is connected to a reference voltage, and the second input terminal is connected to the output terminal of the linear regulator.

17. The linear regulator according to claim 9, characterized in that: The linear voltage regulator is a Class A output type linear voltage regulator.

18. A linear regulator parallel current sharing circuit, characterized in that: The invention comprises a plurality of linear regulators connected in parallel, wherein the output terminals of the plurality of linear regulators connected in parallel are connected to the same node; wherein some or all of the linear regulators connected in parallel are the linear regulators according to any one of claims 9 to 17, thereby: When the current shared by the target linear regulator exceeds a preset bearing range, the first circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be higher than the upper limit of the preset range; and / or, the second circuit module of the target linear regulator can automatically limit the gate voltage of its output tube to not be lower than the lower limit of the preset range.

19. A display driver or touch sensing chip, characterized in that: It includes the linear regulator parallel current sharing circuit as described in claim 18.

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