Wear leveling method for storage device and storage device

Abstract

The invention discloses a wear leveling method for a storage device and the storage device. The storage device comprises a plurality of sectors used for storing data, and the wear leveling method comprises the following operation executed in the storage device: in response to an obtained write instruction for the storage device, determining a first sector corresponding to the write instruction; obtaining the erasing times of the first sector; and selectively screening out a second sector for replacing the first sector from a plurality of sectors based on the erasing times of the first sector so as to execute the write instruction in the second sector. Through the scheme disclosed by the invention, balanced erasing and writing of the storage equipment can be quickly and efficiently realized, and the service life of the storage equipment is effectively prolonged.

Description

Technical Field

[0001] The present disclosure generally relates to the field of memory technology. More specifically, the present disclosure relates to a wear leveling method for a storage device and a storage device. Background Art

[0002] Non-volatile memory is a popular read-only memory that can be repeatedly erased and written. However, the number of times a block in a non-volatile memory can be erased and written is limited. Repeated erasing and writing of the same block will cause the block to be read more slowly or even damaged.

[0003] In the related art, in order to improve the life of the memory, the user's main control is usually used to manage the blocks in the memory. This management method is not only complex in algorithm and difficult to develop, but also consumes a lot of resources. In addition, the memory data and status need to be read to the local for processing, which has low operating efficiency and does not significantly improve the life of the memory.

[0004] In view of this, there is an urgent need to provide a wear leveling solution for storage devices, so as to quickly and efficiently achieve balanced erasing and writing of storage devices, and effectively extend the service life of storage devices. Summary of the invention

[0005] In order to at least solve one or more of the technical problems mentioned above, the present disclosure proposes a wear leveling method for a storage device and a storage device in multiple aspects.

[0006] In a first aspect, the present disclosure provides a wear leveling method for a storage device, characterized in that the storage device includes multiple sectors for storing data, and the wear leveling method includes performing the following operations inside the storage device: in response to obtaining a write instruction for the storage device, determining a first sector corresponding to the write instruction; obtaining the number of erase and write times of the first sector; and based on the number of erase and write times of the first sector, selectively selecting a second sector from multiple sectors to replace the first sector, so as to execute the write instruction in the second sector.

[0007] In some embodiments, wherein the storage space of the storage device includes a physical space, and the multiple sectors are located in the physical space, the wear leveling method further includes: constructing an address mapping space in the storage space of the storage device, wherein the address mapping space is configured to record a mapping relationship between a logical address and a physical address in units of sectors; wherein the write instruction includes a target logical address, and determining the first sector corresponding to the write instruction includes: searching for a target physical address having a mapping relationship with the target logical address based on the address mapping space; and determining that the sector having the target physical address among the multiple sectors is the first sector.

[0008] In some embodiments, the wear leveling method further includes: constructing an erase count recording space in the storage space of the storage device, wherein the erase count recording space is configured to record the erase count of sectors in the storage device; wherein obtaining the erase count of the first sector includes: searching for the erase count of the first sector based on the erase count recording space.

[0009] In some embodiments, based on the number of erase and write times of the first sector, selectively selecting a second sector from multiple sectors to replace the first sector includes: detecting whether the number of erase and write times of the first sector reaches a threshold; in response to the number of erase and write times of the first sector reaching the threshold, selecting a second sector from multiple sectors to replace the first sector; or in response to the number of erase and write times of the first sector not reaching the threshold, executing the write instruction in the first sector.

[0010] In some embodiments, when the number of erase times of a sector in the erase times recording space reaches the threshold, the lower digit of the number of erase times of the sector in the erase times recording space is rounded to the higher digit and cleared, and the method for detecting whether the number of erase times of the first sector reaches the threshold includes: detecting whether the lower digit of the number of erase times of the first sector reaches the threshold.

[0011] In some embodiments, selecting a second sector from a plurality of sectors to replace the first sector includes: traversing all sectors in the storage device to select a sector with the smallest number of erase times from all sectors and using it as the second sector.

[0012] In some embodiments, when there are multiple sectors with the smallest number of erase times, selecting a second sector from the multiple sectors to replace the first sector further includes: selecting a sector whose physical address is closest to the first sector from the multiple sectors with the smallest number of erase times, and using it as the second sector.

[0013] In some embodiments, wherein the write instruction also includes data to be written, executing the write instruction in the second sector includes: storing the original data in the second sector in the first sector; updating the mapping relationship between the logical address and the physical address corresponding to the first sector and the second sector in the address mapping space, wherein the physical address of the second sector after the mapping relationship is updated corresponds to the target logical address; and writing the data to be written into the second sector after the mapping relationship is updated, and updating the erase and write count of the second sector after the mapping relationship is updated recorded in the erase and write count recording space.

[0014] In some embodiments, the wear leveling method further includes: backing up the address mapping space and the erase count recording space to obtain backup data; and in response to damage to the address mapping space or the erase count recording space, using the backup data to repair the damaged address mapping space or the erase count recording space.

[0015] In some embodiments, before the step of determining the first sector corresponding to the write instruction, it also includes: obtaining a target access instruction for the storage device; detecting whether the target access instruction is a write instruction; and in response to the target access instruction being the write instruction, determining that a write instruction for the storage device is obtained.

[0016] In some embodiments, wherein the target access instruction also includes a read instruction, wherein an address mapping space is stored in the storage space of the storage device, and the address mapping space is configured to record a mapping relationship between a logical address and a physical address in units of sectors, the wear leveling method further includes: detecting whether the target access instruction is a read instruction, wherein the read instruction includes a specified logical address; in response to determining that the target access instruction is the read instruction, searching for a physical address that has a mapping relationship with the specified logical address based on the address mapping space; reading data stored in a sector corresponding to the found physical address, and feeding back the read data to the sender of the read instruction.

[0017] In a second aspect, the present disclosure provides a storage device, further comprising: a processor; and a memory storing computer instructions for wear leveling of the storage device, wherein when the computer instructions are executed by the processor, the storage device executes the method described in the first aspect above.

[0018] Through the wear leveling method and storage device for storage devices provided above, the disclosed embodiment determines the first sector corresponding to the write instruction for the storage device and the number of erasures of the first sector in the storage, and selectively selects the second sector that can replace the first sector to execute the write instruction according to the number of erasures of the first sector. Therefore, the disclosed solution can make full use of the number of erasures of each sector to adjust the actually required sectors for erasure, realize the balanced erasure of sectors in the storage device, so that the sectors in the storage device can evenly undertake the erasure task, avoid the problem of uneven erasure of sectors in the storage device causing easy damage to the sectors, thereby effectively improving the service life of the storage device. In addition, the disclosed solution is built into the storage device, which can give full play to the high efficiency, speed, parallelism and other characteristics of the hardware inside the storage device. At the same time, the execution process of the entire solution does not rely on the main control, and there is no need for frequent interaction between the storage device and the main control, which effectively improves the execution efficiency of the entire solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] By reading the detailed description below with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0020] Figure 1 A schematic flow chart of a wear leveling method for a storage device according to an embodiment of the present disclosure is shown;

[0021] Figure 2 A schematic flow chart showing a wear leveling method for a storage device according to another embodiment of the present disclosure is shown;

[0022] Figure 3 A schematic diagram showing a mapping relationship between a logical space and a physical space according to an embodiment of the present disclosure;

[0023] Figure 4 A schematic diagram showing an execution process of a write instruction according to an embodiment of the present disclosure;

[0024] Figure 5 A schematic diagram showing an execution process of a write instruction according to another embodiment of the present disclosure;

[0025] Figure 6 A schematic diagram showing a data writing process of an embodiment of the present disclosure;

[0026] Figure 7 A schematic diagram showing a data writing process according to another embodiment of the present disclosure;

[0027] Figure 8 A schematic diagram showing an exchange process between sectors according to an embodiment of the present disclosure;

[0028] Fig. 9 A schematic diagram showing the execution process of a read instruction according to an embodiment of the present disclosure; and

[0029] Fig.10 A schematic structural block diagram of a storage device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.

[0031] It should be understood that the terms "include" and "comprising" used in the specification and claims of the present disclosure indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0032] It should also be understood that the terms used in this disclosure are only for the purpose of describing specific embodiments and are not intended to limit the disclosure. As used in this disclosure and claims, the singular forms of "a", "an", and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be further understood that the term "and / or" used in this disclosure and claims refers to any combination of one or more of the associated listed items and all possible combinations, including these combinations.

[0033] As used in this specification and claims, the term "if" may be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" may be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0034] Exemplary application scenarios

[0035] As described in the background technology above, the blocks in the memory are not erased uniformly, which makes the blocks that are erased frequently easily damaged, thus affecting the service life of the memory. However, the prior art mainly relies on the main control to control the blocks in the memory, which is a software management solution that requires the main control to read the memory data and status to the local for processing. This software management solution is not only complex in algorithm, difficult to develop, and consumes a lot of resources, but also requires frequent interaction between the main control and the memory, and has low operating efficiency.

[0036] In order to solve the problems in the above scenario, the inventor proposed a wear leveling solution for storage devices. The balance in the wear leveling technology means to use each storage block in the storage device as evenly as possible to avoid some blocks being overused and becoming bad blocks and some blocks being used too infrequently. If wear leveling is not performed, some storage blocks may be frequently used for erasure, and these frequently used storage blocks may easily die. With continuous writing, more and more bad blocks appear, and finally the storage device hangs before the shelf life. On the contrary, if all blocks in all storage devices are allowed to bear together, more user data can be written. In order to achieve wear leveling of storage devices, the inventor found that the number of erase and write times of sectors in the storage device can be used to select appropriate sectors to execute write instructions, thereby achieving erase and write balance of sectors in the storage device, and the entire solution is built into the storage device for execution, which can make full use of the hardware advantages of the storage device itself and improve the execution efficiency of the entire solution.

[0037] The following combination Figures 1 to 10 The scheme of the present disclosure is described in detail.

[0038] Figure 1 A flowchart of a wear leveling method 100 for a storage device according to an embodiment of the present disclosure is shown. It should be noted that the storage device in the solution of the present disclosure may include any storage device with a wear leveling requirement, and the solution of the present disclosure does not limit the specific type and model of the storage device.

[0039] The storage device in the solution disclosed herein includes a plurality of sectors (ie, physical blocks, or storage blocks) for storing data. The wear leveling method 100 is specifically built into the storage device (eg, built into a storage chip of the storage device), and specifically performs the following operations inside the storage device:

[0040] like Figure 1 As shown, at step S101, in response to obtaining a write instruction for a storage device, the first sector corresponding to the write instruction is determined. In the solution disclosed herein, if a user wants to store data in a storage device, a write instruction can be sent to the storage device through a host. After the storage device obtains or receives the write instruction, the first sector corresponding to the write instruction is determined based on the write instruction inside the storage device. It should be noted that the first sector can be any sector in the storage device, which needs to be determined specifically according to the write instruction.

[0041] At step S102, the erasure count of the aforementioned first sector may be obtained. After a sector in the storage device is determined to be the first sector, the erasure count of the first sector may be further determined inside the storage device.

[0042] At step S103, based on the erasure times of the first sector, a second sector for replacing the first sector can be selectively selected from a plurality of sectors to execute the write instruction in the second sector. The service life of each sector is limited by its erasure times. If a sector is erased too many times (i.e., erased frequently), it is more likely to be damaged relative to other sectors. Therefore, the sector that actually executes the write instruction can be adjusted according to the erasure times of the sector to achieve balanced erasure of each sector.

[0043] Therefore, the erasing times of each sector are fully utilized to adjust the actually required sectors for erasing, and balanced erasing of sectors in the storage device is achieved, so that sectors in the storage device can evenly undertake erasing tasks, avoiding the problem of uneven erasing of sectors in the storage device causing easy damage to sectors, thereby effectively improving the service life of the storage device. In addition, the disclosed solution is built into the storage device, which can give full play to the high efficiency, speed, parallelism and other characteristics of the hardware inside the storage device. At the same time, the execution process of the entire solution does not rely on the main control, and there is no need for frequent interaction between the storage device and the main control, which effectively improves the execution efficiency of the entire solution.

[0044] Figure 2 FIG. 2 is a flow chart of a wear leveling method 200 according to another embodiment of the present disclosure. It can be understood that: Figure 2 The wear leveling method 200 in the embodiment can be understood as Figure 1 Further expansion or supplement of the wear leveling method 100 in the above. Figure 1 The relevant description also applies to the following.

[0045] For example, the wear leveling method 200 is also built into a storage device (such as a storage chip of the storage device), and specifically performs the following operations inside the storage device:

[0046] like Figure 2 As shown, at step S201, an address mapping space may be constructed in a storage space of a storage device.

[0047] In this embodiment, the storage device includes a plurality of sectors for storing data, and the storage space of the storage device includes a physical space, in which the aforementioned plurality of sectors are specifically located. In conventional technology, a user would directly access the physical space of the memory through the master control (for example, the storage device can be directly accessed through the physical address). Different from the conventional technology, the present embodiment can pre-construct an address mapping space in the storage space of the storage device, and the address mapping space is configured to record the mapping relationship between the logical address and the physical address in units of sectors. That is, a layer of logical address is added in front of the physical address, and the two addresses are a one-to-one mapping relationship in units of sectors, and the mapping relationship is recorded or stored in the address mapping space.

[0048] In step S202, in response to obtaining a write instruction for a storage device, a target physical address having a mapping relationship with a target logical address may be searched according to an address mapping space, and a sector having the target physical address among multiple sectors may be determined as a first sector.

[0049] In this embodiment, the physical space of the storage device is invisible to the user, and the user can implement write operations on the storage device through the logical space. Specifically, when the user has a write demand, the logical space can be accessed through the master control, and the storage device can be accessed based on a certain logical address in the logical space. For example, a write instruction containing a target logical address can be sent to the storage device. After obtaining the write instruction, the storage device can extract the target logical address from the write instruction and read the information recorded in the address mapping space to determine the target physical address that has a mapping relationship with the target logical address, thereby using the found target physical address as the first sector.

[0050] Furthermore, in some embodiments, the aforementioned storage device includes not only a physical space and an address mapping space, but also an erase count recording space, through which the erase count recording space can be used to determine the erase count of any sector.

[0051] Specifically, at step S203, a space for recording the number of erases and writes can be constructed in the storage space of the storage device, and the number of erases and writes of the first sector can be searched based on the space for recording the number of erases and writes. The space for recording the number of erases and writes is configured to record the number of erases and writes of sectors in the storage device. It should be noted that the timing for constructing the space for recording the number of erases and writes is not limited here, and it can be executed between step S201 and step S202, before step S201, or after step S202. After determining the first sector corresponding to the write instruction, the number of erases and writes of the first sector can be further searched based on the space for recording the number of erases and writes.

[0052] After determining the first sector and the number of erasures and writes of the first sector, at step S204, it can be detected whether the number of erasures and writes of the first sector reaches a threshold. In the scheme disclosed herein, the threshold can be 256 times, 512 times, etc., and can be set and adjusted according to actual application requirements and the total number of erasures and writes that can be supported by the sector in the storage device. Generally, the threshold can maintain a certain proportional relationship with the total number of erasures and writes that can be supported by the sector, and the threshold is not easy to be too large or too small.

[0053] At step S205, in response to the erasure times of the first sector reaching a threshold value, a second sector for replacing the first sector can be screened out from a plurality of sectors. In the present embodiment, the setting of the aforementioned threshold value can be understood as dividing the total erasure times of the sector into stages, and in each stage, the erasure times of the sector can reach a maximum of the threshold value. In a certain stage, if the erasure times of a sector does not reach the threshold value, it means that the sector is not erased frequently, and a write instruction can be directly executed in the sector without screening other sectors to replace the sector. If the erasure times of a sector reaches the threshold value, the erasure times of other sectors in the same stage can be traversed to find the sector with the smallest erasure times to replace the sector. When the erasure times of all sectors in the same stage reach the threshold value, the threshold judgment and sector screening of the next stage can be started for all sectors in the storage device.

[0054] The scheme disclosed herein preferably adopts a method of detecting whether the low digit in the erasure number of the first sector reaches a threshold value to determine whether the erasure number of the first sector reaches a threshold value. In the present embodiment, when the erasure number of the sector in the erasure number recording space reaches the threshold value, the low digit of the erasure number of the sector in the erasure number recording space is carried to the high digit and cleared. For example, the erasure number of the sector in the erasure number recording space can be counted in hexadecimal (high 8 bits and low 8 bits). When the erasure number of the sector reaches the threshold value, the low 8 digits of the erasure number of the sector in the erasure number recording space are carried to the high 8 digits and the low 8 bits are cleared, so it is possible to detect whether the low 8 bits in the erasure number of the first sector reaches the threshold value to realize the aforementioned cyclic threshold judgment.

[0055] When it is determined that the second sector that replaces the first sector needs to be screened, the screening of the second sector can be achieved in a variety of ways. For example, all sectors in the storage device can be traversed to screen out the sector with the smallest number of erases and writes from all sectors, and use it as the second sector. In this example, all sectors in the storage device can be traversed to read the number of erases and writes of each sector from the erase and write number recording space, and then the sector with the smallest number of erases and writes can be screened out from all sectors as the second sector. The scheme disclosed herein does not specifically limit the traversal method of the sectors, for example, sequential traversal or other traversal methods can be used.

[0056] Furthermore, in some embodiments, there may be multiple sectors with the smallest number of erase times, and in this case, a sector with a physical address closest to the first sector may be selected from the multiple sectors with the smallest number of erase times and used as the second sector. Thus, the execution efficiency of the write instruction can be effectively improved.

[0057] After the second sector is screened out, at step S206, the original data in the second sector can be stored in the first sector. Then, at step S207, the mapping relationship between the logical address and the physical address corresponding to the first sector and the second sector in the address mapping space can be updated. The physical address of the second sector after the mapping relationship is updated corresponds to the target logical address, and the physical address of the first sector after the mapping relationship is updated corresponds to the original logical address of the second sector. Then, at step S208, the data to be written contained in the write instruction can be written into the second sector after the mapping relationship is updated, and the erasure count of the second sector after the mapping relationship is updated recorded in the erasure count recording space is updated.

[0058] For example, assume that in the address mapping space, logical address 1 corresponds to the first sector of physical address 1, and logical address 2 corresponds to the second sector of physical address 2, and logical address 1 is the target logical address. When the number of erase and write times of the first sector reaches a threshold, and the second sector is a sector selected to replace the first sector, the original data in the second sector can be stored in the first sector first. Then, the mapping relationship between the logical address and the physical address corresponding to the first sector and the second sector is updated. Among them, the physical address 1 of the first sector after the mapping relationship is updated corresponds to the logical address 2, and the physical address 2 of the second sector after the mapping relationship is updated corresponds to the logical address 1. Then, the data to be written contained in the write instruction can be written to the second sector with the updated mapping relationship, and the number of erase and write times of the second sector after the mapping relationship is updated can be updated. It should be noted that the adjustment of the mapping relationship of the sector does not affect the total number of erase and write times of the sector recorded in the erase and write times recording space. For example, before the mapping relationship is adjusted, the erasure count of the second sector is 1, then before writing data to the second sector after the mapping relationship is adjusted, the erasure count of the second sector after the mapping relationship is adjusted is 1, and after writing data once to the second sector after the mapping relationship is adjusted, the erasure count of the second sector after the mapping relationship is adjusted is updated to 2. Thus, the write instruction is executed in the second sector.

[0059] Furthermore, in some embodiments, the aforementioned address mapping space and erasure count recording space may be backed up to obtain backup data. In response to damage to the address mapping space or the erasure count recording space, the backup data may be used to repair the damaged address mapping space or the erasure count recording space. For example, when the address mapping space or the erasure count recording space may be damaged during the power-off phase, the address mapping space and the erasure count recording space may be backed up, and then the address mapping space and the erasure count recording space may be checked during the power-on phase to see if they are damaged. When the address mapping space is damaged, the backup of the address mapping space may be used to repair the damaged address mapping space. When the erasure count recording space is damaged, the backup of the erasure count recording space may be used to repair the damaged erasure count recording space.

[0060] Furthermore, in some embodiments, before determining the first sector to which the write instruction corresponds, the write instruction needs to be identified. Specifically, a target access instruction for the storage device may be obtained first, and then the target access instruction may be detected to determine whether it is a write instruction. In response to the target access instruction being a write instruction, it is determined that a write instruction for the storage device is obtained. Then, steps S201 to S208 may be executed to implement balanced erasing of the storage device.

[0061] Furthermore, in some embodiments, the target access instruction also includes a read instruction. In this case, it can be detected whether the target access instruction is a read instruction, wherein the read instruction includes a specified logical address. In response to determining that the target access instruction is a read instruction, a physical address having a mapping relationship with the specified logical address is searched according to the address mapping space. Then, the data stored in the sector corresponding to the found physical address is read, and the read data is fed back to the sender of the read instruction. In this way, data is read from the storage device.

[0062] In practical applications, the storage device may be provided with an IO interface, a write drive circuit, a read drive circuit and other instruction recognition circuits, and the instruction recognition circuit may be used to identify that the instruction sent to the storage device by an external device such as a master control is a write instruction or a read instruction. For example, when the IO interface receives a target access instruction sent by a sender (such as a master control), the target access instruction may be distributed to the write drive circuit and the read drive circuit, and the write drive circuit and the read drive circuit may be used to identify that the target access instruction is a write instruction or a read instruction, so as to achieve effective recognition of the write instruction or the read instruction. It should be noted that the description of the specific circuit structure in the instruction recognition circuit here is only an exemplary description, and the instruction recognition circuit may be adjusted according to actual design requirements. For example, a controller may be added to the instruction recognition circuit, the input end of the controller is connected to the IO interface, and the output end of the controller is connected to the write drive circuit and the read drive circuit. When the IO interface receives the target access instruction, it is sent to the controller, and the controller is used to distribute the target access instruction to the write drive circuit and the read drive circuit for instruction recognition.

[0063] The following combination Figure 3 to Figure 9 The specific implementation process of the solution in the above embodiment is further explained.

[0064] The storage space of the storage device in the solution disclosed herein may specifically include a physical space, an address mapping space (MAP space for short) and a erase count recording space (PT space for short).

[0065] Figure 3 It shows a mapping relationship between logical space and physical space. Figure 3 As shown, the sectors (Sector0, Sector1, ...) in the storage device are located in the physical space. The physical space is a physical storage unit used to store actual data and is invisible to the user. The logical space is an address space that the user can access. The logical space can be the same size as the physical space or smaller. The less logical space the user uses, the longer the life of the memory. Specifically, the life improvement multiple = physical address space / logical address space used by the user. The MAP space records the mapping relationship between the logical space and the physical space Sector. The two addresses correspond one-to-one in units of Sector. The PT space can record the erase and write count information of the sector in the physical space.

[0066] In actual applications, when a user needs to write data to a storage device, a write instruction can be sent to the storage device through a host. The write instruction includes a target logical address and the data to be written. After receiving the write instruction, the storage device can search for the target physical address corresponding to the target logical address according to the MAP space, and filter out the sector with the target physical address. Then, the number of erase and write times of the sector is obtained, and it is detected whether the number of erase and write times of the sector reaches a threshold. If the threshold is reached, it is necessary to find another sector that can replace the sector to execute the write instruction. If the threshold is not reached, the write instruction continues to be executed in the sector.

[0067] As an example, Figure 4 As shown, the user can send a write instruction through the host, and the storage device receives the write instruction, and can calculate the Logic Sector index (e.g., Logic X) inside the storage device, read the information in the MAP space to find the corresponding Physical Sector index (e.g., Physical Y), and determine the sector with Physical Y. Next, read the information in the PT space to obtain the erase status information (e.g., erase count) of the sector with Physical Y. Then, determine whether the erase count (e.g., the lower 8 bits) is less than a threshold value (e.g., 255). If the lower 8 bits of the erase count are less than the threshold value, keep the MAP unchanged and continue writing, and increase the erase count value of the corresponding PT area by 1.

[0068] As another example, Figure 5 As shown, the user can send a write instruction through the host, and the storage device receives the write instruction, and can calculate the Logic Sector index (e.g., Logic X) inside the storage device, read the information in the MAP space to find the corresponding physical Sector index (e.g., Pyhsic Y), and determine the sector with Pyhsic Y. Next, read the information in the PT space to obtain the erase status information (e.g., erase count) of the sector with Pyhsic Y. Then, determine whether the erase count (e.g., the lower 8 bits) is less than a threshold value (e.g., 255). If the lower 8 bits of the erase count reach or are equal to the threshold value, find the sector with the smallest erase count (or an unused sector), and exchange the MAP relationship between the two sectors before writing. For example, change the physical address corresponding to Logic X to PyhsicZ, and then write data to the sector corresponding to PyhsicZ.

[0069] For details of the above process, see Figure 6 and Figure 7When the user needs to write data to Logic 0, the storage device reads the information in the MAP space and finds that the physical address corresponding to Logic 0 is Pyhsic 0, and the sector with the Pyhsic 0 physical address is Sector 0. When the number of erase and write times (Program Time, abbreviated as PT) of Sector 0 is less than the threshold (for example, 0XFF), the data can be written directly to Sector 0. When the number of erase and write times of Sector 0 reaches the threshold, the lower 8 bits of the erase and write times of Sector 0 are carried to the higher 8 bits and the lower 8 bits are cleared (for example, 0X100). At this time, it is necessary to traverse other sectors in the storage device (Sector1, Sector2, Sector3, etc.). Figure 6 As shown in the figure, since the erase counts of Sector1, Sector2 and Sector3 are all 0, Sector1, which is closest to Sector 0 and has the smallest erase count, can be selected to replace Sector 0. At this time, the physical address corresponding to Logic 0 is Pyhsic1, and the data is written to Sector 1. Or, Figure 7 As shown, since the erase times of Sector1, Sector2 and Sector3 are 6, 3 and 1 respectively, Sector3 with the smallest erase times can be selected to replace Sector 0. At this time, the physical address corresponding to Logic 0 is Pyhsic3, and the data is written into Sector3.

[0070] That is, when a sector has been used up for a cycle (i.e. the number of erase / write times reaches the threshold), the user still wants to continue writing. At this time, it is necessary to first find a sector with the least number of erase / write times to exchange. The specific exchange process is as follows: Figure 8 .exist Figure 8 To write data Z to Logic0, the following steps need to be performed:

[0071] At step 1, search for sector Sector0 of the physical address Pyhsic0 corresponding to Logic0, and determine whether the number of erasures (PT) of Sector0 reaches a threshold value (0XFF). If the threshold value is reached, it is necessary to find a sector with the least number of erasures that can replace Sector0. In this embodiment, the sector with the least number of erasures that can replace Sector0 is Sector4, whose number of erasures is 0, and the original data or original content of Sector4 is Y.

[0072] At step 2, the original content in Sector4 may be copied to Sector0.

[0073] At step 3, the mapping relationship between the logical address and the physical address corresponding to Sector4 and Sector0 may be exchanged. For example, the physical address corresponding to Logic0 is adjusted to Pyhsic4, and the physical address corresponding to Logic4 is adjusted to Pyhsic0.

[0074] In step 4, data Z may be written into Sector 4, and the number of erasures and writes of Sector 4 may be updated.

[0075] The present disclosure can embed the wear leveling scheme in the above-mentioned embodiment into the storage chip, which is invisible to the user and can be used directly, and no complex management algorithm needs to be designed. At the same time, the wear leveling scheme is integrated into the chip, which can give full play to the high efficiency, speed, parallelism and other characteristics of the hardware. Compared with the software scheme of the main control memory in the related art, it is faster. In addition, the built-in wear leveling scheme can also achieve global wear for the storage chip that needs to implement the in-place execution (XIP) function, which is impossible for the software scheme. Through the scheme disclosed in the present disclosure, when a user accesses a certain logical address, it is mapped to the corresponding physical space for read and write operations after conversion. When executing the write instruction, it will determine whether the physical space erase and write exceeds a certain number of times. If it exceeds, find a sector with the least erase and write to exchange and then write, that is, change the mapping relationship between the two sectors. At the same time, the number of erase and write of the sector is recorded. If it does not exceed the limit, no exchange is made, the current sector continues to be written, and the number of erase and write is recorded. Through this mechanism, efficiency is guaranteed, and uniform erase and write of physical storage space is also achieved, which prolongs the service life.

[0076] Furthermore, when a user needs to read data from a storage device, a read instruction can be sent through the host. After receiving the read instruction, the storage device determines the physical address corresponding to the logical address in the read instruction and feeds back the content in the sector with the physical address to the host.

[0077] As an example, Fig. 9 As shown, when the storage device receives a read instruction, it can calculate the LogicSector index in the read instruction, read the information in the MAP space to find the corresponding physical Sector index, and read the corresponding physical Sector data and return it to the master.

[0078] Fig.10 A schematic block diagram of a storage device 1000 according to an embodiment of the present disclosure is schematically shown. Fig.10As shown, the storage device 1000 may include a processor 1001 and a memory 1002. The memory 1002 stores computer instructions for wear leveling of the storage device. When the computer instructions are executed by the processor 1001, the storage device 1000 executes: in response to obtaining a write instruction for the storage device, determining a first sector corresponding to the write instruction; obtaining the number of erasures and writes of the first sector; and based on the number of erasures and writes of the first sector, selectively selecting a second sector from a plurality of sectors for replacing the first sector, so as to execute the write instruction in the second sector.

[0079] Optionally, the storage space of the storage device includes a physical space, the multiple sectors are located in the physical space, and the wear leveling method further includes: constructing an address mapping space in the storage space of the storage device, wherein the address mapping space is configured to record a mapping relationship between a logical address and a physical address in units of sectors; wherein the write instruction includes a target logical address, and determining the first sector corresponding to the write instruction includes: searching for a target physical address having a mapping relationship with the target logical address based on the address mapping space; and determining that the sector having the target physical address among the multiple sectors is the first sector.

[0080] Optionally, the wear leveling method further includes: constructing an erase count recording space in the storage space of the storage device, wherein the erase count recording space is configured to record the erase count of sectors in the storage device; wherein obtaining the erase count of the first sector includes: searching for the erase count of the first sector based on the erase count recording space.

[0081] Optionally, based on the number of erase and write times of the first sector, selectively selecting a second sector from multiple sectors to replace the first sector includes: detecting whether the number of erase and write times of the first sector reaches a threshold; in response to the number of erase and write times of the first sector reaching the threshold, selecting a second sector from multiple sectors to replace the first sector; or in response to the number of erase and write times of the first sector not reaching the threshold, executing the write instruction in the first sector.

[0082] Optionally, when the number of erase times of a sector in the erase times recording space reaches the threshold, the lower digit of the number of erase times of the sector in the erase times recording space is rounded up to the higher digit and cleared to zero, and the method for detecting whether the number of erase times of the first sector reaches the threshold includes: detecting whether the lower digit of the number of erase times of the first sector reaches the threshold.

[0083] Optionally, selecting a second sector from a plurality of sectors to replace the first sector comprises: traversing all sectors in the storage device to select a sector with the smallest number of erasures from all sectors, and using the sector as the second sector.

[0084] Optionally, when there are multiple sectors with the smallest number of erase times, selecting a second sector from the multiple sectors to replace the first sector further includes: selecting a sector whose physical address is closest to the first sector from the multiple sectors with the smallest number of erase times, and using it as the second sector.

[0085] Optionally, the write instruction also includes data to be written, and executing the write instruction in the second sector includes: storing the original data in the second sector in the first sector; updating the mapping relationship between the logical address and the physical address corresponding to the first sector and the second sector in the address mapping space, wherein the physical address of the second sector after the mapping relationship is updated corresponds to the target logical address; and writing the data to be written into the second sector after the mapping relationship is updated, and updating the erase and write count of the second sector after the mapping relationship is updated recorded in the erase and write count recording space.

[0086] Optionally, the wear leveling method also includes: backing up the address mapping space and the erase count recording space to obtain backup data; and in response to damage to the address mapping space or the erase count recording space, using the backup data to repair the damaged address mapping space or the erase count recording space.

[0087] Optionally, before the step of determining the first sector corresponding to the write instruction, it also includes: obtaining a target access instruction for the storage device; detecting whether the target access instruction is a write instruction; and in response to the target access instruction being the write instruction, determining that the write instruction for the storage device is obtained.

[0088] Optionally, the target access instruction also includes a read instruction, wherein an address mapping space is stored in the storage space of the storage device, and the address mapping space is configured to record a mapping relationship between a logical address and a physical address in units of sectors. The wear leveling method also includes: detecting whether the target access instruction is a read instruction, wherein the read instruction includes a specified logical address; in response to determining that the target access instruction is the read instruction, searching for a physical address that has a mapping relationship with the specified logical address based on the address mapping space; reading data stored in a sector corresponding to the found physical address, and feeding back the read data to the sender of the read instruction.

[0089] Through the above implementation, the storage device can make full use of the number of erase and write times of each sector to adjust the actually required sectors for erase and write, and realize balanced erase and write of sectors in the storage device, so that sectors in the storage device can evenly bear the erase and write tasks, avoiding the problem of easy damage to sectors due to uneven erase and write of sectors in the storage device, thereby effectively improving the service life of the storage device. In addition, the disclosed solution is built into the storage device, which can give full play to the high efficiency, fast speed, parallelism and other characteristics of the hardware inside the storage device. At the same time, the execution process of the entire solution does not rely on the main control, and there is no need for frequent interaction between the storage device and the main control, which effectively improves the execution efficiency of the entire solution.

[0090] It should be noted that the specific contents of the method steps of the storage device are combined with the above Figures 1 to 9 The specific implementations of the wear leveling method for storage devices described are the same or similar, so they will not be described in detail here.

[0091] Although multiple embodiments of the present disclosure have been shown and described herein, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Those skilled in the art may think of many changes, modifications, and alternatives without departing from the thought and spirit of the present disclosure. It should be understood that in the process of practicing the present disclosure, various alternatives to the embodiments of the present disclosure described herein may be adopted. The attached claims are intended to define the scope of protection of the present disclosure, and therefore cover equivalents or alternatives within the scope of these claims.

Claims

1. A wear leveling method for a storage device, characterized in that: The storage device includes a plurality of sectors for storing data, and the wear leveling method includes performing the following operations inside the storage device: In response to obtaining a write instruction for the storage device, determining a first sector corresponding to the write instruction; Obtaining the number of erase and write times of the first sector; as well as Based on the number of erasures of the first sector, a second sector for replacing the first sector is selectively selected from a plurality of sectors, so as to execute the write instruction in the second sector.

2. The wear leveling method according to claim 1, characterized in that: The storage space of the storage device includes a physical space, the multiple sectors are located in the physical space, and the wear leveling method further includes: Constructing an address mapping space in the storage space of the storage device, wherein the address mapping space is configured to record a mapping relationship between a logical address and a physical address in units of sectors; The write instruction includes a target logical address, and determining the first sector corresponding to the write instruction includes: According to the address mapping space, searching for a target physical address having a mapping relationship with the target logical address; A sector having the target physical address among the multiple sectors is determined to be the first sector.

3. The wear leveling method according to claim 2, characterized in that: The wear leveling method further includes: Constructing a write-erasure count recording space in the storage space of the storage device, wherein the write-erasure count recording space is configured to record the write-erasure count of a sector in the storage device; Wherein, obtaining the number of erasures and writes of the first sector includes: The erasure count of the first sector is searched according to the erasure count recording space.

4. The wear leveling method according to claim 3, characterized in that: Based on the number of times the first sector is erased and written, selectively selecting a second sector from a plurality of sectors for replacing the first sector comprises: Detecting whether the number of erasures and writes of the first sector reaches a threshold; In response to the erasure number of the first sector reaching a threshold, selecting a second sector from a plurality of sectors for replacing the first sector; or In response to the erase and write times of the first sector not reaching a threshold, the write command is executed in the first sector.

5. The wear leveling method according to claim 4, characterized in that: When the number of erasures of a sector in the erasure number recording space reaches the threshold, the lower digit of the number of erasures of the sector in the erasure number recording space is rounded to the higher digit and cleared, and the method for detecting whether the number of erasures of the first sector reaches the threshold includes: It is detected whether the low bit number in the erasure times of the first sector reaches a threshold.

6. The wear leveling method according to claim 5, characterized in that: Selecting a second sector from a plurality of sectors to replace the first sector comprises: All sectors in the storage device are traversed to select a sector with the smallest number of erasures from all sectors and use it as the second sector.

7. The wear leveling method according to claim 6, characterized in that: When there are multiple sectors with the smallest number of erasure times, selecting a second sector for replacing the first sector from the multiple sectors further includes: A sector whose physical address is closest to the first sector is selected from the plurality of sectors with the smallest erasure times, and is used as the second sector.

8. The wear leveling method according to any one of claims 3 to 7, characterized in that: The write instruction also includes data to be written, and executing the write instruction in the second sector includes: storing the original data in the second sector into the first sector; updating a mapping relationship between a logical address and a physical address corresponding to the first sector and the second sector in the address mapping space, wherein the physical address of the second sector after the updated mapping relationship corresponds to the target logical address; and The data to be written is written into the second sector after the mapping relationship is updated, and the erasure times of the second sector after the mapping relationship is updated recorded in the erasure times recording space is updated.

9. The wear leveling method according to any one of claims 3 to 7, characterized in that: The wear leveling method further includes: Backing up the address mapping space and the erasure count recording space to obtain backup data; and In response to damage to the address mapping space or the erasure count recording space, the damaged address mapping space or the erasure count recording space is repaired using the backup data.

10. The wear leveling method according to claim 1, characterized in that: Before the step of determining the first sector corresponding to the write instruction, the method further includes: Obtaining a target access instruction for the storage device; detecting whether the target access instruction is a write instruction; and In response to the target access instruction being the write instruction, it is determined that a write instruction for the storage device is acquired.

11. The wear leveling method according to claim 10, characterized in that: The target access instruction further includes a read instruction, the storage space of the storage device stores an address mapping space, and the address mapping space is configured to record a mapping relationship between a logical address and a physical address in units of sectors, and the wear leveling method further includes: Detecting whether the target access instruction is a read instruction, wherein the read instruction includes a specified logical address; In response to determining that the target access instruction is the read instruction, searching for a physical address having a mapping relationship with the specified logical address according to the address mapping space; The data stored in the sector corresponding to the found physical address is read, and the read data is fed back to the sender of the read instruction.

12. A storage device, characterized in that: Also includes: processor; as well as A memory storing computer instructions for wear leveling of a storage device, wherein when the computer instructions are executed by the processor, the storage device executes the method according to any one of claims 1 to 11.

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