Order preserving method and device for out-of-order transmission of AXI bus

Abstract

The invention provides an order preserving method and device for out-of-order transmission of an AXI bus, and relates to the order preserving method for out-of-order transmission of the AXI bus, which comprises the following steps: an instruction receiving and caching module receives an instruction sent by a host through the AXI bus and transmits the instruction to an instruction routing module; the instruction routing module analyzes the instruction to obtain slave computer information in the instruction, and writes the slave computer information into a sequence of the order-preserving control module to obtain sequence information of slave computers; the instruction routing module analyzes the instruction and then sends the instruction to the slave, and the slave executes the instruction and proposes an application for feeding back an instruction execution result to the data and response arbitration control module; the data and response arbitration control module arbitrates the applications proposed by the slaves according to the sequence information of the slaves, and sends instruction execution results fed back by the corresponding slaves to the data and response cache module according to the instruction sending sequence; and the data and response cache module transmits an instruction execution result fed back by the slave to the host through the AXI bus to complete order-preserving transmission.

Description

Technical Field

[0001] The present invention belongs to the technical field of communication networks, and in particular relates to an order-preserving method and device for out-of-order transmission of an AXI bus. Background Art

[0002] The AXI (Advanced eXtensible Interface) protocol is a high-performance, high-bandwidth, low-latency on-chip bus proposed by ARM (Advanced RISC Machines). The AXI bus provides a scalable, high-bandwidth interconnection method that enables different IP (Intellectual Property) modules to communicate and transfer data efficiently in the system. The address / control, data, and response of the AXI bus are separated, and the independence of the channels makes out-of-order transmission possible. Out-of-order transmission allows the order of transmission to be not in the order of initiating the request, thereby improving the efficiency of data transmission. The AXI bus protocol defines a set of specifications and signals, and specifies the behavior in data transmission, address mapping, transmission guarantee, error handling, etc. Among them, AXI4 introduces some new features and improvements, such as out-of-order transmission, cache consistency support, etc., to improve the performance and flexibility of the system.

[0003] The AXI bus adopts a design based on the master-slave architecture, which mainly includes the AXI master (MASTER) and the AXI slave (SLAVE). During the out-of-order transmission process, the MASTER sends two or more instructions with the same ID to different SLAVEs. The order of the returned data or response signals from different SLAVEs is not consistent with the order of the issued instructions, which causes the order of the returned data or response to be unable to match the order of the instructions, thus causing data consistency problems or system function abnormalities. At present, the AXI out-of-order transmission process has the defect that after multiple instructions with the same ID are sent to different slaves, the order of the returned data or response signals from multiple slaves is inconsistent with the order of the instructions. Summary of the invention

[0004] The present application provides an order preservation method and device for AXI bus out-of-order transmission. When a host sends two or more read instructions with the same ID to different slaves, an instruction routing module parses the instructions one by one, saves the slave information in the instructions to an order preservation control module, and distributes the instructions to multiple corresponding slave-end interfaces; after receiving the instructions, each slave starts to execute the instructions. After the execution of the instructions is completed, each slave submits an application to a data and response arbitration control module, requesting to return data and a response; the data and response arbitration control module reads the order information about the slave in the order preservation control module, arbitrates the application of the slave according to the instruction distribution order, ensures that the order of returning data or responses by different slaves with the same ID during the AXI bus out-of-order transmission is consistent with the instruction issuance order, and ensures that the transmission is correct, parallel and efficient by ensuring that the response order of instructions with the same ID is consistent with the instruction distribution order.

[0005] Other purposes and advantages of the present invention can be further understood from the technical features disclosed in the present invention.

[0006] To achieve one, part, or all of the above purposes or other purposes, the present invention provides an order-preserving method and device for out-of-order transmission on an AXI bus.

[0007] A method for preserving order of out-of-order transmission of an AXI bus, comprising: The instructions sent by the host are transmitted to the instruction routing module through the instruction receiving and caching module. The instruction routing module parses the instructions according to the instruction sending order to obtain the slave information in the instructions, and writes the order information of the slaves into the sequence queue of the order preservation control module; After completing the instruction parsing, the instruction routing module sends multiple instructions to the corresponding different slaves through the corresponding slave end interface. The slave executes the corresponding instruction and submits an application for feedback of the instruction execution result to the data and response arbitration control module. The instruction execution result includes the data and response fed back after the slave executes the corresponding instruction; The data and response arbitration control module reads the sequence information of the slave in the sequence control module, and arbitrates the application submitted by the slave according to the sequence information of the slave, and sends the instruction execution result fed back by the corresponding slave to the data and response cache module for caching according to the sending order of the instructions; The data and response cache module transmits the instruction execution result fed back by the slave to the host through the AXI bus to complete the order-preserving transmission.

[0008] The specific process of the data and response arbitration control module arbitrating the application of the slave includes: Receive the request for feedback of instruction execution results from the slave, and determine whether the response order of the slave corresponding to the same ID instruction is the same as the instruction sending order according to the sequence information of the slave. If they are the same, send the instruction execution results fed back by the corresponding slave to the data and response cache module; Otherwise, the application of the unmatched slave is suspended until the response order of the slave corresponding to the application matches the sending order of the instructions, and then the instruction execution result fed back by the slave corresponding to the application is sent to the data and response cache module.

[0009] If the response order of multiple slaves corresponding to the same ID instruction is different from the sending order of the instruction, the applications of multiple unmatched slaves are suspended according to the sending order of the instruction.

[0010] The instruction routing module parses the instruction according to the instruction sending order to obtain the slave information in the instruction, and stores the slave information in the sequence control module. The sequence control module writes the slave information into the sequence queue according to the instruction sending order to obtain the sequence information of the slave.

[0011] The instruction routing module parses multiple instructions with the same ID sent by the host one by one according to the sending order, and obtains the slave information in the instructions, wherein the slave information includes the address information of the slave; The instruction routing module distributes multiple instructions to the corresponding slave-end interface through the address information of the slave, and then sends them to the corresponding different slaves through the slave-end interface.

[0012] The sequence preservation control module includes a plurality of queue sequences, and the queue sequences are used to store instruction ID values ​​and instruction slave information obtained by parsing the instructions.

[0013] The queue sequence stores the instruction ID value and the instruction slave information obtained by parsing in order according to the instruction sending order, and the data and response arbitration control module obtains the sequence information of different slaves corresponding to the same ID instruction by reading the instruction slave information stored in the queue sequence.

[0014] The number of queue sequences of the order preservation control module is not less than 1 / 2 of the maximum value of the AXI bus transmission request, and the depth of the queue sequence is consistent with the maximum value of the AXI bus transmission request.

[0015] The host communicates with the AXI bus via a host-side interface; The host sends the instruction to the instruction receiving and caching module through the AXI bus, and the instruction receiving and caching module stores the instruction and transmits it to the instruction routing module.

[0016] An order-preserving device for out-of-order transmission of an AXI bus, used to implement the above-mentioned order-preserving method for out-of-order transmission of an AXI bus, comprising: an instruction receiving and caching module, an instruction routing module, an order-preserving control module, a data and response arbitration control module, and a data and response caching module; The instruction receiving and caching module is used to receive a number of instructions sent by the host through the AXI bus, and pass the instructions to the instruction routing module; The instruction routing module is used to parse the received instructions one by one to obtain the slave information in the instructions, and send multiple instructions to the corresponding different slaves through the corresponding slave end interface according to the slave information. The slave executes the corresponding instructions and feeds back data and response as the instruction execution result, and submits an application for feedback of the instruction execution result to the data and response arbitration control module; The sequence control module writes the slave information obtained by parsing the instruction routing module into the sequence queue in order for storage, and obtains the sequence information of the slaves; The data and response arbitration control module is used to arbitrate the application submitted by the slave, and send the instruction execution result fed back by the corresponding slave to the data and response cache module according to the sending order of the instructions; The data and response cache module is used to receive the instruction execution result fed back by the machine and transmit it to the host through the AXI bus.

[0017] The sequence-preserving device is arranged between the AXI bus and the slave; The host communicates with the AXI bus via a host-side interface; Different slaves communicate with the sequence-preserving device through corresponding slave-end interfaces.

[0018] Compared with the prior art, the beneficial effects of the present invention mainly include: The present application provides an order preservation method for out-of-order transmission of an AXI bus. When a host sends two or more read instructions with the same ID to different slaves, an instruction routing module parses the instructions one by one and saves the slave information in the instructions to an order preservation control module. A data and response arbitration control module reads the sequence information about the slave in the order preservation control module, and arbitrates the slave's application according to the instruction distribution order, thereby ensuring that the order in which different slaves with the same ID return data or responses during the out-of-order transmission of the AXI bus is consistent with the instruction distribution order. By ensuring that the response order of instructions with the same ID is consistent with the instruction distribution order, the transmission is correct, parallel and efficient.

[0019] In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 A flowchart of a method for preserving order in out-of-order transmission on an AXI bus provided in Example 1 of the present application.

[0022] Figure 2 This is a schematic diagram of the structure of the sequence preservation control module provided in Example 1 of the present application.

[0023] Figure 3 A schematic diagram of a process of an AXI bus out-of-order transmission order preservation method provided in Example 1 of the present application.

[0024] Figure 4 Schematic diagram of queue sequence status of the sequence control module provided in Example 1 of the present application Figure 1 .

[0025] Figure 5 Schematic diagram of queue sequence status of the sequence control module provided in Example 1 of the present application Figure 2 .

[0026] Figure 6 A schematic diagram of the structure of an AXI bus out-of-order transmission sequence-preserving device provided in Example 2 of the present application. DETAILED DESCRIPTION

[0027] The above and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the drawings. The directional terms mentioned in the following embodiments, such as up, down, left, right, front or back, etc., are only referenced to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and not to limit the present invention.

[0028] The present application provides an order preservation method and device for AXI bus out-of-order transmission. When a host sends two or more read instructions with the same ID to different slaves, an instruction routing module parses the instructions one by one, saves the slave information in the instructions to an order preservation control module, and distributes the instructions to multiple corresponding slave-end interfaces; after receiving the instructions, each slave starts to execute the instructions. After the execution of the instructions is completed, each slave submits an application to a data and response arbitration control module, requesting to return data and a response; the data and response arbitration control module reads the order information about the slave in the order preservation control module, arbitrates the application of the slave according to the instruction distribution order, ensures that the order of returning data or responses by different slaves with the same ID during the AXI bus out-of-order transmission is consistent with the instruction issuance order, and ensures that the transmission is correct, parallel and efficient by ensuring that the response order of instructions with the same ID is consistent with the instruction distribution order.

[0029] The following will describe the various embodiments of the present application in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present application, many technical details are provided in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed in the present application can be implemented.

[0030] Example 1 Figure 1 The figure is a flow chart of a method for preserving order of out-of-order transmission on an AXI bus provided in Example 1 of the present application.

[0031] like Figure 1 As shown, a method for preserving order of out-of-order transmission of an AXI bus includes: Step S1: the host sends the instruction to the instruction receiving and caching module through the AXI bus, and the instruction receiving and caching module stores the instruction and transmits it to the instruction routing module; Among them, the host communicates with the AXI bus through the host-side interface; Step S2: the instruction routing module parses the instruction according to the instruction sending order to obtain the slave information in the instruction, and stores the slave information in the sequence control module. The sequence control module writes the slave information into the sequence queue according to the instruction sending order to obtain the sequence information of the slave; Step S3: After the instruction routing module completes the instruction parsing, it sends multiple instructions to the corresponding different slaves through the corresponding slave-side interface. The slave executes the corresponding instruction and submits an application for feedback of the instruction execution result to the data and response arbitration control module; As a preferred embodiment of the present invention, the instruction execution result in this embodiment includes data and response fed back by the slave after executing the corresponding instruction; Step S4: the data and response arbitration control module reads the order information of the slave in the order preservation control module, and arbitrates the application submitted by the slave according to the order information of the slave, and sends the instruction execution result fed back by the corresponding slave to the data and response cache module for caching according to the order of sending instructions; Step S5: The data and response cache module transmits the instruction execution result fed back by the slave to the host through the AXI bus to complete the order-preserving transmission.

[0032] Specifically, the specific process of the data and response arbitration control module arbitrating the slave's application includes: Receive the request for feedback of instruction execution results from the slave, and determine whether the response sequence of the slave corresponding to the same ID instruction is the same as the instruction sending sequence according to the sequence information of the slave. If they are the same, send the instruction execution results fed back by the corresponding slave to the data and response cache module; Otherwise, the application of the unmatched slave is suspended until the response order of the slave corresponding to the application matches the sending order of the instructions, and then the instruction execution result fed back by the slave corresponding to the application is sent to the data and response cache module.

[0033] In addition, when the host sends two or more read commands with the same ID to different slaves, if the response order of multiple slaves corresponding to the same ID commands is different from the order in which the commands are sent, the applications of multiple unmatched slaves will be suspended according to the order in which the commands are sent.

[0034] Specifically, the host sends instructions and data to the AXI bus through the host interface, and the instructions and data are stored in the instruction receiving and caching module. The instruction routing module parses multiple instructions with the same ID sent by the host one by one according to the sending order, obtains the slave information in the instruction, and saves the slave information in the instruction to the sequence queue of the order preservation control module. Among them, the slave information includes the address information of the slave. After the instruction parsing is completed, the instruction routing module distributes multiple instructions to the corresponding slave-side interface through the slave address information, and then sends them to the corresponding different slaves through the slave-side interface.

[0035] Each slave starts to execute the received instruction. After the instruction is executed, each slave submits an application to the data and response arbitration control module to request the return of data and response.

[0036] The data and response arbitration control module reads the order information about the slave in the order preservation control module, arbitrates the slave application according to the instruction distribution order, and ensures that the response order of the same ID instruction is consistent with the instruction distribution order. The data and response arbitration control module forwards the return data and instructions of the corresponding slave to the data and response cache module according to the instruction distribution order. The host reads the data and response returned by each slave through the AXI bus. The whole process realizes the order preservation operation of the same ID instruction during the disorderly transmission process.

[0037] like Figure 2 As shown, in step S2, the order-preserving control module includes multiple queue sequences, and the queue sequences are used to store multiple instruction ID values ​​and instruction slave information obtained by parsing the instructions, and the instruction ID value and the corresponding slave information correspond one to one.

[0038] The ID value and corresponding slave information of the instruction sent by the host first will be written into the queue first, and the ID value and corresponding slave information written first will be read out by the data and response arbitration control module first; the queue sequence saves the instruction ID value and the parsed instruction slave information in sequence according to the order in which the instructions are sent, and the data and response arbitration control module obtains the sequence information of different slaves corresponding to the same ID instruction by reading the instruction slave information saved in the queue sequence.

[0039] In addition, according to the actual use of the AXI protocol in on-chip bus and module communication, from the perspective of balancing device performance and circuit resources, the number of queue sequences of the order-preserving control module is not less than 1 / 2 of the maximum value (outstanding) of the AXI bus transmission request, and the depth of the queue sequence is consistent with the maximum value of the AXI bus transmission request. For example, the circuit device of the present application supports a maximum of six outstanding read and write requests, that is, the outstanding is 6, then the number of queues is 3, and the queue depth is 6, which can meet the extreme situations in the communication process without occupying too many circuit resources.

[0040] Specifically, Figure 3 As shown in the figure, the specific process of the order-preserving operation of the AXI bus out-of-order transmission includes: (1) The host M0 sends the first read command CMD0, whose ARID is 0xf and the target slave is S0; (2) The instruction routing module parses CMD0, saves the ARID of CMD0 and the information of S0 into the queue of the sequence control module, and forwards the instruction to the slave interface SIF_0 of S0. SIF_0 sends it to S0. At this time, the queue status in the slave sequence control module is as follows: Figure 4 As shown; (3) The host M0 sends the second read command CMD1, whose ARID is 0xf and the target slave is S1; (4) The instruction routing module parses CMD1, saves the ARID of CMD1 and the information of S1 into the queue of the sequence control module, and forwards the instruction to the slave interface SIF_1 of S1. SIF_1 sends it to S1. At this time, the queue status in the slave sequence control module is as follows: Figure 5 As shown; (5) After S0 and S1 receive the read command, they start to execute it. S1 executes faster than S0 and prepares the read data, i.e., data1, before S0. (6) The S1 slave interface SIF_1 sends a request to return the read data data1 to the data and response arbitration module; (7) The data and response arbitration module queries the slave sequence information stored in the queue of the sequence control module and finds that before sending CMD1, the host also sent a CMD0 with the same ARID and has not received the slave's response to CMD0. Therefore, the data and response arbitration module will suspend the SIF_1 request. (8) S0 responds to the instruction CMD0 and is ready to read data, i.e. data0; (9) The S0 slave interface SIF_0 sends a request to return the read data data0 to the data and response arbitration module; (10) The data and response arbitration module responds to the request of SIF_0, stores data0 in the data and response module, and the host interface MIF sends data0 to M0; (11) Data and Response Arbitration Module After the host M0 receives data0, the data and response arbitration module responds to the request of SIF_1, stores data1 in the data and response module, and the host interface MIF sends data1 to M0.

[0041] Through the above process, the order-preserving operation of AXI bus out-of-order transmission is achieved.

[0042] Example 2 like Figure 6 As shown, an order-preserving device for out-of-order transmission of an AXI bus is arranged between the AXI bus and a slave, and includes: an instruction receiving and caching module, an instruction routing module, an order-preserving control module, a data and response arbitration control module, and a data and response caching module; The instruction receiving and caching module is used to receive several instructions sent by the host through the AXI bus, and pass the instructions to the instruction routing module; The instruction routing module is used to parse the received instructions one by one to obtain the slave information in the instructions, and send multiple instructions to the corresponding different slaves through the corresponding slave end interface according to the slave information. The slave executes the corresponding instructions and feeds back data and response as the instruction execution result, and submits an application for feedback of the instruction execution result to the data and response arbitration control module; The order control module writes the slave information obtained by the instruction routing module into the sequence queue in order for storage, and obtains the order information of the slave; The data and response arbitration control module is used to arbitrate the application submitted by the slave, and send the instruction execution result fed back by the corresponding slave to the data and response cache module according to the sending order of the instructions; The data and response buffer module is used to receive the instruction execution results fed back by the receiver and transmit them to the host through the AXI bus.

[0043] like Figure 6 As shown, the host communicates with the AXI bus through the host-side interface, and different slaves communicate with the sequence preservation device through the corresponding slave-side interfaces.

[0044] The present application provides an order preservation method and device for AXI bus out-of-order transmission. When a host sends two or more read instructions with the same ID to different slaves, an instruction routing module parses the instructions one by one, saves the slave information in the instructions to an order preservation control module, and distributes the instructions to multiple corresponding slave-end interfaces; after receiving the instructions, each slave starts to execute the instructions. After the execution of the instructions is completed, each slave submits an application to a data and response arbitration control module, requesting to return data and a response; the data and response arbitration control module reads the order information about the slave in the order preservation control module, arbitrates the application of the slave according to the instruction distribution order, ensures that the order of returning data or responses by different slaves with the same ID during the AXI bus out-of-order transmission is consistent with the instruction issuance order, and ensures that the transmission is correct, parallel and efficient by ensuring that the response order of instructions with the same ID is consistent with the instruction distribution order.

[0045] In order to facilitate the description, some common English nouns or letters used in the present invention are only used for exemplary reference rather than restrictive interpretation or specific usage, and the protection scope of the present invention should not be limited by their possible Chinese translations or specific letters.

[0046] It should also be noted that, in this document, relational terms such as "first" and "second" are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

Claims

1. A method for preserving order in out-of-order transmission of an AXI bus, characterized in that: include: The instructions sent by the host are transmitted to the instruction routing module through the instruction receiving and caching module. The instruction routing module parses the instructions according to the instruction sending order to obtain the slave information in the instructions, and writes the order information of the slaves into the sequence queue of the order preservation control module; After completing the instruction parsing, the instruction routing module sends multiple instructions to the corresponding different slaves through the corresponding slave end interface. The slave executes the corresponding instruction and submits an application for feedback of the instruction execution result to the data and response arbitration control module. The instruction execution result includes the data and response fed back after the slave executes the corresponding instruction; The data and response arbitration control module reads the sequence information of the slave in the sequence control module, and arbitrates the application submitted by the slave according to the sequence information of the slave, and sends the instruction execution result fed back by the corresponding slave to the data and response cache module for caching according to the sending order of the instructions; The data and response cache module transmits the instruction execution result fed back by the slave to the host through the AXI bus to complete the order-preserving transmission.

2. The method for preserving order of out-of-order transmission of an AXI bus according to claim 1, characterized in that: The specific process of the data and response arbitration control module arbitrating the application of the slave includes: Receive the request for feedback of instruction execution results from the slave, and determine whether the response order of the slave corresponding to the same ID instruction is the same as the instruction sending order according to the sequence information of the slave. If they are the same, send the instruction execution results fed back by the corresponding slave to the data and response cache module; Otherwise, the application of the unmatched slave is suspended until the response order of the slave corresponding to the application matches the sending order of the instructions, and then the instruction execution result fed back by the slave corresponding to the application is sent to the data and response cache module.

3. The method for preserving order of out-of-order transmission of an AXI bus according to claim 2, characterized in that: If the response order of multiple slaves corresponding to the same ID instruction is different from the sending order of the instruction, the applications of multiple unmatched slaves are suspended according to the sending order of the instruction.

4. The method for preserving order of out-of-order transmission of an AXI bus according to claim 1, characterized in that: The instruction routing module parses the instruction according to the instruction sending order to obtain the slave information in the instruction, and stores the slave information in the sequence control module. The sequence control module writes the slave information into the sequence queue according to the instruction sending order to obtain the sequence information of the slave.

5. The method for preserving order of out-of-order transmission of an AXI bus according to claim 4, characterized in that: The instruction routing module parses multiple instructions with the same ID sent by the host one by one according to the sending order, and obtains the slave information in the instructions, wherein the slave information includes the address information of the slave; The instruction routing module distributes multiple instructions to the corresponding slave-end interface through the address information of the slave, and then sends them to the corresponding different slaves through the slave-end interface.

6. The method for preserving order of out-of-order transmission of an AXI bus according to claim 5, characterized in that: The sequence preservation control module includes a plurality of queue sequences, and the queue sequences are used to store instruction ID values ​​and instruction slave information obtained by parsing the instructions.

7. The method for preserving order of out-of-order transmission of an AXI bus according to claim 6, characterized in that: The queue sequence stores the instruction ID value and the instruction slave information obtained by parsing in order according to the instruction sending order, and the data and response arbitration control module obtains the sequence information of different slaves corresponding to the same ID instruction by reading the instruction slave information stored in the queue sequence.

8. The method for preserving order of out-of-order transmission of an AXI bus according to claim 7, characterized in that: The number of queue sequences of the order preservation control module is not less than 1 / 2 of the maximum value of the AXI bus transmission request, and the depth of the queue sequence is consistent with the maximum value of the AXI bus transmission request.

9. The method for preserving order of out-of-order transmission of an AXI bus according to claim 1, characterized in that: The host communicates with the AXI bus via a host-side interface; The host sends the instruction to the instruction receiving and caching module through the AXI bus, and the instruction receiving and caching module stores the instruction and transmits it to the instruction routing module.

10. An AXI bus out-of-order transmission sequence preservation device, used to implement an AXI bus out-of-order transmission sequence preservation method according to any one of claims 1 to 9, characterized in that: include: Instruction receiving and caching module, instruction routing module, order preservation control module, data and response arbitration control module and data and response caching module; The instruction receiving and caching module is used to receive a number of instructions sent by the host through the AXI bus, and pass the instructions to the instruction routing module; The instruction routing module is used to parse the received instructions one by one to obtain the slave information in the instructions, and send multiple instructions to the corresponding different slaves through the corresponding slave end interface according to the slave information. The slave executes the corresponding instructions and feeds back data and response as the instruction execution result, and submits an application for feedback of the instruction execution result to the data and response arbitration control module; The sequence control module writes the slave information obtained by parsing the instruction routing module into the sequence queue in order for storage, and obtains the sequence information of the slaves; The data and response arbitration control module is used to arbitrate the application submitted by the slave, and send the instruction execution result fed back by the corresponding slave to the data and response cache module according to the sending order of the instructions; The data and response cache module is used to receive the instruction execution result fed back by the machine and transmit it to the host through the AXI bus.

11. The sequence-preserving device for out-of-order transmission of an AXI bus according to claim 10, characterized in that: The sequence-preserving device is arranged between the AXI bus and the slave; The host communicates with the AXI bus via a host-side interface; Different slaves communicate with the sequence-preserving device via corresponding slave-end interfaces.

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