Chip verification platform calling method and device, electronic equipment and storage medium

Abstract

The invention provides a calling method and device for a chip verification platform, electronic equipment and a computer readable storage medium, and the method comprises the steps: compiling and operating a software language calling program, and enabling a preset compatible link library to have software method interfaces for packaging various software languages; according to the method, a matched software method interface is determined for a calling function to be executed in a software language calling program, a corresponding verification link file is called for execution through the software method interface determined to be matched with the calling function, and an execution result is output as a return value of the calling function. According to the method, the execution result of the verification link file packaged by the chip verification platform performance function method is obtained, calling through a hardware description language is converted into calling through a software language calling program, the learning cost of the hardware description language with high learning complexity is reduced, and the chip verification learning difficulty is reduced.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, electronic device and computer-readable storage medium for calling a chip verification platform. Background Art

[0002] Chip verification is very important in integrated circuit design, and its purpose is to confirm that the chip design meets the specification requirements.

[0003] Chip verification is usually implemented using a chip verification framework, which is used to organize the test environment, generate test data, control simulation, and collect and analyze simulation results.

[0004] However, the chip verification framework is built on the basis of hardware description language, which has high syntax complexity and high language learning cost, making chip verification difficult to learn. Summary of the invention

[0005] The embodiments of the present application provide a method, device, electronic device and computer-readable storage medium for calling a chip verification platform to solve the problems in the related art.

[0006] In a first aspect, an embodiment of the present application provides a method for calling a chip verification platform, the method comprising: Compile and run a software language calling program; the software language calling program contains calling functions required for chip verification; In the process of running the software language calling program, a matching software method interface is determined for the calling function to be executed from a preset compatible link library; the compatible link library includes software method interfaces encapsulated in various software languages ​​and verification link files corresponding to the software method interfaces one by one, the software method interface is used to call the corresponding verification link file, and the verification link file is a file obtained by encapsulating the functional function method of the chip verification platform; Calling the corresponding verification link file in the compatible link library for execution through a software method interface matching the calling function to obtain an execution result; The execution result is output as the return value of the calling function until the execution of all calling functions is completed.

[0007] In a second aspect, an embodiment of the present application provides a chip verification framework calling device, the device comprising: A compiling module, used to compile and run a software language calling program; the software language calling program encapsulates a calling function required for chip verification, and the calling function is written in the software language; A link module, used to determine a matching software method interface for a calling function to be executed from a preset compatible link library during the process of running the software language calling program; the compatible link library includes software method interfaces encapsulated in various software languages ​​and corresponding verification link files, the software method interface is used to call the verification link file, and the verification link file is obtained by encapsulating the method of the chip verification platform; An execution module, used to call the corresponding verification link file in the compatible link library through the software method interface to execute and obtain an execution result; The output module is used to output the execution result as the return value of the calling function until the execution of all calling functions is completed.

[0008] In a third aspect, an embodiment of the present application provides an electronic device, comprising a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the programs or instructions are executed by the processor, the steps of one or more methods described in the embodiments of the present application are implemented.

[0009] In a fourth aspect, an embodiment of the present application provides a readable storage medium. When instructions in the readable storage medium are executed by a processor of an electronic device, the electronic device can execute one or more methods described in the embodiments of the present application.

[0010] In an embodiment of the present application, by compiling and running a software language calling program, a software method interface encapsulated in various software languages ​​is provided in a preset compatible link library, and a matching software method interface is determined for the calling function to be executed in the software language calling program, so that software language calling programs written in various software languages ​​can call the corresponding software method interface, thereby achieving compatibility with various software languages. Then, by determining the matching software method interface with the calling function, the corresponding verification link file is called for execution, and the execution result is output as the return value of the calling function. Through the software language calling program, the execution result of the verification link file encapsulated by the chip verification platform function function method is obtained, so that the calling of the chip verification platform function function method is no longer only implemented through the hardware description language, but is transformed from calling through the hardware description language to calling through the software language calling program, thereby reducing the learning cost of hardware description languages ​​with high learning complexity and reducing the difficulty of chip verification learning.

[0011] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 It is a flowchart of the steps of a method for calling a chip verification platform provided in an embodiment of the present application; Figure 2 It is a flowchart of the steps of another method for calling a chip verification platform provided in an embodiment of the present application; Figure 3 It is an architecture diagram of a chip verification framework calling method provided in an embodiment of the present application; Figure 4 It is a block diagram of a calling device of a chip verification platform provided in an embodiment of the present application; Figure 5 is a block diagram of an electronic device provided by an embodiment of the present invention; Figure 6 is a block diagram of another electronic device according to another embodiment of the present invention. DETAILED DESCRIPTION

[0014] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0015] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally a class, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of associated objects, indicating that three kinds of relationships can exist, for example, A and / or B can be represented: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the front and back associated objects are a kind of "or" relationship. In the embodiment of the present application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0016] Integrated circuits are the core of microprocessors and multi-core processors. They can be used to control computers or some electronic products used in daily life to support the realization of electronic products' functions in communication, transportation, production, etc., and meet people's usage needs.

[0017] For many electronic products, integrated circuit design is required according to specific usage functions, and interconnection line models are established between electronic devices. All devices and interconnections need to be placed on a piece of semiconductor substrate material. These components are placed on a single silicon substrate through semiconductor device manufacturing processes to form a circuit.

[0018] For electronic products with different functions, it is necessary to specify the functions of the systems and modules in the integrated circuit and write technical specifications (spec) according to the required functions. Spec refers to a document similar to an instruction manual written when designing and verifying the chip. It is used to describe in detail the functions, performance and other relevant characteristics of the chip or its components to ensure that designers can accurately understand and implement the required design functions.

[0019] Designers interpret the spec and use hardware description language to write the circuit design to obtain the circuit design file to be tested. The circuit design file to be tested can be used to describe the constituent units of the circuit, the interconnection relationship between the constituent units, etc. At the same time, the verifier sorts out the features to be verified according to the spec, and refines the test points according to the features to be verified to ensure the coverage of the test structure and function. After the verification plan is designed, the verification environment, reference model and verification script are built to cover the device under test (DUT) one by one according to the test points, and generate a verification report to finally find and repair design defects.

[0020] When verifying the DUT, a general chip verification platform can be built, and test stimuli for testing can be generated. The test stimuli are transmitted to the DUT and the reference model, and the output of the DUT is detected and compared with the output of the reference model. This can determine whether there are defects in the design. The chip verification platform is usually built on the basis of the hardware description language, which has high syntax complexity and limited resources compared to other software programming languages. Therefore, it is difficult to learn, making chip verification difficult.

[0021] Figure 1 , is a flowchart of a method for calling a chip verification platform provided in an embodiment of the present application, such as Figure 1 As shown, the method may include: Step 101, compile and run the software language calling program.

[0022] In the embodiment of the present application, the software language call program is written with the call function required for chip verification. The software language is a type of language used to create programs and instructions that interact with computer hardware. It refers to a high-level programming language used to write applications and services. It abstracts the complexity of hardware and simplifies program design. Software language call programs are written in software language. Due to the large number of software language categories, users can write according to the software language they are good at, and software language has a huge ecosystem, including rich libraries, frameworks, development tools and community support. These resources greatly improve the productivity of developers and are also relatively friendly in terms of learning costs. For example, common software languages ​​​​are Python, Java, GO, C#, etc.

[0023] In addition, chip verification platforms are usually built on the basis of hardware description languages. The purpose of hardware programming languages ​​is to precisely control hardware behavior and perform management tasks on hardware resources. Hardware languages ​​allow designers to describe and simulate the behavior of electronic components. These languages ​​usually play a vital role in digital logic design, microprocessor design and embedded systems.

[0024] In some embodiments, the chip verification platform can be built based on the Universal Verification Methodology (UVM). UVM is a set of class libraries built using the SystemVerilog language to implement a coverage-driven verification methodology based on random constraints. UVM aims to unify and standardize the verification specifications of the industry. In this step, a UVM canvas can be created in the building interface to build a verification platform structure on the UVM canvas.

[0025] Step 102, during the process of running the software language calling program, a matching software method interface is determined for the calling function to be executed from a preset compatible link library.

[0026] In an embodiment of the present application, a compatible link library includes software method interfaces encapsulated using various software languages ​​and verification link files corresponding to the software method interfaces one by one. The software method interfaces are encapsulated through various software languages ​​to adapt to software language calling programs written in different software languages, thereby realizing the use of a unified calling function when writing programs through different software languages, determining a matching software method interface for the calling function, simplifying the complex process of calling software method interfaces in multiple software languages, improving the compatibility of the compatible link library for multiple software languages, and simplifying the adaptation work of multi-language calls. At the same time, the compatible link library is used for software language calling programs written in software languages ​​to call the function function methods of the chip verification platform to obtain encapsulated files, so as to realize the use of software languages ​​to call chip verification platforms based on hardware description languages, avoid the verification personnel directly using hardware description languages ​​to build verification environments, reduce the requirements for the proficiency of hardware description languages ​​for the verification personnel, and make the verification personnel not need to spend a lot of learning costs to learn hardware description languages, but only need to master software languages ​​with lower learning costs, thereby reducing the difficulty of chip verification.

[0027] For example, the compatible link library exposes a calling function A to the outside world. Various software language calling programs only need to execute calling function A, and finding the matching software method interface based on the software language used is only required by the compatible link library. For the verifier, it is only necessary to use the software language to execute calling function A, without considering the adaptability issues caused by different writing styles of various software languages.

[0028] Step 103, calling the corresponding verification link file in the compatible link library for execution through the software method interface matching the calling function to obtain the execution result.

[0029] In an embodiment of the present application, the software method interface is adaptively adjusted according to the software language used by the verifier, and is used to call the same verification link file with a software method interface encapsulated in multiple software languages. The corresponding verification link file can be called through the software method interface that matches the calling function, wherein the verification link file is a file encapsulated by the functional function method of the chip verification platform. The functional function method of the chip verification platform can be driven by executing the verification link file, so as to obtain the execution result of the functional function method of the chip verification platform without writing a test program in a hardware description language.

[0030] For example, when executing the calling function A, the calling function A encapsulates different interfaces such as Aa, Ab, Ac, Ad according to different software languages. According to the software language category used by the software language calling program, the corresponding interface such as Ac is used to call the corresponding verification link file for execution, and finally the execution result is obtained.

[0031] Step 104: output the execution result as the return value of the calling function until the execution of all calling functions is completed.

[0032] In an embodiment of the present application, the verification link file is executed to obtain the execution result, and the execution result is output as the return value of the calling function. In the process of obtaining the execution result, the chip verification process is constructed through the software language, and the execution result of the functional function method of the chip verification platform based on the hardware description language is obtained, thereby reducing the use of the hardware description language in chip verification, thereby reducing the learning requirements of the hardware description language for the verification personnel, and instead using a software language with a lower learning cost to drive the execution of the functional function method of the chip verification platform, and obtaining the same execution result, so that the learning cost of the hardware description language for the verification personnel in chip verification is reduced, and more energy is invested in the formulation of the chip verification method. At the same time, the compatible link library is adapted to various software languages, so that more R&D personnel who are proficient in other software languages ​​can also participate in the chip verification work.

[0033] In summary, in the embodiments of the present application, by compiling and running a software language calling program, a software method interface encapsulated in various software languages ​​is provided in a preset compatible link library, and a matching software method interface is determined for the calling function to be executed in the software language calling program, so that software language calling programs written in various software languages ​​can call the corresponding software method interface, thereby achieving compatibility with various software languages, and then by determining the matching software method interface with the calling function, calling the corresponding verification link file for execution, and outputting the execution result as the return value of the calling function, and through the software language calling program, the execution result of the verification link file encapsulated by the chip verification platform function function method is obtained, so that calling the chip verification platform function function method is no longer only implemented through the hardware description language, and the call through the hardware description language is transformed into the call by the software language calling program, thereby reducing the learning cost of the hardware description language with high learning complexity and reducing the difficulty of chip verification learning.

[0034] Figure 2 , is a flowchart of the specific steps of a method for calling a chip verification platform provided in an embodiment of the present application, such as Figure 2 As shown, the method may include: Step 201, compile and run the software language calling program.

[0035] This step may be specifically referred to as step 101, and will not be described in detail here.

[0036] Step 202: during the process of running the software language calling program, identifying the target software language category of the software language calling program.

[0037] In the embodiment of the present application, during the process of running the software language calling program, the target software language category of the software language calling program is identified, and compatibility adjustments can be made for the target software language category, such as calling a function interface encapsulated by the target software language class. In some embodiments, the target software language category of the software language calling program can be determined by identifying the file type in the software language calling program. For example, the file suffix written in Python is .py, the file suffix written in JavaScript is .js, and the file suffix written in C language is .c.

[0038] Optionally, step 202 may specifically include: Sub-step 2021, in the process of running the software language calling program, a coroutine is allocated to each of the calling functions for executing the calling function.

[0039] Among them, in the process of running the software language calling program, the execution of each calling function is divided into blocking transmission and non-blocking transmission. When blocking transmission starts, the calling function will wait for the operation to be completed, that is, after receiving the execution result, it will continue to execute the subsequent program. Non-blocking transmission allows the calling function to be in a suspended state, and continue to execute the subsequent program without waiting for the completion of data transmission.

[0040] In addition, when using software language for blocking transmission, when the calling function starts to execute, the corresponding software method interface is matched and the corresponding verification link file is executed. If there is a problem with the execution of the verification link file, the calling function will not be able to receive the return value, resulting in the calling function being unable to end and unable to continue to execute subsequent programs. Therefore, due to the difference between software language and hardware description language, deadlock problems are easily caused.

[0041] In an embodiment of the present application, a coroutine is assigned to each calling function for task execution. A coroutine is an execution unit that is lighter than a thread and can be executed collaboratively between multiple tasks. The core feature of a coroutine is that it enables a function to be paused during execution and continued later through explicit suspension and resumption of control flow, thereby providing a very efficient concurrent processing method, so that each calling function is executed in a coroutine. When a calling function cannot be terminated, it will not affect the execution of other calling functions.

[0042] Sub-step 2022, when the calling function is blocked in the coroutine, suspend the execution of the calling function of the current coroutine and switch to other coroutines to execute the calling function in the other coroutines.

[0043] In an embodiment of the present application, when the calling function in the current coroutine is blocked, due to the characteristics of the coroutine, the calling function of the current coroutine can be put into a paused state, and switched to other coroutines to execute the calling functions in other coroutines. Therefore, even if the current calling function is blocked, it will not affect the execution of other calling functions, thereby avoiding the occurrence of deadlock problems.

[0044] For example, in the process of running a software language calling program, there are calling functions a and calling functions b to be executed. The execution order of calling function a is before calling function b, so when calling function a is blocked, the process cannot continue to advance and therefore cannot execute calling function b, causing a deadlock problem. After assigning coroutine A to calling function a and coroutine B to calling function b, when calling function a is blocked, the execution of calling function a is paused and the execution of calling function b in coroutine B is started, so the advancement of the process will not be blocked, thereby avoiding the deadlock problem.

[0045] Step 203, determining a target software method interface encapsulated in the target software language category and matching the calling function to be executed from among the software method interfaces encapsulated in various software languages ​​in the compatible link library; In an embodiment of the present application, the compatible connection library has software method interfaces encapsulated using various software languages, providing corresponding interfaces for calling functions in software language calling programs using different software languages, so as to solve compatibility issues caused by different language styles in multiple software languages, and encapsulating the target software method interface that matches the calling function to be executed using the target software language category.

[0046] For example, the calling function A to be executed has many corresponding software method interfaces encapsulated according to different software languages, such as A.py, A.js, and Ac. After the target software language category is Python, the interface encapsulated in Python is selected, that is, the target software method interface encapsulated in the target software language category Python and matching the calling function A to be executed is A.py.

[0047] Step 204: Use the target software method interface as the software method interface of the calling function to be executed.

[0048] In an embodiment of the present application, the target software method interface is used as the software method interface of the calling function to be executed, so that the software language calling program using different software languages ​​can match different software languages ​​with different software method interfaces by calling a unified calling function, and calling the corresponding verification link file to complete the compatibility of calling software method interfaces in multiple different software languages, thereby simplifying the adaptation work in the interface call.

[0049] Step 205: Call the corresponding verification link file in the compatible link library through the software method interface matching the calling function to execute and obtain the execution result.

[0050] This step may be specifically referred to as step 103, which will not be described in detail here.

[0051] Optionally, step 205 may specifically include: Sub-step 2051, in the process of executing the execution result, assigning a thread to each of the verification link files for executing the verification link files; Among them, a thread is the smallest execution unit in a computer program. It is a separate control flow when a program is executed. A thread is a component of a process, and a process can contain one or more threads.

[0052] In an embodiment of the present application, in the process of running to obtain the execution result, a thread is assigned to each verification link file for executing the verification link file. When the verification link file in the current thread is blocked during execution, since each verification link file is separately assigned a thread during execution, even if the current verification link file is blocked, it will not affect the execution of other verification link files, thereby avoiding the deadlock problem.

[0053] Sub-step 2052, when the verification link file is blocked in the thread, suspend the execution of the verification link file of the current thread and switch to other threads to execute the verification link files in the other threads.

[0054] In an embodiment of the present application, when the execution of the verification link file in the current thread is blocked, the execution of the verification link file of the current thread is paused, and the verification link files in other threads are switched to be executed to avoid the blocking of the verification link file in the current thread affecting the execution of other verification link files.

[0055] For example, in the process of running to obtain the execution result, there are verification link file a and verification link file b to be executed. According to the execution order, verification link file a is executed first. If it is not specified that two verification link files are each assigned a thread, the two verification link files may be assigned to one thread for execution. When the verification link file a is blocked, it will also affect the execution of the verification link file b. After assigning thread A to the verification link file a and thread B to the verification link file b, ensure that the two verification link files are executed in two threads. When the verification link file a is blocked, switch thread B to execute the verification link file b, thereby avoiding the impact on other verification link files and thus avoiding deadlock.

[0056] In one embodiment, a coroutine is allocated to each process of calling a function to call a software method interface for completing the task, and a thread is allocated to each software method interface when executing a verification link file for completing the task, so that multiple allocated coroutines have a corresponding number of threads for executing subsequent task processes, and the coroutines and threads can correspond one to one. In a process of calling a software method interface by calling a function and executing a verification link file, the operation of other processes will not be affected by the blocking of the current process, thereby avoiding deadlock.

[0057] Optionally, the software method interface includes a clock synchronization function for keeping the clock durations of the software language calling program and the chip verification platform consistent. Step 205 may specifically include: Sub-step 2053, calling the corresponding verification link file through the software method interface, and obtaining the clock time information required for each verification link file to complete running.

[0058] Among them, the clock duration of the chip verification platform is used to measure the duration of time that passes. It provides people with accurate real-time time or provides an accurate time reference for electronic systems. The clock of the chip verification platform generally uses a high-precision crystal oscillator as the clock source, and the software language calls the program without a crystal oscillator hardware device as the clock source. Therefore, the software language is required to call the chip verification platform's clock-driving method.

[0059] In an embodiment of the present application, by calling the corresponding verification link file, the clock duration information required for each verification link file to complete its execution is obtained to ensure that the software language calling program can obtain the clock duration information required for the execution of the chip verification platform function method.

[0060] Sub-step 2054, calling the clock synchronization function in the software method interface according to the clock duration information.

[0061] In an embodiment of the present application, based on the clock duration information, the clock duration information is controlled from the software language calling program by calling the clock synchronization function in the software method interface to avoid the situation where there is no crystal oscillator hardware device as a clock source in the software language calling program, and an error occurs due to the execution time disagreement between the software language calling program and the chip verification platform function method.

[0062] For example, the execution of a chip verification platform function method requires two cycles, and the calling function in the software language calling program needs to receive the execution result of the verification link file encapsulated by the chip verification platform function method after two cycles. If the time is not uniform, the callback function cannot determine when the execution result appears, resulting in an error in obtaining the return value.

[0063] Optionally, sub-step 2054 may specifically include: Sub-step 20541, in the process of calling the clock synchronization function in the software method interface, a coroutine is allocated for the execution of each of the clock synchronization functions called.

[0064] In an embodiment of the present application, a coroutine is assigned to the execution of each clock synchronization function to avoid blocking of the clock synchronization function during execution, which may affect the execution of other clock synchronization functions and cause deadlock, ultimately leading to inconsistencies in the clock durations of the software language calling program and the chip verification platform.

[0065] Sub-step 20542, when the clock synchronization function is blocked in the coroutine, suspend the execution of the clock synchronization function of the current coroutine and switch to other coroutines to execute the clock synchronization function in the other coroutines.

[0066] In an embodiment of the present application, when the current clock synchronization function is blocked, the clock synchronization function of the current coroutine is paused and switched to other coroutines to execute the clock synchronization functions in other coroutines. Even if the clock synchronization function of the current coroutine is blocked, it will not affect the execution of the clock synchronization functions of other coroutines, thereby avoiding deadlock problems and ensuring that the clock durations of the software language calling program and the chip verification platform are consistent.

[0067] For example, in the process of calling the clock synchronization function in the software method interface, there are clock synchronization function a and clock synchronization function b to be executed. The execution order of clock synchronization function a is before clock synchronization function b. Coroutine A is assigned to clock synchronization function a, and coroutine B is assigned to clock synchronization function b. When clock synchronization function a is blocked, the execution of clock synchronization function a in coroutine A is paused, and the execution of clock synchronization function b in coroutine B is started, avoiding deadlock problems and ensuring that the clock durations of the software language calling program and the chip verification platform are consistent.

[0068] Sub-step 2055, through the clock synchronization function, calls the clock push function deployed in the chip verification platform to control the clock push function to perform clock control according to the clock duration information, thereby keeping the clock duration of the software language calling program and the chip verification platform consistent.

[0069] In an embodiment of the present application, clock control is performed by calling a clock push function deployed in a chip verification platform through a clock synchronization function, thereby keeping the clock durations of the software language calling program and the chip verification platform consistent.

[0070] For example, when the clock duration information is 2 cycles, the clock synchronization function is called for the first time, and the clock push function is called through the clock synchronization function to push the clock duration by one cycle. After the first clock synchronization function call is completed, the clock synchronization function is called for the second time, and the clock push function is called through the clock synchronization function to push the clock duration by one cycle, so as to achieve the push of the clock duration of 2 cycles and ensure that the clock duration of the software language calling program and the chip verification platform are consistent.

[0071] Optionally, sub-step 2055 may specifically include: Sub-step 20551, in the process of calling the clock pushing function deployed in the chip verification platform, allocating a thread for the execution of each clock pushing function; In an embodiment of the present application, in the process of calling the clock pushing function deployed in the chip verification platform, a thread is allocated for the execution of each clock pushing function to avoid the problem that when two clock pushing functions are in the same thread, the clock pushing function that runs first is blocked, resulting in all clock pushing functions in the thread being unable to continue to advance, thereby causing the clock duration of the software language calling program and the chip verification platform to be inconsistent.

[0072] Sub-step 20552, when the clock push function is blocked in the thread, suspend the execution of the clock push function of the current thread and switch to other threads to execute the clock push function in the other threads.

[0073] In an embodiment of the present application, when the clock push function in the current thread is blocked, the execution of the clock push function in the current thread is paused and switched to other threads to execute the clock push function in other threads, so that when the clock push function in the current thread is blocked, since there are no other clock push functions in the current thread, it will not be affected by the blockage. After switching the execution thread, other clock push functions can still be executed normally, thereby ensuring the consistency of the clock duration of the software language calling program and the chip verification platform.

[0074] like Figure 3The figure shows the architecture diagram of the chip verification framework calling method. When the calling function T1 calls the corresponding software method interface, coroutine 1 is assigned to the calling function to execute the task, and the clock synchronization function Step(1) in the software method interface is called, and a thread 2 is assigned to the execution of the clock synchronization function Step(1). When the software method interface calls the corresponding verification link file, thread 1 is assigned to the execution of the current task, and thread 2 is assigned to the task of calling the clock push function by the clock synchronization function Step(1). During the execution of the calling function T1, a separate coroutine is assigned to the calling function T2 to execute the task to avoid deadlock with task T1. When the clock duration required for the execution of the verification link file ends, the execution result is returned to the calling function T1 and coroutine 1, coroutine 2, thread 1 and thread 2 are released.

[0075] Sub-step 2056, when the clock synchronization function is called, the execution result of the verification link file is obtained.

[0076] Optionally, sub-step 2056 may specifically include: Sub-step 20561, when the clock synchronization function is called and the verification link file is executed, the return value of the execution is used as the call result; In an embodiment of the present application, when the clock synchronization function is called, it indicates that the clock duration of the calling function of the software language calling program has ended. At this time, the verification link file encapsulated by the chip verification platform function function method has also just finished executing, and the execution result returned by the verification link file can be obtained.

[0077] Sub-step 20562, when the clock synchronization function is called and the verification link file is not executed, a timeout error message is used as the call result.

[0078] In an embodiment of the present application, when the clock synchronization function is called but the verification link file does not return a value, it indicates that the call execution failed and no return value of the verification link file execution was received. At this time, a timeout error message is used as the call result.

[0079] Step 206: Output the execution result as the return value of the calling function until the execution of all calling functions is completed.

[0080] This step may be specifically referred to as step 104, which will not be described in detail here.

[0081] In summary, in the embodiment of the present application, by compiling and running the software language calling program, there are software method interfaces encapsulated in various software languages ​​in the preset compatible link library, and the matching software method interface is determined for the calling function to be executed in the software language calling program, so that the software language calling programs written in various software languages ​​can call the corresponding software method interface, so as to achieve the effect of compatibility with various software languages, and then by determining the matching software method interface with the calling function and sending the clock synchronization function, calling the corresponding verification link file and the clock push function for execution, and outputting the execution result as the return value of the calling function, the chip verification is realized through the software language calling program. The verification platform function method is encapsulated to obtain the execution result of the verification link file, and the clock of the chip verification platform is driven by the software language calling program, so that the clock information is unified, which makes up for the defect of no clock source in the software language calling program. In addition, multiple threads and threads are allocated for calling between functions to avoid deadlock problems caused by the differences between software language and hardware description language. The calling of the chip verification platform function method is no longer only implemented through the hardware description language. The call is transformed from the hardware description language call to the software language call program, which reduces the learning cost of the hardware description language with high learning complexity and reduces the difficulty of chip verification learning.

[0082] Figure 4 : is a block diagram of a chip verification framework calling device provided in an embodiment of the present application, the device comprising: The compiling module 301 is used to compile and run a software language calling program; the software language calling program encapsulates the calling functions required for chip verification, and the calling functions are written in the software language.

[0083] The link module 302 is used to determine a matching software method interface for the calling function to be executed from a preset compatible link library during the process of running the software language calling program; the compatible link library includes software method interfaces encapsulated using various software languages ​​and corresponding verification link files, and the software method interface is used to call the verification link file, which is obtained by encapsulating the method of the chip verification platform.

[0084] The execution module 303 is used to call the corresponding verification link file in the compatible link library through the software method interface to execute and obtain the execution result.

[0085] The output module 304 is used to output the execution result as the return value of the called function until the execution of all called functions is completed.

[0086] Optionally, the link module 302 may specifically include: The identification submodule is used to identify the target software language category of the software language calling program during the process of running the software language calling program.

[0087] The matching submodule is used to determine a target software method interface encapsulated in the target software language category that matches the calling function to be executed among the software method interfaces encapsulated in various software languages ​​in the compatible link library.

[0088] The calling submodule uses the target software method interface as the software method interface of the calling function to be executed.

[0089] Optionally, the link module 302 may specifically include: The coroutine submodule is used to allocate a coroutine to each of the calling functions for executing the calling function in the process of running the software language calling program.

[0090] The first anti-blocking submodule is used to suspend the execution of the calling function of the current coroutine and switch to other coroutines to execute the calling function in the other coroutines when the calling function is blocked in the coroutine.

[0091] Optionally, the execution module 303 may specifically include: A thread submodule, used for allocating a thread for executing each verification link file in the process of obtaining the execution result; The second anti-blocking submodule is used for pausing the execution of the verification link file of the current thread and switching to other threads to execute the verification link file in the other threads when the verification link file is blocked in the thread.

[0092] Optionally, the execution module 303 may specifically include: The clock duration submodule is used to call the corresponding verification link file through the software method interface, and obtain the clock duration information required for each verification link file to complete running.

[0093] The clock synchronization submodule is used to call the clock synchronization function in the software method interface according to the clock duration information.

[0094] The clock pushing submodule is used to call the clock pushing function deployed in the chip verification platform through the clock synchronization function to control the clock pushing function to perform clock control according to the clock duration information, thereby keeping the clock duration of the software language calling program and the chip verification platform consistent.

[0095] The clock end submodule is used to obtain the execution result of the verification link file after the clock synchronization function is called.

[0096] Optionally, the clock termination submodule may specifically include: A normal return unit, used for taking the return value of the execution as the call result when the clock synchronization function is called and the verification link file is executed; The exception return unit is used to return a timeout error message as a call result when the clock synchronization function is called and the verification link file is not executed.

[0097] Optionally, the clock synchronization submodule may specifically include: The coroutine unit is used to allocate a coroutine to the execution of each clock synchronization function called in the process of calling the clock synchronization function in the software method interface.

[0098] The first anti-blocking unit is used to suspend the execution of the clock synchronization function of the current coroutine and switch to other coroutines to execute the clock synchronization function in the other coroutines when the clock synchronization function is blocked in the coroutine.

[0099] Optionally, the clock push submodule may specifically include: The thread unit is used to allocate a thread to the execution of each clock pushing function deployed in the chip verification platform in the process of calling the clock pushing function.

[0100] The second anti-blocking unit is used for pausing the execution of the clock pushing function of the current thread and switching to other threads to execute the clock pushing function in the other threads when the clock pushing function is blocked in the thread.

[0101] In summary, in the embodiments of the present application, by compiling and running a software language calling program, a software method interface encapsulated in various software languages ​​is provided in a preset compatible link library, and a matching software method interface is determined for the calling function to be executed in the software language calling program, so that software language calling programs written in various software languages ​​can call the corresponding software method interface, thereby achieving compatibility with various software languages, and then by determining the matching software method interface with the calling function, calling the corresponding verification link file for execution, and outputting the execution result as the return value of the calling function, and through the software language calling program, the execution result of the verification link file encapsulated by the chip verification platform function function method is obtained, so that calling the chip verification platform function function method is no longer only implemented through the hardware description language, and the call through the hardware description language is transformed into the call by the software language calling program, thereby reducing the learning cost of the hardware description language with high learning complexity and reducing the difficulty of chip verification learning.

[0102] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0103] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0104] Regarding the device in the embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0105] An embodiment of the present application provides a data row protection device for a dynamic random access memory, comprising a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by one or more processors to include methods for performing the methods described in one or more embodiments.

[0106] Figure 5 is a block diagram of an electronic device 600 according to an exemplary embodiment. For example, the electronic device 600 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0107] Reference Figure 5 , the electronic device 600 may include one or more of the following components: a processing component 602 , a memory 604 , a power component 606 , a multimedia component 608 , an audio component 610 , an input / output (I / O) interface 612 , a sensor component 614 , and a communication component 616 .

[0108] The processing component 602 generally controls the overall operation of the electronic device 600, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 602 may include one or more processors 620 to execute instructions to complete all or part of the steps of the described method. In addition, the processing component 602 may include one or more modules to facilitate interaction between the processing component 602 and other components. For example, the processing component 602 may include a multimedia module to facilitate interaction between the multimedia component 608 and the processing component 602.

[0109] The memory 604 is used to store various types of data to support the operation of the electronic device 600. Examples of such data include instructions for any application or method operating on the electronic device 600, contact data, phone book data, messages, pictures, multimedia, etc. The memory 604 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0110] The power supply component 606 provides power to the various components of the electronic device 600. The power supply component 606 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 600.

[0111] The multimedia component 608 includes a screen that provides an output interface between the electronic device 600 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 608 includes a front camera and / or a rear camera. When the electronic device 600 is in an operating mode, such as a shooting mode or a multimedia mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0112] The audio component 610 is used to output and / or input audio signals. For example, the audio component 610 includes a microphone (MIC), and when the electronic device 600 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is used to receive an external audio signal. The received audio signal can be further stored in the memory 604 or sent via the communication component 616. In some embodiments, the audio component 610 also includes a speaker for outputting audio signals.

[0113] I / O interface 612 provides an interface between processing component 602 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: home button, volume button, start button, and lock button.

[0114] The sensor assembly 614 includes one or more sensors for providing various aspects of status assessment for the electronic device 600. For example, the sensor assembly 614 can detect the open / closed state of the electronic device 600, the relative positioning of the components, such as the display and keypad of the electronic device 600, and the sensor assembly 614 can also detect the position change of the electronic device 600 or a component of the electronic device 600, the presence or absence of contact between the user and the electronic device 600, the orientation or acceleration / deceleration of the electronic device 600, and the temperature change of the electronic device 600. The sensor assembly 614 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 614 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 614 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0115] The communication component 616 is used to facilitate wired or wireless communication between the electronic device 600 and other devices. The electronic device 600 can access a wireless network based on a communication standard, such as WiFi, a carrier network (such as 2G, 3G, 4G or 5G), or a combination thereof. In an exemplary embodiment, the communication component 616 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 616 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0116] In an exemplary embodiment, the electronic device 600 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to implement the methods provided in the embodiments of the present application.

[0117] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 604 including instructions, which can be executed by a processor 620 of an electronic device 600 to complete the method. For example, the non-transitory storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0118] Figure 6is a block diagram of an electronic device 700 according to an exemplary embodiment. For example, the electronic device 700 may be provided as a server. Figure 6 The electronic device 700 includes a processing component 722, which further includes one or more processors, and a memory resource represented by a memory 732 for storing instructions that can be executed by the processing component 722, such as an application. The application stored in the memory 732 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 722 is configured to execute instructions to perform the method provided in the embodiment of the present application.

[0119] The electronic device 700 may also include a power supply component 726 configured to perform power management of the electronic device 700, a wired or wireless network interface 750 configured to connect the electronic device 700 to a network, and an input / output (I / O) interface 758. The electronic device 700 may operate based on an operating system stored in the memory 732, such as Windows Server TM, Mac OS X TM, Unix TM, Linux TM, FreeBSD TM or the like.

[0120] An embodiment of the present application further provides a computer program product, including a computer program, and when the computer program is executed by a processor, the method described in the embodiment is implemented.

[0121] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the application disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0122] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A method for calling a chip verification platform, characterized in that: The method comprises: Compile and run a software language calling program; the software language calling program contains calling functions required for chip verification; In the process of running the software language calling program, a matching software method interface is determined for the calling function to be executed from a preset compatible link library; the compatible link library includes software method interfaces encapsulated in various software languages ​​and verification link files corresponding to the software method interfaces one by one, the software method interface is used to call the corresponding verification link file, and the verification link file is a file obtained by encapsulating the functional function method of the chip verification platform; Calling the corresponding verification link file in the compatible link library for execution through a software method interface matching the calling function to obtain an execution result; The execution result is output as the return value of the calling function until the execution of all calling functions is completed.

2. The method according to claim 1, characterized in that In the process of running the software language calling program, determining a matching software method interface for the calling function to be executed from a preset compatible link library includes: In the process of running the software language calling program, identifying the target software language category of the software language calling program; Determine, among the software method interfaces encapsulated in various software languages ​​in the compatible link library, a target software method interface encapsulated in the target software language category that matches the calling function to be executed; The target software method interface is used as the software method interface of the calling function to be executed.

3. The method according to claim 1, characterized in that: In the process of running the software language calling program, determining a matching software method interface for the calling function to be executed from a preset compatible link library includes: In the process of running the software language calling program, a coroutine is allocated to each of the calling functions for executing the calling function; When the calling function is blocked in the coroutine, the execution of the calling function of the current coroutine is suspended and the call is switched to other coroutines to execute the calling function in the other coroutines.

4. The method according to claim 1, characterized in that: The method of calling the corresponding verification link file in the compatible link library for execution through the software method interface matching the calling function to obtain the execution result includes: In the process of executing the execution result, a thread is allocated to each of the verification link files for executing the verification link files; When the verification link file is blocked in the thread, the execution of the verification link file of the current thread is suspended and the thread is switched to other threads to execute the verification link files in the other threads.

5. The method according to claim 1, characterized in that The software method interface has a clock synchronization function for keeping the clock duration of the software language calling program and the chip verification platform consistent. The software method interface matching the calling function calls the corresponding verification link file in the compatible link library for execution to obtain the execution result, including: Through the software method interface, the corresponding verification link file is called, and the clock duration information required for each verification link file to complete execution is obtained; According to the clock duration information, calling the clock synchronization function in the software method interface; The clock push function deployed in the chip verification platform is called through the clock synchronization function to control the clock push function to perform clock control according to the clock duration information, thereby keeping the clock durations of the software language calling program and the chip verification platform consistent; When the clock synchronization function is called, the execution result of the verification link file is obtained.

6. The method according to claim 5, characterized in that After the clock synchronization function is called, obtaining the execution result of the verification link file includes: When the clock synchronization function is called and the verification link file is executed, the return value of the execution is used as the call result; When the clock synchronization function is called and the verification link file is not executed, a timeout error message is used as the call result.

7. The method according to claim 5, characterized in that The calling of the clock synchronization function in the software method interface according to the clock duration information includes: In the process of calling the clock synchronization function in the software method interface, a coroutine is allocated for the execution of each of the clock synchronization functions called; When the clock synchronization function is blocked in the coroutine, pausing the execution of the clock synchronization function of the current coroutine and switching to other coroutines to execute the clock synchronization function in the other coroutines; The step of calling the clock push function deployed in the chip verification platform through the clock synchronization function includes: In the process of calling the clock push function deployed in the chip verification platform, a thread is allocated for the execution of each clock push function; When the clock pushing function is blocked in the thread, the execution of the clock pushing function of the current thread is suspended and the thread is switched to other threads to execute the clock pushing function in the other threads.

8. A chip verification framework calling device, characterized in that: The device comprises: A compiling module, used to compile and run a software language calling program; the software language calling program encapsulates a calling function required for chip verification, and the calling function is written in the software language; A link module, used to determine a matching software method interface for a calling function to be executed from a preset compatible link library during the process of running the software language calling program; the compatible link library includes software method interfaces encapsulated in various software languages ​​and corresponding verification link files, the software method interface is used to call the verification link file, and the verification link file is obtained by encapsulating the method of the chip verification platform; An execution module, used to call the corresponding verification link file in the compatible link library through the software method interface to execute and obtain an execution result; The output module is used to output the execution result as the return value of the calling function until the execution of all calling functions is completed.

9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A readable storage medium, characterized in that: When the instructions in the readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the method as claimed in any one of method claims 1 to 7.

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