Field-circuit joint simulation method for IGBT devices considering electrothermal characteristics of parasitic capacitance

Abstract

The present invention relates to a field-circuit co-simulation method for an IGBT device taking into account the electrothermal characteristics of parasitic capacitance, belonging to the technical field of simulation modeling of power semiconductor devices. The method comprises the following steps: S1: constructing an IGBT circuit model in Simulink; S2: constructing an IGBT electrothermal coupling multi-physics field model in COMSOL; S3: defining material properties of various parts and defining voltage and temperature sensitivity characteristics of the parasitic capacitance of the IGBT chip; considering the influence of temperature change and voltage change on inter-electrode capacitance, defining a capacitance calculation formula based on electrostatics; S4: setting multi-physics fields and boundary conditions, selecting electric field and thermal field coupling modules, and setting electric field strength and temperature initial boundary conditions; S5: performing field-circuit co-simulation on the Simulink model and the COMSOL model; and S6: performing Simulink-COMSOL co-simulation to obtain dynamic and static characteristics of the IGBT through the simulation model.

Description

Technical Field

[0001] The present invention belongs to the technical field of power semiconductor device simulation modeling, and relates to an IGBT device field-circuit joint simulation method taking into account the electrothermal characteristics of parasitic capacitance. Background Art

[0002] Insulated Gate Bipolar Transistors (IGBTs) have advantages such as high power density and short-circuit resistance, making them widely used in flexible DC transmission converter valves. IGBT chips have parasitic capacitance, which significantly affects the switching characteristics of the IGBT. However, during actual IGBT operation, some external stimuli, such as drive voltage and temperature, vary over time. These changes in excitation also cause changes in parasitic capacitance, affecting the IGBT's switching characteristics. Therefore, it is necessary to consider the electrothermal characteristics of parasitic capacitance in IGBT simulations.

[0003] Traditional circuit simulation uses lookup tables or empirical formula fitting, which makes it difficult to accurately characterize the impact of the electrothermal characteristics of IGBT parasitic capacitance on the switching process. Field-effect simulation alone can obtain the temperature distribution and electrothermal characteristics of parasitic capacitance, but it is difficult to fully consider the complex factors in the circuit. Therefore, it is necessary to propose a method that combines circuit simulation and field-effect simulation to accurately analyze its electrothermal behavior. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance. This method fully considers the characteristics of parasitic capacitance changing with voltage and temperature, and combines Simulink circuit simulation and COMSOL field effect simulation to accurately reflect the IGBT switching characteristics affected by the electrothermal characteristics of parasitic capacitance.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] A field-circuit joint simulation method for an IGBT device taking into account the electrothermal characteristics of parasitic capacitance comprises the following steps:

[0007] S1: Build an IGBT circuit model in Simulink based on the application conditions;

[0008] S2: Build an IGBT electrothermal coupling multiphysics model in COMSOL;

[0009] S3: Define the material properties of each part, define the voltage and temperature sensitivity characteristics of the parasitic capacitance of the IGBT chip; consider the impact of temperature and voltage changes on the inter-electrode capacitance, and define the capacitance calculation formula based on electrostatics;

[0010] S4: Set up multi-physics fields and boundary conditions, select the electric field and thermal field coupling modules, and set the electric field intensity and temperature initial boundary conditions;

[0011] S5: Build a data interface between the Simulink circuit model and the COMSOL multiphysics model to achieve field-circuit integration;

[0012] S6: Set the simulation step size and data exchange step size of the Simulink model and COMSOL model respectively, run the Simulink-COMSOL joint simulation until the simulation reaches convergence, obtain the dynamic and static characteristics of the IGBT through the simulation model, and complete the simulation of the IGBT module.

[0013] Furthermore, in step S1, an N-channel IGBT model is used to construct an equivalent circuit model of the IGBT chip. The gate drive signal and collector-emitter voltage are defined according to the application conditions, and the circuit load resistance and inductance are defined. A voltage and current measurement module and a power loss calculation module are added. The power loss calculation formula is:

[0014]

[0015] Where P(t) is the power loss from time t1 to t2, V CE (t) is the collector-emitter voltage during the on-time, I C (t) is the collector current during the on-time.

[0016] Furthermore, in step S2, a geometric model of the IGBT is created based on the IGBT device, and the size and position of each part of the chip are defined, including the gate, collector, emitter, insulating layer and semiconductor layer; the silicon wafer, metal layer, packaging and cooling structure are defined according to the actual packaging structure.

[0017] Furthermore, in step S3, the parasitic capacitance calculation formula is defined as follows:

[0018]

[0019] Among them C GC is the gate-collector capacitance, ∈ s0 is the dielectric constant at reference temperature T0, α ∈ is the temperature coefficient of the dielectric constant, V CE is the collector-emitter voltage, V G is the gate voltage, q is the electron charge, N D is the donor concentration, k B is the Boltzmann constant, T is the absolute temperature, N A is the acceptor concentration, n i is the intrinsic carrier concentration, which varies with temperature as:

[0020]

[0021] Among them, n i0 is the intrinsic carrier concentration at the reference temperature, E g is the band gap energy;

[0022] C GE is the gate-emitter capacitance, ∈ ox0 is the dielectric constant of the insulating layer at reference temperature T0, β ∈ is the temperature coefficient of the dielectric constant, d ox0 is the gate-emitter voltage V GE =0 when the thickness of the insulating layer, V ox is the electric field strength parameter of the insulating layer;

[0023] C CE is the collector-emitter capacitance, ∈ CE0 is the dielectric constant at reference temperature T0, γ ∈ is the temperature coefficient of the dielectric constant, A CE is the effective area between collector and emitter, d CE is the collector-emitter distance.

[0024] Furthermore, the multi-physics field and boundary condition settings in step S4 include: in "Select physical field", select "Electric field" in "AC / DC module" and "Heat conduction in solids" in "Heat conduction module"; in the "Multi-physics field" option, select "Electrothermal coupling". In the electric field module, define the emitter plate surface as the collector-emitter voltage source, define the chip gate surface as the gate voltage source, and define the collector plate surface as the ground terminal. At the same time, define the initial distribution of the electric field by setting the initial potential. In the thermal field module, set the boundary conditions, define the IGBT chip as the heat source, and define the heat flux on the boundary and the convection conditions at the boundary as air. In addition, define the initial temperature distribution of the device in "Initial value".

[0025] Furthermore, in step S5, the field-circuit combination includes: converting the gate voltage V G , collector-emitter voltage V CE The parameters and power loss P are passed to the Matlab script, which then uses them to update the boundary conditions of the COMSOL multiphysics model. In the electric field boundary conditions, the gate voltage V G Update to the gate voltage source (chip gate surface), collector-emitter voltage V CE Update to the collector-emitter voltage source (emitter plate surface), and in the electric field boundary conditions, update the power loss P to the heat source (IGBT chip). The COMSOL field effect model simulation results provide temperature T, gate-collector voltage CGC , gate-emitter capacitance C GE and the collector-emitter capacitance C CE The updated values ​​are fed back to the Matlab script, and the script passes these parameters back to the IGBT chip equivalent circuit model in the Simulink circuit model to implement the parameter update of the Simulink circuit model.

[0026] Furthermore, the simulation method in step S6 includes: configuring the frequency of data exchange to ensure data synchronization within each data exchange step so that changes in the field circuit can be transmitted in a timely manner. Due to the different efficiencies of circuit simulation and field effect simulation, according to the required simulation accuracy and efficiency, set the simulation step a in the Simulink model parameter configuration; set the simulation step b in the COMSOL "Solver Configuration". Determine the data exchange step, which is the least common multiple c of the Simulink model simulation step and the COMSOL model simulation step. Start the joint simulation, run the Simulink and COMSOL joint model, and every time c, calculate the gate voltage V G , collector-emitter voltage V CE The power loss P is updated to the COMSOL model, and the temperature T, gate-collector current C in the COMSOL model are GC , gate-emitter capacitance C GE and the collector-emitter capacitance C CE The Simulink model is updated. Through this closed-loop iterative process, the co-simulation continues until convergence is reached, ultimately obtaining the dynamic and static electrothermal characteristics of the IGBT and achieving a comprehensive simulation of the IGBT module.

[0027] The beneficial effects of the present invention are:

[0028] (1) The present invention proposes a field-circuit joint simulation method for IGBT devices that takes into account the electrothermal characteristics of parasitic capacitance. This method fully considers the temperature and voltage variation characteristics of parasitic capacitance, and combines Simulink circuit simulation and COMSOL field effect simulation to accurately reflect the dynamic and static electrothermal characteristics of IGBT under the influence of parasitic capacitance, providing more reliable simulation results.

[0029] (2) This method improves simulation accuracy, enhances design and optimization capabilities, and can update parameters in real time to adapt to complex operating conditions. Through multi-physics field coupling simulation, the multi-dimensional characteristics of the IGBT are comprehensively analyzed to guide design improvements and process optimization. In addition, the method is flexible and scalable, and simulation parameters and models can be adjusted according to different application requirements, saving R&D costs and time.

[0030] Other advantages, objects, and features of the present invention will be described in part in the following description and, in part, will be apparent to those skilled in the art upon examination of the following description or may be learned from practice of the present invention. The objects and other advantages of the present invention may be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below with reference to the accompanying drawings, in which:

[0032] Figure 1 Flowchart of the field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance;

[0033] Figure 2 This is the flow chart of Simulink-COMSOL field-circuit joint simulation;

[0034] Figure 3 is the gate voltage during the turn-on process;

[0035] Figure 4 is the collector current during the turn-on process;

[0036] Figure 5 is the collector-emitter voltage during the turn-on process. DETAILED DESCRIPTION

[0037] The following describes the embodiments of the present invention by means of specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0038] Among them, the accompanying drawings are only for illustrative purposes and represent only schematic diagrams rather than actual pictures, and should not be understood as limiting the present invention. In order to better illustrate the embodiments of the present invention, some parts of the accompanying drawings may be omitted, enlarged or reduced, and do not represent the dimensions of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions may be omitted in the accompanying drawings.

[0039] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "back", etc. indicating directions or positional relationships, they are based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operate in a specific direction. Therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0040] like Figure 1 As shown, the present invention is a field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance, the method comprising the following steps:

[0041] S1: Build an IGBT circuit model for the application condition in Simulink. Use Matlab / Simulink to build an equivalent circuit model of the IGBT chip. This method uses the N-channel IGBT model in Simulink / Simscape, which has parasitic capacitance (gate-emitter capacitance C GE , gate-collector capacitance C GC , collector-emitter capacitance C CE ) and temperature input ports as input ports for integration with COMSOL. Define the gate drive signal and collector-emitter voltage according to the application conditions, define the circuit load resistance and inductance, and add voltage and current measurement modules and a power loss calculation module. The power loss calculation formula is:

[0042]

[0043] Where P(t) is the power loss from time t1 to t2, V CE (t) is the collector-emitter voltage during the on-time, I C (t) is the collector current during the on-time.

[0044] S2: Build an IGBT electrothermal coupling multiphysics model in COMSOL. Create a geometric model of the IGBT based on the device, defining the dimensions and positions of various chip components, including the gate, collector, emitter, insulating layer, and semiconductor layer. Define the silicon wafer, metal layer, package, and cooling structure based on the actual package structure.

[0045] S3: Define the material properties of each component and the voltage and temperature sensitivity of the IGBT chip's parasitic capacitance. Consider the effects of temperature and voltage changes on inter-electrode capacitance and define a capacitance calculation formula based on electrostatics.

[0046] 1. Gate-collector capacitance

[0047] Gate-collector capacitance C GC It is usually determined by the depletion layer capacitance. The depletion layer capacitance can be expressed as

[0048]

[0049] Among them, ∈ s is the dielectric constant of the semiconductor material, A is the effective area between the gate and collector, and d is the depletion layer thickness.

[0050] In an n-type semiconductor, the depletion layer thickness d can be expressed as:

[0051]

[0052] Among them, V bi is the built-in potential, V CE is the collector-emitter voltage, V G is the gate voltage, q is the electron charge, N D is the donor concentration, which changes relatively little with temperature and can be approximated as a constant.

[0053] Temperature changes affect the dielectric constant ∈ s and built-in potential V bi , which changes with temperature can be expressed as

[0054] ∈ s (T)=∈ s0 (1+α ∈ (T-T0)

[0055]

[0056] Among them, ∈ s0 is the dielectric constant at reference temperature T0, α ∈ is the temperature coefficient of the dielectric constant. k B is the Boltzmann constant, T is the absolute temperature, N A is the acceptor concentration. n i is the intrinsic carrier concentration, which varies with temperature and can be expressed as:

[0057]

[0058] Among them, n i0 is the intrinsic carrier concentration at the reference temperature, E g is the band gap energy.

[0059] In summary, the depletion layer thickness can be expressed as:

[0060]

[0061] Then we get C GC The calculation formula is:

[0062]

[0063] 2. Gate-emitter capacitance

[0064] Gate-emitter capacitance C GE It is mainly formed by the capacitance of the insulating layer between the gate and the emitter. Physically, it can be expressed as:

[0065]

[0066] Among them, ∈ ox is the dielectric constant of the insulating layer, A is the effective area between the gate and emitter, d ox is the thickness of the insulation layer.

[0067] The dielectric constant of the insulating layer can be expressed as:

[0068] ∈ ox (T)=∈ ox0 (1+β ∈ (T-T0))

[0069] Among them, ∈ ox0 is the dielectric constant of the insulating layer at reference temperature T0, β ∈ is the temperature coefficient of the dielectric constant.

[0070] Insulation layer thickness d ox It can be described by the electric field effect as:

[0071]

[0072] Among them, d ox0 It is in V GE =0 when the thickness of the insulating layer, V ox is the electric field strength parameter of the insulating layer.

[0073] In summary, we get C GE The calculation formula is:

[0074]

[0075] 3. Collector-emitter capacitance

[0076] Collector-emitter capacitance C CE The voltage factor is ignored because it is less affected by voltage changes. CE The calculation formula is:

[0077]

[0078] where ∈ CE0 is the dielectric constant at reference temperature T0, γ ∈ is the temperature coefficient of the dielectric constant. A CE is the effective area between collector and emitter. CE is the collector-emitter distance.

[0079] Based on the above derivation, the parasitic capacitance calculation formula is defined as:

[0080]

[0081] S4: Set up multi-physics fields and boundary conditions, select the electric field and thermal field coupling modules, and set initial boundary conditions such as electric field strength and temperature. This includes: in "Select Physics", select "Electric Field" in the "AC / DC Module" and "Heat Conduction in Solids" in the "Heat Conduction Module"; in the "Multi-physics Field" option, select "Electrothermal Coupling". In the electric field module, define the emitter plate surface as the collector-emitter voltage source, define the chip gate surface as the gate voltage source, and define the collector plate surface as the ground terminal. At the same time, define the initial distribution of the electric field by setting the initial potential. In the thermal field module, set boundary conditions, define the IGBT chip as a heat source, and define the heat flux on the boundary and the convection conditions at the boundary as air. In addition, define the initial temperature distribution of the device in "Initial Values".

[0082] S5: The data interface between Simulink and COMSOL is realized through MATLAB scripts. The field-circuit joint process is as follows: Figure 2 As shown. The gate voltage V in the Simulink circuit model simulation results is G , collector-emitter voltage V CE The parameters and power loss P are passed to the Matlab script, which then uses them to update the boundary conditions of the COMSOL multiphysics model. In the electric field boundary conditions, the gate voltage V G Update to the gate voltage source (chip gate surface), collector-emitter voltage V CE Update to the collector-emitter voltage source (emitter plate surface), and in the electric field boundary conditions, update the power loss P to the heat source (IGBT chip). The COMSOL field effect model simulation results provide temperature T, gate-collector voltage C GC , gate-emitter capacitance C GE and the collector-emitter capacitance C CE The updated values ​​are fed back to the Matlab script, and the script passes these parameters back to the IGBT chip equivalent circuit model in the Simulink circuit model to implement the parameter update of the Simulink circuit model.

[0083] S6: Set the simulation step of the Simulink model and the COMSOL model respectively. The data exchange step is the least common multiple of the Simulink model simulation step and the COMSOL model simulation step. Run the Simulink-COMSOL joint simulation until the simulation reaches convergence. Obtain the dynamic and static characteristics of the IGBT through the simulation model and complete the simulation of the IGBT module. Specifically as follows: Configure the data exchange frequency to ensure data synchronization within each data exchange step so that field changes can be transmitted in a timely manner. Due to the different efficiencies of circuit simulation and field effect simulation, set the simulation step a in the Simulink model parameter configuration according to the required simulation accuracy and efficiency; set the simulation step b in the COMSOL "Solver Configuration". Determine the data exchange step, which is the least common multiple c of the Simulink model simulation step and the COMSOL model simulation step. Start the joint simulation, run the Simulink and COMSOL joint model, and every time c, calculate the gate voltage V calculated by the Simulink model. G , collector-emitter voltage V CE The power loss P is updated to the COMSOL model, and the temperature T, gate-collector current C in the COMSOL model are GC , gate-emitter capacitance C GE and the collector-emitter capacitance C CE The Simulink model is updated. Through this closed-loop iterative process, the co-simulation continues until convergence is reached, ultimately obtaining the dynamic and static electrothermal characteristics of the IGBT and achieving a comprehensive simulation of the IGBT module.

[0084] Experimental example:

[0085] The turn-on characteristics of a 3300V / 50A IGBT device were simulated. The operating condition was set to low frequency at 1kHz. A DC voltage of 200V was applied, and a resistive-inductive load was selected. Three groups of simulations were set up for comparison. Group 1 did not consider the electrothermal characteristics of parasitic capacitance, Group 2 considered the temperature characteristics, and Group 3 considered the temperature characteristics while changing the gate voltage. The turn-on characteristics of the IGBT device were obtained as follows: Figure 3-Figure 5 shown.

[0086] The results show that the electrothermal characteristics of parasitic capacitance have a significant impact on the turn-on time and power loss of the IGBT turn-on process. The simulation model can realize the simulation of IGBT devices considering the electrothermal characteristics of parasitic capacitance.

[0087] Those skilled in the art will understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program. The program can be stored in a computer-readable storage medium. When the program is executed, the steps of the method can be implemented. The storage medium, such as ROM / RAM, disk, optical disk, etc.

[0088] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions, which should all be included in the scope of the claims of the present invention.

Claims

1. A field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance, characterized by: The following steps are involved: S1: Build an IGBT circuit model in Simulink based on the application conditions; S2: Build an IGBT electrothermal coupling multiphysics model in COMSOL; S3: Define the material properties of each part, define the voltage and temperature sensitivity characteristics of the parasitic capacitance of the IGBT chip; consider the impact of temperature and voltage changes on the inter-electrode capacitance, and define a capacitance calculation formula based on electrostatics; the parasitic capacitance calculation formula defined in step S3 is as follows: in C GC is the gate-collector capacitance, is the reference temperature T The dielectric constant at 0, is the temperature coefficient of the dielectric constant, V CE is the collector-emitter voltage, V G is the gate voltage, q is the electron charge, N D is the donor concentration, k B is the Boltzmann constant, T is the absolute temperature, N A is the acceptor concentration, n i is the intrinsic carrier concentration, which varies with temperature as: in, n i0 is the intrinsic carrier concentration at the reference temperature, E g is the band gap energy; C GE is the gate-emitter capacitance, At the reference temperature T The dielectric constant of the insulating layer under 0, is the temperature coefficient of the dielectric constant, d ox0 is the gate-emitter voltage V GE =0 when the thickness of the insulation layer, V ox is the electric field strength parameter of the insulating layer; C CE is the collector-emitter capacitance, At the reference temperature T The dielectric constant at 0, is the temperature coefficient of the dielectric constant, A CE is the effective area between collector and emitter, d CE is the collector-emitter spacing; S4: Set up multi-physics fields and boundary conditions, select the electric field and thermal field coupling modules, and set the electric field intensity and temperature initial boundary conditions; S5: Build a data interface between the Simulink circuit model and the COMSOL multiphysics model to achieve field-circuit integration; S6: Set the simulation step size and data exchange step size of the Simulink model and COMSOL model respectively, run the Simulink-COMSOL joint simulation until the simulation reaches convergence, obtain the dynamic and static characteristics of the IGBT through the simulation model, and complete the simulation of the IGBT module.

2. The field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance according to claim 1 is characterized in that: In step S1, an N-channel IGBT model is used to construct an equivalent circuit model of the IGBT chip. The gate drive signal and collector-emitter voltage are defined according to the application conditions, and the circuit load resistance and inductance are defined. A voltage and current measurement module and a power loss calculation module are also added. The power loss calculation formula is: in, P ( t ) is the time t 1 to t 2 power loss, V CE ( t ) is the collector-emitter voltage during the on-time, I C ( t ) is the collector current during the on-time.

3. The field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance according to claim 1, characterized in that: In step S2, a geometric model of the IGBT is created based on the IGBT device, and the size and position of each part of the chip are defined, including the gate, collector, emitter, insulating layer and semiconductor layer; the silicon wafer, metal layer, packaging and cooling structure are defined according to the actual packaging structure.

4. The field-circuit joint simulation method for IGBT devices taking into account the electrothermal characteristics of parasitic capacitance according to claim 1 is characterized in that: The multi-physics field and boundary condition settings in step S4 include: in "Select Physics Field", selecting "Electric Field" in "AC / DC Module" and "Heat Conduction in Solids" in "Heat Conduction Module"; in the "Multi-physics Field" option, selecting "Electrothermal Coupling"; in the electric field module, defining the emitter plate surface as the collector-emitter voltage source, defining the chip gate surface as the gate voltage source, and defining the collector plate surface as the ground terminal; defining the initial distribution of the electric field by setting the initial potential; in the thermal field module, setting boundary conditions, defining the IGBT chip as a heat source, and defining the heat flux on the boundary and the convection conditions at the boundary as air; and defining the initial temperature distribution of the device in "Initial Value".

5. The field-circuit joint simulation method of an IGBT device taking into account the electrothermal characteristics of parasitic capacitance according to claim 1, characterized in that: In step S5, the field-circuit combination includes: converting the gate voltage in the Simulink circuit model simulation result into V G , collector-emitter voltage V CE and power loss P Pass these parameters to the Matlab script program, and the script will use them to update the boundary conditions of the COMSOL multi-physics model; in the electric field boundary conditions, the gate voltage V G Update to gate voltage source, collector-emitter voltage V CE Update to collector-emitter voltage source, electric field boundary conditions, power loss P Updated to heat source; COMSOL field model simulation results provide temperature T , gate-collector current C GC , gate-emitter capacitance C GE and collector-emitter capacitance C CE The updated values ​​are fed back to the Matlab script, and the script passes these parameters back to the IGBT chip equivalent circuit model in the Simulink circuit model to implement the parameter update of the Simulink circuit model.

6. The field-circuit joint simulation method of an IGBT device taking into account the electrothermal characteristics of parasitic capacitance according to claim 1, characterized in that: In step S6, the simulation method includes: configuring the data exchange frequency to ensure data synchronization within each data exchange step so that field circuit changes can be transmitted in a timely manner; setting the simulation step a in the Simulink model parameter configuration according to the required simulation accuracy and efficiency; setting the simulation step b in the COMSOL "solver configuration"; determining the data exchange step, which is the least common multiple c of the Simulink model simulation step and the COMSOL model simulation step; starting the joint simulation, running the Simulink and COMSOL joint model, and every time c, calculating the gate voltage calculated by the Simulink model. V G , collector-emitter voltage V CE and power loss P Update to COMSOL model and change the temperature in COMSOL model T , gate-collector current C GC , gate-emitter capacitance C GE and collector-emitter capacitance C CE Update to the Simulink model; through this closed-loop iterative process, the joint simulation continues to run until convergence is reached, ultimately obtaining the dynamic and static electrothermal characteristics of the IGBT and achieving a comprehensive simulation of the IGBT module.

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