LCD photoelectric plate outer layer circuit pattern generation and precision single point compensation method

Abstract

The application discloses a kind of LCD photoelectric plate outer layer circuit pattern generation and precision single point compensation method, all PCS key pattern position circuit patterns are generated by CAM software automation script one-time, and consistency compensation is carried out, and all PAD, circuit, golden finger, MARK etc. are compensated in a way, but the pattern requirement of photoelectric plate is particularly high, T disc for COF positioning is compensated by single point, and the loss of pattern precision is reduced during etching, and the influence of pattern precision is smaller;Using laser direct imaging technology and negative process, and setting fixed pre-release coefficient in the design stage, it helps to reduce the error in the manufacturing process and improve the yield rate;Through the single point compensation good data exposure development, etching process can be better controlled, so that COF spacing is more accurate, which is conducive to the smooth progress of subsequent processes.

Description

Technical Field

[0001] This invention relates to the field of PCB board technology, and in particular to a method for generating outer layer circuit patterns and performing single-point accuracy compensation on LCD optoelectronic boards. Background Technology

[0002] As an indispensable component of modern electronic devices, every step of the manufacturing process of LCD optoelectronic panels has a significant impact on the display effect and reliability of the final product. In particular, the precision of the outer layer circuit patterns of the LCD optoelectronic panel directly affects key performance indicators such as the display's resolution and contrast ratio. With the development of LCD technology, the precision requirements for the circuit patterns on the optoelectronic panel are becoming increasingly stringent, and traditional production methods are facing challenges in ensuring pattern consistency.

[0003] Traditional LCD optoelectronic board outer layer circuit pattern fabrication typically employs CAM software for design file processing, followed by photoplotting to convert the design data into film for subsequent etching processes. However, due to material properties, environmental factors, and equipment precision limitations, the actual fabricated circuit patterns may exhibit dimensional deviations, particularly at critical locations such as the T-finger graphic points on both sides of the DisplayPin. These deviations lead to inconsistent COF spacing, consequently affecting the electrical connection performance and overall reliability of the display module.

[0004] This invention is based on the above circumstances. Summary of the Invention

[0005] This invention overcomes the shortcomings of the prior art and provides a method for generating outer layer circuit patterns and providing single-point accuracy compensation for LCD optoelectronic boards.

[0006] This invention is achieved through the following technical solution:

[0007] A method for generating outer layer circuit patterns and performing single-point accuracy compensation on an LCD optoelectronic board, the method comprising the following steps:

[0008] S1. Based on the design rules and manufacturing requirements, use CAM software to process the original design files and generate files suitable for production. Use automated scripts to generate circuit diagrams for all key PCS graphic positions at once and perform consistency compensation.

[0009] S2. Identify the T-finger graphic points on both sides of the Display Pin on each PNL as key compensation positions, determine the specific coordinates of the key compensation positions, and define a separate compensation parameter for each position. Convert the design data after single-point compensation into LDI laser data that can be read by a photoplotter, and use the photoplotter to make film based on the converted LDI laser data.

[0010] S3. Prepare the substrate for the LCD optoelectronic panel;

[0011] S4. Based on the design drawings and engineering drilling tape, determine all locations where drilling is required, and use drilling equipment to drill the holes;

[0012] S5. Deposit a layer of chemical copper on the substrate and perform electroplating using VCP negative film process. After electroplating, bake the substrate board at 150°C for 2 hours.

[0013] S6. Clean and activate the substrate surface, and attach the dry film photoresist to the substrate surface by hot pressing.

[0014] S7. Use laser direct imaging technology to expose the dry film photoresist. Set a fixed pre-expansion factor during the CAM design stage. The pre-expansion factor of the outer layer is the fixed pre-expansion factor.

[0015] S8, negative etching, using data with single-point compensation for exposure and development, etching to measure COF spacing;

[0016] S9. Measure the distance between the T-fingers on the etched board, collect all measurement data, and perform statistical analysis;

[0017] S10, Impedance Printing: Pre-treatment uses a needle brush combined with volcanic ash to clean the surface, remove oil and small particles, and enhance the adhesion of the printing material. Impedance printing is performed using a 43-mesh screen. During the printing process, aluminum mesh is used to plug the holes. After printing, the material is pre-baked at 74 degrees Celsius for 45 minutes to allow the impedance material to initially cure and prepare for subsequent processing.

[0018] S11. Text Printing: Use a 140-mesh fine screen for text printing. Solvent is gradually removed through segmented baking. Finally, bake at a high temperature of 150 degrees Celsius for 60 minutes to ensure that the ink is completely cured and forms a firm text label.

[0019] S12. Complete the chemical gold plating process on the board according to the standard procedure, measure the distance between the T fingers again, analyze the measurement data, evaluate whether the chemical gold plating process affects the accuracy of the circuit pattern, and make corresponding adjustments as needed.

[0020] As described above, the method for generating and compensating for the precision of the outer layer circuit pattern of an LCD optoelectronic board involves compensating the T-finger pattern point outward by 0.012mm.

[0021] In the LCD optoelectronic board outer layer circuit pattern generation and single-point accuracy compensation method described above, in step S6, the speed of cleaning and activating the substrate surface is 2.8 meters / minute.

[0022] In the LCD optoelectronic board outer layer circuit pattern generation and single-point accuracy compensation method described above, in step S6, the temperature during lamination is set to 110 degrees Celsius to ensure that the dry film can be fully softened and tightly bonded to the substrate, and the applied pressure is 4 kgf / cm².

[0023] The method for generating and compensating for single-point accuracy of the outer layer circuit pattern of an LCD optoelectronic board as described above includes a copper-clad laminate as the substrate. A copper ring surrounds the copper-clad laminate and serves as a sealant around it. The copper ring has venting grooves that allow gas to escape during the pressing of the copper-clad laminate. Step S3, the substrate preparation steps, include:

[0024] S31. Cutting and preparing copper-clad laminates;

[0025] S32. According to the design rules and manufacturing requirements, use CAM software to process the original design files and generate files suitable for production. According to the number of PCB layers and design requirements, separate the circuit information of each layer, define the exhaust slots of each layer, generate the corresponding film data, and convert the film of each layer into LDI laser data by using a photoplotter to draw the PCS graphic.

[0026] S33. Perform micro-etching treatment on the surface of the copper-clad laminate to remove the oxide layer and activate the copper surface to improve the adhesion of photosensitive ink or dry film, and coat the copper-clad laminate with a layer of photosensitive ink.

[0027] S34. Use an LDI exposure machine to expose the copper-clad laminate coated with photosensitive ink according to the converted laser data;

[0028] S35. The unexposed photosensitive ink is dissolved by the developer to expose the copper surface to be etched. The exposed copper layer is removed by the chemical etching solution to form the required circuit pattern and generate the venting groove. After etching is completed, the remaining photosensitive ink is removed to expose the complete circuit pattern.

[0029] S36. Inspect the inner layer circuitry for open circuits, short circuits, gaps, scratches, and poor exposure using AOI, and remove defective products.

[0030] S37. Perform browning treatment on the copper-clad laminate. By cleaning the copper surface of the substrate, a browning film is generated on the copper surface of the substrate to enhance the bonding force between the laminated substrate and the PP prepreg.

[0031] S38. Cut the PP prepreg into pieces according to the design requirements;

[0032] S39. Pre-stack the copper-clad laminate and the prepared PP prepreg according to the LOT card requirements. Place copper foil on the outermost layer, and alternately arrange copper-clad laminate and PP prepreg in the middle. Use an infrared positioning system to position each layer of material.

[0033] S40. First, hot pressing is performed to bond the various layers of material together to form a solid whole. Then, cold pressing is performed to cool the material. The multilayer board that has been pressed is taken out of the press. Target holes are drilled using X-RAY positioning technology. Finally, the multilayer board is milled.

[0034] As described above, the method for generating and compensating for the single-point accuracy of the outer layer circuit pattern of the LCD optoelectronic board includes a step S31.1 between step S31 and step S32: baking the copper-clad board in an oven for four hours at a temperature of 155°C.

[0035] As described above, in the method for generating and compensating for the precision of the outer layer circuit pattern of the LCD optoelectronic board, in step S33, the processing speed is 4 meters / minute, the micro-etching amount is controlled at 0.80 micrometers, and the ink thickness is 11-13 μm; in step S37, the linear speed of the browning process is 3.5 meters / minute, and the micro-etching amount is controlled at 1.5 micrometers.

[0036] In the LCD optoelectronic board outer layer circuit pattern generation and single-point accuracy compensation method described above, in step S38, the PP prepreg is of type 2116 with a glue content of 56%, and a PP prepreg with a length of 622mm and a width of 546mm is cut out.

[0037] In the LCD optoelectronic board outer layer circuit pattern generation and single-point accuracy compensation method described above, in step S39, the copper foil has a length of 622mm, a width of 546mm, and a thickness of 15μm.

[0038] In the LCD optoelectronic board outer layer circuit pattern generation and single-point accuracy compensation method described above, in step S40, steel plates are added to the top, middle and bottom of the laminated stack, two new kraft paper sheets are placed between the steel plates, and three new kraft paper sheets and eighteen old kraft paper sheets are used between the steel plates and the copper-clad laminate, with the three new kraft paper sheets located on the side closest to the copper-clad laminate.

[0039] Compared with the prior art, the present invention has the following advantages:

[0040] This project utilizes CAM software to automatically generate circuit diagrams for all key PCS locations in a single process, and performs consistency compensation. All PADs, circuits, gold fingers, MARKs, etc., are compensated in the same way. However, the graphic requirements for the optoelectronic board are particularly high, so single-point compensation was performed on the T-disk for COF positioning. This reduced the loss of graphic accuracy during etching, and the impact on graphic accuracy was minimized. The use of direct laser imaging technology and negative film processing, as well as setting a fixed pre-amplification factor during the design phase, helps to reduce errors in the manufacturing process and improve the yield. Exposure and development of data with good single-point compensation allows for better control of the etching process, resulting in more accurate COF spacing and facilitating the smooth progress of subsequent processes. Attached Figure Description

[0041] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings, wherein:

[0042] Figure 1 This is a schematic diagram of the structure of the LCD photoelectric plate in this invention;

[0043] Figure 2 This is a graph showing the range of graphic precision in this invention;

[0044] Figure 3 This is a schematic diagram of the structure of copper rings connecting the copper-clad laminate around the perimeter in this invention. Detailed Implementation

[0045] The present invention will now be further described with reference to the accompanying drawings:

[0046] like Figures 1 to 3 The method for generating outer layer circuit patterns and performing single-point accuracy compensation on an LCD optoelectronic board, as shown, includes the following steps:

[0047] S1. Based on the design rules and manufacturing requirements, use CAM software to process the original design files and generate files suitable for production. Use automated scripts to generate circuit diagrams for all key PCS graphic positions at once and perform consistency compensation.

[0048] S2. Identify the T-finger graphic points on both sides of the Display Pin on each PNL as key compensation positions, determine the specific coordinates of the key compensation positions, and define a separate compensation parameter for each position. Convert the design data after single-point compensation into LDI laser data that can be read by a photoplotter, and use the photoplotter to make film based on the converted LDI laser data.

[0049] S3. Prepare the substrate for the LCD optoelectronic panel;

[0050] S4. Based on the design drawings and engineering drilling tape, determine all locations where drilling is required, and use drilling equipment to drill the holes;

[0051] S5. Deposit a layer of copper on the substrate using VCP negative film electroplating; Hole copper thickness: Ensure the copper layer inside the hole reaches a minimum of 18 micrometers, which helps improve the conductivity and reliability of the hole wall. Surface copper thickness: Control the surface copper thickness between 30 and 45 micrometers to meet the requirements of circuit design and ensure good electrical performance.

[0052] S6. Clean and activate the substrate surface to remove impurities such as oil and oxides, enhance the adhesion between the dry film and the substrate, and attach the dry film photoresist to the substrate surface by hot pressing.

[0053] S7. Use laser direct imaging technology to expose the dry film photoresist. Set a fixed pre-expansion factor during the CAM design stage. The pre-expansion factor of the outer layer is the fixed pre-expansion factor.

[0054] S8. Negative etching: Expose and develop the data with good single-point compensation, and measure the COF spacing during etching to verify the etching effect and adjust the parameters in a timely manner.

[0055] S9. Measure the distance between the T-fingers on the etched board. This is one of the key indicators to ensure the accuracy of the circuit pattern. Collect all measurement data, perform statistical analysis, identify any deviations, and optimize the etching process or adjust other related procedures accordingly.

[0056] S10, Impedance Printing: Pre-treatment uses a needle brush combined with volcanic ash to clean the surface, remove oil and small particles, and enhance the adhesion of the printing material. Impedance printing is performed using a 43-mesh screen to ensure that the pattern is fine and there is no missing printing. During the printing process, aluminum mesh is used to plug the holes to prevent the impedance material from seeping into unwanted areas. After printing is completed, it is pre-baked at 74 degrees Celsius for 45 minutes to allow the impedance material to initially cure and prepare for subsequent processing.

[0057] S11. Text Printing: Use a 140-mesh fine screen for text printing to ensure that the text is clear and legible. Solvent is gradually removed by baking in stages to avoid ink overflow or air bubbles caused by rapid heating. Finally, bake at a high temperature of 150 degrees Celsius for 60 minutes to ensure that the ink is completely cured and forms a firm text label.

[0058] S12. Complete the chemical gold plating treatment of the board according to the standard procedure to improve conductivity and corrosion resistance. Measure the distance between the T fingers again to ensure that there is no significant change throughout the production process. Analyze the measurement data to assess whether the chemical gold plating treatment affects the accuracy of the circuit pattern and make corresponding adjustments as needed.

[0059] This project utilizes CAM software to automatically generate circuit diagrams for all key PCS locations in a single process, and performs consistency compensation. All PADs, circuits, gold fingers, MARKs, etc., are compensated in the same way. However, the graphic requirements for the optoelectronic board are particularly high. Single-point compensation was performed on the T-disk for COF positioning, reducing the loss of graphic accuracy during etching and minimizing the impact on graphic accuracy. The use of direct laser imaging technology and negative film processing, as well as setting a fixed pre-amplification factor during the design phase, helps to reduce errors in the manufacturing process and improve the yield. Exposure and development of data with good single-point compensation allows for better control of the etching process, resulting in more accurate COF spacing and facilitating the smooth progress of subsequent processes.

[0060] Specifically, the T-finger graphic point is compensated outward by 0.012mm. During manufacturing, materials may experience slight shrinkage or expansion due to heat treatment, mechanical stress, or other factors. By pre-setting an outward compensation value, these dimensional changes can be offset to some extent, ensuring the dimensional accuracy of the final product. As a crucial alignment reference point on the circuit board, the accuracy of the T-finger's position directly affects the precision of subsequent process steps (such as drilling and etching). Outward compensation ensures that even with slight positional offsets, the T-finger remains accurately aligned, thereby improving overall alignment accuracy. In multilayer or multi-panel board splicing, small errors in each step can accumulate, leading to significant deviations in the final product. The 0.012mm compensation helps disperse and mitigate the impact of these accumulated errors, maintaining overall dimensional consistency and reliability.

[0061] In one embodiment, in step S6, the substrate surface is cleaned and activated at a speed of 2.5 meters per minute to ensure that each step of the process meets the standard and does not affect the final result.

[0062] In step S6, the temperature during lamination is set to 110 degrees Celsius to ensure that the dry film can soften sufficiently and bond tightly with the substrate. The applied pressure is 4 kgf / cm² to ensure that the dry film is flat and free of bubbles and has sufficient adhesion to the substrate.

[0063] In one embodiment, the substrate includes a copper-clad laminate 1, and a copper ring 2 is connected around the copper-clad laminate 1 for sealing the adhesive. The copper ring 2 has an exhaust groove 21 that allows gas to be discharged when the copper-clad laminate 1 is pressed. The substrate preparation steps in step S3 include:

[0064] S31. Preparation of copper-clad laminate 1 by cutting and cutting materials;

[0065] S32. According to the design rules and manufacturing requirements, use CAM software to process the original design files and generate files suitable for production. According to the number of PCB layers and design requirements, separate the circuit information of each layer and define the exhaust slot 21 of each layer to generate the corresponding film data. Use a photoplotter to draw the film corresponding to the PCS of each layer and convert it into LDI laser data.

[0066] S33. Perform micro-etching treatment on the surface of copper-clad laminate 1 to remove the oxide layer and activate the copper surface to improve the adhesion of photosensitive ink or dry film, and coat a layer of photosensitive ink on copper-clad laminate 1.

[0067] S34. Use an LDI exposure machine to expose the copper-clad laminate 1 coated with photosensitive ink according to the converted laser data;

[0068] S35. The unexposed photosensitive ink is dissolved by the developer to expose the copper surface to be etched. The exposed copper layer is removed by the chemical etching solution to form the required circuit pattern and generate the venting groove 21. After etching is completed, the remaining photosensitive ink is removed to expose the complete circuit pattern.

[0069] S36. Inspect the inner layer circuitry for open circuits, short circuits, gaps, scratches, and poor exposure using AOI, and remove defective products.

[0070] S37. The copper-clad laminate 1 is subjected to browning treatment. By cleaning the copper surface of the substrate, a browning film is generated on the copper surface of the substrate to enhance the bonding force between the laminated substrate and the PP prepreg.

[0071] S38. Cut the PP prepreg into pieces according to the design requirements;

[0072] S39. According to the LOT card requirements, pre-stack the copper-clad laminate 1 with the prepared PP prepreg, place copper foil on the outermost layer, and alternately arrange the copper-clad laminate 1 and PP prepreg in the middle, and use an infrared positioning system to position each layer of material.

[0073] S40. First, hot pressing is performed to bond the various layers of material together to form a solid whole. Then, cold pressing is performed to cool the material. The multilayer board that has been pressed is taken out of the press. Target holes are drilled using X-RAY positioning technology. Finally, the multilayer board is milled.

[0074] By connecting copper rings 2 around the perimeter of the copper-clad laminate 1, excess adhesive overflow can be effectively blocked, ensuring a more consistent amount of adhesive between layers and thus improving the uniformity of the board thickness after lamination. Venting grooves 21 are formed on the copper rings 2, providing an effective channel for gas to escape between the boards during lamination, reducing air bubbles formed due to residual gas, and thus avoiding the impact of these bubbles on the uniformity of board thickness and electrical performance. The copper rings 2 not only act as adhesive barriers but also enhance the mechanical strength of the edges of the copper-clad laminate 1, helping to prevent edge breakage or warping. By defining the venting grooves 21 for each layer and automatically generating corresponding film data and laser data during the manufacturing process, the production process becomes more automated, reducing the possibility of human intervention and improving production efficiency.

[0075] In one embodiment, the copper-clad laminate 1 and the copper ring 2 are rectangular, and each side of the copper ring 2 has two venting grooves 21, thereby ensuring that the gas generated during the lamination process can be uniformly discharged from four directions. This helps prevent the formation of bubbles due to gas accumulation in local areas, thereby improving the uniformity of board thickness and the quality of the finished product. Furthermore, the venting grooves 21 are evenly distributed on each side of the copper ring 2. At the same time, the copper ring 2 can act as a shielding layer, effectively reducing the impact of external electromagnetic interference on the internal circuitry, and also reducing the electromagnetic radiation of the PCB board itself to the external environment.

[0076] Furthermore, the venting groove 21 has a groove width of 2.0 mm, and the angle α between the extension direction of the venting groove 21 and the side length direction of the copper ring 2 is 30°-60°. Since the fluidity of glue is not as good as that of gas, it tends to move along the shortest path, that is, flow in a direction perpendicular to the edge of the copper ring 2. By setting the venting groove 21 at a certain tilt angle, the glue can be effectively prevented from overflowing along the groove without affecting the gas discharge.

[0077] In one embodiment, in step S31, a copper-clad laminate 1 with a length of 622mm and a width of 546mm is cut out. The core board 11 of the copper-clad laminate 1 has a thickness of 0.4mm-0.6mm, and the outer copper layer 12 of the copper-clad laminate 1 has a thickness of 15μm or H / HOZ. The 622mm*546mm size is one of the common standard sizes for PCB manufacturing. This standardized size allows the use of existing production equipment and processes, reducing the complexity and cost of customized production and helping to improve production efficiency. The thickness range of 0.4mm-0.6mm for the core board 11 is suitable for most conventional applications, ensuring sufficient mechanical strength without being too thick to increase weight or occupy too much space. For circuit boards requiring a multi-layer structure, this thickness range also facilitates subsequent lamination processes, ensuring good adhesion between layers.

[0078] In step S38, the PP prepreg is of type 2116 with a glue content of 56%, which helps to provide sufficient flow during the pressing process, ensuring full adhesion between layers and filling any possible micro-gaps. The prepreg is then cut into PP sheets with a length of 622 mm and a width of 546 mm.

[0079] In step S39, the copper foil 12 has a length of 622 mm, a width of 546 mm, and a thickness of 15 μm.

[0080] In one embodiment, between steps S1 and S2, there is an additional step S1.2 where the copper-clad laminate 1 is baked in an oven for four hours at a temperature of 155°C. The copper-clad laminate 1 may absorb moisture from the environment during storage and transportation. If this moisture is not removed in time during subsequent high-temperature processes, it may cause significant dimensional shrinkage of the board. Baking the board removes this moisture. Simultaneously, pre-baking helps stabilize the dimensions of the copper-clad laminate 1, reduces the impact of thermal expansion and contraction, and improves the yield rate.

[0081] In one embodiment, in step S33, the processing speed is 4 meters / minute, the micro-etching amount is controlled at 0.80 micrometers to ensure uniform surface treatment without excessive etching of the copper surface; the ink thickness is 11-13 μm.

[0082] In step S36, the following checks are performed: Open circuit: Detecting broken or discontinuous conductors. Short circuit: Checking for accidental contact between different circuits, leading to incorrect electrical connections. Gap: Locating missing sections on conductors or pads. Scratches: Identifying surface damage caused by mechanical handling or other reasons. Poor exposure: Assessing potential problems during exposure, such as overexposure or underexposure, affecting the quality of pattern transfer. Inspection method: The PCB is scanned using a high-resolution camera and specific optical inspection conditions. Image processing software compares the actual image with a preset standard template, automatically identifying any deviations or defects. If the AOI system detects any of the aforementioned defects, the PCB is marked as non-compliant and is typically scrapped to avoid waste in subsequent processes.

[0083] If the PCB board is made of 6 to 8 layers of material, the required hole diameter is accurately punched at the specified position using an OPE punching machine based on an optical positioning system.

[0084] In one embodiment, the browning treatment is used to form a uniform oxide layer on the surface to enhance the adhesion between the copper surface and the PP prepreg. Speed: The processing linear speed is 3.5 m / min to ensure sufficient dwell time during the process to form a stable oxide layer. Micro-etching amount: Controlled at 1.5 micrometers, this helps remove minor oxide layers and contaminants on the copper surface without over-etching it, ensuring the effectiveness of subsequent bonding. After the browning treatment, the surface of the copper-clad laminate 1 appears brown, indicating the formation of an ideal oxide layer that enhances the adhesion to the PP prepreg.

[0085] In one embodiment, in step S40, steel plates are added at the top, middle, and bottom of the laminated stack. Two new kraft papers are placed between the steel plates. Three new kraft papers and eighteen old kraft papers are used between the steel plate and the copper clad laminate 1, and the three new kraft papers are on the side close to the copper clad laminate 1. The new kraft paper is kraft paper that has not been used or has no impurities or residues on its surface: mainly used for buffering to ensure that no impurities or residues affect the quality of the final product. They have good flatness and thermal conductivity, which can make the heat conduction more uniform. The old kraft paper refers to the used kraft paper: used to further enhance the heat conduction effect, increase the buffering effect, and also reduce the cost. Although the old paper is not brand new, it can still provide the necessary buffering and heat conduction functions. By using multiple layers of kraft paper and steel plates, it is ensured that the pressure is evenly distributed throughout the lamination process, improving the quality and flatness of the finished product. Hot lamination, cold lamination, X-RAY positioning technology, and routing are all conventional technical means for laminating PCB boards and will not be elaborated here one by one.

[0086] Measurement data table: unit / mm

[0087] project Pre-release value Development value Etching value solder resist value Text value Gold value 1 479.2663 479.2513 479.2613 479.2313 479.2233 479.2283 2 479.2663 479.253 479.265 479.235 479.224 479.229 3 479.266 479.254 479.269 479.239 479.225 479.231 4 479.2663 479.256 479.261 479.232 479.229 479.232 5 479.2663 479.250 479.264 479.238 379.228 479.229 6 479.2663 479.259 479.265 479.228 479.224 479.238 7 479.2663 479.251 479.267 479.226 479.216 479.231 8 479.2663 479.257 479.268 479.240 479.216 479.221 9 479.2663 479.248 479.256 479.225 479.218 479.229 10 479.2663 479.247 479.257 479.237 479.217 479.231 11 479.2663 479.253 479.254 479.235 379.213 479.232 12 479.2663 479.254 479.258 479.239 479.228 479.229 13 479.2663 479.256 479.265 479.232 479.224 479.238 14 479.2663 479.250 479.269 479.238 479.216 479.231 15 479.2663 479.259 479.261 479.228 479.216 479.221 16 479.2663 479.251 479.264 479.226 479.218 479.229 17 479.2663 479.257 479.265 479.240 479.217 479.231 18 479.2663 479.248 479.267 479.225 479.216 479.232 19 479.2663 479.247 479.268 479.237 479.216 479.229 20 479.2663 479.251 479.256 479.235 479.218 479.238 21 479.2663 479.257 479.257 479.239 479.217 479.231 22 479.2663 479.248 479.254 479.232 379.213 479.221 23 479.2663 479.247 479.258 479.238 479.228 479.229 24 479.2663 479.246 479.251 479.226 479.212 479.215 25 479.2663 479.252 479.253 479.236 479.213 479.218 average value 479.266 479.251 479.261 479.231 479.223 479.228 standard 479.246 479.246 479.246 479.246 479.246 479.246 upper limit 479.286 479.286 479.286 479.286 479.286 479.286 lower limit 479.206 479.206 479.206 479.206 479.206 479.206

[0088] It is qualified within the range of 0.04mm in line with the industry standards of PCB board LCD optoelectronic boards.

[0089] This embodiment is verified through a large number of experiments. By optimizing the design of the working unit PCS and performing single-point graphic compensation, the improvement of the graphic tolerance data of the test board is significant, which can greatly improve the accuracy of the alignment of the optoelectronic board graphics to COF, optimize the process flow, and greatly improve the production quality.

Claims

1. A method for generating outer layer circuit patterns and performing single-point accuracy compensation on an LCD optoelectronic board, characterized in that: The method includes the following steps: S1. Based on the design rules and manufacturing requirements, use CAM software to process the original design files and generate files suitable for production. Use automated scripts to generate circuit diagrams for all key PCS graphic positions at once and perform consistency compensation. S2. Identify the T-finger graphic points on both sides of the Display Pin on each PNL as key compensation positions, determine the specific coordinates of the key compensation positions, and define a separate compensation parameter for each position. Convert the design data after single-point compensation into LDI laser data that can be read by a photoplotter, and use the photoplotter to make film based on the converted LDI laser data. S3. Prepare the substrate for the LCD optoelectronic panel; S4. Based on the design drawings and engineering drilling tape, determine all locations where drilling is required, and use drilling equipment to drill the holes; S5. Deposit a layer of chemical copper on the substrate and perform electroplating using VCP negative film process. After electroplating, bake the substrate board at 150°C for 2 hours. S6. Clean and activate the substrate surface, and attach the dry film photoresist to the substrate surface by hot pressing. S7. Use laser direct imaging technology to expose the dry film photoresist. Set a fixed pre-expansion factor during the CAM design stage. The pre-expansion factor of the outer layer is the fixed pre-expansion factor. S8, negative etching, using data with single-point compensation for exposure and development, etching to measure COF spacing; S9. Measure the distance between the T-fingers on the etched board, collect all measurement data, and perform statistical analysis; S10, Impedance Printing: Pre-treatment uses a needle brush combined with volcanic ash to clean the surface, remove oil and small particles, and enhance the adhesion of the printing material. Impedance printing is performed using a 43-mesh screen. During the printing process, aluminum mesh is used to plug the holes. After printing, the material is pre-baked at 74 degrees Celsius for 45 minutes to allow the impedance material to initially cure and prepare for subsequent processing. S11. Text Printing: Use a 140-mesh fine screen for text printing. Solvent is gradually removed through segmented baking. Finally, bake at a high temperature of 150 degrees Celsius for 60 minutes to ensure that the ink is completely cured and forms a firm text label. S12. Complete the chemical gold plating process on the board according to the standard procedure, measure the distance between the T fingers again, analyze the measurement data, evaluate whether the chemical gold plating process affects the accuracy of the circuit pattern, and make corresponding adjustments as needed.

2. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 1, characterized in that: The T-shaped finger graphic point is compensated outward by 0.012mm.

3. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 1, characterized in that: In step S6, the substrate surface is cleaned and activated at a rate of 2.8 meters per minute.

4. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 3, characterized in that: In step S6, the temperature during lamination is set to 110 degrees Celsius to ensure that the dry film can soften sufficiently and bond tightly with the substrate, and the applied pressure is 4 kgf / cm².

5. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 1, characterized in that: The substrate includes a copper-clad laminate, and a copper ring is connected around the copper-clad laminate for sealing the adhesive. The copper ring has an exhaust groove that allows gas to be discharged when the copper-clad laminate is pressed together. The substrate fabrication steps in step S3 include: S31. Cutting and preparing copper-clad laminates; S32. According to the design rules and manufacturing requirements, use CAM software to process the original design files and generate files suitable for production. According to the number of PCB layers and design requirements, separate the circuit information of each layer, define the exhaust slots of each layer, generate the corresponding film data, and convert the film of each layer into LDI laser data by using a photoplotter to draw the PCS graphic. S33. Perform micro-etching treatment on the surface of the copper-clad laminate to remove the oxide layer and activate the copper surface to improve the adhesion of photosensitive ink or dry film, and coat the copper-clad laminate with a layer of photosensitive ink. S34. Use an LDI exposure machine to expose the copper-clad laminate coated with photosensitive ink according to the converted laser data; S35. The unexposed photosensitive ink is dissolved by the developer to expose the copper surface to be etched. The exposed copper layer is removed by the chemical etching solution to form the required circuit pattern and generate the venting groove. After etching is completed, the remaining photosensitive ink is removed to expose the complete circuit pattern. S36. Inspect the inner layer circuitry for open circuits, short circuits, gaps, scratches, and poor exposure using AOI, and remove defective products. S37. Perform browning treatment on the copper-clad laminate. By cleaning the copper surface of the substrate, a browning film is generated on the copper surface of the substrate to enhance the bonding force between the laminated substrate and the PP prepreg. S38. Cut the PP prepreg into pieces according to the design requirements; S39. According to the LOT card requirements, pre-stack the copper-clad laminate and the prepared PP prepreg, with copper foil on the outermost layer and alternating layers of copper-clad laminate and PP prepreg in the middle. Use an infrared positioning system to position each layer of material. S40. First, hot pressing is performed to bond the various layers of material together to form a solid whole. Then, cold pressing is performed to cool the material. The multilayer board that has been pressed is taken out of the press. Target holes are drilled using X-RAY positioning technology. Finally, the multilayer board is milled.

6. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 5, characterized in that: Between steps S31 and S32, there is also step S31.1, which involves baking the copper-clad plate in an oven for four hours at a temperature of 155°C.

7. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 5, characterized in that: In step S33, the processing speed is 4 m / min, the micro-etching amount is controlled at 0.80 micrometers, and the ink thickness is 11-13 μm; in step S37, the linear speed of the browning treatment is 3.5 m / min, and the micro-etching amount is controlled at 1.5 micrometers.

8. The method for generating outer layer circuit patterns and performing single-point accuracy compensation for LCD optoelectronic boards according to claim 5, characterized in that: In step S38, the PP prepreg is of type 2116 with an adhesive content of 56%, and is cut into PP prepregs with a length of 622mm and a width of 546mm.

9. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 5, characterized in that: In step S39, the copper foil has a length of 622 mm, a width of 546 mm, and a thickness of 15 μm.

10. The method for generating and single-point accuracy compensation of the outer layer circuit pattern of an LCD optoelectronic board according to claim 5, characterized in that: In step S40, steel plates are added to the top, middle and bottom of the laminated stack. Two new kraft paper sheets are placed between the steel plates. Three new kraft paper sheets and eighteen old kraft paper sheets are used between the steel plates and the copper-clad laminate. The three new kraft paper sheets are located on the side closest to the copper-clad laminate.

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