High-voltage integrated level shift circuit

Abstract

The invention relates to the technical field of integrated circuits, and provides a high-voltage integrated level shift circuit, which comprises a Schmidt circuit, a phase inverter and a cross-coupling level shift circuit which are electrically connected in sequence, the cross coupling level shift circuit comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube and an eighth MOS tube. The source electrode of the first MOS tube is connected with the source electrode of the second MOS tube, the grid electrode of the first MOS tube and the grid electrode of the second MOS tube are respectively used as the input end of the cross coupling level shift circuit and are connected to the output end of the phase inverter, the drain electrode of the first MOS tube is connected with the drain electrode of the seventh MOS tube, and the drain electrode of the second MOS tube is connected with the drain electrode of the eighth MOS tube. According to the high-voltage integrated level shift circuit, the required pulse width can be met, the switching speed of the circuit is improved, and the overall dynamic power consumption is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a high-voltage integrated level shift circuit. Background Art

[0002] In many integrated circuits, in order to meet the voltage requirements of different semiconductor devices in the integrated circuit, it is necessary to convert a lower level signal into a higher level signal, or convert a higher level signal into a lower level signal. Level transfer technology is used to achieve this function.

[0003] Traditional level shift circuits usually directly convert input signals into output signals that are consistent with the input signal phase. If the input signal required by the integrated circuit is sent to the input end of the level shift circuit, the integrated circuit remains in normal working state. However, if an interference signal is generated at the input end of the level shift circuit, the output signal output from the output end of the level shift circuit is uncertain, and may output a high level or a low level.

[0004] However, the conventional cross-coupled level shifter, which consists of 4 MOS tubes, has almost no static current when the circuit is in steady state, which greatly reduces the power consumption of the circuit. However, there is a situation where the low-side voltage is not enough and the MOS tube does not have a good pull-down capability, which will affect the performance of the circuit. The disadvantage of the current mirror level shifter structure is that when the input is high, there is static current in the branch where it is turned on, thereby increasing the overall static power consumption of the system. Summary of the invention

[0005] The present invention provides a high-voltage integrated level shift circuit, aiming to solve the problems of high power consumption and poor performance of the existing integrated level conversion circuit.

[0006] An embodiment of the present invention provides a high-voltage integrated level shift circuit, comprising: a Schmitt circuit, an inverter, and a cross-coupling level transfer circuit electrically connected in sequence;

[0007] The cross-coupling level transfer circuit includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube and an eighth MOS tube;

[0008] The source of the first MOS tube is connected to the source of the second MOS tube, the gate of the first MOS tube and the gate of the second MOS tube are respectively connected to the output end of the inverter as the input end of the cross-coupling level shifting circuit, the drain of the first MOS tube is connected to the drain of the seventh MOS tube, the drain of the second MOS tube is connected to the drain of the eighth MOS tube; the gate of the seventh MOS tube is connected to the drain of the seventh MOS tube, and the gate of the eighth MOS tube is connected to the drain of the eighth MOS tube;

[0009] The source of the seventh MOS tube is respectively connected to the drain of the third MOS tube, the gate of the fourth MOS tube and the gate of the fifth MOS tube, and the source of the eighth MOS tube is respectively connected to the gate of the third MOS tube, the drain of the fourth MOS tube and the gate of the sixth MOS tube;

[0010] The source of the third MOS tube is connected to the drain of the fifth MOS tube, the source of the fourth MOS tube is connected to the drain of the sixth MOS tube, the source of the fifth MOS tube is connected to the source of the sixth MOS tube and is connected to the power supply together; the drain of the second MOS tube also serves as the output end of the cross-coupling level shifting circuit.

[0011] Preferably, the Schmitt circuit includes a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube and a fifteenth MOS tube;

[0012] The source of the ninth MOS tube is used to connect the reference voltage, the gate of the ninth MOS tube is respectively connected to the gate of the tenth MOS tube, the gate of the eleventh MOS tube and the gate of the twelfth MOS tube and serves as the input end of the Schmitt circuit; the drain of the ninth MOS tube is respectively connected to the source of the tenth MOS tube and the source of the thirteenth MOS tube, and the drain of the thirteenth MOS tube is grounded; the drain of the tenth MOS tube is respectively connected to the drain of the eleventh MOS tube, the gate of the thirteenth MOS tube, the gate of the fourteenth MOS tube and the gate of the fifteenth MOS tube; the gate of the thirteenth MOS tube is also connected to the input end of the inverter as the output end of the Schmitt circuit;

[0013] The source of the eleventh MOS tube is respectively connected to the drain of the twelfth MOS tube and the source of the fourteenth MOS tube, and the source of the twelfth MOS tube is grounded; the drain of the fourteenth MOS tube is connected to the source of the fifteenth MOS tube, and the drain of the fifteenth MOS tube is connected to the reference voltage.

[0014] Preferably, the inverter includes a sixteenth MOS tube and a seventeenth MOS tube;

[0015] The gate of the sixteenth MOS tube is connected to the gate of the seventeenth MOS tube and serves as the input end of the inverter; the drain of the sixteenth MOS tube is connected to the drain of the seventeenth MOS tube and is connected to the gate of the second MOS tube as the output end of the inverter; the gate of the sixteenth MOS tube is also connected to the gate of the first MOS tube; the source of the seventeenth MOS tube is connected to the source of the first MOS tube, and the source of the sixteenth MOS tube is connected to the reference voltage.

[0016] Compared with the prior art, the beneficial effect of the present invention lies in that, by electrically connecting the Schmitt circuit, the inverter and the cross-coupling level transfer circuit in sequence; the source of the first MOS tube is connected to the source of the second MOS tube, the gate of the first MOS tube and the gate of the second MOS tube are respectively connected to the output of the inverter as the input end of the cross-coupling level transfer circuit, the drain of the first MOS tube is connected to the drain of the seventh MOS tube, and the drain of the second MOS tube is connected to the drain of the eighth MOS tube; the gate of the seventh MOS tube is connected to the drain of the seventh MOS tube, and the gate of the eighth MOS tube is connected to the drain of the eighth MOS tube; the source of the seventh MOS tube is respectively connected to the drain of the third MOS tube, the gate of the fourth MOS tube and the gate of the fifth MOS tube, and the source of the eighth MOS tube is respectively connected to the gate of the third MOS tube, the drain of the fourth MOS tube and the gate of the sixth MOS tube; the source of the third MOS tube is connected to the drain of the fifth MOS tube, the source of the fourth MOS tube is connected to the drain of the sixth MOS tube, the source of the fifth MOS tube is connected to the source of the sixth MOS tube and is connected to the power supply together; the drain of the second MOS tube also serves as the output end of the cross-coupling level transfer circuit. It can realize the fast pull-down of point A. Similarly, when IN changes from high to low, the circuit works in the opposite way. In order to further reduce some losses, two PMOS tubes in diode connection mode can be added to play the role of current limiting. At the same time, the level shift circuit of the present invention can meet the required pulse width, improve the switching speed of the circuit, and reduce the overall dynamic power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0018] Figure 1 is a circuit diagram of a high-voltage integrated level shift circuit provided by an embodiment of the present invention;

[0019] Figure 2 is a circuit diagram of a cross-coupling level shifting circuit provided by an embodiment of the present invention;

[0020] Figure 3 It is a waveform diagram of the high-voltage integrated level shift circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0022] Combined with Figure 1-Figure 3 As shown, an embodiment of the present invention provides a high-voltage integrated level shift circuit, including: a Schmitt circuit 1, an inverter 2 and a cross-coupled level shift circuit 3 electrically connected in sequence; the cross-coupled level shift circuit 3 includes a first MOS tube M1, a second MOS tube M2, a third MOS tube M3, a fourth MOS tube M4, a fifth MOS tube M5, a sixth MOS tube M6, a seventh MOS tube M7 and an eighth MOS tube M8.

[0023] The source of the first MOS tube M1 is connected to the source of the second MOS tube M2, the gate of the first MOS tube M1 and the gate of the second MOS tube M2 are respectively connected to the output end of the inverter 2 as the input end of the cross-coupling level shifting circuit 3, the drain of the first MOS tube M1 is connected to the drain of the seventh MOS tube M7, the drain of the second MOS tube M2 is connected to the drain of the eighth MOS tube M8; the gate of the seventh MOS tube M7 is connected to the drain of the seventh MOS tube M7, and the gate of the eighth MOS tube M8 is connected to the drain of the eighth MOS tube M8;

[0024] The source of the seventh MOS tube M7 is respectively connected to the drain of the third MOS tube M3, the gate of the fourth MOS tube M4 and the gate of the fifth MOS tube M5, and the source of the eighth MOS tube M8 is respectively connected to the gate of the third MOS tube M3, the drain of the fourth MOS tube M4 and the gate of the sixth MOS tube M6;

[0025] The source of the third MOS tube M3 is connected to the drain of the fifth MOS tube M5, the source of the fourth MOS tube M4 is connected to the drain of the sixth MOS tube M6, the source of the fifth MOS tube M5 is connected to the source of the sixth MOS tube M6 and is connected to the power supply together; the drain of the second MOS tube M2 also serves as the output end of the cross-coupling level shifting circuit 3.

[0026] Specifically, the Schmitt circuit 1, the inverter 2, and the cross-coupling level shift circuit 3 are electrically connected in sequence; the source of the first MOS tube M1 is connected to the source of the second MOS tube M2, the gate of the first MOS tube M1 and the gate of the second MOS tube M2 are respectively connected to the output end of the inverter 2 as the input end of the cross-coupling level shift circuit 3, the drain of the first MOS tube M1 is connected to the drain of the seventh MOS tube M7, the drain of the second MOS tube M2 is connected to the drain of the eighth MOS tube M8; the gate of the seventh MOS tube M7 is connected to the drain of the seventh MOS tube M7, and the gate of the eighth MOS tube M8 is connected to the drain of the eighth MOS tube M8; The source of the seventh MOS tube M7 is respectively connected to the drain of the third MOS tube M3, the gate of the fourth MOS tube M4 and the gate of the fifth MOS tube M5, and the source of the eighth MOS tube M8 is respectively connected to the gate of the third MOS tube M3, the drain of the fourth MOS tube M4 and the gate of the sixth MOS tube M6; the source of the third MOS tube M3 is connected to the drain of the fifth MOS tube M5, the source of the fourth MOS tube M4 is connected to the drain of the sixth MOS tube M6, the source of the fifth MOS tube M5 is connected to the source of the sixth MOS tube M6 and is connected to the power supply; the drain of the second MOS tube M2 is also used as the output end of the cross-coupling level shift circuit 3. It can realize the rapid pull-down of point A. Similarly, when IN changes from high to low, the working condition of the circuit is just the opposite. In order to further reduce some losses, two PMOS tubes in a diode connection mode can also be added to play a role in current limiting. At the same time, the level shift circuit of the present invention can meet the required pulse width, improve the switching speed of the circuit, and reduce the overall dynamic power consumption.

[0027] In this embodiment, the Schmitt circuit 1 includes a ninth MOS tube M9, a tenth MOS tube M10, an eleventh MOS tube M11, a twelfth MOS tube M12, a thirteenth MOS tube M13, a fourteenth MOS tube M14 and a fifteenth MOS tube M15; the source of the ninth MOS tube M9 is used to connect the reference voltage, and the gate of the ninth MOS tube M9 is respectively connected to the gate of the tenth MOS tube M10, the gate of the eleventh MOS tube M11 and the gate of the twelfth MOS tube M12 and serves as the input end of the Schmitt circuit 1; The drain of the ninth MOS tube M9 is respectively connected to the source of the tenth MOS tube M10 and the source of the thirteenth MOS tube M13, and the drain of the thirteenth MOS tube M13 is grounded; the drain of the tenth MOS tube M10 is respectively connected to the drain of the eleventh MOS tube M11, the gate of the thirteenth MOS tube M13, the gate of the fourteenth MOS tube M14 and the gate of the fifteenth MOS tube M15; the gate of the thirteenth MOS tube M13 is also connected to the input end of the inverter 2 as the output end of the Schmitt circuit 1.

[0028] The source of the eleventh MOS tube M11 is respectively connected to the drain of the twelfth MOS tube M12 and the source of the fourteenth MOS tube M14, and the source of the twelfth MOS tube M12 is grounded; the drain of the fourteenth MOS tube M14 is connected to the source of the fifteenth MOS tube M15, and the drain of the fifteenth MOS tube M15 is connected to the reference voltage.

[0029] In this embodiment, the inverter 2 includes a sixteenth MOS tube M16 and a seventeenth MOS tube M17; the gate of the sixteenth MOS tube M16 is connected to the gate of the seventeenth MOS tube and serves as the input end of the inverter 2, the drain of the sixteenth MOS tube M16 is connected to the drain of the seventeenth MOS tube and is connected to the gate of the second MOS tube M2 as the output end of the inverter 2; the gate of the sixteenth MOS tube M16 is also connected to the gate of the first MOS tube M1; the source of the seventeenth MOS tube is connected to the source of the first MOS tube M1, and the source of the sixteenth MOS tube M16 is connected to the reference voltage.

[0030] Specifically, two fifth MOS tubes M5 and sixth MOS tubes M6 and two diode-connected seventh MOS tubes M7 and eighth MOS tubes M8 are added. When the input voltage changes from low to high level, the circuit works as follows: Figure 2 As shown. Assuming that IN is low in the initial stage, the first MOS tube M1 is disconnected, and the second MOS tube M2 is turned on. Node A will be pulled to a high level, and the VA value is slightly lower than the power supply voltage. At this time, node B is at a low level. The third MOS tube M3 and the sixth MOS tube M6 are turned on, and the fourth MOS tube M4 and the fifth MOS tube M5 are turned off.

[0031] In the second stage, when IN jumps from low to high, the first MOS tube M1 starts to turn on, and the second MOS tube M2 will be disconnected. At this time, the parasitic capacitance at point A starts to discharge, but because the fifth MOS tube M5 has not yet turned on, the pull-up current of the left branch is small, so the voltage at point A can be reduced quickly. When VA is reduced to VDDH-Vth, the fourth MOS tube M4 and the fifth MOS tube M5 start to turn on. After the fourth MOS tube M4 is turned on, the voltage at point B is quickly pulled up, causing the third MOS tube M3 and the sixth MOS tube M6 to be cut off. In the above-mentioned working process, the pull-up current at point A is always small, so compared with the traditional cross-coupled level shift circuit, this circuit can achieve a fast pull-down at point A. Similarly, when IN changes from high to low, the working condition of the circuit is just the opposite. In order to further reduce some losses, two PMOS tubes in a diode connection mode can also be added to play a role in current limiting. At the same time, the level shift circuit of the present invention can meet the required pulse width, improve the switching speed of the circuit, and reduce the overall dynamic power consumption.

[0032] In this embodiment, 10 is a Schmitt modulation waveform; 11 is a 5V level input waveform; 12 is a required output 15V level waveform. By being able to achieve a fast pull-down of point A. Similarly, when IN changes from high to low, the circuit works in the opposite way. In order to further reduce some losses, two diode-connected PMOS tubes can be added to play a current limiting role. At the same time, the level shift circuit of the present invention can meet the required pulse width, improve the switching speed of the circuit, and reduce the overall dynamic power consumption.

[0033] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or device. In the absence of more restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, article or device including the element.

[0034] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A high voltage integrated level shift circuit, characterized in that: include: A Schmitt circuit, an inverter, and a cross-coupled level shifter circuit electrically connected in sequence; The cross-coupling level transfer circuit includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube and an eighth MOS tube; The source of the first MOS tube is connected to the source of the second MOS tube, the gate of the first MOS tube and the gate of the second MOS tube are respectively connected to the output end of the inverter as the input end of the cross-coupling level shifting circuit, the drain of the first MOS tube is connected to the drain of the seventh MOS tube, the drain of the second MOS tube is connected to the drain of the eighth MOS tube; the gate of the seventh MOS tube is connected to the drain of the seventh MOS tube, and the gate of the eighth MOS tube is connected to the drain of the eighth MOS tube; The source of the seventh MOS tube is respectively connected to the drain of the third MOS tube, the gate of the fourth MOS tube and the gate of the fifth MOS tube, and the source of the eighth MOS tube is respectively connected to the gate of the third MOS tube, the drain of the fourth MOS tube and the gate of the sixth MOS tube; The source of the third MOS tube is connected to the drain of the fifth MOS tube, the source of the fourth MOS tube is connected to the drain of the sixth MOS tube, the source of the fifth MOS tube is connected to the source of the sixth MOS tube and is connected to the power supply together; the drain of the second MOS tube also serves as the output end of the cross-coupling level shifting circuit.

2. The high voltage integrated level shift circuit according to claim 1, characterized in that: The Schmitt circuit includes a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube and a fifteenth MOS tube; The source of the ninth MOS tube is used to connect the reference voltage, the gate of the ninth MOS tube is respectively connected to the gate of the tenth MOS tube, the gate of the eleventh MOS tube and the gate of the twelfth MOS tube and serves as the input end of the Schmitt circuit; the drain of the ninth MOS tube is respectively connected to the source of the tenth MOS tube and the source of the thirteenth MOS tube, and the drain of the thirteenth MOS tube is grounded; the drain of the tenth MOS tube is respectively connected to the drain of the eleventh MOS tube, the gate of the thirteenth MOS tube, the gate of the fourteenth MOS tube and the gate of the fifteenth MOS tube; the gate of the thirteenth MOS tube is also connected to the input end of the inverter as the output end of the Schmitt circuit; The source of the eleventh MOS tube is respectively connected to the drain of the twelfth MOS tube and the source of the fourteenth MOS tube, and the source of the twelfth MOS tube is grounded; the drain of the fourteenth MOS tube is connected to the source of the fifteenth MOS tube, and the drain of the fifteenth MOS tube is connected to the reference voltage.

3. The high voltage integrated level shift circuit according to claim 2, characterized in that: The inverter includes a sixteenth MOS tube and a seventeenth MOS tube; The gate of the sixteenth MOS tube is connected to the gate of the seventeenth MOS tube and serves as the input end of the inverter; the drain of the sixteenth MOS tube is connected to the drain of the seventeenth MOS tube and serves as the output end of the inverter and is connected to the gate of the second MOS tube; the gate of the sixteenth MOS tube is also connected to the gate of the first MOS tube; The source of the seventeenth MOS tube is connected to the source of the first MOS tube, and the source of the sixteenth MOS tube is connected to the reference voltage.

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