A method and device for correcting dynamic frequency deviation of FSK signal

Abstract

The present invention relates to a method and device for dynamic frequency deviation correction of FSK signals. The method obtains a first phase difference sequence through a received FSK signal, and then performs frame synchronization based on the first phase difference sequence. After the frame synchronization, the frequency deviation is tracked according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence, so that the CFO and SFO tracking results can be obtained dynamically and in real time, and finally the real-time frequency deviation correction and compensation are performed according to the dynamic frequency deviation tracking results. The present application can not only effectively deal with the frequency deviation problems caused by environmental changes, equipment hardware and other factors by tracking and correcting the FSK signal in real time and dynamically, but also can correct and supplement the frequency deviation in real time, thereby significantly enhancing the reliability and stability of communication. At this time, through real-time frequency deviation correction and compensation, the bit error rate caused by frequency deviation can be reduced, the reliability of decoding can be improved, and the integrity and accuracy of the data can be ensured.

Description

Technical Field

[0001] The present invention relates to the field of electric power communication, and in particular to a method and a device for correcting dynamic frequency deviation of an FSK signal. Background Art

[0002] In the field of low-voltage meter reading communication, reliable communication and data transmission is crucial for meter data collection. However, due to the complex communication environment of the meter, both the power line channel and the wireless channel are easily affected by the environment, and are prone to carrier frequency offset (CFO) and sampling frequency offset (SFO), which leads to signal distortion. CFO refers to the difference between the carrier frequency of the transmitter and the receiver, which is usually caused by the inconsistency of the local oscillator frequency of the transmitter and the receiver, and SFO is caused by the inconsistency of the sampling clock frequency of the receiver and the transmitter. Both the local oscillator frequency and the sampling clock frequency are easily affected by factors such as temperature changes and device hardware, which can easily cause jitter, thus easily generating dynamically changing CFO and SFO. CFO will cause changes in the signal spectrum characteristics, thereby causing changes in the phase and amplitude of the signal, making it difficult for the signal to be correctly demodulated and restored; SFO will cause the time scale of the received signal to shift, thereby distorting the signal waveform and seriously affecting the decoding performance. Therefore, how the receiving end in power communication can effectively cope with the dynamic changes of CFO and SFO to ensure accurate signal transmission and decoding has become an urgent problem to be solved. Summary of the invention

[0003] In view of this, an embodiment of the present application provides a method and device for correcting dynamic frequency deviation of an FSK signal in order to solve at least one problem existing in the background technology.

[0004] In a first aspect, an embodiment of the present application provides a method for dynamic frequency deviation correction of an FSK signal, the method comprising:

[0005] receiving an FSK signal, and obtaining a first phase difference sequence according to the FSK signal;

[0006] Perform frame synchronization according to the first phase difference sequence to obtain a frame synchronization position;

[0007] Perform bit judgment starting from the sampling point of the frame synchronization position to obtain a bit sequence;

[0008] Perform frequency offset tracking according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result; wherein the frequency offset tracking result includes a carrier frequency offset (CFO) tracking result and a sampling frequency offset (SFO) tracking result;

[0009] The frequency deviation of the FSK signal is corrected according to the frequency deviation tracking result.

[0010] In a second aspect, an embodiment of the present application provides a device for dynamic frequency deviation correction of an FSK signal, the device comprising:

[0011] A receiving unit, used for receiving an FSK signal, and obtaining a first phase difference sequence according to the FSK signal;

[0012] a synchronization unit, configured to perform frame synchronization according to the first phase difference sequence to obtain a frame synchronization position;

[0013] A bit decision unit, used to make a bit decision starting from a sampling point of the frame synchronization position to obtain a bit sequence;

[0014] A frequency offset tracking unit, configured to perform frequency offset tracking according to a first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result;

[0015] A frequency offset correction unit is used to perform frequency offset correction on the FSK signal according to the frequency offset tracking result.

[0016] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, which stores instructions. When the instructions are executed by a processor of an electronic device, the electronic device can execute the FSK signal dynamic frequency deviation correction method provided in any one of the above-mentioned first aspects.

[0017] In a fourth aspect, an embodiment of the present application provides an electronic device, the electronic device comprising:

[0018] processor;

[0019] memory for storing computer executable instructions;

[0020] The processor is used to execute the computer executable instructions to implement the FSK signal dynamic frequency deviation correction method described in any one of the first aspects above.

[0021] In the embodiment of the present application, a first phase difference sequence is obtained by receiving the FSK signal, and then frame synchronization is performed based on the first phase difference sequence. After frame synchronization, frequency deviation tracking is performed according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence, so that CFO and SFO tracking results can be obtained dynamically and in real time, and finally real-time frequency deviation correction and compensation are performed according to the dynamic frequency deviation tracking results. By tracking and correcting the FSK signal in real time and dynamically, the present application can not only effectively deal with the frequency deviation problems caused by environmental changes, equipment hardware and other factors, but also can correct and supplement the frequency deviation in real time, thereby significantly enhancing the reliability and stability of communication. At this time, through real-time frequency deviation correction and compensation, the bit error rate caused by frequency deviation can be reduced, the reliability of decoding can be improved, and the integrity and accuracy of the data can be ensured.

[0022] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0024] Figure 1 A schematic diagram of a flow chart of a method for dynamic frequency deviation correction of an FSK signal provided in an embodiment of the present application;

[0025] Figure 2 A schematic diagram of a frame synchronization method flow chart provided in an embodiment of the present application;

[0026] Figure 3 A schematic diagram of a first phase difference curve simulation provided in an embodiment of the present application;

[0027] Figure 4 A partial schematic diagram of a first phase difference curve provided in an embodiment of the present application;

[0028] Figure 5 A partial schematic diagram of a first phase difference curve provided in another embodiment of the present application;

[0029] Figure 6 A schematic diagram of a FSK signal dynamic frequency deviation correction device provided in one embodiment of the present application;

[0030] Figure 7 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the technical solutions and beneficial effects of the present invention more clearly understood, the following is a detailed description by listing specific embodiments. Unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application belongs.

[0032] Figure 1 This is a flow chart of a method for dynamic frequency deviation correction of FSK signals provided in an embodiment of the present application. Figure 1 As shown, the dynamic frequency offset correction method of the embodiment of the present application includes:

[0033] S1. Receive an FSK signal, and obtain a first phase difference sequence according to the FSK signal.

[0034] Among them, the first phase difference sequence includes the first phase difference of each sampling point. The first phase difference of a certain sampling point represents the difference between the phase of the sampling point and another sampling point. Frequency Shift Keying (FSK) is a modulation technology that transmits digital signals by changing the frequency of the carrier. The frequency of its carrier signal changes according to the transmitted binary data, and two different frequencies represent binary data 0 and 1 respectively. For example, if the transmitted bit is 0, an FSK symbol with a frequency of f1 is generated; if the transmitted bit is 1, an FSK symbol with a frequency of f2 is generated. It should be noted that FSK signal demodulation is based on FSK symbols, and each FSK symbol has a fixed number of sampling points. In the embodiment of the present application, the number of sampling points of the FSK symbol is Ns, that is, each FSK symbol is Ns sampling points, and each Ns sampling points constitutes an FSK symbol. When demodulating the FSK signal, it is based on each FSK symbol. The receiving end will analyze the frequency of each FSK symbol and then convert it into a corresponding 0 or 1 according to a preset frequency mapping rule.

[0035] In the embodiment of the present application, obtaining a first phase difference sequence according to the FSK signal includes: conjugate multiplying each sampling point in the FSK signal by another sampling point in the first interval therefrom to obtain a first phase difference of each sampling point;

[0036] A first phase difference sequence is obtained according to the first phase difference of each sampling point.

[0037] In the embodiment of the present application, the first interval is determined according to the number of sampling points Ns of the FSK symbol. Specifically, it is calculated according to the following formula:

[0038] N=Ns / (2 2*ModIdx-1 )

[0039] Wherein, N represents the first interval, Ns represents the number of sampling points of each FSK symbol, and Modldx represents the modulation index. Modldx takes a value of 0-1, which is set according to the actual communication situation.

[0040] In the embodiment of the present application, a certain sampling point is conjugate multiplied with another sampling point, so that the phase part in the conjugate multiplication result is the first phase difference of the sampling point. For example, the FSK signal includes sampling points A1, A2, A3, A4, A5, A6...An, and the first interval is 3, then An and An-3 are conjugate multiplied. Since An and An-3 are both complex signals, the result of their conjugate multiplication is also a complex number. The phase part in the complex number is the phase difference information of the two sampling points, that is, the phase part in the conjugate multiplication of An and An-3 is the first phase difference of An. In the embodiment of the present application, the sampling points at two different times can be converted into a sequence containing phase difference information by conjugate multiplication, so that the frequency change of the signal between the two sampling points can be reflected, which is convenient for subsequent synchronization and demodulation.

[0041] As an optional specific implementation manner, receiving an FSK signal and obtaining a first phase difference sequence according to the FSK signal includes:

[0042] The downsampled FSK signal is received, and a sampling point phase difference sequence is obtained according to the downsampled FSK signal. In the embodiment of the present application, downsampling is performed to reduce the amount of data, reduce the computational complexity, and facilitate subsequent signal processing and analysis.

[0043] S2. Perform frame synchronization according to the first phase difference sequence to obtain a frame synchronization position.

[0044] Figure 2 A schematic diagram of a frame synchronization method flow chart provided in an embodiment of the present application. Figure 2 As shown, specifically, S2 includes:

[0045] S201. Obtain a second phase difference sequence according to the first phase difference sequence.

[0046] The second phase difference sequence includes the second phase difference of each sampling point.

[0047] Specifically, S201 includes:

[0048] Subtract the first phase difference of each sampling point from the first phase difference of another sampling point in the first interval therefrom to obtain a second phase difference of each sampling point;

[0049] A second phase difference sequence is obtained according to the second phase difference of each sampling point.

[0050] In the embodiment of the present application, by subtracting the first phase difference of two sampling points in the first interval, the influence of CFO can be removed, thereby facilitating subsequent synchronization. Specifically, CFO is manifested in the time domain as a linear change in the phase of the signal over time, that is, the phase of each sampling point will have an additional offset relative to the ideal situation. In the embodiment of the present application, the first phase difference sequence reflects the change of the phase of the received signal over time, which also includes the phase offset caused by CFO, that is, the phase offset caused by CFO causes the first phase difference of each sampling point to produce a fixed upward or downward offset. By further subtracting the first phase difference of the sampling point, the influence of the first phase difference offset of the sampling point caused by CFO can be eliminated, thereby improving the accuracy of subsequent synchronization.

[0051] S202: Obtain a frame synchronization position according to a second phase difference sequence.

[0052] Specifically, S202 includes:

[0053] Subtract the accumulated results of the first Ns second phase differences corresponding to each sampling point from the accumulated results of the last Ns second phase differences to obtain the accumulated phase difference of each sampling point;

[0054] The accumulated phase difference of each sampling point is compared with a preset threshold, and the frame synchronization position is obtained according to the comparison result.

[0055] For example, if Ns is 3, and the second phase difference sequence is a1, a2, a3, a4, a5, and a6, the first Ns accumulated results corresponding to the sampling point of a6 are a4+a5+a6, and the last Ns accumulated results are a1+a2+a3.

[0056] Specifically, comparing the accumulated phase difference of each sampling point with a preset threshold, and obtaining the frame synchronization position according to the comparison result, includes:

[0057] If the accumulated phase difference of a certain sampling point is greater than a preset threshold, the sampling point is the frame synchronization position.

[0058] In the embodiment of the present application, the first Ns accumulated results of the sampling points represent the sum of the second phase difference of the FSK symbol corresponding to the current sampling point, and the last Ns accumulated results of the sampling points represent the sum of the second phase difference of the previous FSK symbol corresponding to the current sampling point. By subtracting the sum of the second phase differences of two adjacent FSK symbols and comparing it with the preset threshold, the frame synchronization position can be determined based on the characteristics of the FSK symbol in the pilot signal. It should be noted that the preset threshold can be determined based on the pilot signal, and the method for determining the preset threshold is the same as the method for calculating the accumulated phase difference of the sampling points in the received signal, which will not be repeated here; in addition, the preset threshold can also be adjusted in combination with actual communication conditions such as the signal-to-noise ratio. Among them, the pilot signal is a known signal with a special structure, and the receiving end determines the synchronization position of the signal by detecting the presence of the pilot signal.

[0059] It should be noted that the frame synchronization position is also the starting point of the FSK symbol, that is, starting from the frame synchronization position, every Ns sampling points is an FSK symbol, and the corresponding subsequent demodulation is also parsed based on each FSK symbol as the basic unit. The frame synchronization position is theoretically aligned with the original sampling point, but due to the existence of SFO, the subsequent FSK symbols will not be completely aligned with the theoretical sampling point position due to SFO, that is, the sampling point will be advanced or delayed, resulting in demodulation errors of the FSK symbol. Therefore, real-time correction of SFO during the demodulation process is a prerequisite for ensuring that the FSK symbol can be correctly parsed.

[0060] As an optional specific implementation manner, before subtracting the first Ns second phase difference accumulation results and the last Ns second phase difference accumulation results of each sampling point to obtain the accumulated phase difference of each sampling point, the method further includes:

[0061] The second cumulative sum sequence is obtained according to the second phase difference sequence. Correspondingly, the first Ns second cumulative sum accumulation results of each sampling point are subtracted from the last Ns second cumulative sum accumulation results to obtain the accumulated phase difference of each sampling point.

[0062] Specifically, obtaining a second cumulative sum sequence according to the second phase difference sequence includes:

[0063] Taking the current sampling point as the starting point, the second phase difference accumulation is performed every 2Ns sampling points until the preset accumulation times are reached, and the accumulation result is the second accumulation sum of the current sampling point.

[0064] A second accumulated sum sequence is obtained according to the second accumulated sum of each sampling point.

[0065] Among them, the preset number of accumulations is determined according to the structure of the pilot signal. For example, if the bits corresponding to the pilot signal are 0101010101, the preset number of accumulations is 5 times. When the received FSK symbol includes the pilot signal, the phase difference between the pilot signal and other signals can be made more obvious by accumulation, and the peak position of the subsequent accumulated phase difference can be made more prominent even at a low signal-to-noise ratio, thereby improving the accuracy of synchronization. It should be noted that each FSK symbol corresponding to 0 or 1 includes Ns sampling points, and accumulation is performed at intervals of 2Ns sampling points, so that the second phase difference maximum value in 0 or 1 can be accumulated multiple times, thereby improving the anti-noise ability and making the peak more prominent. It should be noted that the sampling point phase in each FSK symbol sent in the embodiment of the present application is decreasing or increasing. For example, if the bit of the FSK symbol is 0, the phase of the sampling points in the corresponding FSK symbol decreases successively; if the bit of the FSK symbol is 1, the phase of the sampling points in the corresponding FSK symbol increases successively; if the leading symbol is 010, the corresponding sampling point phase is decreasing-increasing-decreasing. According to the characteristics of the sampling point phase in the leading signal, the synchronization position can be determined at the receiving end according to the size of the accumulated phase difference of the sampling points.

[0066] S3. Start bit judgment from the sampling point of the frame synchronization position to obtain a bit sequence.

[0067] Specifically, S3 includes:

[0068] Starting from the sampling point of the frame synchronization position, obtaining the extreme value point in the first phase difference sequence;

[0069] A bit decision is made based on the positive or negative value of each extreme point to obtain a bit sequence.

[0070] Specifically, if an extreme value point is positive, the bit of the extreme value point is 1; if an extreme value point is negative, the bit of the extreme value point is 0.

[0071] In the embodiment of the present application, by judging the extreme point, the change of the first phase difference can be obtained, which is convenient for subsequent frequency deviation tracking. It should be noted that the phase of each FSK symbol in the FSK signal gradually increases or decreases, and the first phase difference of the corresponding sampling point also gradually increases or decreases. The extreme point can be judged based on the first phase difference sequence; the bits of the extreme points here are only used for subsequent frequency deviation tracking, not the corresponding bits after each FSK symbol is demodulated, but the extreme points are the endpoints of the FSK symbols. In the embodiment of the present application, the FSK symbol corresponds to the decrease or increase of the sampling point phase. Therefore, the extreme point can also indirectly reflect the change of the sampling point phase in the effective signal, so that CFO and SFO can be judged according to the change of the phase in the interval between the extreme points.

[0072] S4. Perform frequency offset tracking according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result.

[0073] The frequency deviation tracking result includes the CFO tracking result and / or the SFO tracking result.

[0074] The specific subsequence is a 010 or 101 sequence. In the embodiment of the present application, the first phase difference curve corresponding to the 101 sequence is from the positive extreme point to the negative extreme point and then back to the positive extreme point; the first phase difference curve corresponding to the 010 sequence is from the negative extreme point to the positive extreme point and then back to the negative extreme point; the 101 sequence or the 010 sequence forms a complete sinusoidal wave cycle; in the absence of frequency deviation, the first phase difference curve of this interval conforms to the law of the sinusoidal wave curve, so that the frequency deviation can be tracked according to the actual change of the first phase difference curve. In the embodiment of the present application, by tracking the frequency deviation of the first phase difference corresponding to each specific subsequence, the frequency deviation tracking result can be obtained in real time, so as to facilitate the real-time correction and compensation of the frequency deviation and ensure the correct demodulation of the signal. It should be noted that since both CFO and SFO are in dynamic change, if the frequency deviation is not corrected, the frequency deviation will continue to accumulate. Therefore, even if the frequency deviation is corrected at a certain point in time, the frequency deviation will continue to accumulate after a period of time. The embodiment of the present application will track the frequency deviation according to the first phase difference sequence corresponding to each specific subsequence, so that the frequency deviation can be monitored in real time and dynamically, and the frequency deviation can be corrected in real time, thereby ensuring the continuous and accurate transmission and decoding of the signal.

[0075] As an optional specific implementation, S4 includes:

[0076] The first phase difference mean within a specific subsequence interval is calculated, and the first phase difference mean is the CFO tracking result.

[0077] Specifically, according to the communication protocol, in the embodiment of the present application, when the FSK symbol sent by the transmitter is 0, the phase of the Ns sampling points is continuously decreasing; when the FSK symbol is 1, the phase of the Ns sampling points is continuously increasing; at the same time, the amplitude of the increase or decrease is consistent. Therefore, in the absence of CFO, the first phase difference curve of the sampling points in the 010 or 101 sequence interval is a complete sine wave cycle, and the corresponding first phase difference mean is theoretically 0. When CFO exists, CFO will cause the phase difference curve to shift upward or downward as a whole, and the corresponding first phase difference mean is the CFO tracking result. In the embodiment of the present application, the overall CFO offset is estimated by calculating the first phase difference mean in a specific subsequence interval. The calculation method is simple and convenient for hardware implementation. Specifically, the first phase difference in a specific subsequence interval is accumulated and then divided by the number of sampling points to obtain the first phase difference mean.

[0078] Figure 3FIG. 1 is a schematic diagram of a first phase difference curve simulation provided in an embodiment of the present application. Figure 3 As shown in the figure, the solid line is the first phase difference curve without CFO, and the dotted line is the first phase difference curve with CFO. It can be seen from the figure that the peak and trough amplitudes of the first phase difference in the solid line are equal. At the same time, since the first phase difference curve in the 010 or 101 interval is a sine wave waveform, the mean value of the first phase difference in the interval is equal to 0; the first phase difference curve in the dotted line is offset upward relative to the solid line as a whole. Since the upward offset is caused by CFO, the offset caused by CFO can be obtained by calculating the mean value of the first phase difference, that is, the CFO tracking result.

[0079] Figure 4 FIG. 1 is a partial schematic diagram of a first phase difference curve according to an embodiment of the present application. Figure 4 As shown, the dotted line is the first phase difference curve when CFO exists, and the solid line is the first phase difference curve when there is no CFO. The count values ​​of the sampling points corresponding to the extreme points in the figure are 32, 48, and 64 respectively, and the corresponding Ns is 16. According to the first phase difference of the extreme points, the corresponding bits are 0, 1, and 0, that is, the specific subsequence bits 010. The amplitudes of the positive and negative extreme points in the solid line are equal, and the first phase difference curve in the interval of sampling points 32 to 64 presents a complete sine wave cycle. The cumulative sum of the first phase difference in this interval is 0; the dotted line is offset upward relative to the solid line as a whole, and the amplitudes of the positive and negative extreme points are not equal. The cumulative sum of the first phase difference in this interval is not equal to 0 due to the influence of CFO. By accumulating the first phase difference and then dividing it by the number of sampling points, the first phase difference mean obtained is the CFO tracking result. It should be noted that the sampling points in the specific subsequence interval only include one of the endpoints. For example, the sampling points in the interval of 32 to 64 in the figure are 33-64 or 32-63, with a total of 32 sampling points.

[0080] As an optional specific implementation, S4 includes:

[0081] The difference between the accumulated sum of the first phase differences of the first Ns points and the accumulated sum of the first phase differences of the last Ns points in the specific subsequence interval is calculated, and the difference is the SFO tracking result.

[0082] The first phase difference accumulation sum of the first Ns points and the first phase difference accumulation sum of the last Ns points in a specific subsequence interval respectively represent the first phase difference accumulation of the sampling points of two adjacent FSK symbols. In the absence of SFO, the first phase difference of the sampling points will not be offset on the time scale, and the first phase difference of the sampling points of the corresponding two adjacent FSK symbols is theoretically equal, that is, the difference of the first phase difference accumulation sum is equal to zero. In the case of SFO, the difference can reflect the degree of SFO deviation. Therefore, the SFO tracking result can be obtained by calculating the difference of the first phase difference accumulation sum in two adjacent FSK symbols.

[0083] Figure 5 A local schematic diagram of the first phase difference curve provided for another embodiment of the present application. As shown in the figure, the count values ​​of the sampling points corresponding to the extreme points in the figure are 35, 51, and 67, respectively, and the corresponding Ns is 16. According to the first phase difference of the extreme points, the corresponding bits are 0, 1, and 0, that is, the specific subsequence bits 010. The corresponding first Ns sampling points are sampling points 52-67, which correspond to the current FSK symbol; the last Ns sampling points are sampling points 36-51, which correspond to the previous FSK symbol; in theory, if there is no SFO, the cumulative sum of the first phase difference of the current FSK symbol will be equal to the cumulative sum of the first phase difference of the next FSK symbol. It can be seen from the figure that the cumulative sum of the first phase difference of the first Ns sampling points will be less than the cumulative sum of the first phase difference of the last Ns sampling points, that is, the difference between the two is the SFO tracking result. According to the SFO tracking result, the degree of deviation of the sampling points in the FSK symbol on the time scale can be judged, so that the frequency deviation can be corrected by adjusting the sampling points in the FSK symbol.

[0084] In the embodiment of the present application, the CFO and SFO can be estimated simultaneously through the first phase difference sequence, and only simple addition and subtraction operations are required, thereby achieving high efficiency and real-time frequency offset estimation. At the same time, due to the reduction in computational complexity, not only can the consumption of hardware resources be reduced and the hardware cost be reduced, but also the efficiency of frequency offset tracking can be improved, so that it can respond to environmental changes more quickly. On the other hand, the frequency offset tracking of the embodiment of the present application only relies on addition and subtraction operations, so it has a strong tolerance for noise and interference of the input signal, and has good adaptability and robustness.

[0085] S5. Correct the frequency deviation of the FSK signal according to the frequency deviation tracking result.

[0086] Specifically, the frequency offset is corrected according to the FSK signal after the specific subsequence corresponding to the frequency offset tracking result. That is, if the frequency offset tracking result is obtained according to the first phase difference corresponding to a specific subsequence, the frequency offset is corrected for the FSK signal after the specific subsequence, thereby maintaining the continuity and real-time performance of tracking and correction.

[0087] As an optional specific implementation, S5 includes: if the frequency deviation tracking result is a CFO tracking result, the frequency deviation of the FSK signal is corrected according to the following formula:

[0088] ,

[0089] Where x(t)' represents the complex form of the FSK signal after correction; x(t) represents the complex form of the FSK signal before correction, and ε represents the CFO tracking result; t Indicates time; jrepresents an imaginary unit; e represents a constant.

[0090] As an optional specific implementation, S5 also includes: if the frequency deviation tracking result is an SFO tracking result, comparing the SFO tracking result with the first preset threshold and the second preset threshold, and performing frequency deviation correction on the FSK signal according to the comparison result.

[0091] Specifically, if the SFO tracking result is greater than the first preset threshold, the FSK symbol in the FSK signal is shifted backward by one sampling point; if the SFO tracking result is less than the second preset threshold, the FSK symbol in the FSK signal is shifted forward by one sampling point. Among them, the first preset threshold is greater than 0, and the second preset threshold is less than 0. When the SFO tracking result is greater than the first preset threshold, the deviation of the sampling point lagging behind caused by SFO is corrected in real time by shifting the FSK symbol backward by one sampling point; when the SFO tracking result is less than the second preset threshold, the deviation of the sampling point forward caused by SFO can be corrected by shifting the FSK symbol forward by one sampling point. In the embodiment of the present application, by comparing the SFO tracking result with the preset threshold, the time scale offset caused by SFO can be discovered in time, and by shifting the FSK symbol forward or shifting the sampling point one after another, the SFO can be corrected in real time, maintaining the synchronization and integrity of each FSK symbol, reducing the signal waveform distortion caused by SFO, and improving the decoding performance. It should be noted that the starting point of the frame synchronization position is the starting point of the FSK symbol, and every Ns subsequent points are an FSK symbol; when SFO exists, the starting point of the FSK symbol is adjusted by shifting the sampling point forward or backward, so that the offset on the time scale caused by SFO can be corrected in time to ensure that each FSK symbol contains the correct sampling point, thereby ensuring that each FSK symbol can be correctly demodulated.

[0092] For example, in Figure 5 In the example, if the difference between the first phase difference accumulation sum of the first Ns sampling points 52-67 corresponding to the current FSK symbol and the first phase difference accumulation sum of the last Ns sampling points 36-51 corresponding to the previous FSK symbol is less than the second preset threshold, the next FSK symbol is shifted forward by one sampling point, that is, the sampling points corresponding to the next FSK symbol before SFO correction are originally 68-83, then the sampling points of the next FSK symbol after SFO correction are 67-82. It should be noted that FSK symbols are continuous, and if the next FSK symbol shifts the sampling point, all subsequent FSK symbols will also have corresponding shifts.

[0093] In the embodiment of the present application, the first preset threshold and the second preset threshold can be adjusted according to the actual communication requirements. For example, if the time offset allowed by the receiving end is one sampling point, the first preset threshold and the second preset threshold can be set according to the phase difference value caused by the deviation of one sampling point in the pilot signal, so that the deviation of the FSK symbol can be maintained within one sampling point. It should be noted that for the SFO tracking result, each correction is shifted by at most one sampling point, so that the SFO can be corrected step by step, so that the SFO of the FSK symbol is maintained within a certain range, ensuring the accuracy and reliability of the decoding.

[0094] In the embodiment of the present application, if the frequency deviation tracking results are CFO tracking results and SFO tracking results, the frequency deviation correction is performed simultaneously according to the CFO tracking results and the SFO tracking results. The specific correction method is as in the above embodiment and will not be repeated here. CFO correction is a correction on the phase scale, which corrects the phase of the sampling point to restore the original phase information of the signal; SFO correction is a correction on the time scale, which corresponds to the compensation on the time scale of the FSK symbol sampling point, thereby restoring the original waveform of the signal and improving the decoding accuracy; CFO correction and SFO correction compensate for the deviations on the phase and time scales respectively, and the two do not affect each other.

[0095] As an optional specific implementation manner, before performing bit judgment from the sampling point of the frame synchronization position to obtain the bit sequence, the method further includes:

[0096] Accumulate the first phase difference of the sampling point corresponding to the pilot signal according to the frame synchronization position to obtain the pilot phase difference accumulation result;

[0097] The pilot frequency offset is estimated according to the pilot phase difference accumulation result;

[0098] The frequency deviation of the FSK signal is compensated according to the pre-pilot frequency deviation estimation result to obtain the compensated FSK signal;

[0099] Correspondingly, bit decision is performed starting from the sampling point after frequency offset compensation to obtain a bit sequence.

[0100] It should be noted that, in the embodiment of the present application, based on the structure of the preamble signal, if there is no CFO, the cumulative result of the preamble phase difference is equal to 0; if the cumulative result of the preamble phase difference is not 0, the CFO estimation value can be obtained according to the specific accumulation result, so that the subsequent FSK signal can be compensated for the frequency deviation according to the CFO estimation value, thereby reducing the subsequent frequency deviation tracking calculation amount and saving computing resources.

[0101] In the embodiment of the present application, a first phase difference sequence is obtained by receiving the FSK signal, and then frame synchronization is performed based on the first phase difference sequence. After frame synchronization, frequency deviation tracking is performed according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence, so that CFO and / or SFO tracking results can be obtained dynamically and in real time, and finally real-time frequency deviation correction and compensation are performed according to the dynamic frequency deviation tracking results. By tracking and correcting the FSK signal in real time and dynamically, the present application can not only effectively deal with the frequency deviation problems caused by environmental changes, equipment hardware and other factors, but also can correct and supplement the frequency deviation in real time, thereby significantly enhancing the reliability and stability of communication. At this time, through real-time frequency deviation correction and compensation, the bit error rate caused by frequency deviation can be reduced, the reliability of decoding can be improved, and the integrity and accuracy of the data can be ensured.

[0102] It should be understood that although Figure 1-2 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1-2 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0103] Figure 6 Schematic diagram of a FSK signal dynamic frequency deviation correction device provided by an embodiment of the present application. Figure 6 As shown, the dynamic frequency offset correction device 200 of the embodiment of the present application includes:

[0104] The receiving unit 201 is used to receive the FSK signal and obtain a first phase difference sequence according to the FSK signal.

[0105] The synchronization unit 202 is configured to perform frame synchronization according to the first phase difference sequence to obtain a frame synchronization position.

[0106] The bit decision unit 203 is used to perform bit decision starting from the sampling point of the frame synchronization position to obtain a bit sequence.

[0107] The frequency offset tracking unit 204 is used to perform frequency offset tracking according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result.

[0108] The frequency offset correction unit 205 is used to perform frequency offset correction on the FSK signal according to the frequency offset tracking result.

[0109] Optionally, obtaining a first phase difference sequence according to the FSK signal includes: conjugate multiplying each sampling point in the FSK signal with another sampling point in a first interval therefrom to obtain a first phase difference of each sampling point;

[0110] A first phase difference sequence is obtained according to the first phase difference of each sampling point.

[0111] Optionally, frame synchronization is performed according to the first phase difference sequence to obtain a frame synchronization position, including

[0112] Obtaining a second phase difference sequence according to the first phase difference sequence;

[0113] A frame synchronization position is obtained according to the second phase difference sequence.

[0114] Optionally, obtaining the second phase difference sequence according to the first phase difference sequence includes:

[0115] Subtract the first phase difference of each sampling point from the first phase difference of another sampling point in the first interval therefrom to obtain a second phase difference of each sampling point;

[0116] A second phase difference sequence is obtained according to the second phase difference of each sampling point.

[0117] Optionally, obtaining a frame synchronization position according to a second phase difference sequence includes:

[0118] Subtract the accumulated results of the first Ns second phase differences corresponding to each sampling point from the accumulated results of the last Ns second phase differences to obtain the accumulated phase difference of each sampling point;

[0119] The accumulated phase difference of each sampling point is compared with a preset threshold, and the frame synchronization position is obtained according to the comparison result.

[0120] Specifically, if the accumulated phase difference of a certain sampling point is greater than a preset threshold, the sampling point is the frame synchronization position.

[0121] Optionally, bit judgment is performed starting from a sampling point at a frame synchronization position to obtain a bit sequence, including:

[0122] Starting from the sampling point of the frame synchronization position, obtaining the extreme value point in the first phase difference sequence;

[0123] A bit decision is made based on the positive or negative value of each extreme point to obtain a bit sequence.

[0124] Specifically, if an extreme value point is positive, the bit of the extreme value point is 1; if an extreme value point is negative, the bit of the extreme value point is 0.

[0125] Optionally, performing frequency offset tracking according to a first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result includes:

[0126] The first phase difference mean within a specific subsequence interval is calculated, and the first phase difference mean is the CFO tracking result.

[0127] Optionally, performing frequency offset tracking according to a first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result further includes:

[0128] The difference between the accumulated sum of the first phase differences of the first Ns points and the accumulated sum of the first phase differences of the last Ns points in the specific subsequence interval is calculated, and the difference is the SFO tracking result.

[0129] Optionally, if the frequency deviation tracking result is a CFO tracking result, the frequency deviation of the FSK signal is corrected according to the following formula:

[0130] ,

[0131] Where x(t)' represents the complex form of the FSK signal after correction; x(t) represents the complex form of the FSK signal before correction, and ε represents the CFO tracking result; t Indicates time; j represents an imaginary unit; e represents a constant.

[0132] Optionally, if the frequency deviation tracking result is an SFO tracking result, the SFO tracking result is compared with the first preset threshold and the second preset threshold, and the frequency deviation of the FSK signal is corrected according to the comparison result.

[0133] Specifically, if the SFO tracking result is greater than the first preset threshold, the FSK symbol in the FSK signal is shifted backward by one sampling point; if the SFO tracking result is less than the second preset threshold, the FSK symbol in the FSK signal is shifted forward by one sampling point.

[0134] The embodiment of the present application further provides a computer-readable storage medium. The computer-readable storage medium stores instructions, and when the instructions are executed by a processor of an electronic device, the electronic device can execute the steps in the method for correcting dynamic frequency deviation of an FSK signal in any of the above embodiments.

[0135] The embodiments of the present application may be systems, methods and / or computer program products. The computer program product may include a computer-readable storage medium on which computer-readable program instructions are loaded for causing a processor to implement various aspects of the present application. In some embodiments, by using the state information of the computer-readable program instructions to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA) or a programmable logic array (PLA), the electronic circuit may execute the computer-readable program instructions to implement various aspects of the present application.

[0136] Computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. Computer readable storage medium is a tangible device that can keep and store instructions used by an instruction execution device. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage medium include: portable computer disk, hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory stick, floppy disk, mechanical encoding device, such as a punch card or a protruding structure in a groove on which instructions are stored, and any suitable combination of the above.

[0137] Various aspects of the present application are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present application. It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0138] An embodiment of the present application also provides an electronic device. Figure 7 The structure diagram of an electronic device provided by an embodiment of the present application is shown. As shown in the figure, the electronic device 300 includes: one or more processors 301 and a memory 302; the memory 302 stores computer executable instructions; the processor 301 is used to execute the computer executable instructions to implement the steps in the FSK signal dynamic frequency deviation correction method as described in any of the above embodiments.

[0139] The processor 301 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0140] The memory 302 may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory (cache), etc. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 301 may execute the program instructions to implement the steps in the text recognition method of each embodiment of the present application described above and / or other desired functions.

[0141] In one example, the electronic device 300 may further include: an input device and an output device, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown in the figure).

[0142] In addition, the input device may also include, for example, a keyboard, a mouse, a microphone, etc. The output device may output various information to the outside, and may include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0143] Of course, to simplify, Figure 7 Only a part of the components related to the present application in the electronic device 300 is shown, and components such as a bus, an input device / output interface, etc. are omitted. In addition, according to specific application conditions, the electronic device 300 may also include any other appropriate components.

[0144] It should be noted that the FSK signal dynamic frequency deviation correction method embodiment, FSK signal dynamic frequency deviation correction device embodiment, computer-readable storage medium embodiment and electronic device embodiment provided in the embodiments of the present application belong to the same concept; the technical features in the technical solutions recorded in each embodiment can be arbitrarily combined without conflict.

[0145] It should be understood that the above embodiments are exemplary and are not intended to include all possible implementations included in the claims. Various modifications and changes may be made on the basis of the above embodiments without departing from the scope of the present disclosure. Similarly, the various technical features of the above embodiments may be arbitrarily combined to form other embodiments of the present invention that may not be explicitly described. Therefore, the above embodiments only express several implementations of the present invention and do not limit the scope of protection of the patent of the present invention.

Claims

1. A method for correcting dynamic frequency deviation of an FSK signal, characterized in that: The method comprises: receiving an FSK signal, and obtaining a first phase difference sequence according to the FSK signal; Perform frame synchronization according to the first phase difference sequence to obtain a frame synchronization position; Perform bit judgment starting from the sampling point of the frame synchronization position to obtain a bit sequence; Perform frequency offset tracking according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result; wherein the frequency offset tracking result includes a carrier frequency offset (CFO) tracking result and a sampling frequency offset (SFO) tracking result; Performing frequency deviation correction on the FSK signal according to the frequency deviation tracking result; The step of performing frame synchronization according to the first phase difference sequence to obtain a frame synchronization position includes: Subtract the first phase difference of each sampling point from the first phase difference of another sampling point in the first interval therefrom to obtain a second phase difference of each sampling point; According to the second phase difference of each sampling point, a second phase difference sequence is obtained; Obtaining a frame synchronization position according to a second phase difference sequence; Wherein, obtaining the frame synchronization position according to the second phase difference sequence includes: Subtract the accumulated results of the first Ns second phase differences corresponding to each sampling point from the accumulated results of the last Ns second phase differences to obtain the accumulated phase difference of each sampling point; The accumulated phase difference of each sampling point is compared with a preset threshold, and the frame synchronization position is obtained according to the comparison result.

2. The FSK signal dynamic frequency deviation correction method as claimed in claim 1, characterized in that: Performing frequency offset tracking according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result includes: A first phase difference average value within the specific subsequence interval is calculated, where the first phase difference average value is a CFO tracking result.

3. The FSK signal dynamic frequency deviation correction method as claimed in claim 2, characterized in that: If the frequency deviation tracking result is a CFO tracking result, the frequency deviation of the FSK signal is corrected according to the following formula: ， Where x(t)' represents the complex form of the FSK signal after correction; x(t) represents the complex form of the FSK signal before correction, and ε represents the CFO tracking result; t Indicates time; j represents an imaginary unit; e represents a constant.

4. The FSK signal dynamic frequency deviation correction method as claimed in claim 1, characterized in that: Performing frequency offset tracking according to the first phase difference sequence corresponding to each specific subsequence in the bit sequence to obtain a frequency offset tracking result includes: The difference between the first phase difference cumulative sum of the first Ns points and the first phase difference cumulative sum of the last Ns points in a specific subsequence interval is calculated, and the difference is the SFO tracking result; wherein Ns is the number of sampling points of the FSK symbol.

5. The FSK signal dynamic frequency deviation correction method as claimed in claim 4, characterized in that: If the frequency offset tracking result is an SFO tracking result, the SFO tracking result is compared with the first preset threshold and the second preset threshold, and the frequency offset of the FSK signal is corrected according to the comparison result.

6. The FSK signal dynamic frequency deviation correction method as claimed in claim 5, characterized in that: The frequency deviation of the FSK signal is corrected according to the comparison result, including: If the SFO tracking result is greater than the first preset threshold, the FSK symbol in the FSK signal is shifted backward by one sampling point; If the SFO tracking result is less than the second preset threshold, the FSK symbol in the FSK is shifted forward by one sampling point.

7. The FSK signal dynamic frequency deviation correction method as claimed in claim 1, characterized in that: Starting from the sampling point of the frame synchronization position, bit judgment is performed to obtain a bit sequence, including: Starting from the sampling point of the frame synchronization position, obtaining an extreme point in the first phase difference sequence; A bit decision is made based on the positive or negative value of each extreme point to obtain a bit sequence.

8. A FSK signal dynamic frequency deviation correction device, characterized in that: The device comprises: A receiving unit, used for receiving an FSK signal, and obtaining a first phase difference sequence according to the FSK signal; a synchronization unit, configured to perform frame synchronization according to the first phase difference sequence to obtain a frame synchronization position; A bit decision unit, used to make a bit decision starting from a sampling point of the frame synchronization position to obtain a bit sequence; A frequency offset tracking unit, configured to perform frequency offset tracking according to a first phase difference sequence corresponding to each specific subsequence in the bit sequence, to obtain a frequency offset tracking result; wherein the frequency offset tracking result includes a carrier frequency offset (CFO) tracking result and a sampling frequency offset (SFO) tracking result; A frequency deviation correction unit, configured to perform frequency deviation correction on the FSK signal according to the frequency deviation tracking result; The step of performing frame synchronization according to the first phase difference sequence to obtain a frame synchronization position includes: Subtract the first phase difference of each sampling point from the first phase difference of another sampling point in the first interval therefrom to obtain a second phase difference of each sampling point; According to the second phase difference of each sampling point, a second phase difference sequence is obtained; Obtaining a frame synchronization position according to a second phase difference sequence; Wherein, obtaining the frame synchronization position according to the second phase difference sequence includes: Subtract the accumulated results of the first Ns second phase differences corresponding to each sampling point from the accumulated results of the last Ns second phase differences to obtain the accumulated phase difference of each sampling point; The accumulated phase difference of each sampling point is compared with a preset threshold, and the frame synchronization position is obtained according to the comparison result.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when the instructions are executed by a processor of an electronic device, the electronic device is enabled to execute the FSK signal dynamic frequency deviation correction method as described in any one of claims 1 to 7.

10. An electronic device, characterized in that: The electronic device comprises: processor; memory for storing computer executable instructions; The processor is used to execute the computer executable instructions to implement the FSK signal dynamic frequency deviation correction method described in any one of claims 1 to 7.

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