Reading circuit of dual-mode semiconductor single-photon detector

Abstract

The invention provides a readout circuit of a dual-mode semiconductor single-photon detector, and relates to the technical field of single-photon detection, and the readout circuit comprises a control module which is used for generating a control signal based on an external gating signal and an avalanche detection signal; the amplification module is used for controlling the single-photon detector to exit from the Geiger mode when the control signal is in the low-level state; and controlling the single-photon detector to enter a Geiger mode when the control signal is in a high level state, the avalanche extraction module is used for extracting an avalanche signal to obtain a pulse type avalanche detection signal; under the condition that the gating signal is in the low-level state, the control module enables the control signal to be kept in the low-level state; and under the condition that the gating signal is in a high-level state, the control module enables the control signal to be in a low-level state based on the avalanche detection signal, quenches the avalanche signal and controls the control signal to be in a high-level state again after a preset delay duration.

Description

Technical Field

[0001] The invention relates to the technical field of single-photon detection, and in particular to a readout circuit of a dual-mode semiconductor single-photon detector. Background Art

[0002] Semiconductor single-photon detectors have quantum-limited detection sensitivity and are important tools for weak light detection. They are widely used in technical fields such as quantum communications, lidar, and life sciences.

[0003] Single-photon avalanche photodiodes and readout circuits are the two core components of semiconductor single-photon detectors. According to the function of the readout circuit, semiconductor single-photon detectors can be divided into two working modes: free-running mode and gated mode. In free-running mode, single-photon detectors can detect photons arriving at any time, but are easily affected by strong light in the environment; gated mode can effectively shield periodic strong light in the environment, but is generally used for the detection of periodic signal light.

[0004] In some application scenarios, it is necessary to shield periodic strong light and detect randomly arriving signal photons, so a dual-mode single-photon detector is needed. However, for readout circuits with large gate widths, there is still no suitable technical solution to achieve dual-mode operation. Summary of the invention

[0005] In view of this, the present invention provides a readout circuit of a dual-mode semiconductor single-photon detector, which can make the semiconductor single-photon detector compatible with a free-running mode and a gated mode.

[0006] As one aspect of an embodiment of the present invention, a readout circuit of a dual-mode semiconductor single-photon detector is provided, comprising: a control module, for generating a control signal based on an external gating signal and an avalanche detection signal; an amplification module, for controlling the single-photon detector to exit the Geiger mode when the control signal is in a low-level state; and for controlling the single-photon detector to enter the Geiger mode when the control signal is in a high-level state; an avalanche extraction module, for extracting the avalanche signal to obtain a pulsed avalanche detection signal, wherein the avalanche signal is generated by the single-photon detector in the Geiger mode when stimulated by signal photons; wherein, when the gating signal is in a low-level state, the control module keeps the control signal in a low-level state; when the gating signal is in a high-level state, the control module changes the control signal to a low-level state based on the avalanche detection signal, quenches the avalanche signal, and controls the control signal to become a high-level state again after a preset delay time.

[0007] According to an embodiment of the present invention, the cathode of the single-photon detector is connected to the first power supply; the amplification module is used to: when the control signal is in the low level state, provide a first voltage to the anode of the single-photon detector so that the voltage difference between the first power supply and the anode of the single-photon detector is lower than the avalanche breakdown voltage, so that the single-photon detector exits the Geiger mode; when the control signal is in the high level state, provide a second voltage to the anode of the single-photon detector so that the voltage difference between the first power supply and the anode of the single-photon detector is higher than the avalanche breakdown voltage, so that the single-photon detector enters the Geiger mode; wherein the second voltage is lower than the first voltage.

[0008] According to an embodiment of the present invention, the above-mentioned control module is also used to generate an active recovery signal when controlling the rising edge of the above-mentioned control signal to return to a high level state after a preset delay period; the above-mentioned amplification module is also used to control the voltage provided to the anode of the above-mentioned single-photon detector to switch from the above-mentioned first voltage to the above-mentioned second voltage based on the above-mentioned active recovery signal, so as to shorten the conversion time of the voltage of the anode of the above-mentioned single-photon detector from the first voltage to the above-mentioned second voltage, improve the saturation count rate of the above-mentioned single-photon detector, and reduce the probability of after-pulses.

[0009] According to an embodiment of the present invention, the amplification module includes: a first transistor, the source of which is grounded, and the gate of which is connected to the output end of the control module; a first subunit, which is connected to the drain of the first transistor, and in response to the first transistor being turned off, the first subunit controls the anode of the single-photon detector to be turned on with the second power supply, so that the bias voltage on the PN junction of the single-photon detector is lower than the avalanche breakdown voltage, and the single-photon detector exits the Geiger mode; a second subunit, which is connected to the first subunit, and in response to the first transistor being turned on, controls the anode of the single-photon detector to be grounded, so that the bias voltage on the PN junction of the single-photon detector is higher than the avalanche breakdown voltage, and the single-photon detector enters the Geiger mode.

[0010] According to an embodiment of the present invention, the above-mentioned first subunit includes: a second transistor, the drain of the above-mentioned second transistor is connected to the above-mentioned second power supply; a first current limiting resistor, one end of the above-mentioned first current limiting resistor is connected to the drain of the above-mentioned second transistor, and the other end of the above-mentioned first current limiting resistor is connected to the gate of the above-mentioned second transistor; a voltage-limiting diode, the cathode of the above-mentioned voltage-limiting diode is connected to the gate of the above-mentioned second transistor; a first diode, the anode of the above-mentioned first diode is connected to the anode of the above-mentioned voltage-limiting diode, and the cathode of the above-mentioned first diode is connected to the source of the above-mentioned second transistor; a second diode, the anode of the above-mentioned second diode is connected to the cathode of the above-mentioned first diode, and the cathode of the above-mentioned second diode is connected to the anode of the above-mentioned single-photon detector.

[0011] According to an embodiment of the present invention, the first subunit further includes: an inductor connected in series between the first current limiting resistor and the gate of the second transistor.

[0012] According to an embodiment of the present invention, the second subunit includes: a third transistor, the source of the third transistor is grounded, the drain of the third transistor is connected to the source of the second transistor, and the gate of the third transistor is used to receive the active recovery signal; a fourth transistor, the source of the fourth transistor is grounded, the drain of the fourth transistor is connected to the anode of the single-photon detector, and the gate of the fourth transistor is used to receive the active recovery signal.

[0013] According to an embodiment of the present invention, the avalanche extraction module includes: a sampling resistor, one end of which is connected to the anode of the single-photon detector and the other end of which is grounded, and the sampling resistor is used to convert the avalanche signal into the avalanche detection signal.

[0014] According to an embodiment of the present invention, the avalanche extraction module further includes: a fifth transistor, the gate of the fifth transistor is connected to a third power supply, the source of the fifth transistor is grounded through the sampling resistor, and the drain of the fifth transistor is connected to the anode of the single-photon detector; a sixth transistor, the source of the sixth transistor is grounded, the drain of the sixth transistor is connected to the source of the fifth transistor, and the gate of the sixth transistor is used to receive the active recovery signal.

[0015] According to an embodiment of the present invention, the device further comprises: a second current limiting resistor connected in series between the first power supply and the cathode of the single photon detector.

[0016] According to the readout circuit of the dual-mode semiconductor single-photon detector of the embodiment of the present invention, a dual-mode readout method of free-running mode and gated mode is realized. On the one hand, the control module can generate a control signal based on the avalanche signal, and the amplification module can make the single-photon detector enter the idle state (exit Geiger mode) immediately after detecting the avalanche signal based on the control signal, realize active quenching, and make the single-photon detector quickly restore to the enabled state (enter Geiger mode) after a preset delay time, so as to realize photon detection in the free-running mode. On the other hand, the externally input gated signal can be a "closed door" signal or an "opened door" signal. The control module can make the single-photon detector enter the idle state based on the externally input "closed door" signal, avoid damage and signal interference caused by strong ambient light to the single-photon detector, and when the external "opened door" signal is input, the single-photon detector detects randomly arriving signal photons in the free-running mode, thereby improving the detection accuracy of the single-photon detector and extending the service life of the single-photon detector. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0018] Figure 1 A schematic diagram of a readout circuit of a dual-mode semiconductor single-photon detector according to an embodiment of the present invention is shown;

[0019] Figure 2 shows a circuit diagram of an amplification module according to an embodiment of the present invention;

[0020] Figure 3 shows a circuit diagram of an avalanche extraction module according to an embodiment of the present invention;

[0021] Figure 4 A schematic diagram of a readout circuit of a dual-mode semiconductor single-photon detector according to another embodiment of the present invention is shown.

[0022] The following are the descriptions of the reference numerals:

[0023] 1- Control module;

[0024] 2- Amplification module;

[0025] 21- first subunit;

[0026] 22 - second subunit;

[0027] 3-Avalanche extraction module;

[0028] D1-first diode;

[0029] D2-second diode;

[0030] L-inductor;

[0031] N1 - first transistor;

[0032] N2 - second transistor;

[0033] N3 - the third transistor;

[0034] N4 - the fourth transistor;

[0035] N5 - fifth transistor;

[0036] P1-first power supply;

[0037] P2-second power supply;

[0038] P3-third power supply;

[0039] R1-first current limiting resistor;

[0040] R2-second current limiting resistor;

[0041] R3-sampling resistor;

[0042] ZD-Zener diode. DETAILED DESCRIPTION

[0043] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0044] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0045] All terms used herein, including technical and scientific terms, have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

[0046] When using expressions such as "at least one of A, B, and C, etc.", it should generally be interpreted as the meaning of the expression generally understood by those skilled in the art. For example, "a system having at least one of A, B, and C" should include but not be limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc. When using expressions such as "at least one of A, B, or C, etc.", it should generally be interpreted as the meaning of the expression generally understood by those skilled in the art. For example, "a system having at least one of A, B, or C" should include but not be limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.

[0047] It should also be noted that the directional terms mentioned in the embodiments, such as "upper", "lower", "front", "back", "left", "right", etc., are only reference directions of the drawings and are not intended to limit the scope of protection of the present invention. Throughout the drawings, the same elements are represented by the same or similar reference numerals. Conventional structures or configurations will be omitted when they may cause confusion in the understanding of the present invention.

[0048] In the process of implementing the present invention, it is found that in some application scenarios, signal photons often arrive at the detector after a strong pulse excitation light. When using a single-photon detector to detect such a signal, on the one hand, the strong pulse excitation light may damage the detector in the working state; on the other hand, the weak signal photon may be submerged in the quenching time or post-pulse count of the single-photon detector, reducing the signal-to-noise ratio of the detection.

[0049] Figure 1 A schematic diagram of a readout circuit of a dual-mode semiconductor single-photon detector according to an embodiment of the present invention is shown.

[0050] As one aspect of an embodiment of the present invention, a readout circuit of a dual-mode semiconductor single-photon detector is provided. Figure 1As shown, the readout circuit of the dual-mode semiconductor single-photon detector includes a control module 1, an amplification module 2 and an avalanche extraction module 3. The control module 1 is used to generate a control signal based on an external gating signal and an avalanche detection signal. The amplification module 2 is used to control the single-photon detector to exit the Geiger mode when the control signal is in a low-level state; and to control the single-photon detector to enter the Geiger mode when the control signal is in a high-level state. The avalanche extraction module 3 is used to extract the avalanche signal to obtain a pulsed avalanche detection signal, which is a weak current signal generated by the single-photon detector in the Geiger mode when it is excited by the signal photon. Among them, when the gating signal is in a low-level state, the control module keeps the control signal in a low-level state; when the gating signal is in a high-level state, the control module changes the control signal to a low-level state based on the avalanche detection signal, quenches the avalanche signal, and controls the control signal to become a high-level state again after a preset delay time.

[0051] According to the readout circuit of the dual-mode semiconductor single-photon detector of the embodiment of the present invention, a dual-mode readout method of free-running mode and gated mode is realized. On the one hand, the control module can generate a control signal based on the avalanche signal, and the amplification module can make the single-photon detector enter the idle state (exit Geiger mode) immediately after detecting the avalanche signal based on the control signal, realize active quenching, and make the single-photon detector quickly restore to the enabled state (enter Geiger mode) after a preset delay time, so as to realize photon detection in the free-running mode. On the other hand, the externally input gated signal can be a "closed door" signal or an "opened door" signal. The control module can make the single-photon detector enter the idle state based on the externally input "closed door" signal, avoid damage and signal interference caused by strong ambient light to the single-photon detector, and when the external "opened door" signal is input, the single-photon detector detects randomly arriving signal photons in the free-running mode, thereby improving the detection accuracy of the single-photon detector and extending the service life of the single-photon detector.

[0052] According to an embodiment of the present invention, the single photon detector is a semiconductor single photon detector, for example, a single photon avalanche diode (SPAD). When the reverse bias voltage of the single photon avalanche diode is close to or exceeds the avalanche breakdown voltage, when a signal photon is absorbed by the single photon avalanche diode SPAD, an avalanche effect is triggered inside the device, generating a detectable avalanche signal.

[0053] In an illustrative embodiment, a laser emits a pulsed laser, and the pulsed laser is irradiated onto a detection target to generate signal photons.

[0054] According to an embodiment of the present invention, the control module 1 may include a Field-Programmable Gate Array (FPGA) or a D flip-flop.

[0055] According to an embodiment of the present invention, the range of the preset delay time length may include 50-100 nanoseconds (ns), for example, it may be any value among 50 ns, 60 ns, 70 ns, 80 ns, 90 ns and 100 ns.

[0056] In an illustrative embodiment, the control signal is a level signal. The control signal being in a high level state indicates that the level signal is in a higher voltage state, which can be represented by a logic "1", and the control signal being in a low level state indicates that the level signal is in a lower voltage state, which can be represented by a logic "0". When the control signal switches between a high level state and a low level state, two features are generated: a rising edge and a falling edge. The rising edge and the falling edge can be used as trigger signals to start a certain operation or trigger a series of logical actions.

[0057] In such an embodiment, when the control signal is in a high level state, the control module changes the control signal to a low level state based on the rising edge of the avalanche detection signal, causing the single-photon detector to quench quickly, thereby reducing the possibility of weak signal photons being submerged in the quenching time or post-pulse count of the single-photon detector, thereby improving the signal-to-noise ratio.

[0058] According to an embodiment of the present invention, the external gating signal can set the duration of the "door opening" signal and the duration of the "door closing" signal according to a specific application scenario.

[0059] According to an embodiment of the present invention, Figure 1 As shown, the cathode of the single-photon detector is connected to the first power supply P1, and the amplifier module 2 is used to provide a first voltage to the anode of the single-photon detector when the control signal is in a low-level state, so that the voltage difference between the first power supply and the voltage of the anode of the single-photon detector is lower than the avalanche breakdown voltage, so that the single-photon detector exits the Geiger mode. The amplifier module 2 is used to provide a second voltage to the anode of the single-photon detector when the control signal is in a high-level state, so that the voltage difference between the first power supply and the voltage of the anode of the single-photon detector is higher than the avalanche breakdown voltage, so that the single-photon detector enters the Geiger mode. The second voltage is lower than the first voltage.

[0060] According to an embodiment of the present invention, the first voltage may be a high voltage of 30 V-60 V, and it is understood that the voltage range of the first voltage may also be any voltage range of 30-40 V, 35-55 V, or 40-60 V, etc. For example, the first voltage may be any value of 30 V, 40 V, 50 V, and 60 V, etc.

[0061] According to an embodiment of the present invention, the second voltage may be a low voltage of about 0 V. For example, the second voltage may be any value among 0 V, 0.5 V, and 1 V.

[0062] According to an embodiment of the present invention, the control module 1 is also used to generate an active recovery signal at the rising edge when the control signal changes back to a high level state after a preset delay time. The amplification module 2 is also used to control the voltage provided to the anode of the single-photon detector to switch from a first voltage to a second voltage based on the active recovery signal, so as to shorten the conversion time of the voltage of the anode of the single-photon detector from the first voltage to the second voltage, increase the saturation count rate of the single-photon detector, and reduce the probability of after-pulses.

[0063] In the process of implementing the present invention, it was found that in the absence of an active recovery signal, it takes a very long time, on the order of ms, for the voltage of the anode of the single-photon detector to recover from a first voltage (e.g., 60 V) to a second voltage (e.g., 0 V). During this period of time, the single-photon detector cannot detect photons.

[0064] The amplification module can make the voltage of the anode of the single-photon detector quickly recover to the second voltage (e.g., 0V) based on the active recovery signal, which takes only nanoseconds (e.g., 10-20 nanoseconds), so the saturation count rate of the single-photon detector can be greatly improved and the probability of after-pulses can be reduced. Reducing the probability of after-pulses means that in the single-photon detector, the probability of false pulses (i.e., after-pulses) caused by the previous photon detection event is reduced by technical means.

[0065] According to an embodiment of the present invention, the active recovery signal is a pulse signal.

[0066] In such an embodiment, the amplification module can be used to allow the single-photon detector to allow a higher operating voltage (for example, exceeding 55V), thereby improving the detection efficiency and detection performance of the single-photon detector.

[0067] According to an embodiment of the present invention, when the single-photon detector detects that a signal photon has avalanche, based on the avalanche signal, the avalanche extraction module outputs an avalanche detection signal in a high-level state, the control module changes the control signal to a low-level state based on the avalanche detection signal in a high-level state, and the amplification module controls the voltage of the anode of the single-photon detector to provide a second voltage based on the control signal in a low-level state, so that the single-photon detector exits the Geiger mode. After a preset delay time (for example, it can be 50-100ns), the control module changes the control signal to a high-level state again, and at the same time when the control signal changes to a high-level state again (based on the rising edge of the control signal), the control module generates an active recovery signal. The amplification module can quickly switch the voltage of the anode of the single-photon detector from the first voltage to the second voltage based on the active recovery signal, so that the single-photon detector can quickly enter the Geiger mode.

[0068] In such an embodiment, when the external gating signal is an "open gate" signal, the single-photon detector is in a free-running mode and can detect and count signal photons multiple times.

[0069] Figure 2 A circuit diagram of an amplification module according to an embodiment of the present invention is shown.

[0070] According to an embodiment of the present invention, Figure 2 As shown, the amplification module 2 includes a first transistor N1, a first subunit 21, and a second subunit 22. The source of the first transistor N1 is grounded, the gate of the first transistor N1 is connected to the output end of the control module, and the gate of the first transistor is used to receive a control signal. The first subunit 21 is connected to the drain of the first transistor N1. In response to the first transistor N1 being turned off, the first subunit 21 controls the anode of the single-photon detector to be turned on with the second power supply P2, so that the bias voltage on the PN junction of the single-photon detector is lower than the avalanche breakdown voltage, and the single-photon detector exits the Geiger mode. The second subunit 22 is connected to the first subunit 21, and in response to the first transistor N1 being turned on, controls the anode of the single-photon detector to be grounded, so that the bias voltage on the PN junction of the single-photon detector is higher than the avalanche breakdown voltage, and the single-photon detector enters the Geiger mode. In such an embodiment, the second power supply P2 can provide a first voltage for the single-photon detector. The voltage difference between the first power supply P1 and the second power supply P2 is lower than the avalanche breakdown voltage of the single-photon detector, so that the single-photon detector enters the linear mode. The single-photon detector entering the linear mode means that the single-photon detector operates in a low-gain state relative to the Geiger mode. In the linear mode, the bias voltage of the single-photon detector is lower than the avalanche breakdown voltage, and the output signal is proportional to the incident light intensity, which is similar to the working mode of an ordinary photodiode.

[0071] In an illustrative embodiment, the second power source P2 may be a low-noise DC high-voltage power source, and the voltage value of the second power source P2 may be 60 V. The voltage value of the second power source P2 may also be other values, which are not limited here.

[0072] In an exemplary embodiment, the first transistor N1 may be an NMOS transistor (N-channel Metal-Oxide-Semiconductor Field-Effect Transistor).

[0073] In an illustrative embodiment, when the control signal is in a low level state, the source-drain voltage of the first transistor N1 is lower than the threshold voltage of the first transistor N1, and the first transistor N1 is in a cut-off state. In response to the first transistor N1 being cut off, the first subunit 21 pulls up the anode of the single-photon detector to the first voltage provided by the second power supply P2, so that the bias voltage between the cathode and the anode of the single-photon detector is lower than the avalanche breakdown voltage, and the single-photon detector exits the Geiger mode and enters the linear mode.

[0074] When the control signal is in a high level state, the source-drain voltage of the first transistor N1 is higher than the threshold voltage of the first transistor N1, and the first transistor N1 is in an on state. The drain voltage of the first transistor N1 is close to zero. In response to the first transistor N1 being turned on, the second subunit 22 grounds the anode of the single-photon detector, and the voltage of the anode of the single-photon detector is pulled down to a second voltage (close to 0V), so that the bias voltage between the cathode and the anode of the single-photon detector is higher than the avalanche breakdown voltage, and the single-photon detector enters the Geiger mode, thereby realizing the rapid opening of the single-photon detector.

[0075] According to an embodiment of the present invention, Figure 2 As shown, the first subunit 21 includes a second transistor N2, a first current limiting resistor R1, a voltage stabilizing diode ZD, a first diode D1 and a second diode D2. The drain of the second transistor N2 is connected to the second power supply P2. One end of the first current limiting resistor R1 is connected to the drain of the second transistor N2, and the other end of the first current limiting resistor R1 is connected to the gate of the second transistor N2. The cathode of the voltage stabilizing diode ZD is connected to the gate of the second transistor N2. The anode of the first diode D1 is connected to the anode of the voltage stabilizing diode ZD, and the cathode of the first diode D1 is connected to the source of the second transistor N2. The anode of the second diode D2 is connected to the cathode of the first diode D1, and the cathode of the second diode D2 is connected to the anode of the single photon detector.

[0076] In an exemplary embodiment, the second transistor N2 may be an NMOS transistor. The second diode D2 may be a low reverse current diode.

[0077] In an illustrative embodiment, when the control signal is in a low level state, the first transistor N1 is in a cut-off state, and the current flows through the voltage stabilizing diode ZD, so that the gate-source voltage of the second transistor N2 is clamped above the threshold voltage of the second transistor N2, and the second transistor N2 is in a conducting state. The source voltage of the second transistor N2 is stabilized at 60V under the action of the second power supply P2, thereby pulling the voltage of the anode of the single-photon detector to about 55V, or 60V. The gate-source voltage of the second transistor N2 is clamped above the threshold voltage of the second transistor N2, indicating that the gate-source voltage of the second transistor N2 is always greater than or equal to the threshold voltage of the second transistor N2, so as to ensure that the second transistor is in a conducting state.

[0078] When the control signal is in a high level state, the first transistor N1 is in an on state, the drain of the first transistor N1 is grounded, and the gate voltage of the second transistor N2 is close to zero, so that the second transistor N2 is in an off state.

[0079] According to an embodiment of the present invention, Figure 2 As shown, the second subunit 22 includes a third transistor N3 and a fourth transistor N4. The source of the third transistor N3 is grounded, the drain of the third transistor N3 is connected to the source of the second transistor N2, and the gate of the third transistor N3 is used to receive the active recovery signal. The source of the fourth transistor N4 is grounded, the drain of the fourth transistor N4 is connected to the anode of the single photon detector, and the gate of the fourth transistor N4 is used to receive the active recovery signal.

[0080] In an exemplary embodiment, the third transistor N3 and the fourth transistor N4 may be NMOS transistors.

[0081] In an illustrative embodiment, at the end of the pulse laser, before the signal photon reaches the single-photon detector, the control signal is converted from a low-level state to a high-level state, the avalanche detection signal is in a low-level state, the first transistor N1 is in an on state, and the second transistor N2 is in an off state. The control module generates an active recovery signal based on the rising edge of the control signal, the gate of the third transistor N3 and the gate of the fourth transistor N4 both receive the active recovery signal, the third transistor N3 and the fourth transistor N4 are turned on, so that the voltage of the anode of the single-photon detector is close to 0V, and the single-photon detector quickly enters the Geiger mode.

[0082] In an illustrative embodiment, after the single-photon detector detects the signal photon and generates an avalanche signal, the avalanche extraction module generates an avalanche detection signal according to the avalanche signal, that is, the avalanche detection signal is converted from a low level state to a high level state. The control module converts the control signal to a low level state based on the rising edge of the avalanche detection signal. The control signal in the low level state quenches the avalanche signal through the amplification module 2, effectively reducing the avalanche duration, thereby suppressing the after-pulse effect.

[0083] The control module starts timing based on the rising edge of the avalanche detection signal, and changes the control signal back to a high level state after a preset delay time. At the same time, the control module generates an active recovery signal based on the rising edge of the control signal.

[0084] The gate of the third transistor N3 and the gate of the fourth transistor N4 both receive the active recovery signal, the third transistor N3 and the fourth transistor N4 are turned on, the drain voltage of the third transistor N3 and the drain voltage of the fourth transistor N4 are close to zero, and the voltage of the anode of the single photon detector is pulled down to close to 0V, so that the single photon detector can quickly enter the Geiger mode.

[0085] According to an embodiment of the present invention, Figure 2 As shown, the first subunit 21 further includes an inductor L. The inductor L is connected in series between the first current limiting resistor R1 and the gate of the second transistor N2.

[0086] In such an embodiment, by setting the inductor L, the inductor L can be charged through the second power supply P2 when the control signal is in a low-level state. After the control signal is switched from a low-level state to a high-level state, the inductor L is quickly discharged, so that the source voltage of the second transistor N2 is quickly clamped above the threshold of the second transistor N2, the second transistor N2 is turned on, and the source voltage of the second transistor N2 rises rapidly under the action of the second power supply P2, thereby realizing rapid quenching of the avalanche signal.

[0087] In an illustrative embodiment, when the control signal is in a high level state, the first transistor N1 is in an on state and the second transistor N2 is in an off state. The control module generates a fast recovery signal based on the rising edge of the control signal to make the single photon detector enter the Geiger mode. After the recovery signal ends, the current flows through the inductor L and is stored in a portion of the inductor L.

[0088] When the single-photon detector detects a signal photon and generates an avalanche signal, the avalanche detection signal output by the avalanche extraction module based on the avalanche signal changes from a low level state to a high level state, and the control module makes the control signal in a low level state based on the rising edge of the avalanche detection signal, and the first transistor N1 is in a cut-off state. The current stored in the inductor L quickly flows through the voltage-stabilizing diode ZD, so that the second transistor N2 is in a conducting state, and the anode of the single-photon detector is quickly pulled up to achieve rapid quenching of the avalanche signal.

[0089] According to an embodiment of the present invention, when the control signal is in a low level state, the amplification module controls the voltage of the anode of the single-photon detector to decrease, so that the single-photon detector is in a linear state (a state of exiting the Geiger mode) to avoid irradiation by strong light (such as pulsed laser).

[0090] When the control signal is in a high-level state, the amplification module quickly turns on the detection working mode of the single-photon detector (enters the state of the Geiger mode) based on the control signal and the fast recovery signal, and stores part of the current on the inductor. The single-photon detector generates an avalanche signal, the avalanche extraction module extracts the avalanche detection signal, the control module changes to a low-level state based on the avalanche detection signal, and the amplification module causes the current stored in the inductor to quickly flow through the voltage-stabilizing diode based on the control signal in the low-level state, thereby realizing the rapid quenching of the avalanche signal and causing the single-photon detector to quickly exit the Geiger mode; after a preset delay time after the single-photon detector avalanches, the amplification module causes the single-photon detector to quickly enter the Geiger mode again based on the recovery signal.

[0091] Figure 3 A circuit diagram of an avalanche extraction module according to an embodiment of the present invention is shown.

[0092] According to an embodiment of the present invention, Figure 3 As shown, the avalanche extraction module 3 includes a sampling resistor R3. One end of the sampling resistor R3 is connected to the anode of the single photon detector, and the other end of the sampling resistor R3 is grounded. The sampling resistor R3 is used to convert the avalanche signal into an avalanche detection signal.

[0093] According to an embodiment of the present invention, Figure 3 As shown, the avalanche extraction module 3 also includes a fifth transistor N5 and a sixth transistor N6. The gate of the fifth transistor N5 is connected to the third power supply P3, the source of the fifth transistor N5 is grounded through the sampling resistor R3, and the drain of the fifth transistor N5 is connected to the anode of the single photon detector. The source of the sixth transistor N6 is grounded, the drain of the sixth transistor N6 is connected to the source of the fifth transistor N5, and the gate of the sixth transistor N6 is used to receive the active recovery signal.

[0094] In an exemplary embodiment, the fifth transistor N5 and the sixth transistor N6 may be NMOS transistors.

[0095] In an illustrative embodiment, the third power supply P3 may be a low-noise DC high-voltage power supply, and the voltage value of the third power supply P3 may be 4 V. It is understandable that the voltage value of the third power supply P3 may also be any value among 3 V, 3.5 V, 4 V, 4.5 V and 5 V.

[0096] In an exemplary embodiment, when the single photon detector does not detect a signal photon, the source voltage of the fifth transistor N5 is close to zero, and the fifth transistor N5 is in a conducting state under the action of the third power supply P3. The avalanche detection signal output by the avalanche extraction module 3 is in a low level state.

[0097] In an illustrative embodiment, when the single-photon detector detects a signal photon, the single-photon detector generates an avalanche signal, and the sampling resistor R3 quickly extracts the avalanche signal, causing the source voltage of the fifth transistor N5 to rise, and the avalanche detection signal output by the avalanche extraction module 3 changes from a low level state to a high level state.

[0098] After the source voltage of the fifth transistor N5 rises so that the gate-source voltage of the fifth transistor N5 is less than its threshold voltage, the fifth transistor N5 is turned off, so that the source voltage of the fifth transistor N5 is not higher than the voltage value of the third power supply P3 (for example, 4V), thereby protecting the back-end low-voltage circuit.

[0099] The control module converts the control signal from a high level state to a low level state based on the avalanche detection signal, and quickly quenches the avalanche signal through the amplification module. The control module starts timing based on the falling edge of the control signal. After a preset delay time, the control module switches the control signal from a low level state to a high level state. The control module generates an active recovery signal based on the rising edge of the control signal. The gate of the sixth transistor N6 is connected to the active recovery signal, the sixth transistor N6 is turned on, and the drain voltage of the sixth transistor N6 is close to zero, that is, the source voltage of the fifth transistor N5 drops to close to zero, so that the fifth transistor N5 is turned on again.

[0100] The maximum number of signal photons that a single-photon detector can detect within a certain period of time is called the saturation count rate. When the number of incident signal photons exceeds the saturation count rate, the single-photon detector will not be able to effectively detect all signal photons, resulting in a decrease in detection efficiency.

[0101] According to an embodiment of the present invention, the avalanche extraction module can quickly extract weak avalanche signals through sampling resistors, and can also shield large voltage signals used to turn on and off the anode of the single-photon detector through the fifth transistor N5 and the sixth transistor N6, thereby protecting the back-end low-voltage circuit and shortening the extraction time of the avalanche signal, thereby increasing the saturation count rate of the single-photon detector and thus improving the detection efficiency.

[0102] Figure 4 A schematic diagram of a readout circuit of a dual-mode semiconductor single-photon detector according to another embodiment of the present invention is shown.

[0103] According to an embodiment of the present invention, Figure 4 As shown, the readout circuit further includes a second current limiting resistor R2. The second current limiting resistor R2 is connected in series between the first power source P1 and the cathode of the single photon detector.

[0104] According to an embodiment of the present invention, when the control signal is in a low level state, the amplification module 2 causes the single photon detector to exit the Geiger mode.

[0105] When the control signal is in a high level state and the single photon detector does not detect any signal photons, the avalanche detection signal output by the avalanche extraction module 3 is in a low level state, and the amplification module 2 causes the single photon detector to enter the Geiger mode based on the control signal.

[0106] In an illustrative embodiment, when the control signal is in a high-level state, the single-photon detector detects the signal photon and generates an avalanche signal, the avalanche extraction module 3 extracts the avalanche signal, and the output avalanche detection signal changes from a low-level state to a high-level state. The control module 1 changes the control signal to a low-level state based on the rising edge of the avalanche detection signal, and the amplification module quenches the avalanche signal based on the control signal in the low-level state. After a preset delay time interval, the control module controls the control signal in the low-level state to change to a high-level state again after the preset delay time, and generates an active recovery signal based on the rising edge of the control signal. Based on the active recovery signal, the avalanche extraction module 3 causes the source voltage of the fifth transistor N5 to drop to near zero, preparing for the next avalanche signal detection.

[0107] Furthermore, after a delay of about 50ns, the control module 1 converts the control signal from a low level state to a high level state again, and the switching module 2, based on the rising edge of the control signal, causes the voltage of the anode of the single-photon detector to drop to about 0V within 20ns, and the single-photon detector quickly re-enters the Geiger mode.

[0108] When the control signal is in a high level state, the amplifier module 2 makes the drain voltage of the third transistor N3 and the drain voltage of the fourth transistor N4 close to zero based on the control signal and the active recovery signal. In about 10ns, the amplifier module 2 pulls down the voltage of the anode of the single-photon detector to 0V, and the single-photon detector enters the Geiger mode again. The single-photon detector completes the signal photon detection this time, and restores the detection working mode (that is, re-enters the Geiger mode), waiting for the next single-photon detection.

[0109] In an illustrative embodiment, when the single-photon detector is in the free-running mode, when the laser emits the next pulse laser, the control signal becomes a low-level state, and within 20ns, the amplification module 2 raises the voltage of the anode of the single-photon detector to 55V, and the single-photon detector exits the Geiger mode. When the next strong light of the pulse laser irradiates the single-photon detector, the detection working mode of the single-photon detector is turned off (that is, exits the Geiger mode).

[0110] According to an embodiment of the present invention, when the single-photon detector is in a free-running mode, the time used for detecting a single signal photon is about 50 ns, and a maximum saturation count rate of 20 Mcps can be achieved.

[0111] The embodiments of the present invention are described above. However, these embodiments are only for the purpose of illustration, and are not intended to limit the scope of the present invention. Although each embodiment is described above, it does not mean that the measures in each embodiment cannot be used in combination advantageously. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A readout circuit for a dual-mode semiconductor single-photon detector, characterized in that: include: A control module, used for generating a control signal based on an external gating signal and an avalanche detection signal; an amplification module, used for controlling the single-photon detector to exit the Geiger mode when the control signal is in a low-level state; and controlling the single-photon detector to enter the Geiger mode when the control signal is in a high-level state; an avalanche extraction module, used for extracting an avalanche signal to obtain a pulsed avalanche detection signal, wherein the avalanche signal is generated by the single photon detector under the Geiger mode when stimulated by a signal photon; When the gating signal is in a low level state, the control module keeps the control signal in a low level state; when the gating signal is in a high level state, the control module changes the control signal to a low level state based on the avalanche detection signal, quenches the avalanche signal, and controls the control signal to become a high level state again after a preset delay time.

2. The readout circuit according to claim 1, characterized in that: The cathode of the single photon detector is connected to a first power supply; The amplification module is used for: When the control signal is in the low level state, providing a first voltage to the anode of the single photon detector so that the voltage difference between the first power supply and the anode of the single photon detector is lower than the avalanche breakdown voltage, so that the single photon detector exits the Geiger mode; When the control signal is in the high level state, a second voltage is provided to the anode of the single-photon detector so that the voltage difference between the first power supply and the anode of the single-photon detector is higher than the avalanche breakdown voltage, so that the single-photon detector enters the Geiger mode; wherein the second voltage is lower than the first voltage.

3. The readout circuit according to claim 2, characterized in that: The control module is also used to generate an active recovery signal at the rising edge of the control signal when it changes back to a high level state after a preset delay time; The amplification module is also used to control the voltage provided to the anode of the single-photon detector to switch from the first voltage to the second voltage based on the active recovery signal, so as to shorten the conversion time of the voltage of the anode of the single-photon detector from the first voltage to the second voltage, increase the saturation count rate of the single-photon detector, and reduce the after-pulse probability.

4. The readout circuit according to claim 3, characterized in that: The amplification module comprises: a first transistor, wherein a source of the first transistor is grounded, and a gate of the first transistor is connected to an output terminal of the control module; a first subunit connected to the drain of the first transistor, wherein the first subunit controls the anode of the single-photon detector to be turned on with the second power supply in response to the first transistor being turned off, so that the bias voltage on the PN junction of the single-photon detector is lower than the avalanche breakdown voltage, and the single-photon detector exits the Geiger mode; The second subunit is connected to the first subunit, and in response to the first transistor being turned on, controls the anode of the single-photon detector to be grounded, so that the bias voltage on the PN junction of the single-photon detector is higher than the avalanche breakdown voltage, and the single-photon detector enters the Geiger mode.

5. The readout circuit according to claim 4, characterized in that: The first subunit comprises: a second transistor, wherein a drain of the second transistor is connected to the second power supply; a first current limiting resistor, wherein one end of the first current limiting resistor is connected to the drain of the second transistor, and the other end of the first current limiting resistor is connected to the gate of the second transistor; A voltage stabilizing diode, wherein a cathode of the voltage stabilizing diode is connected to a gate of the second transistor; a first diode, wherein an anode of the first diode is connected to an anode of the voltage stabilizing diode, and a cathode of the first diode is connected to a source of the second transistor; A second diode, wherein an anode of the second diode is connected to a cathode of the first diode, and a cathode of the second diode is connected to an anode of the single-photon detector.

6. The readout circuit according to claim 5, characterized in that: The first subunit further includes: An inductor is connected in series between the first current limiting resistor and the gate of the second transistor.

7. The readout circuit according to claim 5, characterized in that: The second subunit comprises: a third transistor, wherein a source of the third transistor is grounded, a drain of the third transistor is connected to the source of the second transistor, and a gate of the third transistor is used to receive the active recovery signal; A fourth transistor, wherein a source of the fourth transistor is grounded, a drain of the fourth transistor is connected to an anode of the single-photon detector, and a gate of the fourth transistor is used for receiving the active recovery signal.

8. The readout circuit according to any one of claims 3 to 7, characterized in that: The avalanche extraction module comprises: A sampling resistor, one end of which is connected to the anode of the single-photon detector, and the other end of which is grounded, and the sampling resistor is used to convert the avalanche signal into the avalanche detection signal.

9. The readout circuit according to claim 8, characterized in that: The avalanche extraction module also includes: a fifth transistor, wherein a gate of the fifth transistor is connected to a third power supply, a source of the fifth transistor is grounded through the sampling resistor, and a drain of the fifth transistor is connected to an anode of the single-photon detector; A sixth transistor, wherein a source of the sixth transistor is grounded, a drain of the sixth transistor is connected to the source of the fifth transistor, and a gate of the sixth transistor is used for receiving the active recovery signal.

10. The readout circuit according to any one of claims 2 to 7, characterized in that: Also includes: The second current limiting resistor is connected in series between the first power supply and the cathode of the single photon detector.

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