Design method of high-voltage ultra-low leakage current socket
By using guard lines and vias to form a Faraday cage structure in the PCB design of the DUT test board, the problem of poor leakage current suppression under high voltage testing was solved, achieving high-precision leakage current testing and improving the performance and reliability of the test system.
Patent Information
- Application Number
- CN202510054975.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-14
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2045-01-14
AI Technical Summary
Existing high-voltage ultra-low leakage current sockets do not effectively suppress leakage current when the DUT is subjected to high voltage testing, which affects the accuracy of the test results.
In the PCB design of the DUT test board, a Faraday cage structure is formed by using a guard line to surround the D end of the socket. By evenly placing vias on the guard line, an equipotential region is formed to suppress leakage current.
It effectively suppresses leakage current from the D terminal to the S terminal of the socket, improves the accuracy of DUT leakage current testing under high voltage testing environment, simplifies the operation process, reduces the need for additional testing equipment, and improves the economic benefits and system performance of testing.
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Figure CN119881387B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of automated testing technology, and in particular to a design method for a high-voltage ultra-low leakage current socket. Background Technology
[0002] High-voltage ultra-low leakage current sockets are a type of automated test socket. In automated testing, the socket is a key component on the DUT (Device Under Test) test board, providing a physical interface for electrical connection between the DUT and the test equipment. When the DUT undergoes low-voltage testing, the leakage current generated between the socket's drain (D) and source (S) terminals on the DUT test board is small and has almost no impact on the measurement results. However, when undergoing high-voltage testing (D terminal voltage greater than 200V), the leakage current generated between the socket's D and S terminals on the DUT test board is excessive, directly affecting the accuracy of the test results. With continuous technological advancements, the requirements for high-voltage ultra-low leakage current sockets are becoming increasingly stringent.
[0003] Existing automated testing methods have certain drawbacks. Although existing leakage current suppression methods can suppress leakage current at the D terminal under low voltage conditions, their effectiveness is not significant when the DUT is subjected to high voltage, which in turn affects the test results. Therefore, when the DUT is subjected to high voltage testing on the socket, it is essential to effectively suppress the leakage current generated at the D terminal of the socket on the DUT test board. This can be achieved by optimizing the PCB layout of the socket on the DUT test board to reduce test deviations caused by leakage current generated by high voltage. To this end, we propose a design method for a high-voltage ultra-low leakage current socket. Summary of the Invention
[0004] Technical problem solved: To address the shortcomings of existing technologies, this invention provides a design method for a high-voltage ultra-low leakage current socket. By designing the PCB of the DUT test board, an equipotential region is formed at the D end of the socket in conjunction with the guard line. Vias are evenly placed on the guard line to form a Faraday cage structure, which effectively suppresses the leakage current from the D end of the socket to the S end, improves the accuracy of DUT leakage current testing under high-voltage testing environments, and can effectively solve the problems in the background technology.
[0005] Technical Solution: To achieve the above objectives, the technical solution adopted by this invention is: a design method for a high-voltage ultra-low leakage current socket, comprising the following steps:
[0006] S1: Design the PCB for the DUT test board. In the PCB design stage, use guard lines with vias to surround the D end of the socket. The guard lines surround the D end to form a Faraday cage structure, while avoiding contact with the S end of the socket, thus achieving equipotential protection for the D end.
[0007] S2: Fixing the Socket to the DUT test board means inserting the Socket pins into the corresponding positions on the DUT test board and soldering the Socket pins to the DUT test board;
[0008] S3: Insert the device under test (DUT) into the socket. The DUT is the device under test. Insert the DUT into the socket on the DUT test board according to the pin name corresponding to the socket. Ensure that the electrical connection between the DUT and the test system is correct and prepare for the subsequent leakage current test.
[0009] S4: Start the DUT high voltage leakage current test. Set up the experimental environment required for the high voltage leakage current test and prepare to start the high voltage leakage current test.
[0010] S5: Apply high voltage to the D terminal of the DUT. The test system provides high voltage to the D terminal of the DUT and measures the leakage current from the D terminal to the S terminal of the DUT.
[0011] S6: The source meter displays the leakage current of the DUT. By designing the PCB of the DUT test board, the leakage current from the D terminal to the S terminal of the socket is suppressed under high voltage test environment, so that the leakage current measured by the instrument is the leakage current of the DUT itself.
[0012] S7: The high-voltage leakage current test of the DUT is complete.
[0013] As a preferred technical solution of this application, it includes a test socket, a guard line, and vias. The test socket is the physical interface for testing the device under test (DUT). The DUT and the DUT test board electrically connect the DUT to the test system for various performance and functional tests. The test socket includes a socket, pins, and a base. The DUT test board is part of the entire test system, and the test socket is a component on the DUT test board. The DUT is placed in the test socket and connected to the circuitry on the DUT test board through the test socket, thereby electrically connecting to the test equipment. The DUT test board and the test socket together constitute the interface for leakage current testing. The guard line is wrapped around the D terminal of the test socket, and the potential of the guard line is equal to that of the D terminal, creating an equipotential region. The vias are evenly distributed on the guard line, and multiple vias form a Faraday cage structure, which, together with the guard line, provides an equipotential shielding mechanism to protect the D terminal of the test socket from leakage current leakage to the S terminal.
[0014] As a preferred technical solution of this application, the socket is a component for connecting the DUT to the test socket. It is made of low-impedance beryllium copper material and is molded into an elastic structure to provide contact force support and low contact impedance for the DUT contacts. These contacts physically connect and electrically connect the test system to the pins of the DUT.
[0015] As a preferred technical solution of this application, the pin is an extension of the DUT on the test socket, which electrically connects the DUT pin to the test system, so that the test signal can be accessed from the test system to the pin of the DUT. It is divided into G terminal, D terminal and S terminal, that is, gate, drain and source.
[0016] As a preferred technical solution of this application, in the leakage current test, a voltage signal is applied to the D terminal to simulate the pressure conditions in the actual working environment in order to evaluate the performance and reliability of the DUT. Under low voltage test conditions, that is, the voltage at the D terminal is less than V, the leakage current between the D terminal and the S terminal can be ignored. Under high voltage test conditions, that is, the voltage at the D terminal is greater than V, the excessive leakage current between the D terminal and the S terminal will affect the test results.
[0017] As a preferred technical solution of this application, the base is made of plastic and non-conductive materials, supporting the entire test base structure and connecting the test equipment.
[0018] As a preferred technical solution of this application, during the high-voltage leakage current test of the DUT, the equipotential region created by the Guard line and the D terminal ensures that the current on the D terminal will not leak through the Guard line. Since there is no potential difference between the Guard line and the D terminal, there is no voltage to drive the current flow, thereby preventing current leakage. The Guard line ensures that the leakage current on the D terminal will not leak to the S terminal, realizing the protection against leakage current under high voltage conditions, while protecting the integrity of the signal and ensuring the stability and reliability of the signal during transmission.
[0019] As a preferred technical solution of this application, the Guard line needs to be routed on the TOP layer and Bottom layer of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer.
[0020] Beneficial Effects: Compared with existing technologies, this invention provides a design method for a high-voltage ultra-low leakage current socket, which has the following beneficial effects: This design method for a high-voltage ultra-low leakage current socket, through the design of the PCB of the DUT test board, forms an equipotential region at the D end of the socket in conjunction with the guard line, and uniformly places vias on the guard line to form a Faraday cage structure, effectively suppressing the leakage current from the D end to the S end of the socket, and improving the accuracy of DUT leakage current testing under high-voltage testing environments; This method is simple and efficient, and high-precision measurement can be achieved with just PCB design. This method simplifies the operation process, reduces the need for additional test equipment and corresponding maintenance costs, thereby improving the economic benefits of testing; This method is not only applicable to high-voltage leakage current testing of DUTs, but can also be extended to other electronic testing and measurement fields, effectively enhancing the performance and reliability of the test system. The entire high-voltage ultra-low leakage current socket structure is simple, easy to operate, and its performance is better than traditional methods. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the design method of a high-voltage ultra-low leakage current socket according to the present invention.
[0022] Figure 2 This is a schematic diagram of the PCB structure in the design method of a high-voltage ultra-low leakage current socket according to the present invention.
[0023] Figure 3 This is a schematic diagram of the design method of a high-voltage ultra-low leakage current socket according to the present invention.
[0024] In the diagram: 1. Test socket; 2. Guard wire; 3. Via. Detailed Implementation
[0025] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings and specific embodiments. However, those skilled in the art will understand that the embodiments described below are some embodiments of the present invention, but not all embodiments, and are only used to illustrate the present invention, and should not be regarded as limiting the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall be followed. Where the manufacturers of reagents or instruments are not specified, they are all conventional products that can be purchased commercially.
[0026] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0027] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0028] like Figure 1-3 As shown, a design method for a high-voltage ultra-low leakage current socket includes the following steps:
[0029] S1: Design the PCB for the DUT test board. In the PCB design stage, use guard lines with vias to surround the D end of the socket. The guard lines surround the D end to form a Faraday cage structure, while avoiding contact with the S end of the socket, thus achieving equipotential protection for the D end.
[0030] S2: Fixing the Socket to the DUT test board means inserting the Socket pins into the corresponding positions on the DUT test board and soldering the Socket pins to the DUT test board;
[0031] S3: Insert the device under test (DUT) into the socket. The DUT is the device under test. Insert the DUT into the socket on the DUT test board according to the pin name corresponding to the socket. Ensure that the electrical connection between the DUT and the test system is correct and prepare for the subsequent leakage current test.
[0032] S4: Start the DUT high voltage leakage current test. Set up the experimental environment required for the high voltage leakage current test and prepare to start the high voltage leakage current test.
[0033] S5: Apply high voltage to the D terminal of the DUT. The test system provides high voltage to the D terminal of the DUT and measures the leakage current from the D terminal to the S terminal of the DUT.
[0034] S6: The source meter displays the leakage current of the DUT. By designing the PCB of the DUT test board, the leakage current from the D terminal to the S terminal of the socket is suppressed under high voltage test environment, so that the leakage current measured by the instrument is the leakage current of the DUT itself.
[0035] S7: The high-voltage leakage current test of the DUT is complete.
[0036] Furthermore, the system includes a test socket 1, a guard line 2, and vias 3. The test socket 1 is the physical interface for testing the device under test (DUT). The test socket 1 and the DUT test board electrically connect the DUT to the test system for various performance and functional tests. The test socket 1 includes a socket, pins, and a base. The DUT test board is part of the entire test system, and the test socket 1 is a component of the DUT test board. The DUT is placed in the test socket 1 and connected to the circuitry on the DUT test board through the test socket 1, thereby electrically connecting to the test equipment. The DUT test board and the test socket 1 together constitute the interface for leakage current testing. The guard line 2 is wrapped around the D terminal of the test socket 1, with the potential of the guard line 2 being equal to the potential of the D terminal, creating an equipotential region. The vias 3 are evenly distributed on the guard line 2, and multiple vias 3 form a Faraday cage structure, which, together with the guard line 2, provides an equipotential shielding mechanism to protect against leakage current leakage from the D terminal to the S terminal of the test socket 1.
[0037] Furthermore, the socket is a component of the DUT connection test socket 1. It is made of low-impedance beryllium copper material and is molded into an elastic structure to provide contact force support and low contact impedance for the DUT contacts. These contacts physically connect and electrically connect the test system to the pins of the DUT.
[0038] Furthermore, the pins are extensions of the DUT on test socket 1, electrically connecting the DUT pins to the test system, so that test signals can be accessed from the test system to the DUT pins. They are divided into G, D, and S terminals, which are the gate, drain, and source terminals, respectively.
[0039] Furthermore, in the leakage current test, a voltage signal is applied to terminal D to simulate the pressure conditions in the actual working environment in order to evaluate the performance and reliability of the DUT. Under low voltage test conditions, i.e., the voltage at terminal D is less than 200V, the leakage current between terminal D and terminal S can be ignored. Under high voltage test conditions, i.e., the voltage at terminal D is greater than 200V, the excessive leakage current between terminal D and terminal S will affect the test results.
[0040] Furthermore, the base is made of plastic and non-conductive materials, supporting the entire test fixture structure and connecting the test equipment.
[0041] Furthermore, during the high-voltage leakage current test of the DUT, the equipotential region created by Guard line 2 and the D terminal ensures that the current on the D terminal will not leak through Guard line 2. Since there is no potential difference between Guard line 2 and the D terminal, there is no voltage to drive the current flow, thus preventing current leakage. Guard line 2 ensures that the leakage current on the D terminal will not leak to the S terminal, achieving leakage current protection under high-voltage conditions, while protecting the integrity of the signal and ensuring the stability and reliability of the signal during transmission.
[0042] Furthermore, Guard line 2 needs to be routed on the TOP and Bottom layers of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer.
[0043] Example:
[0044] Figure 1 This is a structural diagram of a high-voltage ultra-low leakage current socket design method, including a socket (test socket), a guard wire (protective ring), and vias;
[0045] A socket is the physical interface for testing a device under test (DUT). The socket and the DUT test board enable electrical connection between the DUT and the test system, thereby enabling various performance and functional tests. The main components of a socket include the jack, pins, and base.
[0046] The DUT test board is part of the overall test system, and the socket is a component of the DUT test board. During testing, the DUT is placed in the socket and connected to the circuitry on the DUT test board via the socket, thereby establishing an electrical connection with the test equipment. The DUT test board and the socket together constitute the key interface in leakage current testing.
[0047] The socket is a key part of the DUT connection socket. It is usually made of low-impedance beryllium copper material and is molded into an elastic structure to provide contact force support and low contact impedance for the DUT contacts. These contacts can physically connect and electrically connect the test system to the pins of the DUT.
[0048] The pins are extensions of the DUT pins on the socket, designed to electrically connect the DUT pins to the test system, allowing test signals to be input from the test system to the DUT pins. They are divided into G (gate), D (drain), and S (source) terminals. In leakage current testing, a voltage signal is typically applied to the D terminal to simulate the stress conditions of the actual operating environment to evaluate the DUT's performance and reliability. Under low-voltage test conditions (D terminal voltage less than 200V), the leakage current between the D and S terminals is negligible; however, under high-voltage test conditions (D terminal voltage greater than 200V), excessive leakage current between the D and S terminals will affect the test results.
[0049] The base is typically made of plastic or other non-conductive materials and supports the entire test fixture structure and connects the test equipment.
[0050] A guard line (protective ring) is wrapped around the drain (D) terminal of the socket. The guard line has the same potential as the D terminal, creating an equipotential region to suppress leakage current at the D terminal under high-voltage testing conditions. During high-voltage leakage current testing of the DUT, the equipotential region created by the guard line and the D terminal ensures that current at the D terminal will not leak through the guard line. Since there is no potential difference between the guard line and the D terminal, there is no voltage to drive current flow, thus preventing current leakage. The guard line ensures that leakage current at the D terminal will not leak to the source (S) terminal, achieving leakage current protection under high-voltage conditions, while also protecting signal integrity and ensuring signal stability and reliability during transmission.
[0051] Vias are evenly distributed on the guard line, and multiple vias form a Faraday cage structure, which together with the guard line provides an equipotential shielding mechanism to protect against leakage current leakage from the D terminal to the S terminal of the socket.
[0052] Guard lines need to be routed on the TOP and Bottom layers of the PCB board, covering both the top and bottom layers of the board to form a double-sided leakage current protection layer, reducing the risk of current leakage.
[0053] Vias are evenly distributed along the guard lines. Note that the via diameter is smaller than the guard line width to ensure the continuity and integrity of the guard lines. The Faraday cage structure formed by the guard lines and vias provides a continuous shielding path, creating a strong leakage current shielding effect. This structure effectively isolates internal and external electric fields and electromagnetic interference, protects signal integrity, reduces leakage current from the drain (D) to the source (S) terminal, and improves the overall performance of the test system. In this way, leakage current test results can be more accurate and reliable under high-voltage test conditions.
[0054] Figure 2 This is a design method for a high-voltage, ultra-low leakage current socket and the corresponding PCB design.
[0055] 1 is the high-voltage signal line for the high-voltage leakage current test of the socket. The PCB trace on the DUT test board is relatively wide, and the other end is led to the middle pin of the 4 socket, namely the D end.
[0056] 2 is the Guard line, which is a high-voltage signal line that is routed around the D end of the Top and Bottom layers of the DUT test board.
[0057] 3 are vias, evenly placed on the guard lines, connecting the guard lines of the top and bottom layers;
[0058] The silkscreen locations of the socket on the DUT test board include the G terminal on the left, the D terminal in the middle, and the S terminal on the right. The D terminal is connected to the high-voltage signal line and is surrounded by the Guard line and vias to form a leakage current protection structure.
[0059] The combined use of guard lines and vias forms an effective leakage current suppression structure in PCB design;
[0060] Guard lines are arranged around the D end of the socket on the TOP and Bottom layers of the PCB, and vias are evenly placed on the guard lines to form a Faraday cage shielding structure, which effectively suppresses leakage current under high voltage test conditions.
[0061] Figure 3 This is a flowchart of a design method for a high-voltage ultra-low leakage current socket.
[0062] S1 refers to the PCB design of the DUT test board, which involves using guard lines with vias to surround the D terminal of the socket during the PCB design phase. The guard lines surround the D terminal to form a Faraday cage structure, while avoiding contact with the S terminal of the socket, thus achieving equipotential protection for the D terminal.
[0063] S2 Fixing the Socket to the DUT Test Board refers to inserting the Socket pins into the corresponding positions on the DUT Test Board and soldering the Socket pins to the DUT Test Board;
[0064] S3 inserts the DUT (Device Under Test) into the Socket. This involves inserting the DUT, such as a MOSFET or IGBT, into the Socket on the DUT test board according to the pin names corresponding to the Socket. This ensures that the electrical connection between the DUT and the test system is correct and prepares for the subsequent leakage current test.
[0065] S4 Start DUT high voltage leakage current test means that the experimental environment required for the high voltage leakage current test has been set up and the high voltage leakage current test is ready to begin.
[0066] S5 applying high voltage to the D terminal of the DUT means that the test system provides high voltage to the D terminal of the DUT and simultaneously measures the leakage current from the D terminal to the S terminal of the DUT.
[0067] The leakage current displayed by the S6 source meter refers to the leakage current of the DUT, which is achieved by designing the PCB of the DUT test board to suppress the leakage current from the D terminal to the S terminal of the socket under high voltage test environment, so that the leakage current measured by the meter is the leakage current of the DUT itself.
[0068] The S7 DUT high voltage leakage current test completion means that the high voltage leakage current test of the DUT has been completed.
[0069] It should be noted that, in this document, relational terms such as first and second (number one, number two), etc., are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0070] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention.
Claims
1. A method for designing a high voltage ultra-low leakage current socket, the method comprising: The method comprises the following steps: S1: PCB design is performed on the DUT test board, and a Guard line with a via is designed to surround the D end of the Socket in the PCB design stage, the Guard line surrounds the D end to form a Faraday cage structure, and meanwhile, the Guard line avoids contact with the S end of the Socket, so that the equal potential surrounding protection of the D end is realized; S2: The Socket is fixed on the DUT test board, that is, the Socket pins are inserted into the corresponding positions of the DUT test board, and the Socket pins are welded to the DUT test board; S3: The device under test is inserted into the Socket, that is, the DUT is inserted into the Socket on the DUT test board according to the pin names corresponding to the Socket, so that the electrical connection between the DUT and the test system is correct and accurate, and preparation is made for the subsequent leakage current test; S4: The high-voltage leakage current test of the DUT is started, and the experimental environment required by the high-voltage leakage current test is built to start the high-voltage leakage current test; S5: High voltage is applied to the D end of the DUT, and the test system provides high voltage to the D end of the DUT, and meanwhile, the leakage current from the D end to the S end of the DUT is measured; S6: The source meter displays the leakage current of the DUT, and through the PCB design of the DUT test board, the leakage current from the D end to the S end of the Socket is suppressed in the high-voltage test environment, so that the leakage current measured by the instrument is the leakage current of the DUT itself; S7: The high-voltage leakage current test of the DUT is completed.
2. The method of designing a high voltage ultra-low leakage current socket according to claim 1, wherein: The test socket (1), the Guard line (2) and the via (3) are included, the test socket (1) is the physical interface of the device under test during testing, and the device under test is the DUT, the test socket (1) and the DUT test board are used for electrical connection between the DUT and the test system, so that various performance and function tests are performed, the test socket (1) includes a socket, pins and a base, the DUT test board is part of the entire test system, the test socket (1) is a component on the DUT test board, the DUT is placed in the test socket (1), and is connected to the circuit on the DUT test board through the test socket (1), and then is electrically connected with the test equipment, the DUT test board and the test socket (1) jointly constitute an interface in the leakage current test, the Guard line (2) surrounds the D end of the test socket (1), wherein the potential of the Guard line (2) is equal to the potential of the D end, an equipotential region is created, the vias (3) are uniformly distributed on the Guard line (2), and a plurality of vias (3) form a Faraday cage structure, and the Guard line (2) jointly provides an equipotential shielding mechanism for protecting the leakage current leakage from the D end to the S end of the test socket (1).
3. The method of designing a high voltage ultra-low leakage current socket of claim 2, wherein: The socket is a component for connecting the DUT to the test socket (1), is made of beryllium copper material with low impedance, is cast into an elastic structure by a mold, provides contact force support for DUT contact, and has small contact impedance, and the contacts physically and electrically connect the test system with the pins of the DUT.
4. The method of designing a high voltage ultra-low leakage current socket of claim 2, wherein: The pin is the extension of the DUT on the test socket (1), which connects the DUT pin with the test system, and enables the test signal to access the pin of the DUT from the test system, which is divided into G, D and S, that is, gate, drain and source.
5. The method of designing a high voltage ultra-low leakage current socket of claim 4, wherein: In the leakage current test, the voltage signal is added to the D end to simulate the stress condition in the actual working environment to evaluate the performance and reliability of the DUT. When the low voltage test condition is less than 200V, the leakage current between the D end and the S end can be ignored. When the high voltage test condition is greater than 200V, the leakage current between the D end and the S end is too large to affect the test result.
6. The method of designing a high voltage ultra-low leakage current socket of claim 2, wherein: The base is made of plastic and non-conductive material, which supports the entire test seat structure and connects the test equipment.
7. The method of designing a high voltage ultra-low leakage current socket of claim 2, wherein: During the high-voltage leakage current test of the DUT, the equipotential area created by the Guard line (2) and the D end ensures that the current on the D end will not leak through the Guard line (2). Since there is no potential difference between the Guard line (2) and the D end, there is no voltage to drive the current to flow, thereby preventing the leakage of current. The Guard line (2) ensures that the leakage current on the D end will not leak to the S end, realizing the protection of the leakage current under high voltage conditions, while protecting the integrity of the signal, ensuring the stability and reliability of the signal in the transmission process.
8. The method of designing a high voltage ultra-low leakage current socket of claim 2, wherein: The Guard line (2) needs to be wired on the TOP layer and the Bottom layer of the PCB board, covering the upper and lower layers of the circuit board to form a double-sided leakage current protection layer.
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