Manufacturing method of high-wear-resistance probe tip

Abstract

The invention provides a high-wear-resistance probe tip manufacturing method. The high-wear-resistance probe tip manufacturing method comprises the following steps that S10, a plurality of probe tip deep pit structures are formed in the surface of a deposition substrate; s20, coating a photoresist film on the surface of the deposition substrate, and photoetching a pinpoint pattern; s30, needle point structure plating layers are deposited in the multiple deep pit structures of the deposition substrate; s40, removing the photoresist on the surface of the welding pad; s50, depositing a welding pad structure plating layer on the welding pad of the deposition substrate; and S60, filling the plating layer of the needle point structure with metal. Through the quasi-LIGA micro-electroforming technology, the electroplating of the needle point of the probe card is changed into layered deposition from integrated deposition, the needle point part and the welding pad part are deposited step by step, the competitive growth relation of the needle point part and the welding pad part is avoided, the thickness of the structural plating layer at the needle point and the welding pad part is uniform, the wear resistance of the needle point is improved, and the service life of the probe is prolonged.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor packaging and testing, and in particular to a method for manufacturing a highly wear-resistant probe tip. Background Art

[0002] As the process capability of the semiconductor industry improves, the wafer size develops towards ultra-thinness and large-scale, and the chip size progresses towards multi-layer and miniaturization. This leads to a significant increase in the cost of packaging and testing each piece after cutting. The demand for wafer-level testing is becoming increasingly urgent, and wafer testing has emerged. At present, the production process of most chips is: wafer production - wafer testing - packaging - packaging testing - warehousing. The wafer testing link can realize the identification and marking of defective products at the wafer level, reduce unnecessary workload of the back-end process, improve packaging efficiency, and save packaging costs.

[0003] The probe card is the interface between the tester and the chip in the wafer test. During the test, the wafer is constantly moved and lifted. When lifted, the probe card needle tip will contact and conduct with the chip pads (PAD) or pad bumps (Bump) of multiple units (sites) for parallel testing. After the test is completed, the wafer drops, and after the contact is broken, the next area to be tested is sent to the bottom of the probe card. This cycle repeats. During the life of the probe card, it will contact and communicate with the wafer 250,000-2 million times. With multiple contacts between the needle tip and the PAD, the needle tip material is deformed and falls off under the action of the needle pressure, which reduces the coplanarity of the needle tip and deforms the shape of the needle tip, resulting in poor contact or long scratches on the PAD. At this time, the needle position needs to be adjusted or the needle needs to be cleared. Excessive needle cleaning will shorten the available length of the probe needle tip and scrap the probe card. One of the reasons for excessive needle cleaning is that the needle tip has poor wear resistance, and the needle tip deforms and falls off when the frequency of use is low. Summary of the invention

[0004] The purpose of the present application is to provide a method for manufacturing a probe card needle tip with high wear resistance.

[0005] In order to achieve the above purpose, this application adopts the following technical solutions:

[0006] The present application provides a method for manufacturing a highly wear-resistant probe tip, comprising the following steps:

[0007] S10, forming a plurality of needle tip deep pit structures on the surface of the deposition substrate;

[0008] S20, coating a photoresist film on the surface of the deposition substrate, and photolithography a needle tip pattern;

[0009] S30, depositing a needle tip structure coating in the plurality of deep pit structures of the deposition substrate;

[0010] S40, removing the photoresist on the surface of the pad;

[0011] S50, depositing a pad structure plating layer on the pad of the deposition substrate;

[0012] S60, filling metal in the needle tip structure coating.

[0013] The present invention uses quasi-LIGA micro-electroforming technology to change the probe card needle tip electroplating from integrated deposition to layered deposition, allowing the needle tip part and the pad part to be deposited step by step, avoiding the competitive growth relationship between the two, making the structural coating thickness at the needle tip and the pad uniform, improving the needle tip's wear resistance, and extending the probe life.

[0014] In a possible implementation, step S10 includes:

[0015] S11, providing a deposition substrate;

[0016] S12, depositing a 1-2 um mask by evaporation on the surface of the deposition substrate;

[0017] S13, applying photoresist and photolithography a needle tip pattern, the thickness of the photoresist is 5 to 10 um;

[0018] S14, wet etching the mask at the needle tip to remove the glue;

[0019] S15, dry etching to form the plurality of needle tip deep pit structures, the time ratio of etching and passivation steps is 0.8-2, the cycle period is 0.6-4s, and the etching depth is 55-100μm.

[0020] In a possible implementation, the deposition substrate is a single crystal silicon wafer with a warpage WARP ≤ 15 μm and a total thickness deviation TTV ≤ 2 μm.

[0021] In a possible implementation, the mask is any one of magnesium oxide, silicon nitride and silicon oxide.

[0022] In a possible implementation, the steps further include S16, depositing a seed layer with a thickness of 300 to 500 um using PECVD.

[0023] In a possible implementation, in step S20, the thickness of the photoresist is 5 to 10 um.

[0024] In a possible implementation, in step S30, commutation pulse electroplating is used to deposit the needle tip structure coating, with current parameters If=1~5ASD, Ir=-0.2~-1ASD, duty cycle of 1 / 1~1 / 5, frequency of 0.1~1000Hz, and time of 10~50min.

[0025] In a possible implementation, the step S40 includes: degumming and cleaning.

[0026] In a possible implementation, in step S50, direct current electroplating is used to deposit the pad structure coating, with a current parameter of I=1-5ASD and a time of 10-50 min.

[0027] In a possible implementation, in step S60, direct current electroplating is used to fill the metal in the structure coating, with a current density of 1 to 3 ASD and a time of 5 to 15 minutes. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 Schematic diagram of the concentration distribution of the main salt in the deposition substrate in the related technology.

[0029] Figure 2 Schematic diagram of the coating thickness of the structural layer of the probe in the related technology.

[0030] Figure 3 This is a schematic diagram of the decomposition of the steps of the manufacturing method provided in the embodiments of the present application.

[0031] Among them: 1. deposition substrate; 2. deep pit structure; 3. needle tip structure layer'; 4. pad structure layer'; 5. photoresist; 6. needle tip metal deposition; 7. needle tip structure coating; 8. pad structure coating; 9. filling layer. DETAILED DESCRIPTION

[0032] To describe the technical content, structural features, achieved purpose and effect of the invention in detail, the technical scheme in the embodiment of the present application will be described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. In the following description, for the purpose of explanation, many specific details are set forth to provide a detailed description of various exemplary embodiments or implementations of the invention. However, various exemplary embodiments may also be implemented without these specific details or in the case of one or more equivalent arrangements. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, without departing from the inventive concept, the specific shape, structure and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0033] The probe tip is composed of a structural layer and a filling layer, usually the structural layer is chromium and the filling layer is copper. The wear resistance of the tip is largely determined by the thickness of the structural layer, and the thickness of the structural layer also determines the mechanical properties of the tip.

[0034] When analyzing the wear resistance of the needle tip, the applicant found that in the related technology, when the probe is electroplated, the pad is in a high potential area, while the needle tip is in a low potential area. When the pad and the needle tip are deposited at the same time, the two form a competitive growth relationship, and the high aspect ratio structure of the probe itself hinders the exchange of the plating solution at the needle tip. Most of the main salt is deposited in the pad part, which leads to a low concentration of the main salt at the needle tip, increased concentration polarization, slowed deposition rate and coarse grains, making the thickness D2 of the needle tip structure layer '3 less than the thickness D1 of the pad structure layer '4, D2 / D1=0.4-0.6:1. Among them, the main salt concentration distribution is as follows: Figure 1 As shown, the coating thickness of the probe structure layer is as follows Figure 2 shown.

[0035] In order to solve the problem of competitive growth between the pad and the needle tip, the present application provides a method for producing a highly wear-resistant probe tip, in which the probe tip and the pad are deposited separately to ensure independent deposition at the needle tip, increase the coating thickness at the needle tip, and improve the uniformity of the coating thickness at all parts of the probe.

[0036] See also Figure 3 The probe card needle tip manufacturing method of the present application comprises the following steps:

[0037] S10, forming a plurality of needle tip deep pit structures 2 on the surface of the deposition substrate 1.

[0038] In some embodiments, S10 is specifically implemented by the following steps:

[0039] S11, providing a deposition substrate 1, usually a single crystal silicon wafer, the wafer size is selected according to production needs, such as 6-inch, 8-inch wafers, etc., the admission standard is warpage WARP ≤ 15 μm, total thickness deviation TTV ≤ 2 μm;

[0040] S12, depositing a 1-2 um mask by evaporation on the surface of the deposition substrate 1, wherein the mask may be any one of magnesium oxide, silicon nitride or silicon oxide;

[0041] S13, applying photoresist and etching out the needle tip pattern, the thickness of the photoresist is 5 to 10 um, so as to facilitate the subsequent etching of the deep pit structure corresponding to the needle tip pattern on the deposition substrate;

[0042] S14, wet etching the mask at the needle tip to remove the photoresist on the surface of the deposited substrate;

[0043] S15, using a deep reactive ion etching (DRI E Bosch) process to dry etch and form a plurality of needle tip deep pit structures 2, the time ratio of the etching and passivation steps is 0.8-2, the cycle period is 0.6-4s, and the etching depth is 55-100μm.

[0044] S16. Use PECVD (plasma enhanced chemical vapor deposition) to deposit a seed layer with a thickness of 300 to 500 um.

[0045] S20, coating a photoresist film on the surface of the deposition substrate 1, photolithography of the needle tip pattern, and only retaining a layer of photoresist 5 on the surface of the pad, the thickness of the photoresist is 5 to 10 um;

[0046] S30, placing the deposition substrate 1 into the plating solution, the bottom of the deep pit structure 2 becomes the needle tip metal deposition location 6, the electroplating process uses commutation pulse electroplating, the current parameters I f = 1 ~ 5ASD, I r = -0.2 ~ -1ASD, the duty cycle is 1 / 1 ~ 1 / 5, the frequency is 0.1 ~ 1000Hz, the time is 10 ~ 50min, because the surface of the pad is covered with a layer of photoresist 5, finally only the needle tip structure plating layer 7 is deposited in the several deep pit structures 2 of the deposition substrate 1;

[0047] S40, removing the photoresist 5 on the surface of the pad, cleaning, photolithography of the pad pattern, the thickness of the photoresist is 5 to 10 um;

[0048] S50, depositing a pad structure plating layer 8 on the pad of the deposition substrate 1 by direct current plating, with a current parameter I=1-5ASD and a time of 10-50min;

[0049] S60, using direct current electroplating to fill metal in the needle tip structure plating layer 7, with a current density of 1 to 3 ASD and a time of 5 to 15 minutes to form a filling layer 9, which is usually copper.

[0050] To further illustrate the influence of the thickness of the structural coating, the depth of the deep pit structure and the etching process, as well as the electroplating method on the wear resistance parameters, coating uniformity and sidewall steepness of the probe card tip, the present application is described below in conjunction with embodiments.

[0051] Example 1

[0052] 1. Use 8-inch single crystal silicon wafer as deposition substrate, and the entry standard is WARP ≤ 15μm, TTV ≤ 2μm.

[0053] 2. Deposit 1.5umMgO by thermal evaporation on the substrate surface.

[0054] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0055] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0056] 5. Dry DRI E Bosch etching, the time ratio of etching and passivation steps is 0.8, the cycle period is 1, the etching depth is 60μm, and several deep pit structures are formed.

[0057] 6. PECVD deposits 500umCu seed layer.

[0058] 7. Photolithography needle tip pattern, glue thickness 8um.

[0059] 8. Deposit the needle tip structure coating using pulsed square wave electroplating with current parameters If=5ASD, Ir=-1ASD, duty cycle 1 / 1, frequency 10 Hz, and time 10 min.

[0060] 9. Remove glue and clean.

[0061] 10. Use direct current electroplating to deposit the pad structure coating, with current parameter Imax=5ASD and time of 5min.

[0062] 11. Use DC electroplating to fill the holes, with a current density of 3ASD and a time of 5 minutes.

[0063] Example 2

[0064] 1. Using 8-inch single crystal silicon wafer as deposition substrate, the entry standard is WARP ≤ 15μm, TTV ≤ 2μm.

[0065] 2. Deposit 1.5umMgO by thermal evaporation on the substrate surface.

[0066] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0067] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0068] 5. Dry DRI E Bosch etching, the time ratio of etching and passivation steps is 0.8, the cycle period is 1, the etching depth is 60μm, and several deep pit structures are formed.

[0069] 6. PECVD deposits 500umCu seed layer.

[0070] 7. Photolithography needle tip layer pattern, glue thickness 8um.

[0071] 8. Deposit the needle tip structure coating using commutation pulse electroplating with current parameters If=2.5ASD, Ir=-0.2ASD, duty cycle 1 / 1, frequency 10Hz, and time 20min.

[0072] 9. Remove glue and clean.

[0073] 10. Use direct current electroplating to deposit the pad layer, with current parameter I=5ASD and time of 5min.

[0074] 11. Use DC electroplating to fill the holes, with a current density of 3ASD and a time of 5 minutes.

[0075] Example 3

[0076] 1. Using 8-inch single crystal silicon wafer as deposition substrate, the entry standard is WARP ≤ 15μm, TTV ≤ 2μm.

[0077] 2. Deposit 1.5umMgO by thermal evaporation on the substrate surface.

[0078] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0079] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0080] 5. Dry DRI E Bosch etching, the time ratio of etching and passivation steps is 0.8, the cycle period is 1, the etching depth is 60μm, and several deep pit structures are formed.

[0081] 6. PECVD deposits 500umCu seed layer.

[0082] 7. Photolithography needle tip pattern, glue thickness 8um.

[0083] 8. Use commutation pulse electroplating to deposit the needle tip structure coating, with current parameters If=2.5ASD, Ir=-0.2ASD, duty cycle 1 / 1, frequency 10Hz, and time 20min.

[0084] 9. Remove glue and clean.

[0085] 10. Use direct current plating to deposit the pad structure coating, with current parameter I = 2.5ASD and time of 10 minutes.

[0086] 11. Use DC electroplating to fill the holes, with a current density of 3ASD and a time of 5 minutes.

[0087] Comparative Example 1

[0088] The difference between Comparative Example 1 and Example 3 is that the deposition time of the needle tip structure coating is longer.

[0089] 1. Using 8-inch single crystal silicon wafer as deposition substrate, the entry standard is WARP ≤ 15μm, TTV ≤ 2μm.

[0090] 2. Deposit 1.5umMgO by thermal evaporation on the surface of the deposition substrate.

[0091] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0092] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0093] 5. Dry DRI E Bosch etching, the time ratio of etching and passivation steps is 0.8, the cycle period is 1, the etching depth is 60μm, and several deep pit structures are formed.

[0094] 6. PECVD deposits 500umCu seed layer.

[0095] 7. Photolithography needle tip pattern, glue thickness 8um.

[0096] 8. Deposit the needle tip structure coating using commutation pulse electroplating with current parameter I f =2.5ASD, I r =-0.2ASD, duty cycle 1 / 1, frequency 10Hz, time 60min.

[0097] 9. Remove glue and clean.

[0098] 10. Deposit the pad structure plating layer using direct current plating with a current parameter of I = 2.5ASD.

[0099] 11. Use DC electroplating to fill the holes, with a current density of 3ASD and a time of 5 minutes.

[0100] Comparative Example 2:

[0101] The difference between Comparative Example 2 and Example 3 is that the needle tip deep pit structure is etched using a reactive ion etching method.

[0102] 1. Using 8-inch single crystal silicon wafer as deposition substrate, the entry standard is WARP ≤ 15μm, TTV ≤ 2μm.

[0103] 2. Deposit 1.5umMgO by thermal evaporation on the substrate surface.

[0104] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0105] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0106] 5. Reactive ion etching (RIE), etching depth 60 μm, forming several deep pit structures.

[0107] 6. PECVD deposits 500umCu seed layer.

[0108] 7. Photolithography needle tip pattern, glue thickness 8um.

[0109] 8. Deposit the needle tip structure coating using commutation pulse electroplating with current parameter I f =2.5ASD, I r =-0.2ASD, duty cycle 1 / 1, frequency 10Hz, time 20min.

[0110] 9. Remove glue and clean.

[0111] 10. Deposit the pad structure coating using direct current electroplating with a current parameter of I = 2.5ASD.

[0112] 11. Electroplating to fill the holes, using DC plating, current density 3ASD, time 5min.

[0113] Comparative Example 3:

[0114] The difference between Comparative Example 3 and Example 3 is that Comparative Example 3 uses direct current electroplating to deposit the needle tip structure coating.

[0115] 1. Using 8-inch single crystal silicon wafer as deposition substrate, the entry standard is WARP ≤ 15μm, TTV ≤ 12μm.

[0116] 2. Deposit 1.5umMgO by thermal evaporation on the substrate surface.

[0117] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0118] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0119] 5. Dry DRI E Bosch etching, the time ratio of etching and passivation steps is 0.8, the cycle period is 1, the etching depth is 60μm, and several deep pit structures are formed.

[0120] 6. PECVD deposits 500umCu seed layer.

[0121] 7. Photolithography needle tip pattern, glue thickness 8um.

[0122] 8. Deposit the needle tip structure coating using direct current electroplating with a current parameter of I = 2.5 ASD for 8 min.

[0123] 9. Remove glue and clean.

[0124] 10. Deposit the pad structure coating using direct current electroplating with current parameter I=2.5ASD and time of 8min.

[0125] 11. Electroplating to fill the holes, using DC plating, current density 3ASD, time 5min.

[0126] Comparative Example 4:

[0127] The difference between Comparative Example 4 and Example 3 is that in Comparative Example 4, a reactive ion etching method is used to etch the deep pit structure, and the etching depth is shallower.

[0128] 1. Using 8-inch single crystal silicon wafer as deposition substrate, the entry standard is WARP ≤ 15μm, TTV ≤ 2μm.

[0129] 2. Deposit 1.5umMgO by thermal evaporation on the substrate surface.

[0130] 3. Apply glue and photolithography to produce the needle tip pattern, the glue thickness is 8um.

[0131] 4. Wet-etch the MgO mask at the needle tip to remove the glue.

[0132] 5. Reactive ion etching (RIE), etching depth 45 μm, forming several deep pit structures.

[0133] 6. PECVD deposits 500umCu seed layer.

[0134] 7. Photolithography needle tip pattern, glue thickness 8um.

[0135] 8. Deposit the needle tip structure coating using commutation pulse electroplating with current parameter I f =2.5ASD, I r =-0.2ASD, duty cycle 1 / 1, frequency 10Hz, time 20min.

[0136] 9. Remove glue and clean.

[0137] 10. Deposit the pad structure coating using direct current electroplating with a current parameter of I = 2.5ASD.

[0138] 11. Use direct current electroplating to fill the holes, with a current density of 3ASD and a time of 5 minutes.

[0139] The probe card needle tips manufactured by the process methods of the above-mentioned embodiment and comparative example were tested, and the following table was obtained.

[0140]

[0141] From the comparison between Comparative Example 1 and Example 3, it can be seen that if the thickness of the needle tip structure coating is too high, it will lead to abnormal hole filling and voids, and it is easy to break during use in the subsequent process.

[0142] From the comparison between Comparative Examples 2 and 4 and Example 3, it can be seen that when the etching depth is greater than 50 um, not using the DRI E Bosch process during dry etching will lead to accelerated sidewall etching and reduced sidewall steepness.

[0143] From the comparison between Comparative Example 3 and Example 3, it can be seen that the direct current deposition of the needle tip structure plating results in a loose metal structure of the needle tip and poor wear resistance.

[0144] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, and the scope of protection of the present invention is defined by the attached claims, description and their equivalents.

Claims

1. A method for manufacturing a highly wear-resistant probe tip, characterized in that: The following steps are involved: S10, forming a plurality of needle tip deep pit structures on the surface of the deposition substrate; S20, coating a photoresist film on the surface of the deposition substrate, and photolithography a needle tip pattern; S30, depositing a needle tip structure coating in the plurality of deep pit structures of the deposition substrate; S40, removing the photoresist on the surface of the pad; S50, depositing a pad structure plating layer on the pad of the deposition substrate; S60, filling metal in the needle tip structure coating.

2. The method for manufacturing a highly wear-resistant probe tip according to claim 1, characterized in that: Step S10 includes: S11, providing a deposition substrate; S12, depositing a 1-2 um mask by evaporation on the surface of the deposition substrate; S13, applying photoresist and photolithography a needle tip pattern, the thickness of the photoresist is 5 to 10 um; S14, wet etching the mask at the needle tip to remove the glue; S15, forming the plurality of needle tip deep pit structures by dry etching, the time ratio of etching and passivation steps is 0.8-2, the cycle period is 0.6-4s, and the etching depth is 55-100μm.

3. The method for manufacturing a highly wear-resistant probe tip according to claim 2, characterized in that: The deposition substrate is a single crystal silicon wafer with a warpage WARP≤15μm and a total thickness deviation TTV≤2μm.

4. The method for manufacturing a highly wear-resistant probe tip according to claim 2, characterized in that: The mask is any one of magnesium oxide, silicon nitride and silicon oxide.

5. The method for manufacturing a highly wear-resistant probe tip according to claim 2, characterized in that: The steps also include S16, using PECVD to deposit a seed layer with a thickness of 300 to 500 um.

6. The method for manufacturing a highly wear-resistant probe tip according to claim 1, characterized in that: In step S20, the thickness of the photoresist is 5 to 10 um.

7. The method for manufacturing a highly wear-resistant probe tip according to claim 1, characterized in that: In step S30, the needle tip structure coating is deposited by using commutation pulse electroplating, the current parameters If=1-5ASD, Ir=-0.2-1ASD, the duty cycle is 1 / 1-1 / 5, the frequency is 0.1-1000 Hz, and the time is 10-50 min.

8. The method for manufacturing a highly wear-resistant probe tip according to claim 1, characterized in that , the S40 step includes: degumming and cleaning.

9. The method for manufacturing a highly wear-resistant probe tip according to claim 1, characterized in that: In step S50, direct current electroplating is used to deposit the pad structure coating, the current parameter is I=1-5ASD, and the time is 10-50min.

10. The method for manufacturing a highly wear-resistant probe tip according to claim 1, characterized in that: In step S60, direct current electroplating is used to fill the metal in the structure coating, with a current density of 1 to 3 ASD and a time of 5 to 15 minutes.

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