Detection circuit for capacitor sorting test circuit board

Abstract

The invention discloses a detection circuit for a capacitor sorting test circuit board. Comprising a test source, a test source current acquisition circuit, a control unit, a test source switching circuit, a detection loop change-over switch circuit, a tested capacitor sorting test circuit board, a detection loop differential sampling circuit, a tested circuit board control part detection circuit and a tested circuit board control part drive circuit. According to the invention, the forward conduction impedance, the reverse conduction impedance, the forward conduction time, the reverse conduction time, the forward turn-off time and the reverse turn-off time of the change-over switch of the detected capacitor sorting test circuit board, the insulation impedance between channels of the change-over switch, the forward breakdown voltage, the reverse breakdown voltage and the like of the TVS clamping diode can be automatically detected at a high speed; therefore, automatic detection can be realized, the detection quality is improved, the detection cost is reduced, large-scale mass production is realized, the requirements of various equipment are met, and wide application is facilitated.

Description

Technical Field

[0001] The invention relates to the technical field of electronic application testing, and in particular to a detection circuit for a capacitor sorting test circuit board. Background Art

[0002] In the related technology, in the field of MLCC capacitor testing, the existing technical solution for high-speed multi-channel testers is to install a capacitance meter on each track for the corresponding test. For example, for 8-channel measurement, 8 capacitance meters are required, resulting in a sharp increase in the number of capacitance meters used in the tester. In addition, the capacitance meters are expensive, with more control interfaces, complex processes, and numerous components. The MLCC capacitors being tested may have residual high voltage. If they are directly connected to the capacitance meter without a discharge circuit, there is a risk of burning the capacitance meter.

[0003] In order to ensure the quality of MLCC capacitor detection by high-speed multi-channel testers, reduce production costs and avoid the risk of burning capacitor meters, each tester needs to be loaded with multiple MLCC capacitor rapid detection and sorting switching circuit boards. However, there are many electronic components on the switching switches of the MLCC capacitor rapid detection and sorting switching circuit boards. The welders of each electronic component on the board must be guaranteed, because the performance of the electronic components directly affects the quality of the tester's detection of MLCC capacitors.

[0004] Therefore, in order to ensure the performance of the electronic components of the switching switch on the MLCC capacitor rapid detection and sorting switching circuit board, each electronic component must be tested and judged; if a series of detection tools such as a multimeter are used manually for detection, the detection speed is too slow, and too much detection time is consumed. At the same time, there are problems such as manual detection errors. It is difficult to mass-produce and meet the needs of various customers, and it is difficult to be widely used. Summary of the invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a detection circuit for a capacitor sorting test circuit board, which can realize automatic detection of the capacitor sorting test circuit board, improve detection quality, reduce detection costs, achieve large-scale mass production, meet various equipment requirements, meet various testing requirements of customers, and facilitate wide application.

[0006] A detection circuit for a capacitor sorting and testing circuit board according to an embodiment of the present invention includes: A test source for providing electrical energy; A test source current acquisition circuit, wherein an input end of the test source current acquisition circuit is electrically connected to the test source, and the test source current acquisition circuit is used to acquire an output current of the test source; A control unit, the control unit being electrically connected to an output end of the test source current acquisition circuit; A test source switching circuit, wherein an input end of the test source switching circuit is electrically connected to the test source, a control end of the test source switching circuit is electrically connected to the control unit, and the test source switching circuit is used to adjust the voltage and current of the test source; A detection loop switching circuit, wherein an input end of the detection loop switching circuit is electrically connected to an output end of the test source switching circuit, and a control end of the detection loop switching circuit is electrically connected to the control unit; A capacitor sorting test circuit board to be tested, electrically connected to the detection end of the detection loop switching circuit; A detection loop differential sampling circuit is electrically connected to the output end of the detection loop switching circuit and is also electrically connected to the control unit; A detection circuit of the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit; The driving circuit of the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit.

[0007] According to some embodiments of the present invention, the further comprising: A display screen, the display screen is electrically connected to the control unit; A host computer is electrically connected to the control unit.

[0008] According to some embodiments of the present invention, the test source includes: a first voltage source, a second voltage source, a third voltage source, a first current limiting resistor, a second current limiting resistor, a third current limiting resistor, a first test source output terminal, a second test source output terminal, and a third test source output terminal; wherein, one end of the first current limiting resistor is electrically connected to the first voltage source, and the other end of the first current limiting resistor is electrically connected to the first test source output terminal; one end of the second current limiting resistor is electrically connected to the second voltage source, and the other end of the second current limiting resistor is electrically connected to the second test source output terminal; one end of the third current limiting resistor is electrically connected to the third voltage source, and the other end of the third current limiting resistor is electrically connected to the third test source output terminal.

[0009] According to some embodiments of the present invention, the test source switching circuit includes a test source switching switch circuit and a test source current direction switching circuit, and the test source switching switch circuit includes: A first test source switching switch, wherein one end of the first test source switching switch is electrically connected to the other end of the first current limiting resistor; a fourth test source output terminal, electrically connected to the other end of the first test source switch; a second test source switching switch, wherein one end of the second test source switching switch is electrically connected to the other end of the second current limiting resistor, and the other end of the second test source switching switch is electrically connected to the fourth test source output end; a third test source switching switch, one end of the third test source switching switch being electrically connected to the other end of the third current limiting resistor, and the other end of the third test source switching switch being electrically connected to the fourth test source output end; The test source current direction switching switch comprises: a first current direction switching switch, wherein one end of the first current direction switching switch is electrically connected to the other end of the first test source switching switch; a second current direction switching switch, one end of the second current direction switching switch is electrically connected to the other end of the first current direction switching switch, and the other end of the second current direction switching switch is grounded; a fifth test source output terminal, electrically connected to the other end of the first current direction switching switch; a third current direction switching switch, one end of the third current direction switching switch being electrically connected to the other end of the second test source switching switch; a fourth current direction switching switch, one end of the fourth current direction switching switch being electrically connected to the other end of the third current direction switching switch, and the other end of the fourth current direction switching switch being grounded; The sixth test source output terminal is electrically connected to the other end of the third current direction switching switch.

[0010] According to some embodiments of the present invention, the capacitor sorting test circuit board comprises: A plurality of switching units, each of which is provided with a plurality of switching switches; A plurality of first radio frequency coaxial connectors, electrically connected to the switching unit, and also used to be electrically connected to the detection end of the detection loop switching circuit; A plurality of output terminals, electrically connected to the switching unit, electrically connected to the first RF coaxial connector, and also used to be electrically connected to the detection end of the detection loop switching circuit; The control interface terminal is electrically connected to the control end of the switching unit and is also used to electrically connect to the detection circuit of the control part of the tested circuit board and the driving circuit of the control part of the tested circuit board.

[0011] According to some embodiments of the present invention, the detection loop switching circuit includes a first detection loop switching circuit and a second detection loop switching circuit, and the first detection loop switching circuit includes: A plurality of first detection switching switches, wherein a control end of the first detection switching switch is electrically connected to the control unit, and one end of the first detection switching switch is electrically connected to an output end of the test source switching circuit; a plurality of second RF coaxial connectors, one end of the second RF coaxial connector being electrically connected to the other end of the first detection switch, and the other end of the second RF coaxial connector being electrically connected to the first RF coaxial connector; The second detection loop switching circuit includes: A plurality of second detection switching switches, wherein a control end of the second detection switching switch is electrically connected to the control unit, and one end of the second detection switching switch is electrically connected to an output end of the test source switching circuit; A plurality of connection terminals, one end of each connection terminal is electrically connected to the other end of the second detection switching switch, the other end of each connection terminal is electrically connected to the output terminal, and the connection terminal is also electrically connected to the second RF coaxial connector.

[0012] According to some embodiments of the present invention, the detection loop switching circuit further includes a first Darlington transistor array, one end of the first Darlington transistor is electrically connected to the control unit; the first detection switching switch includes a first optocoupler solid-state relay and a first current limiting resistor, the first optocoupler solid-state relay is electrically connected to the other end of the first Darlington transistor through the first current limiting resistor, the first optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the first optocoupler solid-state relay is also electrically connected to one end of the second RF coaxial connector; The detection loop switching switch circuit also includes a second Darlington transistor array, one end of the second Darlington transistor is electrically connected to the control unit; the second detection switching switch includes a second optocoupler solid-state relay and a second current limiting resistor, the second optocoupler solid-state relay is electrically connected to the other end of the second Darlington transistor through the second current limiting resistor, the second optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the second optocoupler solid-state relay is also electrically connected to one end of the wiring terminal.

[0013] According to some embodiments of the present invention, the detection loop differential sampling circuit includes: A first analog switch is electrically connected to the control unit and is also electrically connected to the first detection loop switching circuit; a first current limiting resistor, wherein one end of the first current limiting resistor is electrically connected to the first analog switch; A second analog switch is electrically connected to the control unit and is also electrically connected to the second detection loop switching circuit; a second current limiting resistor, wherein one end of the second current limiting resistor is electrically connected to the second analog switch; a third analog switch, electrically connected to the control unit, electrically connected to the second detection loop switching circuit, and electrically connected to one end of the second current limiting resistor; a first differential amplifier circuit, wherein an input end of the first differential amplifier circuit is electrically connected to the other end of the first current limiting resistor, and an output end of the first differential amplifier circuit is electrically connected to the control unit; A second differential amplifier circuit, wherein an input end of the second differential amplifier circuit is electrically connected to the other end of the second current limiting resistor, and an output end of the second differential amplifier circuit is electrically connected to the control unit.

[0014] According to some embodiments of the present invention, the control part detection circuit of the circuit board under test includes: a fourth analog switch, electrically connected to the control unit and also electrically connected to the capacitor sorting test circuit board; a voltage-dividing resistor, one end of which is electrically connected to the control unit, and the other end of which is electrically connected to the fourth analog switch; An amplifier circuit is electrically connected to the control unit.

[0015] According to some embodiments of the present invention, the driving circuit of the control part of the circuit board under test includes: A MOS tube, wherein the gate of the MOS tube is electrically connected to the control unit, the drain of the MOS tube is electrically connected to the capacitor sorting test circuit board under test, and the source of the MOS tube is grounded.

[0016] The detection circuit for capacitor sorting and testing circuit boards according to the embodiments of the present invention has at least the following beneficial effects: by setting a test source, a test source current acquisition circuit and a test source switching circuit, suitable voltage and current are selected for different detection needs to ensure the accuracy of each test data; by setting a detection loop switching switch circuit, a measurement loop or channel is established for the switching switch of the board under test; the forward conduction impedance, reverse conduction impedance, forward conduction time and reverse shutdown time of the switching switch of the board under test are measured by the detection loop differential sampling circuit; the quality of the electronic components of the control part circuit of the board under test is detected by the control part detection circuit of the board under test, and the quality of the electronic components of the control part circuit of the board under test is detected by the control part detection circuit of the board under test. The driving circuit drives the switching unit of the control part of the circuit in the tested circuit board to turn on and off; through the above structure, the circuit can automatically detect the forward conduction impedance, reverse conduction impedance, forward conduction time, reverse conduction time, forward turn-off time, reverse turn-off time of the switching switch of the tested MLCC capacitor to quickly detect and sort the switching circuit, the insulation impedance between the channels of the switching switch, the forward breakdown voltage and reverse breakdown voltage of the TVS clamping diode, and the circuit of the control part of the switching switch; it can be seen that automatic detection can be realized, the detection quality can be improved, the detection cost can be reduced, and large-scale mass production can be achieved to meet the needs of various equipment and various testing needs of customers, so as to facilitate wide application.

[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present invention will be further described below with reference to the accompanying drawings and embodiments, wherein: Figure 1 A module connection diagram of a detection circuit for a capacitor sorting test circuit board according to an embodiment of the present invention; Figure 2 for Figure 1 A schematic diagram of a circuit board interface of a capacitor sorting switching circuit board under test for a detection circuit of a capacitor sorting test circuit board is shown; Figure 3 for Figure 1 A circuit board topology diagram of a capacitor sorting switching circuit board under test for a detection circuit of a capacitor sorting test circuit board is shown; Figure 4 for Figure 2 The first embodiment of the detailed schematic diagram of the switching unit of the tested capacitor sorting switching circuit board of the detection circuit of the capacitor sorting test circuit board is shown; Figure 5 for Figure 2The second embodiment of the detailed schematic diagram of the switching unit of the tested capacitor sorting switching circuit board of the detection circuit of the capacitor sorting test circuit board is shown; Figure 6 for Figure 1 A circuit board topology diagram of a detection loop switching circuit of a detection circuit of a capacitor sorting test circuit board and a capacitor sorting switching circuit board under test; Figure 7 for Figure 1 The first embodiment of the detailed schematic diagram of the test source switching circuit of the detection circuit of the capacitor sorting test circuit board is shown; Figure 8 for Figure 1 A second embodiment of a detailed schematic diagram of a test source switching circuit for a detection circuit of a capacitor sorting test circuit board is shown; Fig. 9 for Figure 7 8 is a detailed schematic diagram of a driving circuit portion of a test source switching circuit of a detection circuit for a capacitor sorting test circuit board; Fig.10 for Figure 1 The detailed schematic diagram of the test source circuit for the detection circuit of the capacitor sorting test circuit board is shown; Fig.11 for Figure 1 The detailed schematic diagram of the detection loop switching circuit of the detection circuit of the capacitor sorting test circuit board is shown; Fig.12 for Figure 1 The schematic diagram of the detection loop differential sampling circuit of the detection circuit of the capacitor sorting test circuit board is shown; Fig.13 for Figure 1 The detailed schematic diagram of the driving circuit and the detection circuit of the circuit board under test of the detection circuit of the capacitor sorting test circuit board is shown; Fig.14 for Figure 1 FIG. 1 is a circuit diagram of a control unit 300 for a detection circuit of a capacitor sorting test circuit board.

[0019] Figure numerals: test source 100; test source current acquisition circuit 200; control unit 300; test source switching circuit 400, test source switching switch circuit 410, test source current direction switching circuit 420; first detection loop switching switch circuit 510, second detection loop switching switch circuit 520; tested capacitor sorting test circuit board 600; detection loop differential sampling circuit 700; tested circuit board control part detection circuit 810, tested circuit board control part drive circuit 820; host computer 900, display screen 910. DETAILED DESCRIPTION

[0020] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0021] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0022] In the description of the present invention, "several" means more than one, "many" means more than two, "greater than", "less than", "exceed", etc. are understood to exclude the number itself, and "above", "below", "within", etc. are understood to include the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0023] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific content of the technical solution.

[0024] In the description of the present invention, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0025] Reference Figure 1-14 The present invention proposes a detection circuit for a capacitor sorting test circuit board, comprising: A test source 100, for providing electrical energy; A test source current acquisition circuit 200, wherein an input end of the test source current acquisition circuit 200 is electrically connected to the test source 100, and the test source current acquisition circuit 200 is used to acquire an output current of the test source 100; A control unit 300, the control unit 300 is electrically connected to the output end of the test source current acquisition circuit 200; A test source switching circuit 400, wherein an input end of the test source switching circuit 400 is electrically connected to the test source 100, a control end of the test source switching circuit 400 is electrically connected to the control unit 300, and the test source switching circuit 400 is used to adjust the voltage and current of the test source 100; A detection loop switching circuit, wherein an input end of the detection loop switching circuit is electrically connected to an output end of the test source switching circuit 400, and a control end of the detection loop switching circuit is electrically connected to the control unit 300; The capacitor sorting test circuit board 600 under test is electrically connected to the detection end of the detection loop switching circuit; The detection loop differential sampling circuit 700 is electrically connected to the output end of the detection loop switching circuit and is also electrically connected to the control unit 300; The circuit board control part detection circuit 810 under test is electrically connected to the capacitor sorting test circuit board 600 under test, and is also electrically connected to the control unit 300; The tested circuit board control part driving circuit 820 is electrically connected to the tested capacitor sorting test circuit board 600 and is also electrically connected to the control unit 300 .

[0026] Specifically, in this embodiment, the overall detection circuit diagram of the detection circuit of the capacitor sorting test circuit board, that is, the detection circuit of the MLCC capacitor fast detection sorting switching circuit board is as follows: Figure 1 As shown, it includes a control unit 300 (MCU), a test source 100, a current acquisition circuit 200 of the test source, a switching circuit 410 of the test source, a current direction switching circuit 420 of the test source, a first detection loop switching circuit 510, a second detection loop switching circuit 520, a detection loop differential sampling circuit 700, a driving circuit 820 of the control part of the tested MLCC capacitor fast detection and sorting switching circuit board 600 and its detection circuit 810, a display screen 910, a PC-side host computer 900 and a tested MLCC capacitor fast detection and sorting switching circuit board 600; It should be noted that the control unit 300 includes a single chip microcomputer, a PLC, an FPGA, etc. In this embodiment, the control unit 300 adopts an MCU.

[0027] The test source 100 is a voltage source that provides different voltages and currents to the test circuit; The test source current acquisition circuit 200 is used to acquire the output current of the test source 100; The switching switch circuit 400 of the test source is used to select appropriate voltage and current for different detection needs, ensure the accuracy of each test data, and provide power for performance testing of the forward conduction impedance of the switching switch, the reverse conduction impedance of the switching switch, the insulation impedance of the switching switch, the forward conduction time of the switching switch, the direction off time of the switching switch, and the clamping TVS diode in the clamping protection circuit of the tested capacitor sorting test circuit board 600; The current direction switching circuit 420 of the test source changes the direction of the measurement current for forward and reverse direction measurement; The first detection loop switching circuit 510 establishes a measurement loop or channel for the switch of the board under test; The second detection loop switching circuit 520 establishes a measurement loop or channel for the switch of the board under test; The detection loop differential sampling circuit 700 is used to measure the switched forward conduction impedance, switched reverse conduction impedance, switched forward conduction time, and switched direction off time of the board under test; The driving circuit 820 and the detection circuit 810 of the control part of the tested MLCC capacitor fast detection and sorting switching circuit board 600 are used to drive and control the control part circuit in the tested MLCC capacitor fast detection and sorting switching circuit board 600 to control the conduction and disconnection of the switching unit switch; The detection circuit 810 of the control part of the tested MLCC capacitor fast detection sorting switching circuit board 600 is used to detect whether the electronic components of the control part circuit in the tested MLCC capacitor fast detection sorting switching circuit board 600 are good or bad; Display screen 910, used to display the test results; PC host computer 900, used to display the test results; The MLCC capacitor rapid detection and sorting switching circuit board 600 is the object to be detected; The detection circuit control unit 300 circuit is as follows Fig.14 shown.

[0028] Reference Figure 1 , further, in some embodiments of the present invention, it also includes: Display screen 910, display screen 910 is electrically connected to control unit 300; The host computer 900 is electrically connected to the control unit 300 .

[0029] Specifically, in this embodiment, the display screen 910 and the PC host computer 900 are both used to display the detection results.

[0030] Further, refer to Fig.10 In some embodiments of the present invention, the test source 100 includes: a first voltage source, a second voltage source, a third voltage source, a first current limiting resistor, a second current limiting resistor, a third current limiting resistor, a first test source output terminal, a second test source output terminal, and a third test source output terminal; wherein, one end of the first current limiting resistor is electrically connected to the first voltage source, and the other end of the first current limiting resistor is electrically connected to the first test source output terminal; one end of the second current limiting resistor is electrically connected to the second voltage source, and the other end of the second current limiting resistor is electrically connected to the second test source output terminal; one end of the third current limiting resistor is electrically connected to the third voltage source, and the other end of the third current limiting resistor is electrically connected to the third test source output terminal.

[0031] Specifically, in this embodiment, the detailed schematic diagram of the test source 100 of the detection circuit is as follows: Fig.10 As shown: One end of the current limiting resistor R15 of the test source 1 (i.e., the first voltage source) is connected to 3.3V, and the other end is connected to Source1; one end of the current limiting resistor R16 of the test source 2 (i.e., the second voltage source) is connected to 3.3V, and the other end is connected to Source2; one end of the current limiting resistor R15 of the test source 3 (i.e., the third voltage source) is connected to 15V, and the other end is connected to Source3; The switching circuit SW29 of the test source, the first pin of the optocoupler solid-state relay_MOS output U7 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U7 is connected to one end of the current limiting resistor R18, the other end of the current limiting resistor R18 is connected to Sig_Source_01n, the third pin of the optocoupler solid-state relay_MOS output U7 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U7 is connected to Source1; the first pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_01, and the 16th pin of U8 is connected to Sig_Source_01n; The switching circuit SW30 of the test source, the first pin of the optocoupler solid-state relay_MOS output U10 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U10 is connected to one end of the current limiting resistor R26, the other end of the current limiting resistor R26 is connected to Sig_Source_02n, the third pin of the optocoupler solid-state relay_MOS output U10 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U10 is connected to Source2; the second pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_02, and the 15th pin of U8 is connected to Sig_Source_02n; The switching circuit SW31 of the test source, the first pin of the optocoupler solid-state relay_MOS output U11 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U11 is connected to one end of the current limiting resistor R30, the other end of the current limiting resistor R30 is connected to Sig_Source_03n, the third pin of the optocoupler solid-state relay_MOS output U11 is connected to Source4, the fourth pin of the optocoupler solid-state relay_MOS output U11 is connected to Source3; the third pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_03, and the 14th pin of U8 is connected to Sig_Source_03n; The current direction switching switch circuit SW32 of the test source, the first pin of the optocoupler solid-state relay_MOS output U12 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U12 is connected to one end of the current limiting resistor R31, the other end of the current limiting resistor R31 is connected to Sig_Source_04n, the third pin of the optocoupler solid-state relay_MOS output U12 is connected to Source5, and the fourth pin of the optocoupler solid-state relay_MOS output U12 is connected to Source4; the fourth pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_04, and the 13th pin of U8 is connected to Sig_Source_04n; The current direction switching switch circuit SW34 of the test source, the first pin of the optocoupler solid-state relay_MOS output U15 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U15 is connected to one end of the current limiting resistor R34, the other end of the current limiting resistor R34 is connected to Sig_Source_05n, the third pin of the optocoupler solid-state relay_MOS output U15 is connected to GND, and the fourth pin of the optocoupler solid-state relay_MOS output U15 is connected to Source5; the fifth pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_05, and the 12th pin of U8 is connected to Sig_Source_05n; The current direction switching switch circuit SW33 of the test source, the first pin of the optocoupler solid-state relay_MOS output U13 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U13 is connected to one end of the current limiting resistor R32, the other end of the current limiting resistor R32 is connected to Sig_Source_06n, the third pin of the optocoupler solid-state relay_MOS output U13 is connected to Source6, the fourth pin of the optocoupler solid-state relay_MOS output U13 is connected to Source4; the sixth pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_06, and the 11th pin of U8 is connected to Sig_Source_06n; The current direction switching switch circuit SW35 of the test source, the first pin of the optocoupler solid-state relay_MOS output U14 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U14 is connected to one end of the current limiting resistor R33, the other end of the current limiting resistor R33 is connected to Sig_Source_07n, the third pin of the optocoupler solid-state relay_MOS output U45 is connected to GND, the fourth pin of the optocoupler solid-state relay_MOS output U14 is connected to Source6; the seventh pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_07, and the tenth pin of U8 is connected to Sig_Source_07n; The first pin of the Darlington transistor array U8 is connected to the control unit 300Sig_Source_01, the second pin of U8 is connected to the control unit 300Sig_Source_02, the third pin of U8 is connected to the control unit 300Sig_Source_03, the fourth pin of U8 is connected to the control unit 300Sig_Source_04, the fifth pin of U8 is connected to the control unit 300Sig_Source_05, the sixth pin of U8 is connected to the control unit 300Sig_Source_06, the seventh pin of U8 is connected to the control unit 300Sig_Source_07, and the The 8th pin of U8 is connected to the control unit 300GND, the 9th pin of U8 is connected to the control unit 3005V, the 10th pin of U8 is connected to Sig_Source_07n, the 11th pin of U8 is connected to Sig_Source_06n, the 12th pin of U8 is connected to Sig_Source_05n, the 13th pin of U8 is connected to Sig_Source_04n, the 14th pin of U8 is connected to Sig_Source_03n, the 15th pin of U8 is connected to the control unit 300Sig_Source_02n, and the 16th pin of U8 is connected to Sig_Source_01n; One end of the current limiting resistor R23 of the current acquisition circuit of the 100mA level test power supply is connected to Source1, and the other end is connected to ADC1 of the control unit 300; one end of the filter capacitor C3 is connected to GND, and the other end is connected to ADC1 of the control unit 300; One end of the current limiting resistor R25 of the current acquisition circuit of the uA level test power supply is connected to Source2, and the other end is connected to VCC3; one end of the filter capacitor C5 is connected to VCC3, and the other end is connected to GND; the third pin of the operational amplifier U9A is connected to VCC3; the second pin of the operational amplifier U9A is connected to the first pin output VCC4, the fourth pin of the operational amplifier U9A is connected to GND, and the eighth pin of the operational amplifier U9A is connected to 5V; one end of the current limiting resistor R24 ​​is connected to VCC4, and the other end is connected to ADC2 of the control unit 300; one end of the filter capacitor C4 is connected to GND, and the other end is connected to ADC2 of the control unit 300; One end of the voltage-dividing and current-limiting resistor R28 of the current acquisition circuit of the TVS test power supply is connected to Source3, and the other end is connected to VCC6; one end of the voltage-dividing resistor R29 is connected to VCC6, and the other end is connected to GND; one end of the filter capacitor C7 is connected to VCC6, and the other end is connected to GND; the 5th pin of the operational amplifier U9A is connected to VCC6; the 6th pin of the operational amplifier U9A is connected to the 7th pin output VCC7; one end of the current-limiting resistor R27 is connected to VCC7, and the other end is connected to ADC3 of the control unit 300; one end of the filter capacitor C6 is connected to GND, and the other end is connected to ADC3 of the control unit 300.

[0032] Reference Figure 7-9 Further, in some embodiments of the present invention, the test source switching circuit 400 includes a test source switching switch circuit 410 and a test source current direction switching circuit 420, and the test source switching switch circuit 410 includes: A first test source switching switch, one end of the first test source switching switch is electrically connected to the other end of the first current limiting resistor; a fourth test source terminal electrically connected to the other end of the first test source switch; A second test source switching switch, one end of the second test source switching switch is electrically connected to the other end of the second current limiting resistor, and the other end of the second test source switching switch is electrically connected to the fourth test source end; A third test source switching switch, one end of the third test source switching switch is electrically connected to the other end of the third current limiting resistor, and the other end of the third test source switching switch is electrically connected to the fourth test source end; The test source current direction switching switch 420 includes: A first current direction switching switch, one end of the first current direction switching switch is electrically connected to the other end of the first test source switching switch; a second current direction switching switch, one end of the second current direction switching switch is electrically connected to the other end of the first current direction switching switch, and the other end of the second current direction switching switch is grounded; a fifth test source terminal electrically connected to the other end of the first current direction switching switch; a third current direction switching switch, one end of the third current direction switching switch being electrically connected to the other end of the second test source switching switch; a fourth current direction switching switch, one end of the fourth current direction switching switch is electrically connected to the other end of the third current direction switching switch, and the other end of the fourth current direction switching switch is grounded; The sixth test source terminal is electrically connected to the other end of the third current direction switching switch.

[0033] Specifically, in the first embodiment of the present embodiment, the switching circuit SW29 of the test source works as follows: Figure 7 As shown, it includes a switching circuit and a driving circuit thereof; the switching circuit includes an optocoupler solid-state relay_MOS output U7 and a current limiting resistor R18, the first pin of the optocoupler solid-state relay_MOS output U7 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U7 is connected to one end of the current limiting resistor R18, the other end of the current limiting resistor R18 is connected to Sig_Source_01n, the third pin of the optocoupler solid-state relay_MOS output U7 is connected to Source4, and the fourth pin of the optocoupler solid-state relay_MOS output U7 is connected to Source4. The pin is connected to Source1; the driving circuit includes a resistor R19, a resistor R20 and an N-channel MOS transistor Q9, one end of the resistor R19 is connected to the control unit 300Sig_Source_01, and the other end is the gate of the first pin G of the N-channel MOS transistor Q9; one end of the resistor R20 is connected to GND, and the other end is the gate of the first pin G of the N-channel MOS transistor Q9; the drain of the second pin D of the N-channel MOS transistor Q9 is connected to Sig_Source_01n; the source of the third pin S of the N-channel MOS transistor Q9 is connected to GND; In the second embodiment of the present embodiment, the switching circuit SW29 of the test source works as follows: Figure 8As shown, it includes a switching circuit and a driving circuit thereof; the first pin of the optocoupler phototransistor U7 of the switching circuit is connected to 5V, the second pin of the optocoupler phototransistor U7 is connected to one end of the current limiting resistor R18, the other end of the current limiting resistor R18 is connected to Sig_Source_01n, the third pin of the optocoupler phototransistor U7 is respectively connected to the anode of the voltage stabilizing diode D15, the anode of the voltage stabilizing diode D16, the third pin S source of the N-channel MOS tube Q10 and the third pin S source of the N-channel MOS tube Q11, the fourth pin of the optocoupler phototransistor U7 is respectively connected to one end of the resistor R21 and the resistor R22; the other end of the resistor R21 is respectively connected to the cathode of the voltage stabilizing diode D15 and the gate of the first pin G of the N-channel MOS tube Q10, and the N-channel MOS tube Q10 is respectively connected to the cathode of the voltage stabilizing diode D15 and the gate of the first pin G of the N-channel MOS tube Q10. The drain of the second pin D is connected to Source1; the other end of the resistor R22 is respectively connected to the cathode of the voltage stabilizing diode D16 and the gate of the first pin G of the N-channel MOS transistor Q11, and the drain of the second pin D of the N-channel MOS transistor Q11 is connected to Source4; the driving circuit includes a resistor R19, a resistor R20 and an N-channel MOS transistor Q9, one end of the resistor R19 is connected to the control unit 300Sig_Source_01, and the other end is the gate of the first pin G of the N-channel MOS transistor Q9; one end of the resistor R20 is connected to GND, and the other end is the gate of the first pin G of the N-channel MOS transistor Q9; the drain of the second pin D of the N-channel MOS transistor Q9 is connected to Sig_Source_01n; the source of the third pin S of the N-channel MOS transistor Q9 is connected to GND; The test source switching circuit driving circuit diagram is as follows Fig. 9As shown, the Darlington transistor array U8, such as TBD62003, etc.; the first pin of U8 is connected to the control unit 300Sig_Source_01, the second pin of U8 is connected to the control unit 300Sig_Source_02, the third pin of U8 is connected to the control unit 300Sig_Source_03, the fourth pin of U8 is connected to the control unit 300Sig_Source_04, the fifth pin of U8 is connected to the control unit 300Sig_Source_05, the sixth pin of U8 is connected to the control unit 300Sig_Source_06, and the seventh pin of U8 is connected to the control unit 300Sig _Source_07, the 8th pin of U8 is connected to GND, the 9th pin of U8 is connected to 5V, the 10th pin of U8 is connected to Sig_Source_07n, the 11th pin of U8 is connected to Sig_Source_06n, the 12th pin of U8 is connected to Sig_Source_05n, the 13th pin of U8 is connected to control unit 300Sig_Source_04n, the 14th pin of U8 is connected to Sig_Source_03n, the 15th pin of U8 is connected to Sig_Source_02n, and the 16th pin of U8 is connected to Sig_Source_01n; Figure 7 , Figure 8 The driving circuit of the switching circuit shown can be used Fig.10 The Darlington transistor array TBD62003 is used to drive the control; Figure 7 , Figure 8 The N-channel MOS transistor Q9 of the driving circuit of the switching circuit shown can be replaced by an NPN transistor; comprehensive Figure 6 , Figure 7 , Figure 8 and Fig. 9 , Figure 6 The schematic diagram of the detection circuit switching switches SW25, SW26, SW27, SW28, SW30, SW31, SW32, SW33, SW34, SW35, SW36, SW37, SW38, SW39, SW40, SW41, SW42 and SW43 is as follows Figure 7 , Figure 8 Detection circuit switching switch SW29 principle Figure 1 Sample.

[0034] Reference Figure 2-5 Further, in some embodiments of the present invention, the capacitor sorting test circuit board (also called the MLCC capacitor fast detection sorting switching circuit board 600) 600 includes: A plurality of switching units, each of which is provided with a plurality of switching switches; A plurality of first radio frequency coaxial connectors are electrically connected to the switching unit and are also used to be electrically connected to the detection end of the detection loop switching circuit; A plurality of output terminals are electrically connected to the switching unit, are electrically connected to the first radio frequency coaxial connector, and are also used to be electrically connected to the detection end of the detection loop switching circuit; The control interface terminal is electrically connected to the control end of the switching unit, and is also used to electrically connect to the detection circuit 810 of the control part of the tested circuit board and the driving circuit 820 of the control part of the tested circuit board.

[0035] Specifically, in this embodiment, the interface diagram of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 is as shown in FIG. Figure 2 As shown, the RF coaxial connectors are RF1, RF2, RF3, RF4, RF5, RF6, the output terminals are J1, J2, J3, J4, J5, J6, J7, J8, and the interface terminal of the control part is J9; The topological structure diagram of the MLCC capacitor rapid detection and sorting switching circuit board 600 is as follows Figure 3 As shown: The first pin of the RF coaxial connector RF1 is connected to Guard#1, and the second pin is connected to Guard#1; the first pin of the RF coaxial connector RF2 is connected to Pot#1, and the second pin is connected to Guard#1; the first pin of the RF coaxial connector RF3 is connected to Cur#1, and the second pin is connected to Guard#1; the first pin of the RF coaxial connector RF4 is connected to Cur#2, and the second pin is connected to Guard#2; the first pin of the RF coaxial connector RF5 is connected to Pot#2, and the second pin is connected to Guard#2; the first pin of the RF coaxial connector RF6 is connected to Guard#2, and the second pin is connected to Guard#2; The first pin of terminal J1 is connected to CH1, and the second pin is connected to Guard#1; the first pin of terminal J2 is connected to CH2, and the second pin is connected to Guard#1; the first pin of terminal J3 is connected to CH3, and the second pin is connected to Guard#1; the first pin of terminal J4 is connected to CH4, and the second pin is connected to Guard#1; the first pin of terminal J5 is connected to CH5, and the second pin is connected to Guard#2; the first pin of terminal J6 is connected to CH6, and the second pin is connected to Guard#2; the first pin of terminal J7 is connected to CH7, and the second pin is connected to Guard#2; the first pin of terminal J8 is connected to CH8, and the second pin is connected to Guard#2; The pins of terminal J9 are connected to Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, Sig_ch8n, 5V and GND1 respectively; The switching switches of the switching unit CH1 are SW1, SW2, and SW3, and the control signal thereof is Sig_ch1n; one end of SW1 is connected to Guard#1, and the other end is connected to CH1; one end of SW2 is connected to Pot#1, and the other end is connected to CH1; one end of SW3 is connected to Cur#1, and the other end is connected to CH1; The switching switches of the switching unit CH2 are SW4, SW5, and SW6, and their control signal is Sig_ch2n; one end of SW4 is connected to Guard#1, and the other end is connected to CH2; one end of SW5 is connected to Pot#1, and the other end is connected to CH2; one end of SW6 is connected to Cur#1, and the other end is connected to CH2; The switching switches of the switching unit CH3 are SW7, SW8, and SW9, and their control signal is Sig_ch3n; one end of SW7 is connected to Guard#1, and the other end is connected to CH3; one end of SW8 is connected to Pot#1, and the other end is connected to CH3; one end of SW9 is connected to Cur#1, and the other end is connected to CH3; The switching switches of the switching unit CH4 are SW10, SW11, and SW12, and their control signal is Sig_ch4n; one end of SW10 is connected to Guard#1, and the other end is connected to CH4; one end of SW11 is connected to Pot#1, and the other end is connected to CH4; one end of SW12 is connected to Cur#1, and the other end is connected to CH4; The switching switches of the switching unit CH5 are SW13, SW14, and SW15, and their control signal is Sig_ch5n; one end of SW13 is connected to Guard#2, and the other end is connected to CH5; one end of SW14 is connected to Pot#2, and the other end is connected to CH5; one end of SW15 is connected to Cur#2, and the other end is connected to CH5; The switching switches of the switching unit CH6 are SW16, SW17, and SW18, and their control signal is Sig_ch6n; one end of SW16 is connected to Guard#2, and the other end is connected to CH6; one end of SW17 is connected to Pot#2, and the other end is connected to CH6; one end of SW18 is connected to Cur#2, and the other end is connected to CH6; The switching switches of the switching unit CH7 are SW19, SW20, and SW21, and their control signal is Sig_ch7n; one end of SW19 is connected to Guard#2, and the other end is connected to CH7; one end of SW20 is connected to Pot#2, and the other end is connected to CH7; one end of SW21 is connected to Cur#2, and the other end is connected to CH7; The switching switches of the switching unit CH8 are SW22, SW23, and SW24, and the control signal thereof is Sig_ch8n; one end of SW22 is connected to Guard#2, and the other end is connected to CH8; one end of SW23 is connected to Pot#2, and the other end is connected to CH8; one end of SW24 is connected to Cur#2, and the other end is connected to CH8; One end of the clamping protection TVS diode D1 is connected to Guard#1, and the other end is connected to CH1; one end of the clamping protection TVS diode D2 is connected to Guard#1, and the other end is connected to CH2; one end of the clamping protection TVS diode D3 is connected to Guard#1, and the other end is connected to CH3; one end of the clamping protection TVS diode D4 is connected to Guard#1, and the other end is connected to CH4; one end of the clamping protection TVS diode D5 is connected to Guard#2, and the other end is connected to CH5; one end of the clamping protection TVS diode D6 is connected to Guard#6, and the other end is connected to CH6; one end of the clamping protection TVS diode D7 is connected to Guard#7, and the other end is connected to CH7; one end of the clamping protection TVS diode D8 is connected to Guard#8, and the other end is connected to CH8; Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 as shown in Example 1 Figure 4 As shown, it includes a switching unit CH1 switching switch SW1, a switching unit CH1 switching switch SW2, a switching unit CH1 switching switch SW3 and a clamping protection circuit; Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 Example 1 Switch switch SW1, the first pin of the optocoupler phototransistor U3 is connected to 5V, the second pin of the optocoupler phototransistor U3 is connected to one end of the current limiting resistor R5, the other end of the current limiting resistor R5 is connected to SHch1, the third pin of the optocoupler phototransistor U3 is respectively connected to the anode of the voltage zener diode D11, the anode of the voltage zener diode D14, the third pin S source of the N-channel MOS tube Q3 and the third pin S source of the N-channel MOS tube Q7, the fourth pin of the optocoupler phototransistor U3 is respectively connected to one end of the resistor R3 and the resistor R10; the other end of the resistor R3 is respectively connected to the cathode of the voltage zener diode D11 and the first pin of the N-channel MOS tube Q3 The gate of the first pin G of the N-channel MOS tube Q3 is connected, and the drain of the second pin D of the N-channel MOS tube Q3 is connected to Guard#1; the other end of the resistor R10 is respectively connected to the cathode of the voltage stabilizing diode D14 and the gate of the first pin G of the N-channel MOS tube Q7, and the drain of the second pin D of the N-channel MOS tube Q7 is connected to CH1; the reverse drive circuit includes a resistor R4, an N-channel MOS tube Q4 and a filter capacitor C1 to form a signal inverter; one end of the resistor R4 is connected to 5V, and the other end is connected to Sig_ch1n; one end of the filter capacitor C1 is connected to GND1, and the other end is connected to Sig_ch1n; the gate of the first pin G of the N-channel MOS tube Q4 is connected to Sig_ch1n, the drain of the second pin D is connected to SHch1, and the source of the third pin S is connected to GND1; Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test Example 1 Switch switch SW2, the first pin of the optocoupler phototransistor U2 is connected to 5V, the second pin of the optocoupler phototransistor U2 is connected to one end of the current limiting resistor R7, and the other end of the current limiting resistor R7 is connected to Sig_ch1n, and the third pin of the optocoupler phototransistor U2 is respectively connected to the anode of the Zener diode D10, the anode of the Zener diode D13, the third pin of the N-channel MOS tube Q2 S source and the N-channel MO The source of the third pin S of the S tube Q6 is connected together, and the fourth pin of the optocoupler phototransistor U2 is connected to one end of the resistor R2 and the resistor R9 respectively; the other end of the resistor R2 is connected to the cathode of the voltage stabilizing diode D10 and the gate of the first pin G of the N-channel MOS tube Q2 respectively, and the drain of the second pin D of the N-channel MOS tube Q2 is connected to Pot#1; the other end of the resistor R9 is connected to the cathode of the voltage stabilizing diode D13 and the gate of the first pin G of the N-channel MOS tube Q6 respectively, and the drain of the second pin D of the N-channel MOS tube Q6 is connected to CH1; Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test Example 1 Switching switch SW3, the first pin of the optocoupler phototransistor U1 is connected to 5V, the second pin of the optocoupler phototransistor U1 is connected to one end of the current limiting resistor R6, and the other end of the current limiting resistor R6 is connected to Sig_ch1n, and the third pin of the optocoupler phototransistor U1 is respectively connected to the anode of the Zener diode D9, the anode of the Zener diode D12, the third pin of the N-channel MOS tube Q1 S source and the N-channel MO The source of the third pin S of the S tube Q5 is connected together, and the fourth pin of the optocoupler phototransistor U1 is connected to one end of the resistor R1 and the resistor R8 respectively; the other end of the resistor R1 is connected to the cathode of the voltage stabilizing diode D9 and the gate of the first pin G of the N-channel MOS tube Q1 respectively, and the drain of the second pin D of the N-channel MOS tube Q1 is connected to Cur#1; the other end of the resistor R8 is connected to the cathode of the voltage stabilizing diode D12 and the gate of the first pin G of the N-channel MOS tube Q5 respectively, and the drain of the second pin D of the N-channel MOS tube Q5 is connected to CH1; Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 Example 1 One end of the clamping TVS diode D1 in the clamping protection circuit is connected to CH1, and the other end is connected to Guard#1; Detailed schematic diagram of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting switching circuit board 600, implementation 2 if any Figure 5 As shown, it includes a switching unit CH1 switching switch SW1, a switching unit CH1 switching switch SW2, a switching unit CH1 switching switch SW3 and a clamping protection circuit; Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 Example 2 Switching switch SW1, the first pin of the optocoupler solid-state relay_MOS output U6 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U6 is connected to one end of the current limiting resistor R12, the other end of the current limiting resistor R12 is connected to SHch1, the third pin of the optocoupler solid-state relay_MOS output U6 is connected to CH1, and the fourth pin of the optocoupler solid-state relay_MOS output U6 is connected to Guard#1; the reverse drive circuit includes a resistor R11, an N-channel MOS tube Q8 and a filter capacitor C2 to form a signal inverter; one end of the resistor R13 is connected to 5V, and the other end is connected to Sig_ch1n; one end of the filter capacitor C2 is connected to GND1, and the other end is connected to Sig_ch1n; the first pin G gate of the N-channel MOS tube Q13 is connected to Sig_ch1n, the second pin D drain is connected to SHch1, and the third pin S source is connected to GND1; Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 Example 2 Switching switch SW2, the first pin of the optocoupler solid-state relay_MOS output U5 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U5 is connected to one end of the current limiting resistor R14, the other end of the current limiting resistor R14 is connected to Sig_ch1n, the third pin of the optocoupler solid-state relay_MOS output U5 is connected to CH1, and the fourth pin of the optocoupler solid-state relay_MOS output U5 is connected to Pot#1; Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 Example 2 Switching switch SW3, the first pin of the optocoupler solid-state relay_MOS output U4 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U4 is connected to one end of the current limiting resistor R13, the other end of the current limiting resistor R13 is connected to Sig_ch1n, the third pin of the optocoupler solid-state relay_MOS output U4 is connected to CH1, and the fourth pin of the optocoupler solid-state relay_MOS output U4 is connected to Cur#1; Detailed schematic diagram of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 Example 2 One end of the clamping TVS diode D1 in the clamping protection circuit is connected to CH1, and the other end is connected to Guard#1; The detailed schematic diagrams of the switching units CH1, CH2, CH3, CH4, CH5, CH6, CH7 and CH8 in the topological structure diagram of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 are the same as those of Example 1 and Example 2 respectively; the corresponding control signals are Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n and Sig_ch8n respectively; Combining the above Figure 2 and Figure 3 The MLCC capacitor fast detection and sorting switching circuit board 600 under test is the detection target of the present invention, including the forward conduction impedance of the switch, the reverse conduction impedance of the switch, the insulation impedance of the switch, the forward conduction time of the switch, the direction off time of the switch and the performance test of the clamping TVS diode in the clamping protection circuit.

[0036] Reference Figure 1 and Figure 6Further, in some embodiments of the present invention, the detection loop switching circuit includes a first detection loop switching circuit 510 and a second detection loop switching circuit 520, and the first detection loop switching circuit 510 includes: A plurality of first detection switching switches, wherein a control end of the first detection switching switch is electrically connected to the control unit 300, and one end of the first detection switching switch is electrically connected to an output end of the test source switching circuit; A plurality of second RF coaxial connectors, one end of the second RF coaxial connector is electrically connected to the other end of the first detection switch, and the other end of the second RF coaxial connector is electrically connected to the first RF coaxial connector; The second detection loop switching circuit 520 includes: A plurality of second detection switching switches, wherein a control end of the second detection switching switch is electrically connected to the control unit 300, and one end of the second detection switching switch is electrically connected to an output end of the test source switching circuit; A plurality of connection terminals, one end of the connection terminal is electrically connected to the other end of the second detection switching switch, the other end of the connection terminal is electrically connected to the output terminal, and the connection terminal is also electrically connected to the second RF coaxial connector.

[0037] Specifically, in this embodiment, the topological structure diagram of the detection loop switching switch circuit 410 and the MLCC capacitor fast detection and sorting switching circuit board 600 is as shown in FIG. Figure 6 As shown: One end of the current limiting resistor R15 of test source 1 is connected to 3.3V, and the other end is connected to Source1; one end of the current limiting resistor R16 of test source 2 is connected to 3.3V, and the other end is connected to Source2; one end of the current limiting resistor R15 of test source 3 is connected to 15V, and the other end is connected to Source3; One end of the test source switching switch SW29 is connected to Source1, and the other end is connected to Source4; one end of the test source switching switch SW30 is connected to Source2, and the other end is connected to Source4; one end of the test source switching switch SW31 is connected to Source3, and the other end is connected to Source4; one end of the test source current direction switching switch SW32 is connected to Source4, and the other end is connected to Source5; one end of the test source current direction switching switch SW33 is connected to Source4, and the other end is connected to Source6; one end of the test source current direction switching switch SW34 is connected to Source5, and the other end is connected to GND; one end of the test source current direction switching switch SW34 is connected to Source6, and the other end is connected to GND; One end of the switch SW28 of the first detection loop switch circuit 510 is connected to Source5, and the other end is connected to Guard; One end of the switch SW27 of the first detection loop switch circuit 510 is connected to Source5, and the other end is respectively connected to the first pin of the RF coaxial connector RF8 and the first pin Cur of RF9, the second pin Guard of the RF coaxial connector RF8, and the second pin Guard of the RF coaxial connector RF9; One end of the switch SW26 of the first detection loop switch circuit 510 is connected to Source5, and the other end is respectively connected to the first pin of the RF coaxial connector RF7 and the first pin of RF10 Pot, the second pin of the RF coaxial connector RF7 Guard, and the second pin of the RF coaxial connector RF10 Guard; One end of the switch SW25 of the first detection loop switch circuit 510 is connected to Source6, and the other end is connected to Pot; A shielded coaxial cable is used to connect the RF coaxial connector RF7 of the first detection loop switching circuit 510 and the RF coaxial connector RF2 of the MLCC capacitor fast detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is respectively connected to the first pin of the RF coaxial connector RF7 and RF2, and the coaxial cable shielding net is respectively connected to the second pin of the RF coaxial connector RF7 and RF2; A shielded coaxial cable is used to connect the RF coaxial connector RF8 of the first detection loop switching circuit 510 and the RF coaxial connector RF3 of the MLCC capacitor fast detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is respectively connected to the first pin of the RF coaxial connector RF7 and RF2, and the coaxial cable shielding net is respectively connected to the second pin of the RF coaxial connector RF8 and RF3; A shielded coaxial cable is used to connect the RF coaxial connector RF9 of the first detection loop switching circuit 510 and the RF coaxial connector R4 of the MLCC capacitor fast detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is respectively connected to the first pin of the RF coaxial connector RF7 and RF2, and the coaxial cable shielding net is respectively connected to the second pin of the RF coaxial connector RF9 and RF4; A shielded coaxial cable is used to connect the RF coaxial connector RF10 of the first detection loop switching circuit 510 and the RF coaxial connector RF5 of the MLCC capacitor fast detection and sorting switching circuit board 600 under test, wherein the center line of the coaxial cable is respectively connected to the first pin of the RF coaxial connector RF7 and RF2, and the coaxial cable shielding net is respectively connected to the second pin of the RF coaxial connector RF10 and RF5; One end of the switch SW36 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH1' of the connection terminal J10, and the second pin of the connection terminal J10 is connected to Guard; One end of the switch SW37 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH2' of the connection terminal J11, and the second pin of the connection terminal J11 is connected to Guard; One end of the switch SW38 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH3' of the connection terminal J12, and the second pin of the connection terminal J12 is connected to Guard; One end of the switch SW39 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH4' of the connection terminal J13, and the second pin of the connection terminal J13 is connected to Guard; One end of the switch SW40 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH5' of the connection terminal J14, and the second pin of the connection terminal J14 is connected to Guard; One end of the switch SW41 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH6' of the wiring terminal J15, and the second pin of the wiring terminal J15 is connected to Guard; One end of the switch SW42 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH7' of the connection terminal J16, and the second pin of the connection terminal J16 is connected to Guard; One end of the switch SW43 of the second detection loop switch circuit 520 is connected to Source6, and the other end is connected to the first pin CH8' of the wiring terminal J17, and the second pin of the wiring terminal J17 is connected to Guard; A shielded coaxial cable is used to connect the connection terminal J10 of the second detection loop switching circuit 520 and the connection terminal J1 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J10 and J1, and the shielding net of the coaxial cable is respectively connected to the second pin of the connection terminal J10 and J1; A shielded coaxial cable is used to connect the connection terminal J11 of the second detection loop switching circuit 520 and the connection terminal J2 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J11 and J2, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J11 and J2; A shielded coaxial cable is used to connect the connection terminal J12 of the second detection loop switching circuit 520 and the connection terminal J3 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J12 and J3, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J12 and J3; A shielded coaxial cable is used to connect the connection terminal J13 of the second detection loop switching circuit 520 and the connection terminal J4 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J13 and J4, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J13 and J4; A shielded coaxial cable is used to connect the connection terminal J14 of the second detection loop switching circuit 520 and the connection terminal J5 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J14 and J5, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J14 and J5; A shielded coaxial cable is used to connect the connection terminal J15 of the second detection loop switching circuit 520 and the connection terminal J6 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J15 and J6, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J15 and J6; A shielded coaxial cable is used to connect the connection terminal J6 of the second detection loop switching circuit 520 and the connection terminal J7 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J16 and J7, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J16 and J7; A shielded coaxial cable is used to connect the connection terminal J17 of the second detection loop switching circuit 520 and the connection terminal J8 of the MLCC capacitor fast detection and sorting switching circuit board 600 to be tested, wherein the center line of the coaxial cable is respectively connected to the first pin of the connection terminal J17 and J8, and the coaxial cable shielding net is respectively connected to the second pin of the connection terminal J17 and J8; The control signals Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_chn, and Sig_ch8n of the switching unit of the MLCC capacitor fast detection and sorting switching circuit board 600 under test are connected to the wiring terminal J1 respectively. In the above detection loop switching circuit and the topological structure diagram of the tested MLCC capacitor rapid detection and sorting switching circuit board 600, Guard is connected to Guard#1 and Guard#2 respectively, Cur is connected to Cur#1 and Cur#2 respectively, Pot is connected to Pot#1 and Pot#2 respectively, CH1' is connected to CH1, CH2' is connected to CH2, CH3' is connected to CH3, CH4' is connected to CH4, CH5' is connected to CH5, CH6' is connected to CH6, CH7' is connected to CH7, and CH8' is connected to CH8.

[0038] Reference Fig.11 , further, in some embodiments of the present invention, the detection loop switching switch circuit also includes a first Darlington transistor array, one end of the first Darlington transistor is electrically connected to the control unit 300; the first detection switching switch includes a first optocoupler solid-state relay and a first current limiting resistor, the first optocoupler solid-state relay is electrically connected to the other end of the first Darlington transistor through the first current limiting resistor, the first optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the first optocoupler solid-state relay is also electrically connected to one end of the second RF coaxial connector; The detection loop switching switch circuit also includes a second Darlington transistor array, one end of the second Darlington transistor is electrically connected to the control unit 300; the second detection switching switch includes a second optocoupler solid-state relay and a second current limiting resistor, the second optocoupler solid-state relay is electrically connected to the other end of the second Darlington transistor through the second current limiting resistor, the second optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the second optocoupler solid-state relay is also electrically connected to one end of the wiring terminal.

[0039] Specifically, in this embodiment, the detailed schematic diagram of the detection loop switching circuit is as follows: Fig.11 As shown: The first detection loop switching switch circuit 510 switches the switch circuit SW25, the first pin of the optocoupler solid-state relay_MOS output U16 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U16 is connected to one end of the current limiting resistor R35, the other end of the current limiting resistor R35 is connected to Sig_Pot_01n, the third pin of the optocoupler solid-state relay_MOS output U16 is connected to Pot, and the fourth pin of the optocoupler solid-state relay_MOS output U16 is connected to Source6; the first pin of the Darlington transistor array U20 is connected to Sig_Pot_01 of the control unit 300, and the 16th pin of U20 is connected to Sig_Pot_01n of the switching switch; The first detection loop switching switch circuit 510 switches the switch circuit SW26, the first pin of the optocoupler solid-state relay_MOS output U17 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U17 is connected to one end of the current limiting resistor R36, the other end of the current limiting resistor R36 is connected to Sig_Pot_02n, the third pin of the optocoupler solid-state relay_MOS output U17 is connected to Pot, and the fourth pin of the optocoupler solid-state relay_MOS output U17 is connected to Source5; the second pin of the Darlington transistor array U20 is connected to Sig_Pot_02 of the control unit 300, and the 15th pin of U20 is connected to Sig_Pot_02n of the switching switch; The first detection loop switching switch circuit 510 switches the switch circuit SW27, the first pin of the optocoupler solid-state relay_MOS output U18 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U18 is connected to one end of the current limiting resistor R37, the other end of the current limiting resistor R37 is connected to Sig_Cur_01n, the third pin of the optocoupler solid-state relay_MOS output U18 is connected to Cur, and the fourth pin of the optocoupler solid-state relay_MOS output U18 is connected to Source5; the third pin of the Darlington transistor array U20 is connected to Sig_Cur of the control unit 300, and the 14th pin of U20 is connected to Sig_Cur_n of the switching switch; The first detection loop switching switch circuit 510 switches the switch circuit SW28, the first pin of the optocoupler solid-state relay_MOS output U19 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U19 is connected to one end of the current limiting resistor R38, the other end of the current limiting resistor R38 is connected to Sig_Pot_01n, the third pin of the optocoupler solid-state relay_MOS output U19 is connected to Guard, and the fourth pin of the optocoupler solid-state relay_MOS output U19 is connected to Source5; the fourth pin of the Darlington transistor array U20 is connected to Sig_Guard of the control unit 300, and the 13th pin of U20 is connected to Sig_Guard_n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW36, the first pin of the optocoupler solid-state relay_MOS output U21 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U21 is connected to one end of the current limiting resistor R39, the other end of the current limiting resistor R39 is connected to Sig_CH01n, the third pin of the optocoupler solid-state relay_MOS output U21 is connected to CH1', and the fourth pin of the optocoupler solid-state relay_MOS output U21 is connected to Source6; the fifth pin of the Darlington transistor array U20 is connected to Sig_CH01 of the control unit 300, and the 12th pin of U20 is connected to Sig_CH01n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW37, the first pin of the optocoupler solid-state relay_MOS output U22 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U22 is connected to one end of the current limiting resistor R40, the other end of the current limiting resistor R40 is connected to Sig_CH02n, the third pin of the optocoupler solid-state relay_MOS output U22 is connected to CH2', and the fourth pin of the optocoupler solid-state relay_MOS output U22 is connected to Source6; the first pin of the Darlington transistor array U25 is connected to Sig_CH02 of the control unit 300, and the 16th pin of U20 is connected to Sig_CH02n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW38, the first pin of the optocoupler solid-state relay_MOS output U23 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U23 is connected to one end of the current limiting resistor R41, the other end of the current limiting resistor R41 is connected to Sig_CH03n, the third pin of the optocoupler solid-state relay_MOS output U23 is connected to CH3', and the fourth pin of the optocoupler solid-state relay_MOS output U23 is connected to Source6; the second pin of the Darlington transistor array U25 is connected to Sig_CH03 of the control unit 300, and the 15th pin of U20 is connected to Sig_CH03n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW39, the first pin of the optocoupler solid-state relay_MOS output U24 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U24 is connected to one end of the current limiting resistor R42, the other end of the current limiting resistor R42 is connected to Sig_CH04n, the third pin of the optocoupler solid-state relay_MOS output U24 is connected to CH4', and the fourth pin of the optocoupler solid-state relay_MOS output U24 is connected to Source6; the third pin of the Darlington transistor array U25 is connected to Sig_CH04 of the control unit 300, and the 14th pin of U20 is connected to Sig_CH04n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW40, the first pin of the optocoupler solid-state relay_MOS output U26 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U26 is connected to one end of the current limiting resistor R43, the other end of the current limiting resistor R43 is connected to Sig_CH05n, the third pin of the optocoupler solid-state relay_MOS output U26 is connected to CH5', the fourth pin of the optocoupler solid-state relay_MOS output U26 is connected to Source6; the fourth pin of the Darlington transistor array U25 is connected to Sig_CH05 of the control unit 300, and the 13th pin of U20 is connected to Sig_CH05n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW41, the first pin of the optocoupler solid-state relay_MOS output U27 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U27 is connected to one end of the current limiting resistor R44, the other end of the current limiting resistor R44 is connected to Sig_CH06n, the third pin of the optocoupler solid-state relay_MOS output U27 is connected to CH6', and the fourth pin of the optocoupler solid-state relay_MOS output U27 is connected to Source6; the fifth pin of the Darlington transistor array U25 is connected to Sig_CH06 of the control unit 300, and the 12th pin of U20 is connected to Sig_CH06n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW42, the first pin of the optocoupler solid-state relay_MOS output U28 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U28 is connected to one end of the current limiting resistor R45, the other end of the current limiting resistor R45 is connected to Sig_CH07n, the third pin of the optocoupler solid-state relay_MOS output U28 is connected to CH7', and the fourth pin of the optocoupler solid-state relay_MOS output U28 is connected to Source6; the sixth pin of the Darlington transistor array U25 is connected to Sig_CH07 of the control unit 300, and the 11th pin of U20 is connected to Sig_CH07n of the switching switch; The second detection loop switching switch circuit 520 switches the switch circuit SW43, the first pin of the optocoupler solid-state relay_MOS output U29 is connected to 5V, the second pin of the optocoupler solid-state relay_MOS output U29 is connected to one end of the current limiting resistor R46, the other end of the current limiting resistor R46 is connected to Sig_CH08n, the third pin of the optocoupler solid-state relay_MOS output U29 is connected to CH8', and the fourth pin of the optocoupler solid-state relay_MOS output U29 is connected to Source6; the seventh pin of the Darlington transistor array U25 is connected to Sig_CH08 of the control unit 300, and the tenth pin of U20 is connected to Sig_CH08n of the switching switch; The 6th, 7th and 8th pins of the Darlington transistor array U20 are connected to GND, and the 9th pin is connected to 5V; the 8th pin of the Darlington transistor array U20 is connected to GND, and the 9th pin is connected to 5V.

[0040] Reference Fig.12 Further, in some embodiments of the present invention, the detection loop differential sampling circuit 700 includes: The first analog switch is electrically connected to the control unit 300 and is also electrically connected to the first detection loop switching circuit 510; A first current limiting resistor, one end of which is electrically connected to the first analog switch; The second analog switch is electrically connected to the control unit 300 and is also electrically connected to the second detection loop switching circuit 520; A second current limiting resistor, one end of which is electrically connected to the second analog switch; The third analog switch is electrically connected to the control unit 300, is also electrically connected to the second detection loop switching circuit 520, and is also electrically connected to one end of the second current limiting resistor; A first differential amplifier circuit, wherein an input end of the first differential amplifier circuit is electrically connected to the other end of the first current limiting resistor, and an output end of the first differential amplifier circuit is electrically connected to the control unit 300; A second differential amplifier circuit, wherein an input end of the second differential amplifier circuit is electrically connected to the other end of the second current limiting resistor, and an output end of the second differential amplifier circuit is electrically connected to the control unit 300 .

[0041] Specifically, in this embodiment, the detection loop differential sampling circuit schematic diagram is as follows: Fig.12 As shown, The 11th pin of the analog switch U30 is connected to the HSig_CD4051_A of the control unit 300, the 10th pin is connected to the HSig_CD4051_B of the control unit 300, the 9th pin is connected to the HSig_CD4051_C of the control unit 300, the 6th, 7th and 8th pins are connected to GND, the 16th pin is connected to 15V, the 13th pin is connected to the first detection loop switching circuit 510Cur, the 14th pin is connected to the first detection loop switching circuit 510Pot, the 15th pin is connected to the first detection loop switching circuit 510Guard, and the 3rd pin is connected to one end of the current limiting resistor R47; The 11th pin of the analog switch U31 is connected to the LSig_CD4051_A1 of the control unit 300, the 10th pin is connected to the LSig_CD4051_B1 of the control unit 300, the 9th pin is connected to the LSig_CD4051_C1 of the control unit 300, the 6th, 7th and 8th pins are connected to GND, the 16th pin is connected to 15V, the 13th pin is connected to the second detection circuit switching switch circuit 520CH1', the 14th pin is connected to the second detection circuit switching switch circuit 520CH2', the 15th pin is connected to the second detection circuit switching switch circuit 520CH3', the 12th pin is connected to the second detection circuit switching switch circuit 520CH4', the 1st pin is connected to the first detection circuit switching switch circuit 510Pot, and the 3rd pin is connected to one end of the current limiting resistor R48; The 11th pin of the analog switch U32 is connected to the LSig_CD4051_A2 of the control unit 300, the 10th pin is connected to the LSig_CD4051_B2 of the control unit 300, the 9th pin is connected to the LSig_CD4051_C2 of the control unit 300, the 6th, 7th and 8th pins are connected to GND, the 16th pin is connected to 15V, the 13th pin is connected to the second detection circuit switching switch circuit 520CH5', the 14th pin is connected to the second detection circuit switching switch circuit 520CH6', the 15th pin is connected to the second detection circuit switching switch circuit 520CH7', the 12th pin is connected to the second detection circuit switching switch circuit 520CH8', and the 3rd pin is connected to one end of the current limiting resistor R48; The other end of the current limiting resistor R47 is connected to VCC8; one end of the filter capacitor C8 is connected to VCC8, and the other end is connected to GND; the third pin of the follower U33A is connected to VCC8, the second pin is connected to the first pin VCC10, the fourth pin is connected to GND, and the eighth pin is connected to 5V; The other end of the current limiting resistor R48 is connected to VCC9; one end of the filter capacitor C9 is connected to VCC9, and the other end is connected to GND; the 5th pin of the follower U33B is connected to VCC9, and the 6th pin is connected to the 7th pin VCC11; The differential amplifier circuit (I) includes resistors R49, R50, R55, R53, R57, a filter capacitor C10 and an operational amplifier U34A; one end of the resistor R49 is connected to VCC11, and the other end is connected to VCC12; one end of the resistor R50 is connected to VCC10, and the other end is connected to VCC13; one end of the resistor R55 is connected to VCC12, and the other end is connected to VCC16; one end of the resistor R53 is connected to VCC13, and the other end is connected to GND; the non-inverting input end of the operational amplifier pin 3 is connected to VCC13, the reverse input end of the pin 2 is connected to VCC12, the output end of the pin 1 is connected to VCC16, the pin 4 is connected to GND, and the pin 8 is connected to 5V; one end of the resistor R57 is connected to VCC16, and the other end is connected to ADC4 of the control unit 300; one end of the filter capacitor C10 is connected to GND, and the other end is connected to ADC4 of the control unit 300; The differential amplifier circuit (II) includes resistors R51, R52, R56, R54, R58, a filter capacitor C11 and an operational amplifier U34B; one end of the resistor R51 is connected to VCC10, and the other end is connected to VCC14; one end of the resistor R52 is connected to VCC11, and the other end is connected to VCC15; one end of the resistor R56 is connected to VCC14, and the other end is connected to VCC17; one end of the resistor R54 is connected to VCC15, and the other end is connected to GND; the non-inverting input end of the operational amplifier pin 5 is connected to VCC15, the reverse input end of the pin 6 is connected to VCC14, and the output end of the pin 7 is connected to VCC17; one end of the resistor R58 is connected to VCC17, and the other end is connected to ADC5 of the control unit 300; one end of the filter capacitor C11 is connected to GND, and the other end is connected to ADC5 of the control unit 300.

[0042] Reference Fig.13 Further, in some embodiments of the present invention, the control part detection circuit 810 of the tested circuit board includes: A fourth analog switch is electrically connected to the control unit 300 and is also electrically connected to the capacitor sorting test circuit board under test; A voltage-dividing resistor, one end of which is electrically connected to the control unit 300, and the other end of which is electrically connected to the fourth analog switch; The amplifier circuit is electrically connected to the control unit 300 .

[0043] Reference Fig.13 Further, in some embodiments of the present invention, the driving circuit 820 of the control part of the tested circuit board includes: MOS tube, the gate of the MOS tube is electrically connected to the control unit 300, the drain of the MOS tube is electrically connected to the capacitor sorting test circuit board under test, and the source of the MOS tube is grounded.

[0044] The detailed schematic diagram of the detection circuit of the control part of the MLCC capacitor rapid detection and sorting switching circuit board 600 is as follows Fig.13 As shown, the 11th pin of the analog switch U35 is connected to the K_CD4051_A of the control unit 300, the 10th pin of the analog switch U35 is connected to the K_CD4051_B of the control unit 300, the 9th pin of the analog switch U35 is connected to the K_CD4051_C of the control unit 300, the 6th, 7th and 8th pins of the analog switch U35 are connected to GND, the 16th pin of the analog switch U35 is connected to 5V, the 13th pin of the analog switch U35 is connected to the 1st pin Sig_ch1n of the control terminal J9 of the tested board, the 14th pin of the analog switch U35 is connected to the 2nd pin Sig_ch2n of the control terminal J9 of the tested board, the 15th pin of the analog switch U35 is connected to the 3rd pin Sig_ch3n of the control terminal J9 of the tested board, the 12th pin of the analog switch U35 is connected to the 4th pin Sig_ch4n of the control terminal J9 of the tested board, and the 15th pin of the analog switch U35 is connected to the 3rd pin Sig_ch4n of the control terminal J9 of the tested board. The first pin of the analog switch U35 is connected to the fifth pin Sig_ch5n of the control terminal J9 of the tested board, the second pin of the analog switch U35 is connected to the sixth pin Sig_ch6n of the control terminal J9 of the tested board, the third pin of the analog switch U35 is connected to the seventh pin Sig_ch7n of the control terminal J9 of the tested board, the fourth pin of the analog switch U35 is connected to the eighth pin Sig_ch8n of the control terminal J9 of the tested board, the ninth pin of the control terminal J9 of the tested board is connected to 5V, and the tenth pin of the control terminal J9 of the tested board is connected to GND1; the third pin of the analog switch U35 is connected to one end of the voltage-dividing resistor R62, and the other end of the voltage-dividing resistor R62 is connected to ADC6 of the control unit 300; one end of the voltage-dividing resistor R60 is connected to ADC6 of the control unit 300, and the other end is connected to GND; one end of the filter capacitor C12 is connected to ADC6 of the control unit 300, and the other end is connected to GND; The amplification circuit includes resistors R64, R66, R675, a filter capacitor C13 and an operational amplifier U36A; one end of the resistor R64 is connected to VCC22, and the other end is connected to GND; one end of the resistor R66 is connected to VCC22, and the other end is connected to VCC23; the same-direction input end of the third pin of the operational amplifier U36A is connected to GND1, the reverse input end of the second pin is connected to VCC22, the output end of the first pin is connected to VCC23, the fourth pin is connected to GND, and the eighth pin is connected to 5V; one end of the resistor R67 is connected to VCC23, and the other end is connected to ADC7 of the control unit 300; one end of the filter capacitor C13 is connected to GND, and the other end is connected to ADC7 of the control unit 300; one end of the current sampling resistor R65 is connected to GND, and the other end is connected to GND1; The switching unit CH1 driving circuit of the tested MLCC capacitor fast detection and sorting switching circuit board 600 includes resistors R59, R61, R63 and N-channel MOS transistor Q12, one end of the resistor R59 is connected to the control unit 300 Sig_ch1, and the other end is connected to the first pin G gate of the N-channel MOS transistor Q12; one end of the resistor R61 is connected to GND, and the other end is connected to the first pin G gate of the N-channel MOS transistor Q12; one end of the resistor R63 is connected to the switching unit CH1 control signal Sig_ch1n, and the other end is connected to the second pin D drain of the N-channel MOS transistor Q9; the third pin S source of the N-channel MOS transistor Q9 is connected to GND; The driving circuits of switching unit CH2, switching unit CH3, switching unit CH4, switching unit CH5, switching unit CH6, switching unit CH7 and switching unit CH8 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 are the same as those of switching unit CH1, and the signals connected to the control unit 300 are Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7 and Sig_ch8 respectively.

[0045] The above is a detailed circuit principle description of the detection circuit for capacitor sorting and testing circuit board according to the embodiment of the present invention. On the basis of the above circuit structure, more specifically, when the detection circuit for capacitor sorting and testing circuit board according to the embodiment of the present invention is used, the detailed working principle and detection steps when performing the detection work are as follows: The working principle of the detection loop differential sampling circuit 700 is as follows: Since operational amplifiers U33A and U33B are follower circuits, VCC8=VCC10 (1), VCC9=VCC11 (2); According to the "virtual short" working principle of operational amplifiers U34A and U34B, VCC12=VCC13 (3), VCC14=VCC15 (4);

[0046]

[0047]

[0048]

[0049] From the above equations (1), (2), (3), (5) and (6), we can get

[0050] From the above equations (1), (2), (4), (7) and (8), we can get

[0051] In the design of the present invention, R49=R50=R51=R52, R53=R54=R55=R56, then Formula (9) can be simplified as

[0052] Formula (10) can be simplified as

[0053] When VCC8>VCC9, the control unit 300 selects ADC4 to collect measurement data, that is, VCC16 is the test voltage collected by ADC4; When VCC8<VCC9, the control unit 300 selects ADC5 to collect measurement data, that is, VCC17 is the test voltage collected by ADC4; The detection principle of the switch on-resistance, on-time and off-time of the switching circuit board 600 for the quick detection and sorting of the tested MLCC capacitor is described in detail by taking SW1, SW2 and SW3 of the switching unit CH1 as an example: ①Select 100mA level to test the power switch principle The control unit 300 outputs Sig_Source_01 at a high level, the third and fourth pins of the optocoupler solid-state relay_MOS output U7 are connected, and the switching circuit SW29 of the test source corresponding to the topology diagram is turned on; The control unit 300 outputs Sig_Source_02 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U10 are cut off, and the switching circuit SW30 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U11 are cut off, and the switching circuit SW31 of the test source corresponding to the topology diagram is disconnected; From the above, the test source Source4 is equal to Source1; ②Select uA level to test the power switch principle The control unit 300 outputs Sig_Source_01 as a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U7 are cut off, and the switching circuit SW29 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_02 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay_MOS output U10 are connected, and the switching circuit SW30 of the test source corresponding to the topology diagram is turned on; The control unit 300 outputs Sig_Source_03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U11 are cut off, and the switching circuit SW31 of the test source corresponding to the topology diagram is disconnected; From the above, the test source Source4 is equal to Source2; ③Select TVS to test the principle of power switching The control unit 300 outputs Sig_Source_01 as a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U7 are cut off, and the switching circuit SW29 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_02 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U10 are cut off, and the switching circuit SW30 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_03 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay_MOS output U11 are connected, and the switching circuit SW31 of the test source corresponding to the topology diagram is turned on; From the above, the test source Source4 is equal to Source2; ④Test the principle of power supply current forward conduction switching and the control unit 300ADC differential data acquisition selection The control unit 300 outputs Sig_Source_04 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay_MOS output U12 are connected, and the current direction switching switch circuit SW32 of the test source corresponding to the topology diagram is turned on; The control unit 300 outputs Sig_Source_05 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U15 are cut off, and the current direction switching switch circuit SW34 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_06 as a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U13 are cut off, and the current direction switching switch circuit SW33 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_07 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay_MOS output U14 are connected, and the current direction switching switch circuit SW34 of the test source corresponding to the topology diagram is turned on; In summary, ① and ④, the current direction is 3.3V→Source1→Source5→the switch of the MLCC capacitor rapid detection and sorting switching circuit board 600→Source6→GND; the control unit 300 selects ADC4 to collect measurement data; ⑤ Test power supply current reverse conduction switch principle control unit 300ADC differential data acquisition selection The control unit 300 outputs Sig_Source_04 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U12 are cut off, and the current direction switching switch circuit SW32 of the test source corresponding to the topology diagram is disconnected; The control unit 300 outputs Sig_Source_05 at a high level, the third and fourth pins of the optocoupler solid-state relay_MOS output U15 are connected, and the current direction switching switch circuit SW34 of the test source corresponding to the topology diagram is turned on; The control unit 300 outputs Sig_Source_06 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay_MOS output U13 are connected, and the current direction switching switch circuit SW33 of the test source corresponding to the topology diagram is turned on; The control unit 300 outputs Sig_Source_07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U14 are cut off, and the current direction switching switch circuit SW34 of the test source corresponding to the topology diagram is disconnected; In summary, ① and ⑤, the current direction is 3.3V→Source1→Source6→the switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test→Source5→GND; the control unit 300 selects ADC5 to collect measurement data; ⑥ First detection circuit switching switch circuit 510Guard switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_Pot_01 as a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U16 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW25 is disconnected; The control unit 300 outputs Sig_Pot_02 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U17 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW26 is disconnected; The control unit 300 outputs Sig_Cur at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U18 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW27 in the topology diagram is disconnected; The control unit 300 outputs Sig_Guard as a high level, the third pin and the fourth pin of the optocoupler solid-state relay _MOS output U19 are connected, and the corresponding first detection loop switching circuit 510 switching switch circuit SW28 in the topology diagram is turned on; ⑦ Principle diagram of the first detection circuit switching switch circuit 510Pot switching switch conduction circuit The control unit 300 outputs Sig_Pot_01 as a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U16 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW25 is disconnected; The control unit 300 outputs Sig_Pot_02 at a high level, and the third and fourth pins of the optocoupler solid-state relay_MOS output U17 are connected, and the corresponding first detection loop switching circuit 510 switching switch circuit SW26 in the topology diagram is turned on; The control unit 300 outputs Sig_Cur at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U18 are cut off, and the corresponding first detection loop switching circuit 510 switching switch circuit SW27 in the topology diagram is disconnected; The control unit 300 outputs Sig_Guard as a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U19 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW28 is disconnected; ⑧ First detection circuit switching switch circuit 510Cur switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_Pot_01 as a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U16 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW25 is disconnected; The control unit 300 outputs Sig_Pot_02 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U17 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW26 is disconnected; The control unit 300 outputs Sig_Cur at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U18 are connected, and the corresponding first detection loop switching circuit 510 switching switch circuit SW27 in the topology diagram is turned on; The control unit 300 outputs Sig_Guard as a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U19 are cut off, and the corresponding topology diagram first detection loop switching circuit 510 switching switch circuit SW28 is disconnected; ⑨ Schematic diagram of the switching circuit of the second detection circuit 520CH1' switching switch conduction circuit The control unit 300 outputs Sig_CH01 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay _MOS output U21 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is turned on; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW43 is disconnected; ⑩ Schematic diagram of the switching circuit of the second detection circuit 520CH2' switching switch conduction circuit The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is turned on; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW43 is disconnected; ⑪ Schematic diagram of the switching circuit of the second detection circuit 520CH3' switching switch conduction circuit The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is turned on; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topological structure diagram of the second detection loop switching circuit 520 switching switch circuit SW43 is disconnected. ⑫ The second detection circuit switching circuit 520CH4' switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is turned on; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topological structure diagram of the second detection loop switching circuit 520 switching switch circuit SW43 is disconnected. ⑬ The second detection circuit switching circuit 520CH5' switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is turned on; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topological structure diagram of the second detection loop switching circuit 520 switching switch circuit SW43 is disconnected. ⑭ The second detection circuit switching circuit 520CH6' switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay _MOS output U27 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is turned off; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topological structure diagram of the second detection loop switching circuit 520 switching switch circuit SW43 is disconnected. ⑮ The second detection circuit switching switch circuit 520CH7' switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is turned on; The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topological structure diagram of the second detection loop switching circuit 520 switching switch circuit SW43 is disconnected. ⑯ The second detection circuit switching circuit 520CH8' switching switch conduction circuit schematic diagram The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are connected, and the corresponding topology diagram second detection loop switching circuit 520 switching switch circuit SW43 is turned on. ⑰ Schematic diagram of the second detection circuit switching switch circuit 520 where all switches are disconnected The control unit 300 outputs Sig_CH01 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U21 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH02 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH03 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U23 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW38 is disconnected; The control unit 300 outputs Sig_CH04 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH05 at a low level, the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are cut off, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH06 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U27 are cut off, and the corresponding second detection loop switching circuit 520 switching circuit SW41 in the topology diagram is disconnected; The control unit 300 outputs Sig_CH07 at a low level, the 3rd and 4th pins of the optocoupler solid-state relay _MOS output U28 are cut off, and the corresponding topology diagram second detection loop switching circuit 520 switching circuit SW42 is disconnected; The control unit 300 outputs Sig_CH08 at a low level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are cut off, and the corresponding topological structure diagram of the second detection loop switching circuit 520 switching switch circuit SW43 is disconnected. ⑱ The second detection circuit switching switch circuit 520 is fully switched on and turned on. Open circuit schematic diagram The control unit 300 outputs Sig_CH01 at a high level, the third pin and the fourth pin of the optocoupler solid-state relay _MOS output U21 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW36 in the topology diagram is turned on; The control unit 300 outputs Sig_CH02 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U22 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW37 in the topology diagram is turned on; The control unit 300 outputs Sig_CH03 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U23 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW38 in the topology diagram is turned on; The control unit 300 outputs Sig_CH04 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U24 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW39 in the topology diagram is turned on; The control unit 300 outputs Sig_CH05 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U26 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW40 in the topology diagram is turned on; The control unit 300 outputs Sig_CH06 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U27 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW41 in the topology diagram is turned on; The control unit 300 outputs Sig_CH07 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U28 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW42 in the topology diagram is turned on; The control unit 300 outputs Sig_CH08 at a high level, and the third and fourth pins of the optocoupler solid-state relay _MOS output U29 are connected, and the corresponding second detection loop switching circuit 520 switching switch circuit SW43 in the topology diagram is turned on; The steps for detecting the forward conduction impedance of the switching unit CH1 switch SW1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; Select ①, ④, ⑥ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source5→Guard→Guard#1→SW1→CH1→CH1'→Source6→GND; ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing into the switch SW1 of the switching unit CH1 in the forward direction as Isw1=(3.3V-VCC1) / R15 (13); The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; VCC8 is the voltage at the upper end of the forward impedance Z1 of SW1, and VCC9 is the voltage at the lower end of the forward impedance Z1 of SW1; The control unit 300 selects ADC4 to collect measurement data VCC16; The control unit 300 calculates the forward conduction impedance of SW1 according to the volt-ampere characteristic and equations (11) and (13):

[0054] Upload SW1 forward conduction impedance to the host computer or display screen; The reverse conduction impedance detection steps of the switching unit CH1 switch SW1 of the MLCC capacitor under test fast detection and sorting switching circuit board 600 are as follows: The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; Select ①, ⑤, ⑥ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source6→CH1'→CH1→SW1→Guard#1→Guard→Source5→GND; ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing in the reverse direction into the switch SW1 of the switching unit CH1 as Isw1'=(3.3V-VCC1) / R15 (15); The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; VCC8 is the voltage at the upper end of the reverse conduction impedance Z1' of SW1, and VCC9 is the voltage at the lower end of the reverse conduction impedance Z1' of SW1; The control unit 300 selects ADC5 to collect measurement data VCC17; The control unit 300 calculates the reverse conduction impedance of SW1 according to the volt-ampere characteristic and equations (12) and (15):

[0055] Upload SW1 forward conduction impedance to the host computer or display screen; The steps for detecting the forward conduction impedance of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Select ①, ④, ⑦ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source5→Pot→Pot#1→SW2→CH1→CH1'→Source6→GND; ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing into the switch SW2 of the switching unit CH1 in the forward direction as Isw2=(3.3V-VCC1) / R15 (17); The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; VCC8 is the voltage at the upper end of the forward conduction impedance Z2 of SW2, and VCC9 is the voltage at the lower end of the forward conduction impedance Z2 of SW2; The control unit 300 selects ADC4 to collect measurement data VCC16; The control unit 300 calculates the forward conduction impedance of SW2 according to the volt-ampere characteristic and equations (11) and (17):

[0056] Upload SW1 forward conduction impedance to the host computer or display screen; The reverse conduction impedance detection steps of the switching unit CH1 switch SW2 of the MLCC capacitor under test for rapid detection and sorting switching circuit board 600 are as follows: The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Select ①, ⑤, ⑦ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source6→CH1'→CH1→SW2→Pot#1→Pot→Source5→GND; ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing in the reverse direction into the switch SW2 of the switching unit CH1 as Isw2'=(3.3V-VCC1) / R15 (19); The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; VCC8 is the voltage at the upper end of the reverse conduction impedance Z2' of SW2, and VCC9 is the voltage at the lower end of the reverse conduction impedance Z2' of SW2; The control unit 300 selects ADC4 to collect measurement data VCC16; The control unit 300 calculates the reverse conduction impedance of SW2 according to the volt-ampere characteristic and equations (12) and (19):

[0057] Upload SW2 reverse conduction impedance to the host computer or display screen; The steps for detecting the forward conduction impedance of the switch SW3 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Select ①, ④, ⑧ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source5→Cur→Cur#1→SW3→CH1→CH1'→Source6→GND; ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing into the switch SW3 of the switching unit CH1 in the forward direction as Isw3=(3.3V-VCC1) / R15 (21); The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; VCC8 is the voltage at the upper end of the forward conduction impedance Z3 of SW3, and VCC9 is the voltage at the lower end of the forward conduction impedance Z3 of SW3; The control unit 300 selects ADC4 to collect measurement data VCC16; The control unit 300 calculates the forward conduction impedance of SW3 according to the volt-ampere characteristic and equations (11) and (21):

[0058] Upload SW1 forward conduction impedance to the host computer or display screen; The reverse conduction impedance detection steps of the switching unit CH1 switch SW3 of the MLCC capacitor under test for rapid detection and sorting switching circuit board 600 are as follows: The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Select ①, ⑤, ⑧ and ⑨ above, the current direction is 3.3V→Source1→Source4→Source6→CH1'→CH1→SW3→Cur#1→Cur→Source5→GND; ADC1 of the control unit 300 collects the voltage VCC1 of Source1, thereby obtaining the current flowing in the reverse direction into the switch SW3 of the switching unit CH1 as Isw3'=(3.3V-VCC1) / R15 (23); The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; VCC8 is the voltage at the upper end of the reverse conduction impedance Z3' of SW3, and VCC9 is the voltage at the lower end of the reverse conduction impedance Z3' of SW3; The control unit 300 selects ADC4 to collect measurement data VCC16; The control unit 300 calculates the reverse conduction impedance of SW3 according to the volt-ampere characteristic and equations (12) and (23):

[0059] Upload SW2 reverse conduction impedance to the host computer or display screen; The steps for detecting the forward conduction time of the switch SW1 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ④, ⑥ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level. When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW1 forward conduction timing. Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage and become output drive voltage, and the N-channel MOS tubes Q3 and Q7 are turned from cut-off to on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned from off to on; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q2 and Q6 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned from on to off; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q1 and Q5 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned from on to off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram from on to off; Current direction 3.3V→Source1→Source4→Source5→Guard→Guard#1→SW1→CH1→CH1'→Source6→GND; VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level, and the forward conduction timing of SW1 of the control unit 300 ends. The control unit 300 counts the forward conduction time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the reverse conduction time of the switch SW1 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ⑤, ⑥ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a high level. When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW1 reverse conduction timing. Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage and become output drive voltage, and the N-channel MOS tubes Q3 and Q7 are turned from cut-off to on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned from off to on; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q2 and Q6 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned from on to off; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q1 and Q5 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned from on to off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram from on to off; Current direction: 3.3V→Source1→Source4→Source6→CH1'→CH1→SW1→Guard#1→Guard→Source5→GND; VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level, and the reverse conduction timing of SW1 of the control unit 300 ends. The control unit 300 counts the reverse conduction time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the forward conduction time of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ④, ⑦ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level. When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the forward conduction timing of SW2. Figure 4The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS tubes Q3 and Q7 change from on to off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram changes from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS tubes Q2 and Q6 change from off to on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram changes from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS tubes Q1 and Q5 change from off to on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram changes from off to on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram being turned off and on; Current direction 3.3V→Source1→Source4→Source5→Pot→Pot#1→SW2→CH1→CH1'→Source6→GND; VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level, and the forward conduction timing of SW2 of the control unit 300 ends. The control unit 300 counts the forward conduction time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the reverse conduction time of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ⑤, ⑦ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a high level. When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts SW2 reverse conduction timing. Figure 4The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS tubes Q3 and Q7 change from on to off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram changes from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS tubes Q2 and Q6 change from off to on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram changes from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS tubes Q1 and Q5 change from off to on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram changes from off to on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram being turned off and on; Current direction 3.3V→Source1→Source4→Source6→CH1'→CH1→SW2→Pot#1→Pot→Source5→GND; VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level, and the reverse conduction timing of SW2 of the control unit 300 ends. The control unit 300 counts the reverse conduction time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the forward conduction time of the switch SW3 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ④, ⑧ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level. When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the forward conduction timing of SW3. Figure 4The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS tubes Q3 and Q7 change from on to off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram changes from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS tubes Q2 and Q6 change from off to on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram changes from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS tubes Q1 and Q5 change from off to on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram changes from off to on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram being turned off and on; Current direction 3.3V→Source1→Source4→Source5→Cur→Cur#1→SW3→CH1→CH1'→Source6→GND; VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level, and the forward conduction timing of SW3 of the control unit 300 ends. The control unit 300 counts the forward conduction time of SW3 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the reverse conduction time of the switch SW3 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ⑤, ⑧ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a high level. When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the reverse conduction timing of SW3. Figure 4The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS tubes Q3 and Q7 change from on to off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram changes from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS tubes Q2 and Q6 change from off to on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram changes from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS tubes Q1 and Q5 change from off to on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram changes from off to on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram being turned off and on; Current direction 3.3V→Source1→Source4→Source6→CH1'→CH1→SW3→Cur#1→Cur→Source5→GND; VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level, and the reverse conduction timing of SW3 of the control unit 300 ends. The control unit 300 counts the reverse conduction time of SW3 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the forward turn-off time of the switch SW1 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ④, ⑥ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; Current direction 3.3V→Source1→Source4→Source5→Guard→Guard#1→SW1→CH1→CH1'→Source6→GND; VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level. When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the forward shutdown timing of SW1. Figure 4The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS tubes Q3 and Q7 change from on to off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram changes from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS tubes Q2 and Q6 change from off to on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram changes from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS tubes Q1 and Q5 change from off to on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram changes from off to on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram being turned off and on; VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level, and the forward shutdown timing of SW1 of the control unit 300 ends. The control unit 300 counts the forward shutdown time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad; The reverse turn-off time detection steps of the switching unit CH1 switch SW1 of the MLCC capacitor fast detection and sorting switching circuit board 600 are as follows: Select ①, ⑤, ⑥ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 15th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a low level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have output drive voltages, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U2 have no output drive voltages, the N-channel MOS tubes Q2 and Q6 are turned off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned off; the third and fourth pins of the optocoupler phototransistor U1 have no output drive voltages, the N-channel MOS tubes Q1 and Q5 are turned off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; Current direction: 3.3V→Source1→Source4→Source6→CH1'→CH1→SW1→Guard#1→Guard→Source5→GND; VCC8 is close to VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is at a low level. When the control unit 300 outputs Sig_ch1 from low level to high level, the control unit 300 starts the reverse shutdown timing of SW1. Figure 4 The output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U3 changes to no output drive voltage, and the N-channel MOS tubes Q3 and Q7 change from on to off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram changes from on to off; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U2 changes to output drive voltage, and the N-channel MOS tubes Q2 and Q6 change from off to on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram changes from off to on; the output drive voltage of the 3rd and 4th pins of the optocoupler phototransistor U1 changes to output drive voltage, and the N-channel MOS tubes Q1 and Q5 change from off to on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram changes from off to on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are turned on and off, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram being turned on and off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned off and on, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram being turned off and on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned off and on, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram being turned off and on; VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is at a high level, and the reverse shutdown timing of SW1 of the control unit 300 ends. The control unit 300 counts the reverse shutdown time of SW1 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the forward turn-off time of the switch SW2 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ④, ⑦ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Current direction 3.3V→Source1→Source4→Source5→Pot→Pot#1→SW2→CH1→CH1'→Source6→GND; VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level. When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts the forward conduction timing of SW2. Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage and become output drive voltage, and the N-channel MOS tubes Q3 and Q7 are turned from cut-off to on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned from off to on; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q2 and Q6 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned from on to off; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q1 and Q5 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned from on to off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram from on to off; VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level, and the forward shutdown timing of SW2 of the control unit 300 ends. The control unit 300 counts the forward shutdown time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad; The reverse turn-off time detection steps of the switching unit CH1 switching switch SW2 of the MLCC capacitor under test for rapid detection and sorting switching circuit board 600 are as follows: Select ①, ⑤, ⑦ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 14th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Current direction 3.3V→Source1→Source4→Source6→CH1'→CH1→SW2→Pot#1→Pot→Source5→GND; VCC8 is close to VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is at a low level. When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts the reverse conduction timing of SW2. Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage and become output drive voltage, and the N-channel MOS tubes Q3 and Q7 are turned from cut-off to on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned from off to on; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q2 and Q6 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned from on to off; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q1 and Q5 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned from on to off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram from on to off; VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC4 of the control unit 300 is at a high level, and the shutdown timing of SW2 of the control unit 300 ends. The control unit 300 counts the reverse shutdown time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad; The steps for detecting the forward turn-off time of the switch SW3 of the switching unit CH1 of the MLCC capacitor under test for rapid detection and sorting of the switching circuit board 600 are as follows: Select ①, ④, ⑧ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Current direction 3.3V→Source1→Source4→Source5→Cur→Cur#1→SW3→CH1→CH1'→Source6→GND; VCC8 is close to VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a low level. When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts the forward conduction timing of SW3. Figure 4The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage and become output drive voltage, and the N-channel MOS tubes Q3 and Q7 are turned from cut-off to on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned from off to on; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q2 and Q6 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned from on to off; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q1 and Q5 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned from on to off; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram from on to off; VCC8 is much larger than VCC9. According to formula (11), the data collected by ADC4 of the control unit 300 is at a high level, and the forward shutdown timing of SW3 of the control unit 300 ends. The control unit 300 counts the forward shutdown time of SW2 and uploads it to the host computer or display screen to judge whether it is good or bad; The reverse turn-off time detection steps of the switching unit CH1 switching switch SW3 of the MLCC capacitor under test for rapid detection and sorting switching circuit board 600 are as follows: Select ①, ⑤, ⑧ and ⑨ above; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U30 is connected to the 13th pin; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th and 5th pins; The control unit 300 outputs Sig_ch1 as a high level, and Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 as low levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Current direction 3.3V→Source1→Source4→Source6→CH1'→CH1→SW3→Cur#1→Cur→Source5→GND; VCC8 is close to VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a low level. When the control unit 300 outputs Sig_ch1 from high level to low level, the control unit 300 starts SW3 reverse conduction timing. Figure 4 The 3rd and 4th pins of the optocoupler phototransistor U3 have no output drive voltage and become output drive voltage, and the N-channel MOS tubes Q3 and Q7 are turned from cut-off to on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned from off to on; the 3rd and 4th pins of the optocoupler phototransistor U2 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q2 and Q6 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned from on to off; the 3rd and 4th pins of the optocoupler phototransistor U1 have output drive voltage and become no output drive voltage, and the N-channel MOS tubes Q1 and Q5 are turned from on to cut-off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned from on to off; Figure 5The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off to conduction, corresponding to the switching unit CH1 switching switch SW1 in the topological structure diagram from off to on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW2 in the topological structure diagram from on to off; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are turned on to cut off, corresponding to the switching unit CH1 switching switch SW3 in the topological structure diagram from on to off; VCC8 is much smaller than VCC9. According to formula (12), the data collected by ADC5 of the control unit 300 is at a high level, and the SW3 of the control unit 300 is turned off and the timing is over. The control unit 300 counts the reverse shutdown time of SW3 and uploads it to the host computer or display screen to judge whether it is good or bad; Based on the above switching unit CH2 switching switches SW4, SW5, and SW6, switching unit CH3 switching switches SW7, SW8, and SW9, switching unit CH4 switching switches SW10, SW11, and SW12, switching unit CH5 switching switches SW13, SW14, and SW15, switching unit CH6 switching switches SW16, SW17, and SW18, switching unit CH7 switching switches SW19, SW20, and SW21, and switching unit CH8 switching switches SW22, SW23, and SW34, the on-resistance, on-time, and off-time detection principles of each switching switch are the same as the detection principles of the switching switches SW1, SW2, and SW3 of the switching unit CH1.

[0060] The insulation impedance test steps between Guard (i.e. Guard#1, Guard#2) and Cur (i.e. Cur#1, Cur#2), Pot (i.e. Pot#1, Pot#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 are as follows: In order to reduce the influence of the differential measurement circuit on the insulation impedance test between the switching channels of the switching circuit board 600 for rapid detection and sorting of the MLCC capacitor under test, the control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins. Select ②, ④, ⑥ and ⑰ above to establish a detection circuit; The control unit 300 outputs Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are high levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Similarly: the switching switch SW4 of the switching unit CH2 in the corresponding topological structure diagram is disconnected, SW5 is turned on, and SW6 is turned on; the switching switch SW7 of the switching unit CH3 in the corresponding topological structure diagram is disconnected, SW8 is turned on, and SW9 is turned on; the switching switch SW10 of the switching unit CH4 in the corresponding topological structure diagram is disconnected, SW11 is turned on, and SW12 is turned on; the switching switch SW13 of the switching unit CH5 in the corresponding topological structure diagram is disconnected, SW14 is turned on, and SW15 is turned on; the switching switch SW16 of the switching unit CH6 in the corresponding topological structure diagram is disconnected, SW17 is turned on, and SW18 is turned on; the switching switch SW19 of the switching unit CH7 in the corresponding topological structure diagram is disconnected, SW20 is turned on, and SW21 is turned on; the switching switch SW22 of the switching unit CH8 in the corresponding topological structure diagram is disconnected, SW23 is turned on, and SW24 is turned on; At this time, ADC2 of the control unit 300 collects the voltage VCC4, and U9A is an operational amplifier follower circuit, so VCC3=VCC4; VCC2=VCC3; The insulation impedance between Guard (i.e. Guard#1, Guard#2) and Cur (i.e. Cur#1, Cur#2), Pot (i.e. Pot#1, Pot#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the tested MLCC capacitor quick detection and sorting switching circuit board 600 is

[0061] The control unit 300MUC uploads the insulation impedance measured this time to the host computer or display screen to judge whether it is good or bad; The insulation impedance test steps between Pot (i.e. Pot#1, Pot#2) and Cur (i.e. Cur#1, Cur#2), Guard (i.e. Guard#1, Guard#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 are as follows: In order to reduce the influence of the differential measurement circuit on the insulation impedance test between the channels of the switching switch of the MLCC capacitor rapid detection and sorting switching circuit board 600 under test, the control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins.

[0062] Select ②, ④, ⑦ and ⑱ above to establish a detection circuit; The control unit 300 outputs Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, which are all low levels; Figure 4 The third pin and the fourth pin of the optocoupler phototransistor U3 have output drive voltage, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; The third pin and the fourth pin of the optocoupler phototransistor U2 have output drive voltages, the N-channel MOS tubes Q2 and Q6 are cut off, and the switching switch SW2 of the switching unit CH1 in the corresponding topological structure diagram is disconnected; The third pin and the fourth pin of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are cut off, and the switching switch SW3 of the switching unit CH1 in the corresponding topological structure diagram is disconnected; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; Similarly: the switching switch SW4 of the switching unit CH2 in the corresponding topological structure diagram is turned on, SW5 is turned off, and SW6 is turned off; the switching switch SW7 of the switching unit CH3 in the corresponding topological structure diagram is turned on, SW8 is turned off, and SW9 is turned off; the switching switch SW10 of the switching unit CH4 in the corresponding topological structure diagram is turned on, SW11 is turned off, and SW12 is turned off; the switching switch SW13 of the switching unit CH5 in the corresponding topological structure diagram is turned on, SW14 is turned off, and SW15 is turned off; the switching switch SW16 of the switching unit CH6 in the corresponding topological structure diagram is turned on, SW17 is turned off, and SW18 is turned off; the switching switch SW19 of the switching unit CH7 in the corresponding topological structure diagram is turned on, SW20 is turned off, and SW21 is turned off; the switching switch SW22 of the switching unit CH8 in the corresponding topological structure diagram is turned on, SW23 is turned off, and SW24 is turned off; At this time, ADC2 of the control unit 300 collects the voltage VCC4, and U9A is an operational amplifier follower circuit, so VCC3=VCC4; VCC2=VCC3; The insulation impedance between Pot (i.e. Pot#1, Pot#2) and Cur (i.e. Cur#1, Cur#2), Guard (i.e. Guard#1, Guard#2), CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 under test is

[0063] The control unit 300MUC uploads the insulation impedance measured this time to the host computer or display screen to judge whether it is good or bad; The insulation impedance test steps between Cur (i.e. Cur#1, Cur#2) and Pot (i.e. Pot#1, Pot#2), Guard#1, Guard#2, CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 are as follows: In order to reduce the influence of the differential measurement circuit on the insulation impedance test between the switching channels of the switching circuit board 600 for rapid detection and sorting of the MLCC capacitor under test, the control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the 1st, 2nd, 4th, 5th and 12th pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the 2nd, 4th and 5th pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the 1st, 2nd, 4th and 5th pins. Select ②, ④, ⑧ and ⑱ above to establish a detection loop; The control unit 300 outputs Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, which are all low levels; Figure 4 The third pin and the fourth pin of the optocoupler phototransistor U3 have output drive voltage, the N-channel MOS tubes Q3 and Q7 are turned on, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; The third pin and the fourth pin of the optocoupler phototransistor U2 have output drive voltages, the N-channel MOS tubes Q2 and Q6 are cut off, and the switching switch SW2 of the switching unit CH1 in the corresponding topological structure diagram is disconnected; The third pin and the fourth pin of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are cut off, and the switching switch SW3 of the switching unit CH1 in the corresponding topological structure diagram is disconnected; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are connected, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are cut off, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are cut off, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is disconnected; Similarly: the switching switch SW4 of the switching unit CH2 in the corresponding topological structure diagram is turned on, SW5 is turned off, and SW6 is turned off; the switching switch SW7 of the switching unit CH3 in the corresponding topological structure diagram is turned on, SW8 is turned off, and SW9 is turned off; the switching switch SW10 of the switching unit CH4 in the corresponding topological structure diagram is turned on, SW11 is turned off, and SW12 is turned off; the switching switch SW13 of the switching unit CH5 in the corresponding topological structure diagram is turned on, SW14 is turned off, and SW15 is turned off; the switching switch SW16 of the switching unit CH6 in the corresponding topological structure diagram is turned on, SW17 is turned off, and SW18 is turned off; the switching switch SW19 of the switching unit CH7 in the corresponding topological structure diagram is turned on, SW20 is turned off, and SW21 is turned off; the switching switch SW22 of the switching unit CH8 in the corresponding topological structure diagram is turned on, SW23 is turned off, and SW24 is turned off; At this time, ADC2 of the control unit 300 collects the voltage VCC4, and U9A is an operational amplifier follower circuit, so VCC3=VCC4; VCC2=VCC3; The Cur (i.e. Cur#1, Cur#2) and Pot (i.e. Pot#1, Pot#2), Guard#1, Guard#2, CH1, CH2, CH3, CH4, CH5, CH6, CH7, and CH8 of the MLCC capacitor quick detection and sorting switching circuit board 600 under test are

[0064] The control unit 300 (MCU) uploads the insulation impedance measured this time to the host computer or display screen to determine whether it is good or bad.

[0065] Principle of forward breakdown voltage detection of clamping diode of MLCC capacitor fast detection and sorting switching circuit board 600 under test: Select ③, ④ and ⑥ above to establish a detection loop; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the first, second, fourth, fifth and 12 pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the second, fourth and fifth pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the first, second, fourth and fifth pins; The control unit 300 outputs Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are high levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Similarly: the switching switch SW4 of the switching unit CH2 in the corresponding topological structure diagram is disconnected, SW5 is turned on, and SW6 is turned on; the switching switch SW7 of the switching unit CH3 in the corresponding topological structure diagram is disconnected, SW8 is turned on, and SW9 is turned on; the switching switch SW10 of the switching unit CH4 in the corresponding topological structure diagram is disconnected, SW11 is turned on, and SW12 is turned on; the switching switch SW13 of the switching unit CH5 in the corresponding topological structure diagram is disconnected, SW14 is turned on, and SW15 is turned on; the switching switch SW16 of the switching unit CH6 in the corresponding topological structure diagram is disconnected, SW17 is turned on, and SW18 is turned on; the switching switch SW19 of the switching unit CH7 in the corresponding topological structure diagram is disconnected, SW20 is turned on, and SW21 is turned on; the switching switch SW22 of the switching unit CH8 in the corresponding topological structure diagram is disconnected, SW23 is turned on, and SW24 is turned on; Select the above ⑨, that is, the second detection circuit switching switch circuit 520CH1' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D1 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑩, that is, the second detection circuit switching switch circuit 520CH2' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D2 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑪, that is, the second detection circuit switching switch circuit 520CH3' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D3 VCC5=VCC6×(R28+R29) / R29; Select the above ⑫, that is, the second detection circuit switching switch circuit 520CH4' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D4 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑬, that is, the second detection circuit switching switch circuit 520CH5' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D5 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑭, that is, the second detection circuit switching switch circuit 520CH6' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D6 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑮, that is, the second detection circuit switching switch circuit 520CH7' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D7 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑯, that is, the second detection circuit switching switch circuit 520CH8' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the forward breakdown voltage of the TVS clamping diode D8 is VCC5=VCC6×(R28+R29) / R29; The control unit 300 counts the forward breakdown voltage of the TVS clamping diode and uploads it to the host computer or display screen to determine whether it is good or bad; Principle of reverse breakdown voltage detection of clamping diode of the tested MLCC capacitor fast detection and sorting switching circuit board 600: Select ③, ⑤ and ⑥ above to establish a detection loop; The control unit 300 is controlled by HSig_CD4051_A, HSig_CD4051_B and HSig_CD4051_C, and the third pin of the analog switch U30 can be connected to any one of the first, second, fourth, fifth and 12 pins; the control unit 300 is controlled by LSig_CD4051_A1, LSig_CD4051_B1 and LSig_CD4051_C1, and the third pin of the analog switch U31 can be connected to any one of the second, fourth and fifth pins; the control unit 300 is controlled by LSig_CD4051_A2, LSig_CD4051_B2 and LSig_CD4051_C2, and the third pin of the analog switch U32 can be connected to any one of the first, second, fourth and fifth pins; The control unit 300 outputs Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8, all of which are high levels; Figure 4 The third and fourth pins of the optocoupler phototransistor U3 have no output drive voltage, the N-channel MOS tubes Q3 and Q7 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the third and fourth pins of the optocoupler phototransistor U2 have output drive voltage, the N-channel MOS tubes Q2 and Q6 are turned on, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the third and fourth pins of the optocoupler phototransistor U1 have output drive voltage, the N-channel MOS tubes Q1 and Q5 are turned on, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Figure 5 The 3rd and 4th pins of the optocoupler solid-state relay_MOS output U6 are cut off, and the corresponding switching unit CH1 switching switch SW1 in the topological structure diagram is disconnected; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U5 are connected, and the corresponding switching unit CH1 switching switch SW2 in the topological structure diagram is turned on; the 3rd and 4th pins of the optocoupler solid-state relay_MOS output U4 are connected, and the corresponding switching unit CH1 switching switch SW3 in the topological structure diagram is turned on; Similarly: the switching switch SW4 of the switching unit CH2 in the corresponding topological structure diagram is disconnected, SW5 is turned on, and SW6 is turned on; the switching switch SW7 of the switching unit CH3 in the corresponding topological structure diagram is disconnected, SW8 is turned on, and SW9 is turned on; the switching switch SW10 of the switching unit CH4 in the corresponding topological structure diagram is disconnected, SW11 is turned on, and SW12 is turned on; the switching switch SW13 of the switching unit CH5 in the corresponding topological structure diagram is disconnected, SW14 is turned on, and SW15 is turned on; the switching switch SW16 of the switching unit CH6 in the corresponding topological structure diagram is disconnected, SW17 is turned on, and SW18 is turned on; the switching switch SW19 of the switching unit CH7 in the corresponding topological structure diagram is disconnected, SW20 is turned on, and SW21 is turned on; the switching switch SW22 of the switching unit CH8 in the corresponding topological structure diagram is disconnected, SW23 is turned on, and SW24 is turned on; Select the above ⑨, that is, the second detection circuit switching switch circuit 520CH1' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D1 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑩, that is, the second detection circuit switching switch circuit 520CH2' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D2 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑪, that is, the second detection circuit switching switch circuit 520CH3' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D3 VCC5=VCC6×(R28+R29) / R29; Select the above ⑫, that is, the second detection circuit switching switch circuit 520CH4' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D4 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑬, that is, the second detection circuit switching switch circuit 520CH5' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D5 is VCC5=VCC6×(R28+R29) / R29; Select the above ⑭, that is, the second detection circuit switching switch circuit 520CH6' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D6 VCC5=VCC6×(R28+R29) / R29; Select the above ⑮, that is, the second detection circuit switching switch circuit 520CH7' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D7 VCC5=VCC6×(R28+R29) / R29; Select the above ⑯, that is, the second detection circuit switching switch circuit 520CH8' switching switch conduction circuit schematic diagram; at this time, the ADC3 of the control unit 300 collects the voltage VCC7, and U9B is the operational amplifier follower circuit, then VCC6=VCC7; the reverse breakdown voltage of the TVS clamping diode D8 is VCC5=VCC6×(R28+R29) / R29; The control unit 300 counts the reverse breakdown voltage of the TVS clamping diode and uploads it to the host computer or display screen to determine whether it is good or bad; The detection circuit principle of the control part of the tested MLCC capacitor fast detection and sorting switching circuit board 600: ADC7 of the control unit 300 collects the voltage VCC23, and the operational amplifier works according to the "virtual short" principle, so VCC22=GND1, formula (25);

[0066] The above equations (26) and (27) can be simplified to

[0067] The detection principle of the switching switch SW1 control part circuit of the switching unit CH1 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 is that the control unit 300 outputs Sig_ch1 as a low level, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch1n is a high level, and Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23 and calculates that the current flowing out of GND1 is Ig1; the following is the principle of the SW1 control part, Figure 4The N-channel field effect transistor Q4 is turned on, the first pin of the optocoupler phototransistor U3 and the LED of the second pin are working, and the current Ig1 flows as follows: 5V→the first pin of U3→the second pin of U3→the current limiting resistor R5→the second pin of Q4→GND1→the sampling resistor R65→GND; Figure 5 The N-channel field effect transistor Q8 is turned on, and the LEDs at the first and second pins of the optocoupler solid-state relay _MOS output U3 are working. The current Ig1 flows as follows: 5V→the first pin of U3→the second pin of U3→the current limiting resistor R12→the second pin of Q48→GND1→the sampling resistor R65→GND; at this time, the ADC7 of the control unit 300 collects the voltage VCC23 and the above formula (27) can calculate the current

[0068] The switching switch SW4 of the switching unit CH2 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch2 as a low level, Sig_ch1, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch2n is a high level, and Sig_ch1n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig2; The switching switch SW7 of the switching unit CH3 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch3 as a low level, Sig_ch1, Sig_ch2, ​​Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch3n is a high level, and Sig_ch1n, Sig_ch2n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig3; The switch SW10 of the switching unit CH4 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the detection principle of the circuit. The control unit 300 outputs Sig_ch4 as a low level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels, then Sig_ch4n is a high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig4; The switching switch SW13 of the switching unit CH5 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the detection principle of the circuit. The control unit 300 outputs Sig_ch5 as a low level, and Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch6, Sig_ch7, and Sig_ch8 are all high levels. Then Sig_ch5n is a high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all low levels. At this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig5. The switching switch SW16 of the switching unit CH6 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the circuit detection principle of the part. The control unit 300 outputs Sig_ch6 as a low level, and Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch7, and Sig_ch8 are all high levels. Then Sig_ch6n is a high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch7n, and Sig_ch8n are all low levels. At this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig6; The switching switch SW19 of the switching unit CH6 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the detection principle of the circuit. The control unit 300 outputs Sig_ch7 as a low level, and Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, and Sig_ch8 are all high levels. Then Sig_ch7n is a high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, and Sig_ch8n are all low levels. At this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig7; The switch SW22 of the switching unit CH8 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 controls the detection principle of the circuit. The control unit 300 outputs Sig_ch8 as a low level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, and Sig_ch7 are all high levels, then Sig_ch8n is a high level, and Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, and Sig_ch7n are all low levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the current flowing out of GND1 is Ig7; The control part circuit GND1 of the switching switches SW1, SW4, SW7, SW10, SW13, SW16, SW19, and SW22 of the tested MLCC capacitor rapid detection and sorting switching circuit board 600 outputs the total detection principle, and the control unit 300 outputs Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n, and Sig_ch8n are all high levels; at this time, the ADC7 of the control unit MCU collects the voltage VCC23, and calculates that the total current flowing out of GND1 is Ig9; By detecting the GND1 outflow circuit of each switching unit and the total current of GND1 outflow, and comparing and analyzing, it is determined whether the performance of this part of the control circuit is OK; The ADC6 of the control unit 300 collects the voltage VCC20, and the voltage can be calculated through the voltage-dividing resistors R62 and R60.

[0069] The switching switches SW2 and SW3 of the switching unit CH1 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part circuit detection principle, the control unit 300 outputs Sig_ch1 as high level, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, Sig_ch8 are all low level, then Sig_ch1n is low level, Sig_ch2n, Sig_ch3n, Sig_ch4n, Sig_ch5n, Sig_ch6n are all low level. g_ch6n, Sig_ch7n, Sig_ch8n are all high level; N-channel MOS tube Q12 is turned on; control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd pin and 13th pin of analog switch U35 can be connected; at this time, ADC6 of control unit 300 collects voltage VCC20, and the output current Is1 of switching switch SW2, SW3 control part circuit of switching unit CH1 to GND can be calculated through voltage dividing resistors R62 and R60; Figure 4 In the switching unit CH1, the switching switch SW3 makes the LED of the first pin of the optocoupler phototransistor U1 and the second pin work, and the current Isw3 flows as follows: 5V→the first pin of U1→the second pin of U1→the current limiting resistor R6→Sig_ch1n; the switching unit CH1 switches the switch SW2, and makes the LED of the first pin of the optocoupler phototransistor U2 and the second pin work, and the current Isw2 flows as follows: 5V→the first pin of U2→the second pin of U2→the current limiting resistor R7→Sig_ch1n; the current flowing through the pull-up resistor R4 is Ir1, and the flow process is as follows: 5V→the pull-up resistor R4→Sig_ch1n; the switching unit CH1 switches the switches SW2 and SW3 driving the control circuit part, and the current is summarized as Isw1=Isw2+Isw3+Ir1, and the current flows as follows: Sig_ch1n→the current limiting resistor R63→the second pin of Q12→GND; Figure 5In the switching unit CH1, the switching switch SW3 optocoupler solid-state relay_MOS outputs the LED of the 1st pin of U4 and the 2nd pin, and the flow process of the current Isw3 is as follows: 5V→the 1st pin of U4→the 2nd pin of U4→the current limiting resistor R13→Sig_ch1n; the switching unit CH1 switches the switch SW2 optocoupler solid-state relay_MOS outputs the LED of the 1st pin of U5 and the 2nd pin, and the flow process of the current Isw2 is as follows: 5V→the 1st pin of U5→the 2nd pin of U5→the current limiting resistor R14→Sig_ch1n; the current flowing through the pull-up resistor R11 is Ir1, and the flow process is as follows: 5V→the pull-up resistor R11→Sig_ch1n; the switching unit CH1 switches the switch SW2 and SW3 driving control part circuit current to be summarized as Isw1=Isw2+Isw3+Ir1, and the current flow process is as follows: Sig_ch1n→the current limiting resistor R63→the 2nd pin of Q12→GND; At this time, the ADC6 of the control unit 300 collects the voltage VCC20 and the above formula (29) can calculate the current

[0070] The switching switches SW5 and SW6 of the switching unit CH2 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part circuit detection principle, the control unit 300 outputs Sig_ch2 as a high level, Sig_ch1, Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, Sig_ch8 are all low levels, then Sig_ch2n is low level, Sig_ch1n, Sig_ch3n, Sig_ch4n, Sig_ ch5n, Sig_ch6n, Sig_ch7n, Sig_ch8n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd pin and the 14th pin of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switch SW5, SW6 of the switching unit CH2 can be calculated through the voltage dividing resistors R62 and R60. The control part circuit outputs the current Is2 to GND; The switching switches SW8 and SW9 of the switching unit CH3 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch3 as a high level, Sig_ch1, Sig_ch2, ​​Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch3n is low level, Sig_ch1n, Sig_ch2n, Sig_ch4n, Sig_ ch5n, Sig_ch6n, Sig_ch7n, Sig_ch8n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd pin and the 15th pin of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switch SW8, SW9 of the switching unit CH3 can be calculated through the voltage dividing resistors R62 and R60. The control part of the circuit outputs the current Is3 to GND; The switching switches SW11 and SW12 of the switching unit CH4 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch4 as a high level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch5, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch4n is a low level, Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch8 are all low levels, and Sig_ch4n is a low level. ch5n, Sig_ch6n, Sig_ch7n, Sig_ch8n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd pin and the 12th pin of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switches SW11 and SW12 of the switching unit CH4 can be calculated through the voltage dividing resistors R62 and R60. The control part of the circuit outputs the current Is4 to GND; The switching switches SW14 and SW15 of the switching unit CH5 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch5 as a high level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch6, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch5n is a low level, Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ch8 are all low levels, and Sig_ch9n is a low level. ch4n, Sig_ch6n, Sig_ch7n, Sig_ch8n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd pin and the 1st pin of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switch SW14 and SW15 of the switching unit CH5 can be calculated through the voltage dividing resistors R62 and R60. The control part of the circuit outputs the current Is5 to GND; The switching switches SW17 and SW18 of the switching unit CH6 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch6 as a high level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch7, and Sig_ch8 are all low levels, then Sig_ch6n is a low level, Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ ch4n, Sig_ch5n, Sig_ch7n, Sig_ch8n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd and 5th pins of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switches SW17 and SW18 of the switching unit CH6 can be calculated through the voltage dividing resistors R62 and R60. The control part of the circuit outputs the current Is6 to GND; The switching switches SW20 and SW21 of the switching unit CH7 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part circuit detection principle, the control unit 300 outputs Sig_ch7 as a high level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, Sig_ch8 are all low levels, then Sig_ch7n is low level, Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ ch4n, Sig_ch5n, Sig_ch6n, Sig_ch8n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd and 5th pins of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switch SW20 and SW21 of the switching unit CH7 can be calculated through the voltage dividing resistors R62 and R60. The control part of the circuit outputs the current Is7 to GND; The switching switches SW23 and SW24 of the switching unit CH8 of the tested MLCC capacitor fast detection and sorting switching circuit board 600 control part of the circuit detection principle. The control unit 300 outputs Sig_ch8 as a high level, Sig_ch1, Sig_ch2, ​​Sig_ch3, Sig_ch4, Sig_ch5, Sig_ch6, and Sig_ch7 are all low levels, then Sig_ch8n is a low level, Sig_ch1n, Sig_ch2n, Sig_ch3n, Sig_ ch4n, Sig_ch5n, Sig_ch6n, Sig_ch7n are all high level; the control unit 300 is controlled by K_CD4051_A, K_CD4051_B and K_CD4051_C, and the 3rd and 5th pins of the analog switch U35 can be connected; at this time, the ADC6 of the control unit 300 collects the voltage VCC20, and the switching switch SW23, SW24 of the switching unit CH8 can be calculated through the voltage dividing resistors R62 and R60. The control part of the circuit outputs the current Is8 to GND; By detecting the currents Is1, Is2, Is3, Is4, Is5, Is6, Is7 and Is8 for comparative analysis, it can be determined whether the performance of this part of the control circuit is OK.

[0071] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Various changes can be made within the knowledge of ordinary technicians in the relevant technical field without departing from the purpose of the present invention. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

Claims

1. A detection circuit for capacitor sorting and testing a circuit board, characterized in that: include: A test source for providing electrical energy; A test source current acquisition circuit, wherein an input end of the test source current acquisition circuit is electrically connected to the test source, and the test source current acquisition circuit is used to acquire an output current of the test source; A control unit, the control unit being electrically connected to an output end of the test source current acquisition circuit; A test source switching circuit, wherein an input end of the test source switching circuit is electrically connected to the test source, a control end of the test source switching circuit is electrically connected to the control unit, and the test source switching circuit is used to adjust the voltage and current of the test source; A detection loop switching circuit, wherein an input end of the detection loop switching circuit is electrically connected to an output end of the test source switching circuit, and a control end of the detection loop switching circuit is electrically connected to the control unit; A capacitor sorting test circuit board to be tested, electrically connected to the detection end of the detection loop switching circuit; A detection loop differential sampling circuit is electrically connected to the output end of the detection loop switching circuit and is also electrically connected to the control unit; A detection circuit of the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit; The driving circuit of the control part of the circuit board under test is electrically connected to the capacitor sorting test circuit board under test and is also electrically connected to the control unit.

2. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: Also includes: A display screen, the display screen is electrically connected to the control unit; A host computer is electrically connected to the control unit.

3. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The test source includes: a first voltage source, a second voltage source, a third voltage source, a first current limiting resistor, a second current limiting resistor, a third current limiting resistor, a first test source output terminal, a second test source output terminal, and a third test source output terminal; wherein, one end of the first current limiting resistor is electrically connected to the first voltage source, and the other end of the first current limiting resistor is electrically connected to the first test source output terminal; one end of the second current limiting resistor is electrically connected to the second voltage source, and the other end of the second current limiting resistor is electrically connected to the second test source output terminal; one end of the third current limiting resistor is electrically connected to the third voltage source, and the other end of the third current limiting resistor is electrically connected to the third test source output terminal.

4. The detection circuit for capacitor sorting and testing circuit board according to claim 3, characterized in that: The test source switching circuit includes a test source switching switch circuit and a test source current direction switching circuit, and the test source switching switch circuit includes: A first test source switching switch, wherein one end of the first test source switching switch is electrically connected to the other end of the first current limiting resistor; a fourth test source terminal electrically connected to the other end of the first test source switch; a second test source switching switch, wherein one end of the second test source switching switch is electrically connected to the other end of the second current limiting resistor, and the other end of the second test source switching switch is electrically connected to the fourth test source end; a third test source switching switch, one end of the third test source switching switch being electrically connected to the other end of the third current limiting resistor, and the other end of the third test source switching switch being electrically connected to the fourth test source end; The test source current direction switching switch comprises: a first current direction switching switch, wherein one end of the first current direction switching switch is electrically connected to the other end of the first test source switching switch; a second current direction switching switch, one end of the second current direction switching switch is electrically connected to the other end of the first current direction switching switch, and the other end of the second current direction switching switch is grounded; a fifth test source terminal, electrically connected to the other end of the first current direction switching switch; a third current direction switching switch, one end of the third current direction switching switch being electrically connected to the other end of the second test source switching switch; a fourth current direction switching switch, one end of the fourth current direction switching switch being electrically connected to the other end of the third current direction switching switch, and the other end of the fourth current direction switching switch being grounded; The sixth test source terminal is electrically connected to the other end of the third current direction switching switch.

5. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The capacitor sorting test circuit board comprises: A plurality of switching units, each of which is provided with a plurality of switching switches; A plurality of first radio frequency coaxial connectors, electrically connected to the switching unit, and also used to be electrically connected to the detection end of the detection loop switching circuit; A plurality of output terminals, electrically connected to the switching unit, electrically connected to the first RF coaxial connector, and also used to be electrically connected to the detection end of the detection loop switching circuit; The control interface terminal is electrically connected to the control end of the switching unit and is also used to electrically connect to the detection circuit of the control part of the tested circuit board and the driving circuit of the control part of the tested circuit board.

6. The detection circuit for capacitor sorting and testing circuit board according to claim 5, characterized in that: The detection loop switching circuit includes a first detection loop switching circuit and a second detection loop switching circuit, and the first detection loop switching circuit includes: A plurality of first detection switching switches, wherein a control end of the first detection switching switch is electrically connected to the control unit, and one end of the first detection switching switch is electrically connected to an output end of the test source switching circuit; a plurality of second RF coaxial connectors, one end of the second RF coaxial connector being electrically connected to the other end of the first detection switch, and the other end of the second RF coaxial connector being electrically connected to the first RF coaxial connector; The second detection loop switching circuit includes: A plurality of second detection switching switches, wherein a control end of the second detection switching switch is electrically connected to the control unit, and one end of the second detection switching switch is electrically connected to an output end of the test source switching circuit; A plurality of connection terminals, one end of each connection terminal is electrically connected to the other end of the second detection switching switch, the other end of each connection terminal is electrically connected to the output terminal, and the connection terminal is also electrically connected to the second RF coaxial connector.

7. The detection circuit for capacitor sorting and testing circuit board according to claim 6, characterized in that: The detection loop switching circuit also includes a first Darlington transistor array, one end of the first Darlington transistor is electrically connected to the control unit; the first detection switching switch includes a first optocoupler solid-state relay and a first current-limiting resistor, the first optocoupler solid-state relay is electrically connected to the other end of the first Darlington transistor through the first current-limiting resistor, the first optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the first optocoupler solid-state relay is also electrically connected to one end of the second RF coaxial connector; The detection loop switching switch circuit also includes a second Darlington transistor array, one end of the second Darlington transistor is electrically connected to the control unit; the second detection switching switch includes a second optocoupler solid-state relay and a second current limiting resistor, the second optocoupler solid-state relay is electrically connected to the other end of the second Darlington transistor through the second current limiting resistor, the second optocoupler solid-state relay is also electrically connected to the output end of the test source switching circuit, and the second optocoupler solid-state relay is also electrically connected to one end of the wiring terminal.

8. The detection circuit for capacitor sorting and testing circuit board according to claim 6, characterized in that: The detection loop differential sampling circuit comprises: A first analog switch is electrically connected to the control unit and is also electrically connected to the first detection loop switching circuit; a first current limiting resistor, wherein one end of the first current limiting resistor is electrically connected to the first analog switch; A second analog switch is electrically connected to the control unit and is also electrically connected to the second detection loop switching circuit; a second current limiting resistor, wherein one end of the second current limiting resistor is electrically connected to the second analog switch; a third analog switch, electrically connected to the control unit, electrically connected to the second detection loop switching circuit, and electrically connected to one end of the second current limiting resistor; a first differential amplifier circuit, wherein an input end of the first differential amplifier circuit is electrically connected to the other end of the first current limiting resistor, and an output end of the first differential amplifier circuit is electrically connected to the control unit; A second differential amplifier circuit, wherein an input end of the second differential amplifier circuit is electrically connected to the other end of the second current limiting resistor, and an output end of the second differential amplifier circuit is electrically connected to the control unit.

9. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The control part detection circuit of the circuit board under test comprises: a fourth analog switch, electrically connected to the control unit and also electrically connected to the capacitor sorting test circuit board; a voltage-dividing resistor, one end of which is electrically connected to the control unit, and the other end of which is electrically connected to the fourth analog switch; An amplifier circuit is electrically connected to the control unit.

10. The detection circuit for capacitor sorting and testing circuit board according to claim 1, characterized in that: The control part driving circuit of the circuit board under test includes: A MOS tube, wherein the gate of the MOS tube is electrically connected to the control unit, the drain of the MOS tube is electrically connected to the capacitor sorting test circuit board under test, and the source of the MOS tube is grounded.

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