Manufacturing method of semiconductor device
By forming the bottom anti-reflection layer on the substrate and performing the exposure process on the photoresist layer and the bottom anti-reflection layer, the bottom anti-reflection layer is solved, and the quality and reliability of the photoresist process are improved.
Patent Information
- Application Number
- CN202411944922.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-25
AI Technical Summary
In the deep ultraviolet light (Deep UV) lithography process, the residual problem of photoresist leads to the subsequent ion implantation and etching processes, and the implanted layer pattern is prone to pattern bottom notch defects on the shallow trench isolation structure, affecting linewidth stability.
The bottom anti-reflection layer is formed on the substrate, and an exposure process is performed on the photoresist layer and the bottom anti-reflection layer, causing the bottom anti-reflection layer to produce photoacid cleavage or de-crosslinking, thereby being water-soluble, convenient to remove, and along with the possible residual photoresist layer.
It effectively avoids the residue of photoresist, improves the quality and reliability of the lithography process, eliminates the gap defects at the bottom of the figure, and ensures the stability of feature size.
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Figure CN119882372A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for manufacturing a semiconductor device. Background Art
[0002] With the continuous advancement of integrated circuit manufacturing technology, the demand for thick photoresists with high aspect ratios is also increasing. This is mainly due to the fact that advanced manufacturing processes have put forward higher requirements for the performance of photoresists. In the deep ultraviolet (Deep UV) process, when the thickness of the photoresist increases, the step height between it and the substrate also increases. The higher step height also brings new challenges to the exposure process: the bottom of the photoresist in the exposed area cannot produce enough photoacid for cracking reaction due to insufficient exposure energy, and it is difficult to remove the residual photoresist in the subsequent development process. The residual photoresist has become a thorny problem, which not only affects the subsequent ion implantation and etching processes, but also reduces the yield of the product.
[0003] In addition, in the deep ultraviolet (Deep UV) lithography process, when the implanted layer pattern is located on the shallow trench isolation structure (STI), notching defects often occur at the bottom of the pattern, affecting the line width stability or even collapse, thereby affecting the process.
[0004] The above-mentioned problem in the photolithography process is a difficult problem that needs to be solved in the semiconductor device manufacturing process. Summary of the invention
[0005] The object of the present invention is to provide a method for manufacturing a semiconductor device to solve the problem of photoresist residue in the photolithography process in the prior art.
[0006] In order to solve the above technical problems, the present invention provides a method for manufacturing a semiconductor device, the method for manufacturing a semiconductor device comprising:
[0007] providing a substrate;
[0008] forming a bottom anti-reflection layer on the substrate;
[0009] forming a photoresist layer on the bottom anti-reflective layer;
[0010] performing an exposure process on the photoresist layer and the bottom anti-reflection layer;
[0011] performing a development process on the photoresist layer to form a patterned photoresist layer, wherein the patterned photoresist layer exposes a portion of the bottom anti-reflection layer; and,
[0012] The exposed bottom anti-reflection layer is removed to form a patterned bottom anti-reflection layer.
[0013] Optionally, in the method for manufacturing a semiconductor device, the bottom anti-reflection layer is a photosensitive bottom anti-reflection layer or a water-soluble bottom anti-reflection layer.
[0014] Optionally, in the method for manufacturing the semiconductor device, removing the exposed bottom anti-reflection layer includes: removing the exposed bottom anti-reflection layer using a developer.
[0015] Optionally, in the method for manufacturing a semiconductor device, before forming a bottom anti-reflection layer on the substrate, the method for manufacturing a semiconductor device further includes:
[0016] A first cooling process is performed on the substrate to make the temperature of the substrate be between 10° C. and 30° C.
[0017] Optionally, in the method for manufacturing the semiconductor device, in forming the bottom anti-reflection layer on the substrate, the thickness of the bottom anti-reflection layer is between 10 nm and 30 nm.
[0018] Optionally, in the method for manufacturing the semiconductor device, forming a bottom anti-reflection layer on the substrate includes:
[0019] dripping a bottom anti-reflection material into the middle of the substrate; and,
[0020] The bottom anti-reflection material is spin-coated to form the bottom anti-reflection layer.
[0021] Optionally, in the method for manufacturing the semiconductor device, the weight of the dripped bottom anti-reflection material is between 1 g and 3 g; and the rotation speed of spin coating the bottom anti-reflection material is between 1500 r / min and 2000 r / min.
[0022] Optionally, in the method for manufacturing the semiconductor device, after spin coating the bottom anti-reflection material to form the bottom anti-reflection layer, forming the bottom anti-reflection layer on the substrate further comprises:
[0023] A heating process is performed on the bottom anti-reflection layer to cure the bottom anti-reflection layer, and the temperature of the heating process is between 150° C. and 200° C.
[0024] Optionally, in the method for manufacturing the semiconductor device, the duration of the heating process is between 40s and 80s.
[0025] Optionally, in the method for manufacturing the semiconductor device, after performing a heating process on the bottom anti-reflection layer to solidify the bottom anti-reflection layer, forming the bottom anti-reflection layer on the substrate further comprises:
[0026] A second cooling process is performed on the bottom anti-reflection layer to make the temperature of the bottom anti-reflection layer between 10° C. and 30° C.
[0027] In the manufacturing method of the semiconductor device provided by the present invention, before forming a photoresist layer, a bottom anti-reflection layer is first formed on a substrate. After the photoresist layer and the bottom anti-reflection layer are subjected to an exposure process, the bottom anti-reflection layer undergoes photoacid cleavage or de-crosslinking, thereby becoming water-soluble and being able to be easily removed, and any residual photoresist layer thereon can be removed together, thereby avoiding residual photoresist and improving the quality and reliability of the photolithography process. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 It is a schematic flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention.
[0029] Figure 2 It is a schematic structural diagram of a substrate according to the first embodiment of the present invention.
[0030] Figure 3 It is a schematic diagram of the structure after forming the bottom anti-reflection layer according to the first embodiment of the present invention.
[0031] Figure 4 It is a schematic diagram of the structure after forming the photoresist layer according to the first embodiment of the present invention.
[0032] Figure 5 It is a schematic diagram of the structure after the exposure process is performed in the first embodiment of the present invention.
[0033] Figure 6 It is a schematic diagram of the structure after the development process is performed according to the first embodiment of the present invention.
[0034] Figure 7 It is a schematic diagram of the structure after removing the exposed bottom anti-reflection layer according to the first embodiment of the present invention.
[0035] Figure 8 It is a schematic diagram of the structure of the substrate of the second embodiment of the present invention.
[0036] Fig. 9 It is a schematic diagram of the structure after forming the bottom anti-reflection layer according to the second embodiment of the present invention.
[0037] Fig.10 It is a schematic diagram of the structure after forming the photoresist layer according to the second embodiment of the present invention.
[0038] Fig.11 It is a schematic diagram of the structure after the exposure process is performed in the second embodiment of the present invention.
[0039] Fig.12 It is a schematic diagram of the structure after the development process is performed according to the second embodiment of the present invention.
[0040] Fig.13 It is a schematic diagram of the structure after removing the exposed bottom anti-reflection layer according to the second embodiment of the present invention.
[0041] The reference numerals are described as follows:
[0042] 100 - substrate; 110 - oxide layer; 120 - bottom anti-reflection layer; 121 - patterned bottom anti-reflection layer; 130 - photoresist layer; 131 - patterned photoresist layer; 132 - residual photoresist layer; 140 - first opening; 141 - second opening; A - exposure area.
[0043] 200-substrate; 201-active area; 202-shallow trench isolation structure; 210-bottom anti-reflection layer; 211-patterned bottom anti-reflection layer; 220-photoresist layer; 221-patterned photoresist layer; 222-residual photoresist layer; 230-first opening; 231-second opening; 232-integrated opening; B-exposure area. DETAILED DESCRIPTION
[0044] The following is a further detailed description of the method for manufacturing a semiconductor device according to the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0045] The terms used in the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. Unless otherwise defined in the present application document, the technical terms or scientific terms used in the present invention should be the common meaning understood by people with ordinary skills in the field to which the present invention belongs. The words "first", "second" and similar words used in the present specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limit, but indicate that there is at least one. "Multiple" or "several" means two or more. Unless otherwise specified, words such as "upper / upper layer", "lower / lower layer" and the like are only for the convenience of explanation and are not limited to one position or one spatial orientation. Words such as "include" or "comprise" and the like mean that the elements or objects appearing in front of "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and the like are not limited to physical or mechanical connections, and can include electrical connections, whether direct or indirect. The singular forms "a", "said" and "the" used in the present specification and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.
[0046] In the prior art, the bottom of the photoresist in the exposed area cannot generate enough photoacid to undergo a cracking reaction due to insufficient exposure energy, and it is difficult to remove the residual photoresist in the subsequent development process.
[0047] The present invention provides a method for manufacturing a semiconductor device. Before forming a photoresist layer, a bottom anti-reflection layer is first formed on a substrate. After the photoresist layer and the bottom anti-reflection layer are subjected to an exposure process, the bottom anti-reflection layer undergoes photoacid cleavage or de-crosslinking, thereby becoming water-soluble and being able to be easily removed, and the photoresist layer that may remain thereon can be removed together, thereby avoiding photoresist residue and improving the quality and reliability of the photolithography process.
[0048] In addition, in the prior art, when the implantation layer pattern is located on the shallow trench isolation structure, a bottom notch defect often occurs, which affects the line width stability and even collapses the line.
[0049] The inventors conducted in-depth research and found that the cause of this problem is that there is a difference in the refractive index of light between the shallow trench isolation structure and the active area. When deep ultraviolet light is incident vertically, it will reflect off the sidewalls of the shallow trench isolation structure. After being reflected at the bottom layer, this reflected light often forms a photosensitive phenomenon on the sidewalls of the photoresist layer in the upper non-photosensitive area, causing the non-photosensitive area to be partially photosensitive. After development, these areas may collapse, thus affecting the process.
[0050] The invention provides a method for manufacturing a semiconductor device. Before forming a photoresist layer, a bottom anti-reflection layer is first formed on a substrate. The bottom anti-reflection layer has an anti-reflection function, can ensure the stability of a critical dimension (CD), eliminate reflected light of a shallow trench isolation structure, improve the process window, and avoid a notch defect at the bottom of a pattern.
[0051] like Figure 1 As shown, the method for manufacturing the semiconductor device includes:
[0052] Step S10: providing a substrate;
[0053] Step S20: forming a bottom anti-reflection layer on the substrate;
[0054] Step S30: forming a photoresist layer on the bottom anti-reflection layer;
[0055] Step S40: performing an exposure process on the photoresist layer and the bottom anti-reflection layer;
[0056] Step S50: performing a development process on the photoresist layer to form a patterned photoresist layer, wherein the patterned photoresist layer exposes a portion of the bottom anti-reflection layer; and
[0057] Step S60: removing the exposed bottom anti-reflection layer to form a patterned bottom anti-reflection layer.
[0058] For details, please refer to Figures 2 to 7 , which is a cross-sectional schematic diagram of a structure formed by executing the method for manufacturing a semiconductor device according to the first embodiment of the present invention.
[0059] like Figure 2 As shown, a substrate 100 is provided, and the substrate 100 may be a silicon substrate, a germanium substrate, a germanium silicon substrate, a carbon silicon substrate, a silicon-on-insulator substrate, a germanium-on-insulator substrate, etc. Further, a semiconductor device (not shown in the figure) may be formed in the substrate 100. In an embodiment of the present application, an oxide layer 110 is formed on the substrate 100, wherein the material of the oxide layer 110 may be, for example, silicon oxide. Specifically, the oxide layer 110 may be formed on the substrate 100 by a thermal oxidation process or a deposition process.
[0060] In the embodiment of the present application, further, a first cooling process is performed on the substrate 100 so that the temperature of the substrate 100 is between 10°C and 30°C. Here, a cooling process is performed on the substrate 100 and the oxide layer 110 thereon so that the temperature of the substrate 100 and the oxide layer 110 is between 10°C and 30°C, for example, 15°C, 22°C or 26°C, etc., so as to facilitate the subsequent formation of a bottom anti-reflection layer. Preferably, the first cooling process is performed in a dust-free environment with a humidity of 30% to 60%, and it can be performed in the same machine as the bottom anti-reflection layer and the photoresist layer formed subsequently.
[0061] like Figure 3 As shown, next, a bottom anti-reflection layer 120 is formed on the substrate 100. In the embodiment of the present application, specifically, the bottom anti-reflection layer 120 is formed on the oxide layer 110. The bottom anti-reflection layer 120 may be a photosensitive bottom anti-reflection layer or a water-soluble bottom anti-reflection layer.
[0062] The bottom anti-reflection layer 120 can be formed by a spin coating process. Specifically, the bottom anti-reflection material can be dripped onto the substrate 100, specifically the middle of the surface of the oxide layer 110, wherein the weight of the dripped bottom anti-reflection material is between 1g and 3g, for example, 1.6g, 2g, 2.2g, etc. Then, the bottom anti-reflection material is spin-coated to form the bottom anti-reflection layer 120. In an embodiment of the present application, the rotation speed of the spin coating of the bottom anti-reflection material is between 1500r / min and 2000r / min, for example, 1600r / min, 1750r / min, 1800r / min, etc., so as to form the bottom anti-reflection layer 120 efficiently and with high quality.
[0063] In the embodiment of the present application, the thickness of the bottom anti-reflection layer 120 is between 10nm and 30nm, for example, the thickness of the bottom anti-reflection layer 120 can be 18nm, 22nm, 26nm, etc. Therefore, sufficient photoacid can be generated to promote the dissolution of the photoresist layer at the bottom of the exposure area, or it can be dissolved and removed in the subsequent process by self-decrosslinking, and the photoresist layer thereon can be peeled off and dissolved to avoid photoresist residue; it can also effectively prevent light reflection; and it can also ensure the thickness requirement of the photoresist layer.
[0064] Further, a heating process is performed on the bottom anti-reflection layer 120 to remove excess solvent in the bottom anti-reflection layer 120 and solidify the bottom anti-reflection layer 120. The temperature of the heating process is between 150° C. and 200° C., for example, the temperature of the heating process is 175° C., 180° C., 192° C., etc. Further, the duration of the heating process performed on the bottom anti-reflection layer 120 is between 40s and 80s, for example, the duration of the heating process performed on the bottom anti-reflection layer 120 is 50s, 60s, 68s, etc., so as to efficiently and reliably remove excess solvent in the bottom anti-reflection layer 120 and solidify the bottom anti-reflection layer 120.
[0065] After the bottom anti-reflection layer 120 is heated and solidified, a second cooling process is further performed on the bottom anti-reflection layer 120 to make the temperature of the bottom anti-reflection layer 120 between 10°C and 30°C, such as 15°C, 22°C or 26°C, etc., to facilitate the subsequent formation of a photoresist layer.
[0066] Then, if Figure 4 As shown, a photoresist layer 130 is formed on the bottom anti-reflection layer 120. Specifically, the photoresist layer 130 can be formed by a spin coating process.
[0067] In the embodiment of the present application, then, Figure 5 As shown, an exposure process is performed on the photoresist layer 130 and the bottom anti-reflection layer 120. The photoresist layer 130 and the bottom anti-reflection layer 120 in the exposure area A are modified, and the bottom anti-reflection layer 120 can generate photoacid or undergo de-crosslinking.
[0068] Then, if Figure 6 As shown, the photoresist layer 130 is subjected to a development process to form a patterned photoresist layer 131, and the patterned photoresist layer 131 exposes a portion of the bottom anti-reflection layer 120. Specifically, a first opening 140 is formed in the patterned photoresist layer 131, and the first opening 140 penetrates the patterned photoresist layer 131 to expose a portion of the bottom anti-reflection layer 120. However, due to insufficient exposure energy, the photoresist layer 130 in the exposure area A cannot generate enough photoacid to perform a cracking reaction, and some residual photoresist layer 132 still exists in the subsequent development process.
[0069] Then, if Figure 7As shown, the exposed bottom anti-reflection layer 120 is removed, that is, the bottom anti-reflection layer 120 exposed in the first opening 140 is removed to form a patterned bottom anti-reflection layer 121. Here, a second opening 141 is formed in the patterned bottom anti-reflection layer 121, and the second opening 141 extends from the bottom of the first opening 140 and penetrates the patterned bottom anti-reflection layer 121 to expose the substrate 100, and in the embodiment of the present application, specifically exposes the oxide layer 110.
[0070] In an embodiment of the present application, the bottom anti-reflection layer 120 exposed in the first opening 140 is removed by a developer; in other embodiments of the present application, other liquids may also be used to remove the bottom anti-reflection layer 120 exposed in the first opening 140, such as deionized water.
[0071] Among them, for the non-exposed area, that is, the area outside the exposure area A, when the bottom anti-reflection layer 120 is a photosensitive bottom anti-reflection layer, the developer has no effect on it, that is, when the exposed bottom anti-reflection layer 120 is removed, the unexposed bottom anti-reflection layer 120 is retained; when the bottom anti-reflection layer 120 is a water-soluble bottom anti-reflection layer, when the exposed bottom anti-reflection layer 120 is removed, the bottom anti-reflection layer 120 in the non-exposed area will form side hollows, that is, the bottom anti-reflection layer 120 in the non-exposed area is dissolved to a certain extent on the side close to the exposure area A. Since it is covered with a patterned photoresist layer 131, the side hollows of the bottom anti-reflection layer 120 in the non-exposed area are relatively small and do not affect the subsequent process.
[0072] In the embodiment of the present application, a bottom anti-reflection layer 120 is formed under the photoresist layer 130, that is, the photoresist layer 130 is located on the bottom anti-reflection layer 120. Through the exposure process, the bottom anti-reflection layer 120 can generate enough photoacid or undergo de-crosslinking. In the subsequent development process, it can not only meet the need of self-dissolution, but also dissolve the bottom of the photoresist layer 130 in the exposure area, thereby avoiding the residue of the photoresist layer 130 and improving the quality and reliability of the photolithography process. In addition, the bottom anti-reflection layer 120 has an anti-reflection function, avoiding unnecessary light reflection in the exposure process, thereby avoiding the erroneous exposure of the photoresist layer 130 outside the exposure area due to unnecessary light reflection in the exposure process, and further avoiding the erroneous removal of part of the photoresist layer 130 in the subsequent development process, thereby improving the process window and avoiding the gap defect at the bottom of the pattern.
[0073] For further information, please refer to Figures 8 to 13 , which is a cross-sectional schematic diagram of a structure formed by executing the method for manufacturing a semiconductor device according to the second embodiment of the present invention.
[0074] like Figure 8 As shown, a substrate 200 is provided, and the substrate 200 can be a silicon substrate, a germanium substrate, a germanium silicon substrate, a carbon silicon substrate, a silicon-on-insulator substrate, a germanium-on-insulator substrate, etc. Further, a semiconductor device (not shown in the figure) can be formed in the substrate 200. In the embodiment of the present application, the substrate 200 includes a plurality of active regions 201 and a shallow trench isolation structure 202 located between adjacent active regions 201.
[0075] In the embodiment of the present application, further, a first cooling process is performed on the substrate 200 to make the temperature of the substrate 200 between 10°C and 30°C, so as to facilitate the subsequent formation of a bottom anti-reflection layer. Preferably, the first cooling process is performed in a dust-free environment with a humidity of 30% to 60%, and can be performed in the same machine as the bottom anti-reflection layer and the photoresist layer formed subsequently.
[0076] Then, if Fig. 9 As shown, a bottom anti-reflection layer 210 is formed on the substrate 200. The bottom anti-reflection layer 210 may be a photosensitive bottom anti-reflection layer or a water-soluble bottom anti-reflection layer. Specifically, the bottom anti-reflection layer 210 is formed by a spin coating process. A bottom anti-reflection material may be dripped into the middle of the substrate 200, wherein the weight of the dripped bottom anti-reflection material is between 1g and 3g, for example, 1.6g, 2g, 2.2g, etc. Then, the bottom anti-reflection material is spin-coated to form the bottom anti-reflection layer 210. In an embodiment of the present application, the rotation speed of the spin coating of the bottom anti-reflection material is between 1500r / min and 2000r / min, for example, 1600r / min, 1750r / min, 1800r / min, etc., so as to form the bottom anti-reflection layer 210 efficiently and with high quality.
[0077] The thickness of the bottom anti-reflection layer 210 is between 10nm and 30nm, for example, the thickness of the bottom anti-reflection layer 210 can be 18nm, 22nm, 26nm, etc. Therefore, sufficient photoacid can be generated to promote the dissolution of the photoresist layer at the bottom of the exposure area, or the photoresist layer can be dissolved and removed in the subsequent process by self-decrosslinking and dissolution, and the photoresist layer thereon can be peeled off and dissolved to avoid photoresist residue; the reflection of light can be effectively prevented; and the thickness requirement of the photoresist layer can be guaranteed.
[0078] Further, a heating process is performed on the bottom anti-reflection layer 210 to remove excess solvent in the bottom anti-reflection layer 210 and solidify the bottom anti-reflection layer 210. The temperature of the heating process is between 150° C. and 200° C., for example, the temperature of the heating process is 175° C., 180° C., 192° C., etc. Further, the duration of the heating process performed on the bottom anti-reflection layer 210 is between 40s and 80s, for example, the duration of the heating process performed on the bottom anti-reflection layer 210 is 50s, 60s, 68s, etc., so as to efficiently and reliably remove excess solvent in the bottom anti-reflection layer 210 and solidify the bottom anti-reflection layer 210.
[0079] After the bottom anti-reflection layer 210 is heated and solidified, a second cooling process is further performed on the bottom anti-reflection layer 210 to make the temperature of the bottom anti-reflection layer 210 between 10°C and 30°C, such as 15°C, 22°C or 26°C, etc., to facilitate the subsequent formation of a photoresist layer.
[0080] Then, if Fig.10 As shown, a photoresist layer 220 is formed on the bottom anti-reflection layer 210. Specifically, the photoresist layer 220 can be formed by a spin coating process.
[0081] In the embodiment of the present application, then, Fig.11 As shown, an exposure process is performed on the photoresist layer 220 and the bottom anti-reflection layer 210. The photoresist layer 220 and the bottom anti-reflection layer 210 in the exposure area B are modified, and the bottom anti-reflection layer 210 can generate photoacid or undergo de-crosslinking. Fig.11 As shown, two exposure regions B are formed here, and each exposure region B covers an adjacent portion of the active area 201 and a portion of the shallow trench isolation structure 202 .
[0082] Then, if Fig.12 As shown, the photoresist layer 220 is subjected to a development process to form a patterned photoresist layer 221, and the patterned photoresist layer 221 exposes a portion of the bottom anti-reflection layer 210. Specifically, a first opening 230 is formed in the patterned photoresist layer 221, and the first opening 230 penetrates the patterned photoresist layer 221 to expose a portion of the bottom anti-reflection layer 210. However, due to insufficient exposure energy, the photoresist layer 220 in the exposure area B cannot generate enough photoacid to perform a cracking reaction, and some residual photoresist layer 222 still exists in the subsequent development process.
[0083] Then, if Fig.13As shown, the exposed bottom anti-reflection layer 210 is removed, that is, the bottom anti-reflection layer 210 exposed in the first opening 230 is removed to form a patterned bottom anti-reflection layer 211. Here, a second opening 231 is formed in the patterned bottom anti-reflection layer 211, and the second opening 231 extends from the bottom of the first opening 230 and penetrates the patterned bottom anti-reflection layer 211 to expose the substrate 200.
[0084] In the embodiment of the present application, each of the second openings 231 simultaneously exposes a portion of the active area 201 and a portion of the shallow trench isolation structure 202. Due to the presence of the bottom anti-reflection layer 210, although there is a difference in the refractive index of the shallow trench isolation structure 202 and the active area 201 for light, when deep ultraviolet light is vertically incident, the reflection of the side wall of the shallow trench isolation structure 202 can still be avoided, and the photosensitive phenomenon of the side wall of the photoresist layer in the upper non-photosensitive area is avoided, thereby ensuring the stability of the feature size and improving the reliability of the photolithography process.
[0085] In the embodiment of the present application, the second opening 231 extends from the bottom of the first opening 230, and the two form an integrated opening 232. The integrated opening 232 is a high aspect ratio opening, wherein the aspect ratio of the integrated opening 232 is greater than or equal to 3:1, so as to better meet the requirements of advanced processes.
[0086] From the above, it can be seen that in the manufacturing method of the semiconductor device provided by the embodiment of the present invention, before forming the photoresist layer, a bottom anti-reflection layer is first formed on the substrate, and after the exposure process is performed on the photoresist layer and the bottom anti-reflection layer, the bottom anti-reflection layer undergoes photoacid cleavage or de-crosslinking, thereby being water-soluble and can be easily removed, and can be removed together with the photoresist layer that may remain thereon, thereby avoiding the residual photoresist and improving the quality and reliability of the photolithography process. Furthermore, the bottom anti-reflection layer has an anti-reflection function, avoiding unnecessary light reflection in the exposure process, thereby avoiding the erroneous exposure of the photoresist layer outside the exposure area due to unnecessary light reflection in the exposure process, and further avoiding the erroneous removal of part of the photoresist layer in the subsequent development process, thereby improving the process window and avoiding the gap defect at the bottom of the pattern.
[0087] In the present application, references to "one embodiment" or "some embodiments" mean that features, structures, or characteristics described in conjunction with the embodiment are included in at least one embodiment, at least some embodiments, of the present application. Therefore, the appearance of the phrases "in one embodiment" or "in some embodiments" in various places of the present application does not necessarily refer to the same or the same embodiments. In addition, in one or more embodiments, features, structures, or characteristics may be combined in any suitable combination and / or sub-combination.
[0088] Although some specific embodiments of the present application have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present application. The various embodiments of the present application may be combined in any manner without departing from the spirit and scope of the present application. It will also be appreciated by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present application. The scope of the present application is defined by the appended claims.
Claims
1. A method for manufacturing a semiconductor device, characterized in that: The method for manufacturing the semiconductor device comprises: providing a substrate; forming a bottom anti-reflection layer on the substrate; forming a photoresist layer on the bottom anti-reflective layer; performing an exposure process on the photoresist layer and the bottom anti-reflection layer; performing a development process on the photoresist layer to form a patterned photoresist layer, wherein the patterned photoresist layer exposes a portion of the bottom anti-reflection layer; and, The exposed bottom anti-reflection layer is removed to form a patterned bottom anti-reflection layer.
2. The method for manufacturing a semiconductor device according to claim 1, wherein: The bottom anti-reflection layer is a photosensitive bottom anti-reflection layer or a water-soluble bottom anti-reflection layer.
3. The method for manufacturing a semiconductor device according to claim 1, wherein: The removing the exposed bottom anti-reflection layer comprises: removing the exposed bottom anti-reflection layer by using a developing solution.
4. The method for manufacturing a semiconductor device according to claim 1, wherein: Before forming the bottom anti-reflection layer on the substrate, the method for manufacturing the semiconductor device further includes: A first cooling process is performed on the substrate to make the temperature of the substrate be between 10° C. and 30° C.
5. The method for manufacturing a semiconductor device according to claim 1, wherein: In forming a bottom anti-reflection layer on the substrate, the thickness of the bottom anti-reflection layer is between 10 nm and 30 nm.
6. The method for manufacturing a semiconductor device according to claim 1, wherein: Forming a bottom anti-reflection layer on the substrate comprises: dripping a bottom anti-reflection material into the middle of the substrate; and, The bottom anti-reflection material is spin-coated to form the bottom anti-reflection layer.
7. The method for manufacturing a semiconductor device according to claim 6, wherein: The weight of the dripped bottom anti-reflection material is between 1 g and 3 g; the rotation speed of the spin coating of the bottom anti-reflection material is between 1500 r / min and 2000 r / min.
8. The method for manufacturing a semiconductor device according to claim 6, wherein: After spin coating the bottom anti-reflection material to form the bottom anti-reflection layer, forming the bottom anti-reflection layer on the substrate further comprises: A heating process is performed on the bottom anti-reflection layer to cure the bottom anti-reflection layer, and the temperature of the heating process is between 150° C. and 200° C.
9. The method for manufacturing a semiconductor device according to claim 8, wherein: The duration of the heating process is between 40s and 80s.
10. The method for manufacturing a semiconductor device according to claim 8, wherein: After performing a heating process on the bottom anti-reflection layer to solidify the bottom anti-reflection layer, forming the bottom anti-reflection layer on the substrate further comprises: A second cooling process is performed on the bottom anti-reflection layer to make the temperature of the bottom anti-reflection layer between 10° C. and 30° C.
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