Wafer-level photoelectric fusion intelligent calculation method and system
By splitting the data bitwise operation into multiple preset bitwise calculations for calculation data and combining the calculation results bitwise operation, the calculation results are realized, and the optical and electrical fusion intelligent calculation is solved, which solves the problems of large calculation errors and limited scale in the existing technology, and supports efficient calculation of large-model artificial intelligence.
Patent Information
- Application Number
- CN202510379727.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2025-04-25
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Existing electronic computing technologies are difficult to effectively deal with the strict demands of large-scale complex algorithms for computing power and power consumption, and the photoelectric computing paradigm has the problems of error accumulation and lack of effective correction solutions, making it difficult to support the efficient computing of the new generation of large-scale artificial intelligence.
A wafer-level optical and electrical fusion intelligent calculation method is proposed. By splitting the data bitwise operation into multiple preset bit count calculation data for calculation, and performing bitwise operation combination of the obtained calculation result data, fusing accurate logic operations of electricity and high-throughput matrix general calculation of optical high-throughput matrix.
It realizes accurate calculations with high errors and robustness, can accurately implement large-model computing, supports efficient calculations of the new generation of large-model artificial intelligence, and solves the problems of large-scale computing errors and limited computing scale.
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Figure CN119882927A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of optical computing technology, and in particular to a wafer-level optoelectronic fusion intelligent computing method and system. Background Art
[0002] With the rapid development of artificial intelligence and scientific computing, the complexity and scale of computing needs are also increasing. However, the performance of existing electronic computing is gradually approaching saturation, making it difficult to effectively cope with the increasingly stringent demands of large-scale complex algorithms on computing power and power consumption. Light has natural advantages such as high throughput and low latency during propagation, and the use of optoelectronic fusion computing technology is seen as the key to breaking the existing computing bottleneck. Summary of the invention
[0003] The present disclosure aims to solve one of the technical problems in the related art at least to some extent.
[0004] To this end, the first objective of the present disclosure is to propose a wafer-level optoelectronic fusion intelligent computing method.
[0005] The second objective of the present disclosure is to propose a wafer-level optoelectronic fusion intelligent computing system.
[0006] To achieve the above-mentioned purpose, the first embodiment of the present disclosure proposes a wafer-level optoelectronic fusion intelligent computing method, the method comprising: Acquire first data and second data to be calculated, and split the first data and the second data into multiple groups of calculation data with preset bit numbers; Converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog optical signals; Calculating the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data; Converting the calculation result data of the analog optical signal into a digital electrical signal; Based on the multiple groups of calculation result data of the digital electrical signals, a target calculation result is obtained.
[0007] Optionally, splitting the first data and the second data into multiple groups of calculation data with a preset number of bits includes: splitting the first data and the second data bit by bit in turn into multiple groups of calculation data with a preset number of bits.
[0008] Optionally, converting the plurality of groups of calculated data of preset bit numbers of digital electrical signals into analog optical signals comprises: Converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog electrical signals; The calculation data of the plurality of groups of preset bit numbers of the analog electrical signal are converted into analog optical signals.
[0009] Optionally, calculating the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data includes: calculating the calculation data of each group of preset bit numbers of the analog optical signal through an MZI array or two-dimensional diffraction to obtain calculation result data.
[0010] Optionally, converting the calculation result data of the analog optical signal into a digital electrical signal comprises: Converting the calculation result data of the analog optical signal into an analog electrical signal; The calculation result data of the analog electric signal is converted into a digital electric signal.
[0011] Optionally, obtaining a target calculation result based on the multiple groups of calculation result data of the digital electrical signal includes: Acquire digital electrical signals of multiple groups of calculation result data corresponding to the first data and the second data from the cache data; The digital electrical signals of the plurality of groups of calculation result data are sequentially combined bit by bit to obtain a target calculation result.
[0012] Optionally, the preset number of bits is 2.
[0013] To achieve the above-mentioned purpose, a second aspect of the present disclosure provides a wafer-level optoelectronic fusion intelligent computing system, the system comprising: An electrical calculation module, used for acquiring first data and second data to be calculated, and splitting the first data and the second data into a plurality of groups of calculation data with a preset number of bits; A digital-to-analog converter array module, used for converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog optical signals; An optical calculation module, used to calculate the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data; An analog-to-digital converter array module, used to convert the calculation result data of the analog optical signal into a digital electrical signal; The calculation module is used to obtain a target calculation result based on multiple groups of calculation result data of the digital electrical signal.
[0014] Another object of the present disclosure is to provide an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform any one of the methods described in the above aspect.
[0015] Another object of the present disclosure is to provide a computer storage medium, wherein the computer storage medium stores computer executable instructions; after the computer executable instructions are executed by a processor, the computer executes any one of the methods described in the above aspect.
[0016] In summary, the wafer-level optoelectronic fusion intelligent computing method and system provided by the present invention, by splitting the data into calculation data with a preset number of bits by bit operations, and performing bit-by-bit operations and splicing combinations of the obtained calculation result data with a preset number of bits, thereby integrating the precise bit-by-bit logic operations of electricity with the high-throughput matrix general computing of optics, achieving precise computing with high error robustness, and accurately realizing large-model computing in the form of optoelectronic computing, thereby supporting the efficient computing of the new generation of large-model artificial intelligence.
[0017] Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description or learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above and / or additional aspects and advantages of the present disclosure will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which: Figure 1 A schematic diagram of a process flow of a wafer-level optoelectronic fusion intelligent computing method provided by an embodiment of the present disclosure; Figure 2 A schematic diagram of the structure of a wafer-level optoelectronic fusion intelligent computing system provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0019] Embodiments of the present disclosure are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.
[0020] At present, for most analog computing systems, signals may attenuate during transmission and processing, and noise may also affect the quality of the signal. As a result, errors or instability in the calculation results may occur. For optical computing models, various errors will inevitably be introduced in optical calculations due to factors such as material defects, wavefront errors, and uneven transmission in the optical system. These errors may affect the accuracy of the calculation results and cause deviations between experimental results and simulation data. If the optical neural network parameters are expanded by simply stacking layers, errors will gradually accumulate during propagation, eventually causing huge errors in the output.
[0021] In the existing technology, the classification of four vowel sound wave signals can be completed through an array composed of 56 cascaded Mach-Zehnder Interferometers (MZI), or a deep diffraction neural network based on a cascade of optical diffraction masks can be used to achieve visual tasks such as handwritten digit recognition and image saliency detection; the splitting and aggregation of the optical path can give the diffracted light calculation the ability of multi-channel parallel processing.
[0022] However, the optoelectronic computing paradigm in the above-mentioned prior art uses analog computing as the main computing mode, with accumulated errors and a lack of effective correction schemes, which makes it difficult to cascade computing modules (the cascade error is too large) and difficult to increase the scale of tasks. The precise logical computing capabilities that electrical computing excels in are ignored, and electrical data processing is limited to computing control parts such as data caching and routing. It is difficult to fully utilize the electrical advantages to assist the high-throughput characteristics of optical computing. Based on this, existing optoelectronic computing technologies generally face key difficulties such as large computing errors and limited computing scale, making it difficult to support the new generation of large-model artificial intelligence that urgently needs computing power.
[0023] The present disclosure is described in detail below with reference to specific embodiments.
[0024] Figure 1 The figure is a flow chart of a wafer-level optoelectronic fusion intelligent computing method provided by the embodiment of the present disclosure. Figure 1 As shown, the wafer-level optoelectronic fusion intelligent computing method may include the following steps: Step 101: Obtain first data and second data to be calculated, and split the first data and the second data into multiple groups of calculation data with preset bit numbers; Step 102, converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog optical signals; Step 103, calculating the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data; Step 104: convert the calculation result data of the analog optical signal into a digital electrical signal; Step 105: Obtain target calculation results based on multiple groups of calculation result data of the digital electrical signals.
[0025] In one embodiment of the present disclosure, the above-mentioned wafer-level optoelectronic fusion intelligent computing method is applicable to a computing task, which may be a matrix multiplication computing task. Based on this, the above-mentioned wafer-level optoelectronic fusion intelligent computing method can be applicable to a variety of scenarios, such as the classification of intelligent computing tasks.
[0026] In one embodiment of the present disclosure, the first data and the second data acquired and to be calculated have the same number of bits. For example, the first data and the second data are 8 bits.
[0027] In one embodiment of the present disclosure, after obtaining the first data and the second data through the above steps, the first data and the second data can be split into multiple groups of calculation data with a preset number of bits, so as to perform optical calculations later. In one embodiment of the present disclosure, the method of splitting the first data and the second data into multiple groups of calculation data with a preset number of bits can include: splitting the first data and the second data into multiple groups of calculation data with a preset number of bits in sequence. In one embodiment of the present disclosure, the preset number of bits can be 2.
[0028] Specifically, in one embodiment of the present disclosure, the first data and the second data can be divided into a group of 2-bit calculation data every 2 bits from the high bit, that is, when the first data and the second data are 8 bits, the first data and the second data can be divided into 4 groups of 2-bit calculation data.
[0029] And, in one embodiment of the present disclosure, the above method of converting the calculation data of multiple sets of preset bit numbers of digital electrical signals into analog optical signals may include: converting the calculation data of multiple sets of preset bit numbers of digital electrical signals into analog electrical signals, and converting the calculation data of multiple sets of preset bit numbers of analog electrical signals into analog optical signals. In one embodiment of the present disclosure, the calculation data of multiple sets of preset bit numbers of digital electrical signals may be converted into analog electrical signals by a digital-to-analog converter array (DA).
[0030] Further, in one embodiment of the present disclosure, after the analog optical signal is obtained through the above steps, the calculation data of each group of preset bit numbers of the analog optical signal can be calculated to obtain calculation result data. Specifically, in one embodiment of the present disclosure, the above method of calculating the calculation data of each group of preset bit numbers of the analog optical signal to obtain the calculation result data may include: calculating the calculation data of each group of preset bit numbers of the analog optical signal through an MZI array or two-dimensional diffraction to obtain the calculation result data.
[0031] Among them, in one embodiment of the present disclosure, after the calculation result data is obtained through the above steps, the above calculation result data will be subsequently sampled with a precision of a preset number of bits, based on which the above calculation error will be eliminated in the quantization process. And, in one embodiment of the present disclosure, compared with the quantization precision of more than 8 bits in the prior art, the optical calculation of the above preset number of bits has stronger robustness to the calculation error, and has strong applicability to the unavoidable physical errors and jitters of the device to ensure the accuracy and reliability of the calculation results.
[0032] And, in one embodiment of the present disclosure, the multiple groups of calculation result data obtained through the above steps are analog optical signals. At this time, the multiple groups of calculation result data of the analog optical signals need to be converted into digital electrical signals in order to obtain the target calculation results later. Among them, in one embodiment of the present disclosure, the above method of converting the calculation result data of the analog optical signal into a digital electrical signal may include: converting the calculation result data of the analog optical signal into an analog electrical signal, and converting the calculation result data of the analog electrical signal into a digital electrical signal. In one embodiment of the present disclosure, the calculation result data of the analog optical signal can be converted into an analog electrical signal through an analog-to-digital converter array (AD).
[0033] Further, in one embodiment of the present disclosure, the method for obtaining the target calculation result based on the multiple groups of calculation result data of the digital electrical signal may include: obtaining the digital electrical signals of the multiple groups of calculation result data corresponding to the first data and the second data from the cache data, and sequentially performing bitwise operations on the digital electrical signals of the multiple groups of calculation result data to obtain the target calculation result. Among them, in one embodiment of the present disclosure, the multiple groups of calculation result data corresponding to the first data and the second data can be obtained in sequence, and after each group of calculation result data is obtained, the group of calculation result data can be cached in the optoelectronic data bus and the cache module, until the multiple groups of calculation result data corresponding to the first data and the second data are obtained, the digital electrical signals of the multiple groups of calculation result data can be sequentially performed bitwise operations on the digital electrical signals to obtain the target calculation result.
[0034] In one embodiment of the present disclosure, the accuracy of the above-mentioned optoelectronic data interface can be a preset number of bits, such as 2 bits. Thus, a low quantization order can be used to ensure a high rate of data input and readout, while the device array can utilize the area of the entire silicon wafer, and the device can be integrated on a large scale; with the cooperation of the two, the accuracy and flux of the calculation can be taken into account, providing hardware and architecture guarantees for high-reliability and high-parameter optoelectronic fusion large-scale calculations.
[0035] In summary, the wafer-level optoelectronic fusion intelligent computing method provided in this embodiment integrates the precise bit-by-bit logic operations of electricity with the high-throughput matrix general computing of optics by splitting the data into calculation data with a preset number of bits by bit-by-bit operations, and performing bit-by-bit operations and splicing combinations of the obtained calculation result data with a preset number of bits, thereby achieving precise calculations with high error robustness, and accurately realizing large-model calculations in the form of optoelectronic calculations, thereby supporting the efficient computing of the new generation of large-model artificial intelligence, and has broad application prospects, and can be applied to unmanned systems, autonomous driving, ultrafast science and other fields.
[0036] In order to implement the above embodiment, Figure 2 A wafer-level optoelectronic fusion intelligent computing system provided in an embodiment of the present disclosure includes: The electrical calculation module 201 is used to obtain first data and second data to be calculated, and split the first data and second data into multiple groups of calculation data with preset bit numbers; A digital-to-analog converter array module 202, used to convert multiple groups of preset bit number calculation data of digital electrical signals into analog optical signals; The optical calculation module 203 is used to calculate the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data; The analog-to-digital converter array module 204 is used to convert the calculation result data of the analog optical signal into a digital electrical signal; The calculation module 205 is used to obtain a target calculation result based on multiple groups of calculation result data of the digital electrical signal.
[0037] Optionally, in the embodiment of the present disclosure, the electrical calculation module 201 is specifically used for: The first data and the second data are sequentially split bit by bit into a plurality of groups of calculation data with a preset number of bits.
[0038] Optionally, in the embodiment of the present disclosure, the digital-to-analog converter array module 202 is specifically used for: Converting multiple sets of preset bit number calculation data of digital electrical signals into analog electrical signals; The calculation data of multiple groups of preset bit numbers of analog electrical signals are converted into analog optical signals.
[0039] Optionally, in the embodiment of the present disclosure, the optical computing module 203 is specifically configured to: The calculation data of each group of preset bit numbers of the analog optical signal are calculated through the MZI array or two-dimensional diffraction to obtain calculation result data.
[0040] Optionally, in the embodiment of the present disclosure, the analog-to-digital converter array module 204 is specifically configured to: Converting the calculation result data of the analog optical signal into an analog electrical signal; Convert the calculation result data of analog electrical signals into digital electrical signals.
[0041] Optionally, in the embodiment of the present disclosure, the calculation module 205 is specifically configured to: Acquire digital electrical signals of multiple groups of calculation result data corresponding to the first data and the second data from the cache data; The digital electrical signals of multiple groups of calculation result data are combined bit by bit in sequence to obtain the target calculation result.
[0042] Optionally, in the embodiment of the present disclosure, the preset number of bits is 2.
[0043] The collection, storage, use, processing, transmission, provision and disclosure of user personal information involved in this disclosure shall comply with the relevant laws and regulations and shall not violate public order and good morals.
[0044] It should be noted that personal information from users should be collected for legitimate and reasonable purposes and should not be shared or sold outside of these legitimate uses. In addition, such collection / sharing should be carried out after receiving the user's informed consent, including but not limited to notifying the user to read the user agreement / user notice and sign the agreement / authorization including authorization of relevant user information before the user uses the function. In addition, any necessary steps should be taken to protect and safeguard access to such personal information data and ensure that others who have access to personal information data comply with its privacy policy and procedures.
[0045] The present disclosure anticipates providing implementation schemes for users to selectively block the use or access of personal information data. That is, the present disclosure anticipates providing hardware and / or software to prevent or block access to such personal information data. Once the personal information data is no longer needed, risks can be minimized by limiting data collection and deleting the data. In addition, when applicable, such personal information is de-identified to protect the privacy of the user.
[0046] The acquisition, transmission, storage, use, and processing of data in the technical solution disclosed in this disclosure are in compliance with the relevant provisions of national laws and regulations.
[0047] It should be noted that in the embodiments of the present disclosure, certain software, components, models and other existing solutions in the industry may be mentioned, which should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.
[0048] In the description of the aforementioned embodiments, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they contradict each other.
[0049] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, "plurality" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0050] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present disclosure belong.
[0051] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or otherwise processing in a suitable manner if necessary, and then stored in a computer memory.
[0052] It should be understood that the various parts of the present disclosure can be implemented in hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0053] A person skilled in the art may understand that all or part of the steps in the above-mentioned embodiment method may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.
[0054] In addition, each functional unit in each embodiment of the present disclosure may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.
[0055] The storage medium mentioned above may be a read-only memory, a disk or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present disclosure. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present disclosure.
Claims
1. A wafer-level optoelectronic fusion intelligent computing method, characterized in that: The method comprises: Acquire first data and second data to be calculated, and split the first data and the second data into multiple groups of calculation data with preset bit numbers; Converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog optical signals; Calculating the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data; Converting the calculation result data of the analog optical signal into a digital electrical signal; Based on the multiple groups of calculation result data of the digital electrical signals, a target calculation result is obtained.
2. The method according to claim 1, characterized in that The step of splitting the first data and the second data into a plurality of groups of calculation data having a preset number of bits includes: splitting the first data and the second data into a plurality of groups of calculation data having a preset number of bits in sequence.
3. The method according to claim 1, characterized in that The step of converting the plurality of groups of calculated data of the preset bit numbers of the digital electrical signal into analog optical signals comprises: Converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog electrical signals; The calculation data of the plurality of groups of preset bit numbers of the analog electrical signal are converted into analog optical signals.
4. The method according to claim 1, characterized in that The calculating data of each group of preset bit numbers of the analog optical signal to obtain the calculating result data comprises: calculating the calculating data of each group of preset bit numbers of the analog optical signal through an MZI array or two-dimensional diffraction to obtain the calculating result data.
5. The method according to claim 1, characterized in that The step of converting the calculation result data of the analog optical signal into a digital electrical signal comprises: Converting the calculation result data of the analog optical signal into an analog electrical signal; The calculation result data of the analog electric signal is converted into a digital electric signal.
6. The method according to claim 1, characterized in that The target calculation result is obtained based on the multiple groups of calculation result data of the digital electrical signal, including: Acquire digital electrical signals of multiple groups of calculation result data corresponding to the first data and the second data from the cache data; The digital electrical signals of the plurality of groups of calculation result data are sequentially combined bit by bit to obtain a target calculation result.
7. The method according to any one of claims 1 to 4, characterized in that: The preset number of bits is 2.
8. A wafer-level optoelectronic fusion intelligent computing system, characterized in that: The system comprises: An electrical calculation module, used for acquiring first data and second data to be calculated, and splitting the first data and the second data into a plurality of groups of calculation data with a preset number of bits; A digital-to-analog converter array module, used for converting the calculated data of the plurality of groups of preset bit numbers of the digital electrical signal into analog optical signals; An optical calculation module, used to calculate the calculation data of each group of preset bit numbers of the analog optical signal to obtain calculation result data; An analog-to-digital converter array module, used to convert the calculation result data of the analog optical signal into a digital electrical signal; The calculation module is used to obtain a target calculation result based on multiple groups of calculation result data of the digital electrical signal.
9. A computer storage medium, wherein: The computer storage medium stores computer executable instructions; after the computer executable instructions are executed by the processor, any method described in claims 1-7 can be implemented.
10. A computer device, characterized in that: The method comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method according to any one of claims 1 to 7 is implemented.
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