Clock offset correction method and clock loss detection method

Abstract

The invention belongs to the technical field of computer system software, and particularly relates to a clock offset correction method and a clock loss detection method which are applied to an embedded real-time operating system. And calculating an expected next time clock interrupt processing time point in the clock interrupt processing program, calculating a difference value between the current clock interrupt processing time point and the expected next time clock interrupt processing time point, and adjusting a next time clock interrupt triggering time point according to the difference value so as to complete clock offset correction. And judging whether the clock is lost or not according to the difference value between the expected time and the current actual time. According to the method, the problems of clock offset correction and clock loss detection in the running process of the embedded real-time operating system are solved, and the running time certainty of the real-time operating system is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of computer system software, and in particular relates to a clock offset correction method and a clock loss detection method. Background Art

[0002] Civil aircraft have extremely high requirements for the safety of onboard systems and equipment, including the time determinism requirements for software running on systems and equipment. For example, on the IMA system, the resident application partition must strictly run according to the absolute time window configured in the time schedule. However, when the system is running, the clock interrupt may not be captured in time due to reasons such as long-term interrupt shutdown, resulting in clock offset or even clock loss, which makes it impossible for the operating system to schedule partitions or tasks at the correct time, affecting the time determinism of the application software.

[0003] Usually the clock interrupt depends on the count in a specific register. When the count meets certain conditions, such as the count decreases to 0, the clock interrupt will be triggered. That is, the register value determines the next clock interrupt interval. The clock offset can be corrected by setting the register value.

[0004] Usually, when clock loss occurs, the operating system and application software cannot directly perceive it, which will cause silent failures. Therefore, the operating system needs to detect clock loss failures in a timely manner and report them to the user so that the user can troubleshoot and resolve the failure in a timely manner. Summary of the invention

[0005] In view of this, the present invention provides a clock offset correction method and a clock loss detection method, which provide clock offset correction and clock loss detection capabilities. In the clock interrupt processing process, the clock interrupt interval time is calculated and corrected to complete the clock offset correction, and the clock loss fault is detected according to the difference between the expected time and the actual time.

[0006] The technical solution of the present invention:

[0007] A clock offset correction method and a clock loss detection method are applied to embedded real-time operating systems;

[0008] The clock offset correction method comprises:

[0009] When a clock interrupt occurs, the expected next clock interrupt processing time point is calculated in the clock interrupt processing program, and the difference between the current clock interrupt processing time point and the expected next clock interrupt processing time point is calculated, and the next clock interrupt triggering time point is adjusted according to the difference to complete the clock offset correction;

[0010] The clock loss detection method comprises:

[0011] Based on the difference between the expected time and the current actual time, it is determined whether a clock loss has occurred before the current clock interrupt processing.

[0012] Furthermore, when the clock interrupt is initialized, a global variable is defined to save the expected first clock interrupt triggering time point. The calculation method of the first clock interrupt triggering time point is: calculate the clock interrupt period according to the system clock frequency, add the current timestamp to the clock interrupt period as the initial value of the global variable, and the initial value is used as the expected first clock interrupt processing time point.

[0013] Furthermore, the clock offset correction method periodically processes the clock interrupt of the embedded real-time operating system, specifically:

[0014] In a clock interrupt processing: the global variable is accumulated with the clock interrupt cycle until it is not less than the current timestamp; at this time, the global variable is updated to the expected next clock interrupt trigger time point, and the interval time from the current time to the expected next clock interrupt trigger time point is calculated, and the value of the clock interrupt counter is adjusted according to the interval time value to complete the correction of the clock offset.

[0015] Furthermore, the method for determining whether clock loss has occurred is specifically as follows:

[0016] If the number of times the global variable increases by the clock interrupt cycle is greater than 1 during the current clock interrupt processing, it means that the current actual time differs from the expected time by more than one clock interrupt cycle, and a clock loss fault is determined to have occurred.

[0017] Furthermore, when the embedded real-time operating system is initialized, the clock interrupt handler is hooked to the clock interrupt. After the clock interrupt is triggered, the processor running the embedded real-time operating system enters the clock interrupt handler when the clock interrupt is enabled.

[0018] Furthermore, the counter is a specific register that the clock interrupt depends on, and when the count in the register is decremented to 0, the clock interrupt is triggered.

[0019] Furthermore, the processing flow of the clock offset correction method and the clock loss detection method is as follows:

[0020] S101: When the operating system clock interrupt is initialized, define the first global variable to save the expected next clock interrupt trigger time point; calculate the clock interrupt cycle according to the system clock frequency, add the current timestamp to the clock interrupt cycle as the initial value of the global variable; set the clock interrupt counter according to the clock interrupt cycle;

[0021] S102: Hardware triggers a clock interrupt;

[0022] S103: In the clock interrupt processing program, add the clock interrupt cycle to the global variable, and record the number of times the clock interrupt cycle is increased;

[0023] S104: Obtain the timestamp of the current clock interrupt processing, and compare the updated global variable with the current timestamp;

[0024] If the updated global variable is less than the current timestamp, return to S103;

[0025] If the updated global variable is not less than the current timestamp, the global variable is subtracted from the current timestamp, and the difference is used as the corrected clock interrupt interval time;

[0026] S105: setting a clock interruption counter according to the corrected clock interruption interval time to complete the current clock offset correction;

[0027] S106: Determine whether the recorded number of increased clock interruption cycles is greater than 1;

[0028] If it is greater than 1, it means that clock loss has occurred. The number of times minus 1 is the number of lost clocks. At this time, corresponding fault processing is performed;

[0029] If it is not greater than 1, it means that no clock loss has occurred and this processing is completed.

[0030] Beneficial effects of the present invention:

[0031] After the detection method of the present invention is implemented, the clock offset can be corrected in real time, the system time certainty can be improved, and the clock loss failure can be detected in time, thereby improving the reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 Schematic diagram for clock offset correction and clock loss detection;

[0034] Figure 2 Flowchart for clock offset correction and clock loss detection. DETAILED DESCRIPTION

[0035] The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0036] The following describes the embodiments of the present disclosure through specific examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present disclosure.

[0037] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present disclosure, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0038] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present disclosure. The illustrations only show components related to the present disclosure rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0039] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects described may be practiced without these specific details.

[0040] In one embodiment of the present invention, a clock offset correction method and a clock loss detection method are provided for embedded real-time operating systems; Figure 1-Figure 2 ,

[0041] The clock offset correction method comprises:

[0042] When a clock interrupt occurs, the expected next clock interrupt processing time point is calculated in the clock interrupt processing program, and the difference between the current clock interrupt processing time point and the expected next clock interrupt processing time point is calculated, and the next clock interrupt triggering time point is adjusted according to the difference to complete the clock offset correction;

[0043] The clock loss detection method comprises:

[0044] Based on the difference between the expected time and the current actual time, it is determined whether a clock loss has occurred before the current clock interrupt processing.

[0045] In this embodiment, when the clock interrupt is initialized, a global variable is defined to save the expected first clock interrupt triggering time point. The calculation method of the first clock interrupt triggering time point is: calculate the clock interrupt period according to the system clock frequency, add the current timestamp to the clock interrupt period as the initial value of the global variable, and the initial value is used as the expected first clock interrupt processing time point.

[0046] In this embodiment, the clock offset correction method periodically processes the clock interrupt of the embedded real-time operating system, specifically:

[0047] In a clock interrupt processing: the global variable is accumulated with the clock interrupt cycle until it is not less than the current timestamp; at this time, the global variable is updated to the expected next clock interrupt trigger time point, and the interval time from the current time to the expected next clock interrupt trigger time point is calculated, and the value of the clock interrupt counter is adjusted according to the interval time value to complete the correction of the clock offset.

[0048] In this embodiment, the method for determining whether clock loss has occurred is specifically:

[0049] If the number of times the global variable increases by the clock interrupt cycle is greater than 1 during the current clock interrupt processing, it means that the current actual time differs from the expected time by more than one clock interrupt cycle, and a clock loss fault is determined to have occurred.

[0050] In this embodiment, when the embedded real-time operating system is initialized, the clock interrupt handler is attached to the clock interrupt. After the clock interrupt is triggered, the processor running the embedded real-time operating system enters the clock interrupt handler when the clock interrupt is enabled.

[0051] In this embodiment, the counter is a specific register that the clock interrupt depends on, and when the count in the register is decremented to 0, the clock interrupt is triggered.

[0052] In this embodiment, the processing flow of the clock offset correction method and the clock loss detection method is as follows:

[0053] S101: When the operating system clock interrupt is initialized, define the first global variable to save the expected next clock interrupt trigger time point; calculate the clock interrupt cycle according to the system clock frequency, add the current timestamp to the clock interrupt cycle as the initial value of the global variable; set the clock interrupt counter according to the clock interrupt cycle;

[0054] S102: Hardware triggers a clock interrupt;

[0055] S103: In the clock interrupt processing program, add the clock interrupt cycle to the global variable, and record the number of times the clock interrupt cycle is increased;

[0056] S104: Obtain the timestamp of the current clock interrupt processing, and compare the updated global variable with the current timestamp;

[0057] If the updated global variable is less than the current timestamp, return to S103;

[0058] If the updated global variable is not less than the current timestamp, the global variable is subtracted from the current timestamp, and the difference is used as the corrected clock interrupt interval time;

[0059] S105: setting a clock interruption counter according to the corrected clock interruption interval time to complete the current clock offset correction;

[0060] S106: Determine whether the recorded number of increased clock interruption cycles is greater than 1;

[0061] If it is greater than 1, it means that clock loss has occurred. The number of times minus 1 is the number of lost clocks. At this time, corresponding fault processing is performed;

[0062] If it is not greater than 1, it means that no clock loss has occurred and this processing is completed.

[0063] Figure 1 This is a schematic diagram of the clock offset correction and clock loss detection principle of this embodiment. By calculating the expected next clock interrupt trigger time point and comparing it with the current timestamp, the corrected clock interrupt interval time and the number of clock losses are calculated.

[0064] In this embodiment, when the operating system clock interrupt is initialized, a global variable is defined to save the expected first clock interrupt triggering time point, the clock interrupt cycle is calculated according to the system clock frequency, the current timestamp is added to the clock interrupt cycle as the initial value of the global variable, and the clock interrupt counter is set according to the clock interrupt cycle;

[0065] In this embodiment, when entering the clock interrupt processing program, the clock interrupt period is first added to the global variable and then compared with the current timestamp:

[0066] If the former is not less than the latter, the value of the global variable is the expected next clock interrupt processing time, and the difference between it and the current timestamp is the corrected clock interrupt interval time;

[0067] If the former is less than the latter, continue to increase the clock interrupt cycle for the global variable until the global variable value is not less than the current timestamp. At this time, the value of the global variable is the expected next clock interrupt processing time, and the difference between it and the current timestamp is the corrected clock interrupt interval time.

[0068] In this embodiment, a clock interruption counter is set according to the corrected clock interruption interval time, thereby completing the current clock offset correction.

[0069] In this embodiment, the number of times the clock interruption cycle is added to the global variable during the clock interruption processing is determined. If the number is greater than 1, it indicates that clock loss has occurred, and the number minus 1 is the number of lost clocks. Otherwise, it indicates that no clock loss failure has occurred.

[0070] Figure 2 This is a flowchart of the clock offset correction and clock loss detection of the operating system of this embodiment, as shown in FIG. Figure 2 As shown, the method flow provided in this embodiment is as follows:

[0071] ①_x0001_When the operating system clock interrupt is initialized, define the first global variable to save the expected next clock interrupt trigger time point. Calculate the clock interrupt cycle according to the system clock frequency, add the current timestamp to the clock interrupt cycle as the initial value of the global variable. Set the clock interrupt counter according to the clock interrupt cycle;

[0072] ②_x0001_Hardware triggers a clock interrupt;

[0073] ③_x0001_In the clock interrupt handler, add the clock interrupt cycle to the global variable and record the number of times the clock interrupt cycle is increased;

[0074] ④_x0001_Get the timestamp of the current clock interrupt processing and compare the updated global variable with the current timestamp;

[0075] ⑤_x0001_If the updated global variable is less than the current timestamp, return to step 3;

[0076] ⑥_x0001_If the updated global variable is not less than the current timestamp, the global variable is subtracted from the current timestamp, and the difference is the corrected clock interrupt interval time;

[0077] ⑦_x0001_ sets the clock interrupt counter according to the corrected clock interrupt interval time, thereby completing this clock offset correction;

[0078] ⑧_x0001_ Determine whether the recorded number of increased clock interrupt cycles is greater than 1;

[0079] ⑨_x0001_If it is greater than 1, it means that clock loss has occurred. The number of times minus 1 is the number of lost clocks. At this time, corresponding fault processing is performed;

[0080] ⑩_x0001_If it is not greater than 1, it means that no clock loss has occurred and this processing is completed.

[0081] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A clock offset correction method and a clock loss detection method, characterized in that: Applied to embedded real-time operating systems; The clock offset correction method comprises: When a clock interrupt occurs, the expected next clock interrupt processing time point is calculated in the clock interrupt processing program, and the difference between the current clock interrupt processing time point and the expected next clock interrupt processing time point is calculated, and the next clock interrupt triggering time point is adjusted according to the difference to complete the clock offset correction; The clock loss detection method comprises: Based on the difference between the expected time and the current actual time, it is determined whether a clock loss has occurred before the current clock interrupt processing.

2. The clock offset correction method and clock loss detection method according to claim 1, characterized in that: When the clock interrupt is initialized, a global variable is defined to save the expected first clock interrupt triggering time point. The calculation method of the first clock interrupt triggering time point is: calculate the clock interrupt period according to the system clock frequency, add the current timestamp to the clock interrupt period as the initial value of the global variable, and the initial value is used as the expected first clock interrupt processing time point.

3. The clock offset correction method and clock loss detection method according to claim 2, characterized in that: The clock offset correction method periodically processes the clock interrupt of the embedded real-time operating system, specifically: In a clock interrupt processing: the clock interrupt cycle is accumulated to the global variable until it is not less than the current timestamp; At this time, the global variable is updated to the expected next clock interrupt trigger time point, and the interval time from the current time to the expected next clock interrupt trigger time point is calculated. The value of the clock interrupt counter is adjusted according to the interval time value to complete the correction of the clock offset.

4. The clock offset correction method and clock loss detection method according to claim 3, characterized in that: The specific method for determining whether clock loss has occurred is: If the number of times the global variable increases by the clock interrupt cycle is greater than 1 during the current clock interrupt processing, it means that the current actual time differs from the expected time by more than one clock interrupt cycle, and a clock loss fault is determined to have occurred.

5. The clock offset correction method and clock loss detection method according to claim 4, characterized in that: When the embedded real-time operating system is initialized, the clock interrupt processing program is hooked to the clock interrupt. After the clock interrupt is triggered, the processor running the embedded real-time operating system enters the clock interrupt processing program when the clock interrupt is enabled.

6. The clock offset correction method and clock loss detection method according to claim 5, characterized in that: The counter is a specific register that the clock interrupt depends on. When the count in the register is decremented to 0, the clock interrupt is triggered.

7. The clock offset correction method and clock loss detection method according to claim 6, characterized in that: The processing flow of the clock offset correction method and the clock loss detection method is as follows: S101: When the operating system clock interrupt is initialized, define the first global variable to save the expected next clock interrupt trigger time point; calculate the clock interrupt cycle according to the system clock frequency, and add the current timestamp to the clock interrupt cycle as the initial value of the global variable; Set the clock interrupt counter according to the clock interrupt period; S102: Hardware triggers a clock interrupt; S103: In the clock interrupt processing program, add the clock interrupt cycle to the global variable, and record the number of times the clock interrupt cycle is increased; S104: Obtain the timestamp of the current clock interrupt processing, and compare the updated global variable with the current timestamp; If the updated global variable is less than the current timestamp, return to S103; If the updated global variable is not less than the current timestamp, the global variable is subtracted from the current timestamp, and the difference is used as the corrected clock interrupt interval time; S105: setting a clock interruption counter according to the corrected clock interruption interval time to complete the current clock offset correction; S106: Determine whether the recorded number of increased clock interruption cycles is greater than 1; If it is greater than 1, it means that clock loss has occurred. The number of times minus 1 is the number of lost clocks. At this time, corresponding fault processing is performed; If it is not greater than 1, it means that no clock loss has occurred and this processing is completed.

Images