USB interface circuit and USB device
By designing a USB interface circuit for USB devices, detecting the access situation of external devices and controlling the circuit status, the power supply conflict problem of USB devices during master-slave mode switching is solved, automatic switching and current limit are achieved, and the risk of device damage is reduced.
Patent Information
- Application Number
- CN202510024593.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-07
- Publication Date
- 2025-04-25
AI Technical Summary
Existing USB devices have a risk of power supply conflicts during master-slave mode switching, which may damage USB devices and external devices.
A USB interface circuit is designed, including processing sub-circuits, switch sub-circuits, current limit sub-circuits and interface sub-circuits. By detecting the access situation of external devices, the switch sub-circuits are controlled to be in the off state, and the current of the power pin is limited through the current limit sub-circuits to weaken the power supply conflict.
It effectively reduces power supply conflicts, reduces the risk of damage to USB devices and external devices, and realizes the function of automatically switching master-slave mode without adding external trigger buttons.
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Figure CN119883985A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of machine vision, and in particular to a USB interface circuit and a USB device. Background Art
[0002] Currently, in the master-slave mode switching scheme of USB (Universal Serial Bus) devices, in the initial state (no external device is connected to the USB device), the power supply inside the USB device supplies power to the power pin of the USB interface. After detecting that an external device is connected to the USB interface, the power supply to the power pin is turned off. However, this scheme has the following risks: if the connected external device is a master device, the USB device and the external device will supply power to each other at the same time (the power supply inside the USB device supplies power to the power pin, and the external device also supplies power to the power pin), resulting in the risk of power supply conflict, which may damage the USB device and the external device. Summary of the invention
[0003] The purpose of the embodiments of the present application is to provide a USB interface circuit and a USB device to reduce power supply conflicts. The specific technical solution is as follows:
[0004] In a first aspect, an embodiment of the present application provides a USB interface circuit, the circuit comprising:
[0005] Processing subcircuit, switch subcircuit, current limiting subcircuit and interface subcircuit;
[0006] The control end of the switch subcircuit is connected to the control signal output pin of the processing subcircuit, the input end of the switch subcircuit is respectively connected to the power supply end and the first end of the current limiting subcircuit, and the output end of the switch subcircuit is respectively connected to the power pin of the interface subcircuit and the second end of the current limiting subcircuit;
[0007] The processing subcircuit is used to detect whether an external device is connected to the interface subcircuit, and when it is detected that no external device is connected to the interface subcircuit, control the USB interface circuit to be in a slave device mode and output a first control signal to the control end of the switch subcircuit;
[0008] The switch subcircuit is configured to be in an off state upon receiving the first control signal;
[0009] The current limiting subcircuit is used to pull up the level of the power pin of the interface subcircuit to the level of the power supply end when the switch subcircuit is in the off state, and limit the current value of the power pin to below a preset current value.
[0010] In a possible implementation manner, the preset current value is 0.1 mA.
[0011] In a possible implementation, the circuit further includes a level conversion subcircuit;
[0012] The input end of the level conversion subcircuit is respectively connected to the second end of the current limiting subcircuit, the output end of the switch subcircuit, and the power pin of the interface subcircuit, and the output end of the level conversion subcircuit is connected to the analog signal input pin of the processing subcircuit;
[0013] The level conversion subcircuit is used to convert the voltage signal of the power supply pin of the interface subcircuit into a voltage signal adapted to the analog signal input pin of the processing subcircuit;
[0014] The processing subcircuit is also used to collect the voltage signal of the power pin of the interface subcircuit through the level conversion subcircuit when it is detected that an external device is connected to the interface subcircuit; and control the working mode of the USB interface circuit according to the voltage value of the voltage signal.
[0015] In a possible implementation manner, the processing subcircuit is specifically configured to control the USB interface circuit to switch to a master device mode and output a second control signal to a control terminal of the switch subcircuit when a voltage value of the voltage signal is less than a preset threshold value;
[0016] The switch subcircuit is configured to be in an on state upon receiving the second control signal, so that the power supply end supplies power to the power pin of the interface subcircuit.
[0017] In a possible implementation manner, the processing subcircuit is specifically configured to control the USB interface circuit to maintain a slave device mode when a voltage value of the voltage signal is not less than a preset threshold.
[0018] In a possible implementation manner, the current limiting subcircuit includes a first resistor;
[0019] The first pin of the first resistor is respectively connected to the power supply end and the input end of the switch subcircuit, and the second pin of the first resistor is respectively connected to the output end of the switch subcircuit and the power pin of the interface subcircuit.
[0020] In a possible implementation manner, the switch subcircuit includes a field effect transistor (MOS);
[0021] The control pin of the MOS tube is connected to the control signal output pin of the processing subcircuit, the input pin of the MOS tube is respectively connected to the power supply end and the first end of the current limiting subcircuit, and the output pin of the MOS tube is respectively connected to the power pin of the interface subcircuit and the second end of the current limiting subcircuit.
[0022] In one possible implementation, the switch subcircuit includes a power load switch;
[0023] The control pin of the power load switch is connected to the control signal output pin of the processing sub-circuit, the input pin of the power load switch is respectively connected to the power supply end and the first end of the current limiting sub-circuit, and the output pin of the power load switch is respectively connected to the power pin of the interface sub-circuit and the second end of the current limiting sub-circuit.
[0024] In a possible implementation, the positive data signal sending pin of the processing subcircuit is connected to the positive data signal sending pin of the interface subcircuit, and the negative data signal sending pin of the processing subcircuit is connected to the negative data signal sending pin of the interface subcircuit.
[0025] In a possible implementation, the positive pin of the received data signal of the processing subcircuit is connected to the positive pin of the received data signal of the interface subcircuit, and the negative pin of the received data signal of the processing subcircuit is connected to the negative pin of the received data signal of the interface subcircuit.
[0026] In a second aspect, an embodiment of the present application provides a USB device, wherein the USB device comprises the USB interface circuit described in any one of the above-mentioned first aspects.
[0027] Beneficial effects of the embodiments of the present application:
[0028] A USB interface circuit and a USB device are provided in an embodiment of the present application. The USB interface circuit includes: a processing subcircuit, a switch subcircuit, a current limiting subcircuit and an interface subcircuit; the control end of the switch subcircuit is connected to the control signal output pin of the processing subcircuit, the input end of the switch subcircuit is respectively connected to the power supply end and the first end of the current limiting subcircuit, and the output end of the switch subcircuit is respectively connected to the power pin of the interface subcircuit and the second end of the current limiting subcircuit; the processing subcircuit is used to detect whether an external device is connected to the interface subcircuit, and when it is detected that no external device is connected to the interface subcircuit, the USB interface circuit is controlled to be in a slave device mode and output a first control signal to the control end of the switch subcircuit; the switch subcircuit is used to be in an off state when the first control signal is received; the current limiting subcircuit is used to pull up the level of the power pin of the interface subcircuit to the level of the power supply end when the switch subcircuit is in the off state, and limit the current value of the power pin to below a preset current value. When no external device is connected to the interface sub-circuit, the control switch sub-circuit is in the off state (the power supply end does not directly supply power to the power pin of the interface sub-circuit). By setting the current limiting sub-circuit, the power pin level of the interface sub-circuit is raised while limiting the current of the power pin. Compared with the related technology in which no external device is connected, the power supply inside the USB device directly supplies power to the power pin, which can weaken the power supply conflict and thereby reduce the risk of damage to the USB device and external devices.
[0029] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.
[0031] Figure 1 A first structural schematic diagram of a USB interface circuit provided in an embodiment of the present application;
[0032] Figure 2 A second structural schematic diagram of the USB interface circuit provided in an embodiment of the present application;
[0033] Figure 3 A third structural schematic diagram of the USB interface circuit provided in an embodiment of the present application;
[0034] Figure 4 A fourth structural schematic diagram of the USB interface circuit provided in an embodiment of the present application;
[0035] Figure 5 A schematic diagram of the structure of a USB device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0036] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field based on the present application belong to the scope of protection of the present application.
[0037] In the current USB device communication technology, after two USB devices are connected, a master device and a slave device will be determined, and the master device also needs to power the slave device. Usually, the party that provides the USB socket interface is the master device, and the other party that is inserted is the slave device. However, in some USB devices, such as HDMI (High Definition Multimedia Interface) cameras, there is a USB Type-A (Type-A is a type of USB interface) socket interface, and this interface has OTG requirements (OTG is the abbreviation of On-The-Go, electronic device data exchange technology, OTG technology allows data transmission between USB devices without a master device), that is, the interface may be connected to the master device through a cable with Type-A plugs at both ends, in which case the HDMI camera is a slave device; the interface may also be connected to slave devices such as a USB flash drive, mouse or keyboard, in which case the HDMI camera is the master device. When the HDMI camera is a slave device, the HDMI camera needs to stop supplying power to the outside; when the HDMI camera is a master device, the HDMI camera needs to supply power to the outside. Since USB Type-A does not have a corresponding OTG ID pin (in OTG devices, the ID pin is used to distinguish whether the OTG device is a master device or a slave device. The ID pin has two states: floating and grounded. When the ID pin is grounded, the OTG device is regarded as a master device; when the ID pin is floating, the OTG device is regarded as a slave device), it is impossible to automatically switch between master and slave modes.
[0038] In response to the above problems, a master-slave mode switching scheme for USB devices is proposed in the related art. In the initial state of the scheme (no external device is connected to the USB device), the power supply inside the USB device supplies power to the power pin of the USB interface. After detecting that an external device is connected to the USB interface, the power supply to the power pin is turned off, and the voltage signal of the power pin is collected. When the voltage signal of the power pin is greater than the preset voltage value, the USB device is set to the slave mode. When the voltage signal of the power pin is not greater than the preset voltage value, the USB device is set to the master mode and the power supply to the power pin is restored. However, this scheme has the following risks: if the connected external device is the master device, the USB device and the external device will supply power to each other at the same time (the power supply inside the USB device supplies power to the power pin, and the external device also supplies power to the power pin), resulting in the risk of power supply conflict, which may damage the USB device and the external device.
[0039] In order to solve at least one of the above problems, the present application embodiment provides a USB interface circuit and a USB device. Next, the USB interface circuit provided by the present application embodiment is described in detail. Figure 1 , is a first structural diagram of a USB interface circuit 1 provided in an embodiment of the present application, wherein the USB interface circuit 1 comprises:
[0040] A processing subcircuit 11, a switch subcircuit 12, a current limiting subcircuit 13 and an interface subcircuit 14;
[0041] The control end of the switch subcircuit 12 is connected to the control signal output pin GPIO of the processing subcircuit 11, the input end of the switch subcircuit 12 is respectively connected to the power supply end and the first end of the current limiting subcircuit 13, and the output end of the switch subcircuit 12 is respectively connected to the power pin VBUS of the interface subcircuit 14 and the second end of the current limiting subcircuit 13;
[0042] The processing subcircuit 11 is used to detect whether an external device is connected to the interface subcircuit 14. When it is detected that no external device is connected to the interface subcircuit 14, the processing subcircuit 11 controls the USB interface circuit 1 to be in a slave device mode and outputs a first control signal to the control terminal of the switch subcircuit 12.
[0043] The switch subcircuit 12 is configured to be in an off state upon receiving the first control signal;
[0044] The current limiting subcircuit 13 is used to pull up the level of the power pin VBUS of the interface subcircuit 14 to the level of the power supply end when the switch subcircuit 12 is in the off state, and limit the current value of the power pin VBUS to below a preset current value.
[0045] The preset current value can be set according to the power supply safety to ensure that when the current value of the power pin VBUS is limited to less than the preset current value, the power supply to the external device (host device) is very weak, thereby reducing the power supply conflict between the USB device and the external device (host device) and reducing the risk of damage to the USB device and the external device (host device).
[0046] In a possible implementation manner, the preset current value is 0.1 mA.
[0047] In the USB interface, the current of the power pin VBUS is usually 500mA. In the present application, the current value of the power pin VBUS is limited to below 0.1mA through the current limiting sub-circuit 13, which is much less than 500mA. Therefore, when an external device (host device) is connected, the power supply to the external device (host device) is very weak, and the switch sub-circuit 12 is in the off state, which can prevent the power of the external device (host device) from flowing back into the USB device, thereby reducing the risk of damage to the USB device.
[0048] The processing subcircuit 11 may be a SOC (system-on-integrated circuit) processor, or other types of processors, etc., which is not specifically limited in the present application.
[0049] The switch subcircuit 12 may be a MOS (a field effect transistor) switch tube, a power load switch, or other types of analog switches, etc., which is not specifically limited in the present application.
[0050] The current limiting sub-circuit 13 may be a sub-circuit formed by a resistor.
[0051] In the embodiment of the present application, when no external device is connected to the interface sub-circuit 14, the control switch sub-circuit 12 is in an off state (the power supply end does not directly supply power to the power pin VBUS of the interface sub-circuit 14). By setting the current limiting sub-circuit 13, the VBUS level of the power pin of the interface sub-circuit 14 is pulled up, and the current of the power pin VBUS is limited. Compared with the related art in which no external device is connected, the power supply inside the USB device directly supplies power to the power pin, which can reduce power supply conflicts and thereby reduce the risk of damage to the USB device and external devices.
[0052] In one possible implementation, see Figure 2 , the USB interface circuit 1 also includes a level conversion sub-circuit 15;
[0053] The input end of the level conversion subcircuit 15 is respectively connected to the second end of the current limiting subcircuit 13, the output end of the switch subcircuit 12, and the power pin VBUS of the interface subcircuit 14, and the output end of the level conversion subcircuit 15 is connected to the analog signal input pin ADC_IN of the processing subcircuit 11;
[0054] The level conversion sub-circuit 15 is used to convert the voltage signal of the power pin VBUS of the interface sub-circuit 14 into a voltage signal adapted to the analog signal input pin ADC_IN of the processing sub-circuit 11;
[0055] The processing subcircuit 11 is also used to collect the voltage signal of the power pin VBUS of the interface subcircuit 14 through the level conversion subcircuit 15 when it is detected that an external device is connected to the interface subcircuit 14; and control the working mode of the USB interface circuit 1 according to the voltage value of the voltage signal.
[0056] In a circuit system, different modules may use different voltage standards, such as 1.8V, 3.3V, 5V, 12V, 24V, etc. When these modules with different voltage standards need to communicate, direct connection may cause signal transmission confusion or even damage the module. Therefore, level conversion is required to achieve voltage matching and ensure that the signal can be correctly transmitted between modules with different voltage standards.
[0057] In an example, the voltage standard of the analog signal input pin ADC_IN of the processing sub-circuit 11 is 1.8V, and the voltage standard of the power pin VBUS of the interface sub-circuit 14 is 5V. The level conversion sub-circuit 15 can convert 5V to 1.8V, so that the processing sub-circuit 11 can collect the voltage signal of the power pin VBUS.
[0058] The level conversion sub-circuit 15 can be a level converter, or a circuit module composed of components such as resistors, operational amplifiers, and switching tubes, etc., and this application does not make specific limitations on this.
[0059] In the embodiment of the present application, by setting a level conversion sub-circuit 15, the voltage signal of the power pin VBUS of the interface sub-circuit 14 is converted into a voltage signal adapted to the analog signal input pin ADC_IN of the processing sub-circuit 11, so as to achieve voltage matching between the analog signal input pin ADC_IN of the processing sub-circuit 11 and the power pin VBUS of the interface sub-circuit 14, thereby ensuring that the signal can be correctly transmitted between sub-circuits with different voltage standards.
[0060] In one possible implementation, see Figure 2, the processing sub-circuit 11 is specifically used to control the USB interface circuit 1 to switch to the master device mode when the voltage value of the voltage signal of the power pin VBUS is less than a preset threshold value, and output a second control signal to the control end of the switch sub-circuit 12;
[0061] The switch sub-circuit 12 is configured to be in an on state upon receiving the second control signal, so that the power supply end supplies power to the power pin VBUS of the interface sub-circuit 14 .
[0062] When the processing subcircuit 11 detects that an external device is connected to the interface subcircuit 14, it collects the voltage signal of the power pin VBUS of the interface subcircuit 14. When the voltage value of the collected voltage signal is less than the preset threshold value, it is determined that the external device connected to the interface subcircuit 14 is a slave device (when the interface subcircuit 14 is connected to a slave device such as a USB flash drive, a mouse, a keyboard, etc., since the switch subcircuit 12 is in the off state, and the slave devices such as the USB flash drive, the mouse, the keyboard, etc. are powered devices, the voltage signal on the power pin VBUS will be pulled down by the slave devices such as the USB flash drive, the mouse, the keyboard, etc., and the analog signal input pin ADC_IN of the processing subcircuit 11 will detect the voltage signal on the power pin VBUS is reduced), controls the USB interface circuit 1 to switch to the master device mode (when no external device is connected, the initial default of the USB interface circuit 1 is the slave device mode), and outputs a second control signal to the control end of the switch subcircuit 12, so that the switch subcircuit 12 is turned on, and the power supply end supplies power to the power pin VBUS of the interface subcircuit 14, thereby completing the power supply of the slave device to the master device.
[0063] The preset threshold value can be set according to the fluctuation of the voltage signal, etc.
[0064] The first control signal may be a high-level signal, and the second control signal may be a low-level signal; the first control signal may be a low-level signal, and the second control signal may be a high-level signal. In one example, the switch subcircuit 12 is a P-type MOS tube, the first control signal is a high-level signal, and the second control signal is a low-level signal. The control pin (gate) of the P-type MOS tube is in an off state when receiving a high-level signal, and is in an on state when receiving a low-level signal.
[0065] In the embodiment of the present application, when the voltage value of the voltage signal collected by the processing subcircuit 11 is less than a preset threshold value, it is determined that the external device connected to the interface subcircuit 14 is a slave device, the USB interface circuit 1 is controlled to switch to the master device mode, and a second control signal is output to the control end of the switch subcircuit 12 to turn on the switch subcircuit 12, and the power supply end supplies power to the power pin VBUS of the interface subcircuit 14, thereby completing the power supply of the master device to the slave device.
[0066] In one possible implementation, see Figure 2 The processing sub-circuit 11 is specifically used to control the USB interface circuit 1 to maintain the slave device mode when the voltage value of the voltage signal of the power pin VBUS is not less than a preset threshold.
[0067] When the processing subcircuit 11 detects that an external device is connected to the interface subcircuit 14, it collects the voltage signal of the power pin VBUS of the interface subcircuit 14. When the voltage value of the collected voltage signal is not less than a preset threshold, it determines that the external device connected to the interface subcircuit 14 is a master device (when the interface subcircuit 14 is connected to a master device such as a computer, the computer supplies power to the power pin VBUS, and the analog signal input pin ADC_IN of the processing subcircuit 11 will detect that the voltage signal on the power pin VBUS is not less than a preset threshold), and controls the USB interface circuit 1 to maintain the slave device mode (when no external device is connected, the initial default of the USB interface circuit 1 is the slave device mode). At this time, the switch subcircuit 12 is in the off state, and the master device completes the power supply to the slave device.
[0068] In the embodiment of the present application, when the voltage value of the voltage signal collected by the processing subcircuit 11 is not less than a preset threshold, it determines that the external device connected to the interface subcircuit 14 is a master device, controls the USB interface circuit 1 to maintain the slave device mode, and completes the power supply of the master device to the slave device.
[0069] In one example, when the USB device is working normally, the standard voltage of the power pin VBUS may be 5V, and the voltage signal of the power supply end is 5V. When no external device is connected to the interface subcircuit 14, the current limiting subcircuit 13 pulls the voltage signal of the power pin VBUS up to 5V.
[0070] When an external device is connected to the interface sub-circuit 14, the processing sub-circuit 11 collects the voltage signal of the power pin VBUS. When the voltage value of the collected voltage signal is less than a preset threshold value (ideally, the preset threshold value can be set to 5V. Considering factors such as voltage signal fluctuations, the preset threshold value can be set according to actual conditions, for example, it can be set to 4.5V, etc.), it is determined that the external device connected to the interface sub-circuit 14 is a slave device (when the interface sub-circuit 14 is connected to a slave device, the voltage signal on the power pin VBUS will be pulled down by the slave device), the USB interface circuit 1 is controlled to switch to the master device mode, and a second control signal is output to the switch sub-circuit 12 to turn on the switch sub-circuit 12. , the power supply end supplies 5V power to the power pin VBUS. When the slave device is unplugged from the interface sub-circuit 14, the processing sub-circuit 11 can detect that the slave device is disconnected, control the USB interface circuit 1 to switch back to the slave device mode, and control the switch sub-circuit 12 to turn off; when the voltage value of the collected voltage signal is not less than the preset threshold, it is determined that the external device connected to the interface sub-circuit 14 is a master device (when the interface sub-circuit 14 is connected to the master device, the master device supplies 5V power to the power pin VBUS), and the USB interface circuit 1 is controlled to maintain the slave device mode. When the master device is unplugged from the interface sub-circuit 14, the USB interface circuit 1 maintains the slave device mode, and the voltage signal of the power pin VBUS is kept at 5V.
[0071] The USB interface circuit 1 provided in the present application can be used as both a master device and a slave device in the absence of a corresponding OTG ID pin, and can automatically switch between master and slave modes without adding other external trigger buttons, thereby saving interface resources and interface costs, while reducing power supply conflicts and preventing the power of an external device (master device) from flowing back into the USB device, thereby reducing the risk of damage to the USB device and the external device.
[0072] In one possible implementation, see Figure 3 The current limiting sub-circuit 13 includes a first resistor R1; a first pin of the first resistor R1 is respectively connected to the power supply end and the input end of the switch sub-circuit 12, and a second pin of the first resistor R1 is respectively connected to the output end of the switch sub-circuit 12 and the power pin VBUS of the interface sub-circuit 14.
[0073] The first resistor R1 is a pull-up resistor and also plays a role of current limiting.
[0074] The resistance range of the first resistor R1 needs to be determined according to the voltage standard of the power pin VBUS and the preset current value. In a possible implementation, the resistance of the first resistor R1 may be greater than 50kΩ (the voltage standard of the power pin VBUS is 5V, that is, the voltage of the power supply end is 5V, and the current value of the power pin VBUS needs to be limited to less than the preset current value of 0.1mA).
[0075] In one possible implementation, see Figure 3 The switch subcircuit 12 includes a field effect transistor MOS tube; the control pin of the MOS tube is connected to the control signal output pin GPIO of the processing subcircuit 11, the input pin of the MOS tube is respectively connected to the power supply end and the first end of the current limiting subcircuit 13, and the output pin of the MOS tube is respectively connected to the power pin VBUS of the interface subcircuit 14 and the second end of the current limiting subcircuit 13.
[0076] The control pin (gate) of the MOS tube is in an off state when receiving the first control signal, and is in an on state when receiving the second control signal.
[0077] It is understandable that for the MOS tube in this application, the MOS tube can be an N-type MOS tube or a P-type MOS tube, which can be selected according to the actual situation; the control pin of the MOS tube is the gate, the input pin of the MOS tube is the source or the drain, and the output pin of the MOS tube is the drain or the source corresponding to the input pin. It is understandable that the MOS tube can be a P-type MOS tube or an N-type MOS tube, which can be selected according to the actual situation, but the device coupling mode of the circuit needs to be adjusted accordingly, and its replacement scheme is still within the protection scope of this application.
[0078] In one possible implementation, the switch subcircuit includes a power load switch; the control pin of the power load switch is connected to the control signal output pin GPIO of the processing subcircuit 11, the input pin of the power load switch is respectively connected to the power supply end and the first end of the current limiting subcircuit 13, and the output pin of the power load switch is respectively connected to the power pin of the interface subcircuit 14 and the second end of the current limiting subcircuit.
[0079] The power load switch includes a switch element. When the control pin of the power load switch receives a first control signal, the switch element is in an off state, and the input pin and the output pin of the power load switch are disconnected. When the control pin of the power load switch receives a second control signal, the switch element is in an on state, and the input pin and the output pin of the power load switch are connected. In addition, the power load switch can also integrate multiple protection functions, such as over-temperature protection, current limiting, etc., to enhance the reliability of the circuit.
[0080] In one possible implementation, see Figure 3 , a ground pin GND1 of the processing sub-circuit 11 is grounded GND.
[0081] In one possible implementation, see Figure 3 , the ground pin GND2 of the interface sub-circuit 14 is grounded GND.
[0082] In one possible implementation, see Figure 4 The positive data signal pin USB3.0_TXP of the processing sub-circuit 11 is connected to the positive data signal pin USB3.0_TXP of the interface sub-circuit 14, and the negative data signal pin USB3.0_TXN of the processing sub-circuit 11 is connected to the negative data signal pin USB3.0_TXN of the interface sub-circuit 14.
[0083] In one possible implementation, see Figure 4 The positive pin USB3.0_RXP of the received data signal of the processing sub-circuit 11 is connected to the positive pin USB3.0_RXP of the received data signal of the interface sub-circuit 14, and the negative pin USB3.0_RXN of the received data signal of the processing sub-circuit 11 is connected to the negative pin USB3.0_RXN of the received data signal of the interface sub-circuit 14.
[0084] In one possible implementation, see Figure 4 The data signal positive pin USB2.0_DP of the processing sub-circuit 11 is connected to the data signal positive pin USB2.0_DP of the interface sub-circuit 14 , and the data signal negative pin USB2.0_DM of the processing sub-circuit 11 is connected to the data signal negative pin USB2.0_DM of the interface sub-circuit 14 .
[0085] The USB3.0 interface includes three pairs of differential signal lines: the positive data signal line USB3.0_TXP and the negative data signal line USB3.0_TXN, the positive data signal line USB3.0_RXP and the negative data signal line USB3.0_RXN, and the positive data signal line USB2.0_DM and the negative data signal line USB2.0_DP. The positive data signal line USB2.0_DM and the negative data signal line USB2.0_DP are a pair of USB2.0 differential signal lines, and the USB3.0 interface is compatible with the differential signal lines of USB2.0.
[0086] The present application embodiment also provides a USB device 2, see Figure 5, the USB device 2 includes the USB interface circuit 1 described in any one of the above embodiments.
[0087] The USB device 2 may be an HDMI camera or other USB device that requires master-slave mode switching, which is not specifically limited in this application.
[0088] The USB device 2 provided in the present application can be used as both a master device and a slave device when the USB Type-A interface does not have a corresponding OTG ID pin, and can automatically switch between master and slave modes without adding other external trigger buttons, thereby saving interface resources and interface costs, while reducing power supply conflicts and preventing the power of an external device (master device) from flowing back into the USB device, thereby reducing the risk of damage to the USB device and external devices.
[0089] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0090] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.
[0091] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.
Claims
1. A USB interface circuit, characterized in that: The circuit comprises: Processing subcircuit, switch subcircuit, current limiting subcircuit and interface subcircuit; The control end of the switch subcircuit is connected to the control signal output pin of the processing subcircuit, the input end of the switch subcircuit is respectively connected to the power supply end and the first end of the current limiting subcircuit, and the output end of the switch subcircuit is respectively connected to the power pin of the interface subcircuit and the second end of the current limiting subcircuit; The processing subcircuit is used to detect whether an external device is connected to the interface subcircuit, and when it is detected that no external device is connected to the interface subcircuit, control the USB interface circuit to be in a slave device mode and output a first control signal to the control end of the switch subcircuit; The switch subcircuit is configured to be in an off state upon receiving the first control signal; The current limiting subcircuit is used to pull up the level of the power pin of the interface subcircuit to the level of the power supply end when the switch subcircuit is in the off state, and limit the current value of the power pin to below a preset current value.
2. The circuit according to claim 1, characterized in that The preset current value is 0.1 mA.
3. The circuit according to claim 1, characterized in that The circuit also includes a level conversion subcircuit; The input end of the level conversion subcircuit is respectively connected to the second end of the current limiting subcircuit, the output end of the switch subcircuit, and the power pin of the interface subcircuit, and the output end of the level conversion subcircuit is connected to the analog signal input pin of the processing subcircuit; The level conversion subcircuit is used to convert the voltage signal of the power supply pin of the interface subcircuit into a voltage signal adapted to the analog signal input pin of the processing subcircuit; The processing subcircuit is also used to collect the voltage signal of the power pin of the interface subcircuit through the level conversion subcircuit when it is detected that an external device is connected to the interface subcircuit; and control the working mode of the USB interface circuit according to the voltage value of the voltage signal.
4. The circuit according to claim 3, characterized in that The processing subcircuit is specifically used to control the USB interface circuit to switch to the master device mode and output a second control signal to the control end of the switch subcircuit when the voltage value of the voltage signal is less than a preset threshold value; The switch subcircuit is configured to be in an on state upon receiving the second control signal, so that the power supply end supplies power to the power pin of the interface subcircuit.
5. The circuit according to claim 3, characterized in that The processing subcircuit is specifically used to control the USB interface circuit to maintain the slave device mode when the voltage value of the voltage signal is not less than a preset threshold.
6. The circuit according to claim 1, characterized in that The current limiting subcircuit includes a first resistor; The first pin of the first resistor is respectively connected to the power supply end and the input end of the switch subcircuit, and the second pin of the first resistor is respectively connected to the output end of the switch subcircuit and the power pin of the interface subcircuit.
7. The circuit according to claim 1, characterized in that The switch subcircuit includes a field effect transistor (MOS); The control pin of the MOS tube is connected to the control signal output pin of the processing subcircuit, the input pin of the MOS tube is respectively connected to the power supply end and the first end of the current limiting subcircuit, and the output pin of the MOS tube is respectively connected to the power pin of the interface subcircuit and the second end of the current limiting subcircuit.
8. The circuit according to claim 1, characterized in that The switch subcircuit includes a power load switch; The control pin of the power load switch is connected to the control signal output pin of the processing sub-circuit, the input pin of the power load switch is respectively connected to the power supply end and the first end of the current limiting sub-circuit, and the output pin of the power load switch is respectively connected to the power pin of the interface sub-circuit and the second end of the current limiting sub-circuit.
9. The circuit according to claim 1, characterized in that The positive pin of the data signal transmission of the processing subcircuit is connected to the positive pin of the data signal transmission of the interface subcircuit, and the negative pin of the data signal transmission of the processing subcircuit is connected to the negative pin of the data signal transmission of the interface subcircuit.
10. The circuit according to claim 9, characterized in that The positive pin of the received data signal of the processing subcircuit is connected to the positive pin of the received data signal of the interface subcircuit, and the negative pin of the received data signal of the processing subcircuit is connected to the negative pin of the received data signal of the interface subcircuit.
11. A USB device, characterized in that: The USB device comprises the USB interface circuit described in any one of claims 1-10.