Thermal simulation method and device of chip packaging structure, and electronic equipment
By obtaining the system environment parameters of the external environment system of the chip package structure, determining the boundary conditions, and performing thermal simulation, the problems of high complexity and low efficiency of traditional thermal simulation methods are solved, and more efficient thermal design is achieved.
Patent Information
- Application Number
- CN202411802380.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-04-25
AI Technical Summary
The traditional thermal simulation method of chip packaging structure is highly complex and inefficient, and cannot meet the needs of thermal design.
By obtaining the system environment parameters of the external environment system of the chip package structure, determining boundary conditions, and thermal simulation is performed based on these boundary conditions and structural data, the complexity of the simulation is reduced and efficiency is improved.
This method simplifies the thermal simulation process, reduces the complexity of simulation and improves efficiency, making thermal design more efficient.
Smart Images
Figure CN119885984A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a thermal simulation method, device, electronic device and storage medium for a chip packaging structure. Background Art
[0002] As chip manufacturing processes continue to advance, the power consumption density inside the chip is also increasing. At the same time, as the packaging structure becomes more complicated, the heat inside the chip is difficult to dissipate effectively through traditional heat dissipation methods, resulting in more uneven power consumption distribution. Based on this, thermal design issues receive more attention from engineers in the early stages of chip design.
[0003] Thermal design requires engineers to perform thermal design based on the results of thermal simulation. The usual thermal simulation method is to put the design structure of the chip packaging structure and the detailed structure of the system environment into the simulation environment for simulation. Although this method can obtain very accurate simulation results, it also requires higher simulation resources and longer simulation time (several days to weeks for complex cases). Usually, thermal design requires several rounds of simulation, resulting in high simulation complexity and low simulation efficiency, which cannot be widely accepted. Summary of the invention
[0004] In response to the above technical problems, the present application provides a thermal simulation method, device, electronic device and storage medium for a chip packaging structure, which can reduce the complexity of thermal simulation and improve simulation efficiency.
[0005] In order to solve the above technical problems, the present application provides a thermal simulation method for a chip packaging structure, the method comprising the following steps: Acquire system environment parameters of the external environment system of the chip packaging structure; Determining boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters; A thermal simulation is performed on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure.
[0006] In some embodiments, determining the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters includes: Determining the equivalent heat transfer coefficient of the external environment system according to the system environment parameters; The boundary conditions for thermal simulation of the chip packaging structure are determined according to the equivalent heat transfer coefficient.
[0007] In some embodiments, the system environment parameters include parameters of a heat dissipation device and parameters of a heat source.
[0008] In some embodiments, the parameters of the heat dissipation device include heat sink parameters and fan speed, and the heat source parameters include heat source area and heat source position.
[0009] In some embodiments, when the heat dissipation device is a radiator, determining the equivalent heat transfer coefficient of the external environment system according to the system environment parameter includes: Determine the convection radiation thermal resistance, substrate thermal conduction thermal resistance, diffusion thermal resistance and thermal resistance of the heat sink according to the total heat dissipation area, heat sink parameters, substrate parameters and heat dissipation fluid parameters of the heat sink; Determining the total thermal resistance of the heat sink according to the convection radiation thermal resistance, the base thermal conduction thermal resistance, the diffusion thermal resistance and the heat thermal resistance of the heat sink; The equivalent heat transfer coefficient of the external environment system is determined according to the total thermal resistance and the heat source parameters.
[0010] In some embodiments, after performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure, the method further includes at least one of the following: In response to adjusting only the system environment parameter, re-determining the equivalent heat transfer coefficient of the external environment system according to the adjusted system environment parameter, determining the boundary conditions for performing thermal simulation on the chip packaging structure according to the re-determined equivalent heat transfer coefficient, and performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure; In response to simultaneously adjusting the system environmental parameters and the structural data of the chip packaging structure, the equivalent heat transfer coefficient of the external environment system is redetermined according to the adjusted system environmental parameters, the boundary conditions for thermal simulation of the adjusted chip packaging structure are determined according to the redetermined equivalent heat transfer coefficient, and the adjusted chip packaging structure is thermally simulated according to the boundary conditions and the structural data of the adjusted chip packaging structure.
[0011] In some embodiments, after performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure, the method further includes: In response to adjusting only the structural data of the chip packaging structure, using the original equivalent heat transfer coefficient to determine the boundary conditions for thermal simulation of the adjusted chip packaging structure; According to the boundary conditions and the structural data of the adjusted chip packaging structure, a thermal simulation is performed on the adjusted chip packaging structure.
[0012] The present application also provides a thermal simulation device for a chip packaging structure, comprising: A parameter acquisition module, used to acquire system environment parameters of the external environment system of the chip packaging structure; A boundary condition determination module, used to determine the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters; The thermal simulation module is used to perform thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure.
[0013] The present application also provides an electronic device, including a storage medium and a controller, wherein the storage medium stores a computer program, and when the computer program is executed by the controller, the steps of the thermal simulation method of the chip packaging structure as described above are implemented.
[0014] The present application also provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the thermal simulation method for the chip packaging structure as described above are implemented.
[0015] The present application discloses a thermal simulation method for a chip packaging structure, comprising the following steps: obtaining system environmental parameters of an external environmental system of the chip packaging structure; determining boundary conditions for thermal simulation of the chip packaging structure based on the system environmental parameters; and thermally simulating the chip packaging structure based on the boundary conditions and the structural data of the chip packaging structure. The technical solution of the present application equates the heat dissipation effect of the external environmental system of the chip packaging structure on the chip packaging structure to boundary conditions, so that the parameters of the external environmental system no longer need to be used during thermal simulation, and the boundary conditions can be flexibly adjusted based on changes in the external environmental system. Compared with traditional simulation methods, the complexity of thermal simulation is reduced and the simulation efficiency is improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 The figure is a flow chart of a thermal simulation method for a chip packaging structure according to an embodiment.
[0017] Figure 2 The figure is a schematic structural diagram of a thermal simulation device for a chip packaging structure according to an embodiment. DETAILED DESCRIPTION
[0018] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thoroughly and comprehensively understood.
[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more related listed items. In this application, "each" includes one and more than two quantities.
[0020] Figure 1 FIG. 1 is a flow chart of a thermal simulation method for a chip packaging structure according to an embodiment. Figure 1 As shown, the thermal simulation method of the chip packaging structure of the present application includes the following steps: S1, obtaining system environmental parameters of the external environment system of the chip packaging structure; S2, determining the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters; S3, performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure.
[0021] The chip packaging structure refers to the overall structure obtained after the chip is packaged, including the chip, surface packaging structure and some auxiliary structures. The detailed structural data of these structures constitute the overall structural data of the chip packaging structure. The structural data includes size information, position information, material information and other data used to characterize the detailed structure.
[0022] In a typical chip packaging structure, the surface packaging structure includes a substrate and a packaging cover. The chip is fixed on the substrate and electrically connected to the circuit on the substrate. The packaging cover is fixed on the substrate, and the chip is packaged in the space formed between the packaging cover and the substrate, so as to protect the chip, enhance the electrothermal performance, and realize the connection between the internal chip and the external circuit, and maintain the stability of the electrical performance. On this basis, a filling glue layer can be set between the chip and the substrate, and a heat dissipation material layer can be set between the chip and the packaging cover. These filling glue layers and heat dissipation material layers are part of the auxiliary structure, but the auxiliary structure is not limited to this.
[0023] The external environment system of the chip packaging structure refers to the external environment of the chip packaging structure. Usually, placing the chip packaging structure in the actual use scenario and directly simulating it is called system-level simulation. Therefore, the external environment system may include all the devices in the chassis, such as heat dissipation devices, etc. The heat dissipation devices may include, for example, heat sinks, fans, etc. Correspondingly, the system environment parameters include the parameters of the heat dissipation devices. When the heat dissipation devices include heat sinks and fans, the parameters of the heat dissipation devices may specifically include heat sink parameters and fan wind speed. In addition, the chip packaging structure is a heat source, and its size and position also have a great influence on the heat dissipation effect of the external environment. Therefore, it is also necessary to provide the heat source area, heat source position, etc. Correspondingly, the system environment parameters also include heat source parameters, and the heat source parameters include heat source area and heat source position.
[0024] The influence of the external environment system of the chip packaging structure on the chip packaging structure is transmitted to the inside of the packaging structure through the surface of the packaging structure. Therefore, it is necessary to set the result characterizing the environmental heat dissipation capacity calculated based on the system environmental parameters of the external environment system to the surface of the chip packaging structure, that is, the input boundary condition.
[0025] When the external environment system is determined, the system environment parameters of the external environment system can be obtained. Then, before starting the thermal simulation, the boundary conditions for thermal simulation of the chip packaging structure are determined according to the system environment parameters, so as to achieve the equivalence of the thermal impact of the external environment system on the chip packaging structure. When performing the thermal simulation calculation on the chip packaging structure in the subsequent process, there is no need to use the system environment parameters of the external environment system, thereby reducing the complexity of the simulation process. On this basis, since the system environment parameters of the external environment system are pre-calculated equivalently, only formula calculations are required without involving the simulation process. When the external environment system is adjusted, only the equivalent calculations need to be re-performed to obtain the boundary conditions for the thermal simulation. Compared with the prior art, which requires re-performing the overall thermal simulation based on the adjusted system environment parameters of the external environment system, the efficiency of the thermal simulation is improved.
[0026] According to the boundary conditions and the structural data of the chip packaging structure, when the thermal simulation of the chip packaging structure is performed, the thermal simulation process can be simplified into the following steps: input the structural data of the chip packaging structure, including the size, position, material, etc. of the structural model; set the boundary conditions; mesh the chip packaging structure; set the solution parameters, including the simulation type, convergence standard, etc.; check the results and perform post-processing. Thermal simulation can be performed using mature commercial software. It can be seen that after pre-calculating the boundary conditions equivalent to the external environment system, the thermal simulation process mainly uses the structural data of the chip packaging structure, using a small amount of data and low simulation complexity. At the same time, since the detailed structural data of the chip packaging structure is used in the simulation, the accuracy of the simulation results can be guaranteed.
[0027] In some embodiments, determining the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters includes: Determine the equivalent heat transfer coefficient of the external environment system based on the system environment parameters; The boundary conditions for thermal simulation of the chip packaging structure are determined based on the equivalent heat transfer coefficient.
[0028] The equivalent heat transfer coefficient is a parameter that characterizes the heat dissipation capacity of the system environment. The equivalent heat transfer coefficient that characterizes the heat dissipation capacity of the environment calculated based on the system environment parameters of the external environment system is set to the surface of the chip packaging structure, that is, the input boundary condition.
[0029] In some embodiments, when the heat dissipation device is a radiator, determining the equivalent heat transfer coefficient of the external environment system according to the system environment parameters includes: According to the total heat dissipation area, heat dissipation component parameters, substrate parameters and heat dissipation fluid parameters of the heat sink, the convection radiation thermal resistance, substrate thermal conduction thermal resistance, diffusion thermal resistance and heat thermal resistance of the heat sink are determined; Determine the total thermal resistance of the heat sink based on the convection radiation thermal resistance, base thermal conduction thermal resistance, diffusion thermal resistance and thermal thermal resistance of the heat sink; Determine the equivalent heat transfer coefficient of the external environment system based on the total thermal resistance and heat source parameters.
[0030] The heat sink may be in the shape of a fin or a needle. For a heat sink with a standard heat sink shape, when the heat source is located in the middle of the heat sink, the calculation process of the equivalent heat transfer coefficient is as follows: First, the total thermal resistance of the radiator needs to be calculated, and then the equivalent heat transfer coefficient is obtained based on the total thermal resistance and the heat source parameters. That is:
[0031] in, represents the heat source area, Represents the total thermal resistance of the heat sink.
[0032] The total thermal resistance of the heat sink is equal to the sum of the convection radiation resistance, the base conduction resistance, the diffusion resistance and the thermal resistance, and the expression is
[0033] in, is the convection radiation thermal resistance, is the thermal resistance of the substrate, is the substrate diffusion thermal resistance, is the thermal resistance.
[0034] One way to calculate the convection radiation thermal resistance is as follows:
[0035] in, Indicates the number of heat sinks in the heat sink parameters. Indicates the total heat dissipation area of the heat sink. Indicates the total heat dissipation area of the radiator. It represents the heat sink efficiency in the heat sink parameters. The calculation formula is as follows:
[0036] in, Indicates the heat sink length in the heat sink parameters. Indicates the thickness of the heat sink in the heat sink parameters. Indicates the thermal conductivity of the heat sink material in the heat sink parameters. Indicates the heat transfer coefficient of the heat sink surface in the heat sink parameters. For example, when the heat sink is a fin, the calculation method is: is the Reynolds number, where , is the wind speed, is the characteristic length (i.e. ), is the kinematic viscosity of air; represents the Prandtl number.
[0037] One way to calculate the thermal resistance of the substrate is as follows:
[0038] in, , , represent the substrate thickness, substrate length and substrate width in the substrate parameters respectively, Represents the thermal conductivity of the substrate material in the substrate parameters.
[0039] One way to calculate the substrate spreading thermal resistance is as follows:
[0040] in, , , , , , and represent the heat source area and the equivalent radius of the heat sink base, respectively. Represents the equivalent heat transfer coefficient of the part above the base.
[0041] One way to calculate thermal resistance is as follows:
[0042] in, The mass flow rate through the radiator represents the heat dissipation fluid parameters, It represents the constant-pressure specific heat capacity of the fluid in the heat dissipation fluid parameters.
[0043] It should be noted that the formula for calculating the equivalent heat transfer coefficient may be an empirical formula, or an existing formula suitable for calculating the heat transfer coefficient, which is not limited here.
[0044] In some embodiments, after performing thermal simulation on the chip package structure according to the boundary conditions and the structural data of the chip package structure, the method further includes at least one of the following: In response to adjusting only the system environment parameter, re-determining the equivalent heat transfer coefficient of the external environment system according to the adjusted system environment parameter, determining the boundary conditions for thermal simulation of the chip packaging structure according to the re-determined equivalent heat transfer coefficient, and performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure; In response to simultaneously adjusting the system environmental parameters and the structural data of the chip packaging structure, the equivalent heat transfer coefficient of the external environment system is redetermined according to the adjusted system environmental parameters, the boundary conditions for thermal simulation of the adjusted chip packaging structure are determined according to the redetermined equivalent heat transfer coefficient, and the adjusted chip packaging structure is thermally simulated according to the boundary conditions and the structural data of the adjusted chip packaging structure.
[0045] Among them, when it comes to adjusting the system environmental parameters, it is necessary to redetermine the equivalent heat transfer coefficient of the external environment system based on the adjusted system environmental parameters, and then determine the boundary conditions for thermal simulation of the chip packaging structure based on the redetermined equivalent heat transfer coefficient. Compared with the prior art that requires re-performing the overall thermal simulation based on the system environmental parameters of the adjusted external environment system, the efficiency of thermal simulation is improved. In addition, by determining the equivalent heat transfer coefficient through formula calculation, there is no need to perform thermal simulation on the adjusted external environment system to obtain boundary conditions, which reduces the number of thermal simulations, simplifies the process of obtaining boundary conditions, and also improves the efficiency of thermal simulation. On this basis, when it comes to the structural data of the chip packaging structure, the adjusted chip packaging structure is thermally simulated according to the adjusted boundary conditions and the structural data of the adjusted chip packaging structure.
[0046] In some embodiments, after performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure, the method further includes: In response to adjusting only the structural data of the chip packaging structure, using the original equivalent heat transfer coefficient to determine the boundary conditions for thermal simulation of the adjusted chip packaging structure; According to the boundary conditions and the structural data of the adjusted chip packaging structure, a thermal simulation is performed on the adjusted chip packaging structure.
[0047] Among them, when only the structural data of the chip packaging structure is adjusted, since the external environmental system has not changed, there is no need to recalculate the equivalent heat transfer coefficient. The original equivalent heat transfer coefficient is used to determine the boundary conditions for thermal simulation of the adjusted chip packaging structure. When multiple rounds of thermal design are required, the design efficiency can be significantly improved.
[0048] The present application discloses a thermal simulation method for a chip packaging structure, comprising the following steps: obtaining system environmental parameters of an external environmental system of the chip packaging structure; determining boundary conditions for thermal simulation of the chip packaging structure based on the system environmental parameters; and thermally simulating the chip packaging structure based on the boundary conditions and the structural data of the chip packaging structure. The technical solution of the present application equates the heat dissipation effect of the external environmental system of the chip packaging structure on the chip packaging structure to boundary conditions, so that the parameters of the external environmental system no longer need to be used during thermal simulation, and the boundary conditions can be flexibly adjusted based on changes in the external environmental system. Compared with traditional simulation methods, the complexity of thermal simulation is reduced and the simulation efficiency is improved.
[0049] like Figure 2 As shown, the present application also provides a thermal simulation device for a chip packaging structure, comprising: The parameter acquisition module 201 is used to acquire the system environment parameters of the external environment system of the chip packaging structure; The boundary condition determination module 202 is used to determine the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters; The thermal simulation module 203 is used to perform thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure.
[0050] In some embodiments, the boundary conditions for thermal simulation of the chip packaging structure are determined according to the system environment parameters, and the boundary condition determination module 202 is used to: Determine the equivalent heat transfer coefficient of the external environment system based on the system environment parameters; The boundary conditions for thermal simulation of the chip packaging structure are determined based on the equivalent heat transfer coefficient.
[0051] In some embodiments, the system environment parameters include parameters of the heat dissipation device and parameters of the heat source.
[0052] In some embodiments, the parameters of the heat dissipation device include heat sink parameters and fan speed, and the heat source parameters include heat source area and heat source position.
[0053] In some embodiments, when the heat dissipation device is a radiator, the equivalent heat transfer coefficient of the external environment system is determined according to the system environment parameters, and the boundary condition determination module 202 is used to: According to the total heat dissipation area, heat dissipation component parameters, substrate parameters and heat dissipation fluid parameters of the heat sink, the convection radiation thermal resistance, substrate thermal conduction thermal resistance, diffusion thermal resistance and heat thermal resistance of the heat sink are determined; Determine the total thermal resistance of the heat sink based on the convection radiation thermal resistance, base thermal conduction thermal resistance, diffusion thermal resistance and thermal thermal resistance of the heat sink; Determine the equivalent heat transfer coefficient of the external environment system based on the total thermal resistance and heat source parameters.
[0054] In some embodiments, the thermal simulation module 203 is further configured to, after performing thermal simulation on the chip package structure according to the boundary conditions and the structural data of the chip package structure, perform at least one of the following: In response to adjusting only the system environment parameter, re-determining the equivalent heat transfer coefficient of the external environment system according to the adjusted system environment parameter, determining the boundary conditions for thermal simulation of the chip packaging structure according to the re-determined equivalent heat transfer coefficient, and performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure; In response to simultaneously adjusting the system environmental parameters and the structural data of the chip packaging structure, the equivalent heat transfer coefficient of the external environment system is redetermined according to the adjusted system environmental parameters, the boundary conditions for thermal simulation of the adjusted chip packaging structure are determined according to the redetermined equivalent heat transfer coefficient, and the adjusted chip packaging structure is thermally simulated according to the boundary conditions and the structural data of the adjusted chip packaging structure.
[0055] In some embodiments, the thermal simulation module 203 is further used, after performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure: In response to adjusting only the structural data of the chip packaging structure, using the original equivalent heat transfer coefficient to determine the boundary conditions for thermal simulation of the adjusted chip packaging structure; According to the boundary conditions and the structural data of the adjusted chip packaging structure, a thermal simulation is performed on the adjusted chip packaging structure.
[0056] The present application also provides an electronic device, including a storage medium and a controller, wherein the storage medium stores a computer program, and when the computer program is executed by the controller, the steps of the thermal simulation method of the chip packaging structure as described above are implemented.
[0057] The present application also provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the thermal simulation method for the chip packaging structure as described above are implemented.
[0058] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A thermal simulation method for a chip packaging structure, characterized in that: The method comprises the following steps: Acquire system environment parameters of the external environment system of the chip packaging structure; Determining boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters; A thermal simulation is performed on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure.
2. The method according to claim 1, characterized in that The step of determining the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters includes: Determining the equivalent heat transfer coefficient of the external environment system according to the system environment parameters; The boundary conditions for thermal simulation of the chip packaging structure are determined according to the equivalent heat transfer coefficient.
3. The method according to claim 2, characterized in that The system environment parameters include parameters of the heat dissipation device and heat source parameters.
4. The method according to claim 3, characterized in that The parameters of the heat dissipation device include heat sink parameters and fan wind speed, and the heat source parameters include heat source area and heat source position.
5. The method according to claim 3, characterized in that: When the heat dissipation device is a radiator, determining the equivalent heat transfer coefficient of the external environment system according to the system environment parameter includes: Determine the convection radiation thermal resistance, substrate thermal conduction thermal resistance, diffusion thermal resistance and thermal resistance of the heat sink according to the total heat dissipation area, heat sink parameters, substrate parameters and heat dissipation fluid parameters of the heat sink; Determining the total thermal resistance of the heat sink according to the convection radiation thermal resistance, the base thermal conduction thermal resistance, the diffusion thermal resistance and the heat thermal resistance of the heat sink; The equivalent heat transfer coefficient of the external environment system is determined according to the total thermal resistance and the heat source parameters.
6. The method according to claim 2, characterized in that After performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure, the method further includes at least one of the following: In response to adjusting only the system environment parameter, re-determining the equivalent heat transfer coefficient of the external environment system according to the adjusted system environment parameter, determining the boundary conditions for performing thermal simulation on the chip packaging structure according to the re-determined equivalent heat transfer coefficient, and performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure; In response to simultaneously adjusting the system environmental parameters and the structural data of the chip packaging structure, the equivalent heat transfer coefficient of the external environment system is redetermined according to the adjusted system environmental parameters, the boundary conditions for thermal simulation of the adjusted chip packaging structure are determined according to the redetermined equivalent heat transfer coefficient, and the adjusted chip packaging structure is thermally simulated according to the boundary conditions and the structural data of the adjusted chip packaging structure.
7. The method according to claim 2, characterized in that: After performing thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure, the method further includes: In response to adjusting only the structural data of the chip packaging structure, using the original equivalent heat transfer coefficient to determine the boundary conditions for thermal simulation of the adjusted chip packaging structure; According to the boundary conditions and the structural data of the adjusted chip packaging structure, a thermal simulation is performed on the adjusted chip packaging structure.
8. A thermal simulation device for a chip packaging structure, characterized in that: include: A parameter acquisition module, used to acquire system environment parameters of the external environment system of the chip packaging structure; A boundary condition determination module, used to determine the boundary conditions for thermal simulation of the chip packaging structure according to the system environment parameters; The thermal simulation module is used to perform thermal simulation on the chip packaging structure according to the boundary conditions and the structural data of the chip packaging structure.
9. An electronic device, comprising a storage medium and a controller, characterized in that: The storage medium stores a computer program, and when the computer program is executed by the controller, the steps of the thermal simulation method for the chip packaging structure according to any one of claims 1 to 7 are implemented.
10. A storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the thermal simulation method for a chip packaging structure according to any one of claims 1 to 7 are implemented.