Memory based on triple modular redundancy voting and manufacturing method

Abstract

The invention discloses a memory based on triple modular redundancy voting and a manufacturing method, and aims to solve the technical problem that the correction capability is limited when memory bits are flipped in the prior art. The memory comprises a triple modular redundancy chip and a memory unit, and miniaturization, light weight and high reliability are realized through three-dimensional stacked packaging and laser scribed line side surface interconnection. The manufacturing method comprises the steps of stacking, potting, cutting, electrogilding, laser scribing and the like, process parameters of all the steps are strictly controlled, for example, potting is carried out in a vacuum environment, electrogilding comprises the operations of surface cleaning, chemical nickel plating, electrogilding and the like, and it is ensured that the product performance is excellent. According to the invention, the data reliability of the memory in an intense radiation environment is effectively improved, and an ideal storage solution is provided for the defect of radiation resistance of the memory.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor storage technology, and in particular to a memory based on triple-module redundant voting and a manufacturing method thereof. Background Art

[0002] In many fields of modern science and technology, electronic systems need to operate continuously and accurately under complex and changing environmental conditions, and their reliability and stability are crucial considerations. As a key component for storing data and instructions in electronic systems, the reliability of memory directly affects the operating status of the entire system. In the field of aerospace applications, aerospace equipment faces extreme conditions such as cosmic ray radiation, temperature changes, and electromagnetic interference, which places extremely high demands on the memory's radiation resistance and data storage stability.

[0003] At present, in fields such as aerospace that require extremely high reliability, various means have been adopted for the radiation-resistant design of memory. Among them, a common method is to add error detection and correction (EDC) coding technology to the circuit design. This technology can detect and correct a certain number of storage errors by adding additional check bits to the stored data. However, with the increasing complexity of aerospace missions and the increasingly stringent requirements for data accuracy, EDC coding technology has gradually exposed its limitations. It has limited correction capabilities when facing single event upsets (SEU), a memory bit flip problem caused by high-energy particle radiation. Once a single event upset causes multiple adjacent bits to fail at the same time, EDC coding may not be able to accurately identify and correct all errors, resulting in the propagation of stored data errors and affecting the normal operation of the system.

[0004] In the field of fault-tolerant technology, TMR (Triple Modular Redundancy) technology has attracted much attention as an important solution. TMR technology is based on the principle of majority voting. Its core is to build a redundant structure through multiple identical functional modules and vote on the output to detect and correct errors. In the TMR voting system, three identical functional modules are deployed. These modules synchronously receive the same input signal and process it independently. After processing, they each generate an output signal and transmit it to the voter. The voter compares and judges the three output signals. When at least two output signals are the same, the same result is used as the final output of the system. This design enables the system to tolerate the failure of a single module, thereby effectively enhancing the reliability and fault tolerance of the system.

[0005] In view of the shortcomings of the existing EDC encoding technology in terms of memory radiation resistance and the advantages of TMR technology in improving reliability, a memory solution based on TMR triple-module redundancy can be proposed. Summary of the invention

[0006] The object of the present invention is to provide a memory based on triple-module redundant voting and a manufacturing method thereof, so as to overcome the technical problem of limited correction capability when facing memory bit flip in the prior art.

[0007] In order to achieve the above object, the present invention adopts the following technical solution: A memory based on triple-module redundant voting, comprising: A triple-mode redundant chip, used to receive storage unit signals and perform triple-mode redundant voting; The storage unit includes three storage chips, which are used to receive and store external data, and output the stored data to the triple-module redundant chip when the data needs to be read.

[0008] The triple-module redundant chip also includes a power management module for providing operating voltage to the memory and performing power management.

[0009] The memory chip is connected to the external circuit via an independent chip enable control signal.

[0010] The storage chip is a SPI NOR FLASH single chip with a storage capacity of 128Mb. The SPI NOR FLASH single chip is equipped with a data input pin and a data output pin. The SPI NOR FLASH single chip receives and stores external data through the data input pin, and outputs the stored data to the triple-mode redundant chip through the data output pin.

[0011] The memory uses a three-dimensional stacked package.

[0012] The memory uses laser-scribed side interconnects.

[0013] A memory manufacturing method based on triple-module redundant voting comprises the following steps: Stacking the triple-mode redundant chip and the storage unit to obtain a stacked structure; Performing a potting operation on the stacked structure to obtain a potting module; Cut the encapsulated module to obtain a cut module; Performing a gold electroplating process on the cut modules to obtain gold electroplated modules; The electroplated gold module is laser-etched to obtain a finished memory product based on triple-module redundant voting.

[0014] The step is to perform a potting operation on the stacked structure to obtain a potting module in a vacuum environment.

[0015] The step of subjecting the cut module to an electroplating gold process to obtain an electroplated gold module comprises: Cleaning the surface of the cut module to obtain a module to be plated; Performing chemical nickel plating on the module to be plated to obtain a nickel-layered module; The nickel layer base module is electroplated with gold to obtain an electroplated gold module.

[0016] Compared with the prior art, the present invention has the following beneficial technical effects: A memory based on triple-mode redundant voting adopts an architecture combining a triple-mode redundant chip with a storage unit composed of three storage chips, which effectively improves the reliability of data storage. In the face of harsh environmental factors such as strong radiation, even if a storage chip causes data bit flipping due to high-energy particle radiation, the triple-mode redundant chip can still accurately output correct data by voting on the output signals of the three storage chips out of two, greatly reducing the data error rate and effectively ensuring the accuracy and integrity of the data. Each SPI NOR FLASH single chip is connected to the external circuit with the help of an independent chip enable control signal, which enhances the flexibility and resource utilization of the system in multi-tasking scenarios. The use of three-dimensional stacking packaging technology enables the memory to be miniaturized and lightweight, which is suitable for space-constrained and weight-sensitive application scenarios, helping to reduce load and improve energy efficiency. The power management module in the triple-mode redundant chip can provide a stable operating voltage and realize effective power management. It can not only accurately control the power supply of the storage unit according to the external control signal, but also ensure the normal operation of the memory when the power supply fluctuates or interferes, significantly improving the stability and reliability of the memory in a complex power supply environment.

[0017] A memory manufacturing method based on triple-mode redundant voting, stacking triple-mode redundant chips and storage units to obtain a stacked structure, achieving close arrangement between chips, shortening the signal transmission path and thus improving the data transmission speed. Potting in a vacuum environment effectively eliminates air and impurities that may be mixed in the potting process, preventing problems such as electrical performance degradation and short circuit caused by air bubbles or impurities. Potting glue can more evenly fill the gaps in the structure under a vacuum environment, forming a good sealing and protection effect, and enhancing the memory's ability to resist the external environment. Surface treatment is performed on the cut module to form a high-quality metal plating layer on the module surface. The electroplated gold layer improves the conductivity, corrosion resistance and weldability of the module surface. Finally, a laser etching device is used to accurately etch a circuit pattern on the side of the package to achieve electrical interconnection between the chips, forming a high-precision, high-reliability interconnection circuit, and ensuring stable and efficient data transmission between different chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a vertical cross-sectional view of a memory based on triple-mode redundant voting in an embodiment of the present invention.

[0019] Figure 2 The figure is a schematic diagram of a memory connection based on triple-module redundant voting in an embodiment of the present invention.

[0020] Figure 3 The figure is a flow chart of a memory manufacturing method based on triple-module redundant voting in an embodiment of the present invention.

[0021] Figure 4 The present invention is a flow chart of obtaining a gold-plated module by performing a gold-plating process on the cut module in a memory manufacturing method based on triple-module redundant voting in an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0024] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "set / connected", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0025] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "several" is two or more, unless otherwise clearly and specifically defined.

[0026] Embodiment 1: A memory based on triple-module redundancy voting is provided in a specific embodiment of the present invention, and its structure is as follows: Figure 1 As shown, including: A triple-mode redundant chip, used to receive storage unit signals and perform triple-mode redundant voting; The storage unit includes three storage chips, which are used to receive and store external data, and output the stored data to the triple-module redundant chip when the data needs to be read.

[0027] Among them, the triple-module redundant chip is the TMR chip (Triple Modular Redundancy). Its core lies in building a redundant structure through multiple identical functional modules, voting on the output to detect and correct errors, and voting on the data output signals between multiple NOR FLASH chips. Two-out-of-three voting, thereby enhancing the system's anti-interference ability. The triple-module redundant chip integrates a power management module to control and distribute the power supply of the entire memory, including power supply switching and voltage conversion for each storage unit to ensure that each component can work stably under different working conditions, specifically according to the external control signal ENABLE# signal. Under certain conditions, when ENABLE# is low, a stable 1.8V operating voltage is provided to the storage unit, and the power supply to the storage unit is cut off when ENABLE# is high. At the same time, the power management module has a voltage stabilization function to reduce the impact of power supply fluctuations on memory performance. It also includes a signal processing and voting module, whose function is to receive output data signals from multiple storage units, perform level conversion on these signals to make them suitable for internal voting logic processing, and then compare and judge the signals through triple-module redundant voting logic, with the majority of identical results as the final output result. The module also has the ability to pre-process the input signal, such as filtering, signal enhancement and other operations, to improve the quality and accuracy of the input signal, thereby improving the reliability of the voting results.

[0028] The storage unit is composed of three SPI NOR FLASH chips of the same specification. The storage capacity of each chip is 128Mb. Each chip is connected to the system through an independent chip enable control signal, namely CEn# (Chip Enable), where n ranges from 0 to 2, so that each chip can be independently selected and controlled to realize separate operations on different storage units, including data writing, reading and state switching in the system.

[0029] This memory structure consists of 1 TMR chip and 3 128Mb SPI NOR FLASH monolithic chips, adopts a single-sided assembly structure, a total of 2 layers of printed circuit boards, and electronic components are distributed on the top front and back of the printed circuit board. The entire module is realized through 3D stacking packaging based on 3D POP technology, and the electrical connection between each component is realized by laser line side interconnection technology.

[0030] like Figure 2 As shown, the memory package is a plastic TSOP package, and when the lead pitch is 1.27mm and the lead diameter is 0.35mm, the number of pins is 20. The package size is determined according to the actual design requirements to meet the requirements of memory volume and pin layout in different application scenarios.

[0031] Each SPI NOR FLASH chip is equipped with a data input pin and a data output pin, wherein the data input pin is the SI pin, and the data output pins include SO0, SO1, and SO2 pins, which correspond to three chips respectively. The SI pin can receive external data and store it accurately in the corresponding storage unit. When data needs to be read, the stored data is output to the triple-mode redundant chip for processing and voting through the SO pin corresponding to each chip. In addition, these chips support the standard SPI interface communication protocol to achieve high-speed data transmission with external devices, and have a fast read mode, which can improve data throughput in specific application scenarios and meet the needs of high-speed data processing.

[0032] In this embodiment, the TMR chip and three SPI NOR FLASH monoliths adopt three-dimensional stacking packaging technology. First, the TMR chip is placed at the bottom, and then the three SPI NOR FLASH monoliths are stacked on top of the TMR chip in sequence. During the stacking process, a high-precision positioning device is used to ensure that the alignment accuracy between the chips is within ±5 microns. This three-dimensional stacking packaging method can effectively reduce the volume of the memory, while shortening the signal transmission path between the chips and reducing signal delay. In order to achieve electrical connection between the chips, laser line scribed side interconnection technology is used. After the three-dimensional stacking package is completed, an interconnection line is formed on the side of the package body by laser etching technology. A line with a width of 10μm is etched on the side using a laser etching device to connect the TMR chip to the corresponding pins of the SPI NOR FLASH monolith to ensure that the signal can be transmitted accurately and stably.

[0033] This specific implementation also provides a storage manufacturing method based on triple-module redundancy voting, such as Figure 3 As shown, including: Stacking the triple-mode redundant chip and the storage unit to obtain a stacked structure; Performing a potting operation on the stacked structure to obtain a potting module; Cut the encapsulated module to obtain a cut module; Performing a gold electroplating process on the cut modules to obtain gold electroplated modules; The electroplated gold module is laser-etched to obtain a finished memory product based on triple-module redundant voting.

[0034] When stacking the triple-mode redundant chip with the storage unit, it is done in a clean room, and the three SPI NORFLASH chips are stacked according to Figure 1 The structure shown is stacked with a TMR chip. During the stacking process, the alignment of the chips is monitored in real time by an optical inspection system to ensure that the pin deviation between each single chip and the TMR chip does not exceed ±5 microns, thereby obtaining a stacked structure.

[0035] Transfer the stacked structure to the chamber of the vacuum potting equipment, select a potting glue with high insulation and low shrinkage, heat it to 35°C and inject it into the barrel of the potting equipment. Start the potting procedure, first evacuate the chamber to 50Pa and keep it for 10 minutes to remove the air and impurities in the chamber. Then, under a vacuum environment, evenly inject the potting glue into the gap around the stacked structure at a flow rate of 2mL / s to ensure that the potting glue completely covers the structure and no bubbles are generated. After potting is completed, raise the chamber temperature to 40°C and keep it for 2 hours to solidify the potting glue to obtain a potted module.

[0036] Fix the potting module on the workbench of the high-precision laser cutting machine, and calibrate the module's outline and cutting path. According to the design size requirements of the memory, set the parameters of the laser cutting machine, the laser power is 120W, and the cutting speed is 8mm / s. Start the cutting program, and the laser beam cuts the potting module along the planned path, removing the excess potting material and the edge part, ensuring that the cutting accuracy reaches ±0.1mm, and the cut module is obtained.

[0037] The cut modules are subjected to a gold electroplating process to obtain gold electroplated modules, such as Figure 4 As shown, including: Cleaning the surface of the cut module to obtain a module to be plated; Performing chemical nickel plating on the module to be plated to obtain a nickel-layered module; The nickel layer base module is electroplated with gold to obtain an electroplated gold module.

[0038] Put the cut module into an ultrasonic cleaner and use a mixed solution of deionized water and a special cleaning agent to clean it at 40°C for 15 minutes to remove oil, dust and other impurities on the module surface. Then rinse it with deionized water and blow it dry with nitrogen to obtain the module to be plated.

[0039] The module to be plated is placed in a chemical nickel plating tank. The nickel salt solution concentration in the nickel plating tank is 8g / L, the sodium hypophosphite concentration is 30g / L, and the sodium citrate concentration is 15g / L. The solution temperature is controlled at 45°C and the pH value is adjusted to 4.8. The reaction is carried out for 20 minutes at a stirring speed of 180r / min to form a nickel-phosphorus alloy layer with a thickness of about 3μm on the surface of the module to obtain a nickel-layered module.

[0040] The nickel-layered module was suspended in a gold electroplating tank. The concentration of the gold salt solution in the gold electroplating tank was 6g / L, the concentration of potassium citrate was 100g / L, and the concentration of potassium carbonate was 20g / L. The solution temperature was set at 42°C and the current density was controlled at 1.5A / dm². The electroplating power supply was turned on for 35 minutes to form a gold layer with a thickness of 0.7μm on the surface of the module to obtain a gold electroplated module.

[0041] Finally, laser scribing is performed. The electroplated gold module is placed on the workbench of the laser etching equipment, and the pre-designed circuit pattern and scribing path data are imported through the computer-aided design software. The parameters of the laser etching equipment are set according to the material properties of the module and the thickness of the gold layer. The laser etching program is started, and the laser beam etches on the surface of the electroplated gold module according to the preset pattern and line. During the etching process, the exhaust gas and debris generated by the etching are promptly removed through the exhaust system. After the etching is completed, the module is subjected to a comprehensive electrical performance test and appearance inspection to ensure that the accuracy of the laser scribing reaches ±10μm and that the electrical performance of the module meets the design requirements, and finally a finished memory based on triple-module redundant voting is obtained.

[0042] Embodiment 2: A specific application scenario of a memory and a manufacturing method based on triple-module redundant voting is also provided in a specific embodiment of the present invention.

[0043] In a strong radiation environment, there are high-intensity cosmic rays, particle radiation, etc. The high-energy particles released by these radiation sources have strong energy and penetration ability. When they interact with the memory, they will have a serious impact on the physical structure of the memory and the stored data. High-energy particles may directly hit the memory cell, change the charge state of the memory cell, and thus cause data bit flipping. In such a harsh environment, traditional memory often finds it difficult to ensure the accuracy and integrity of data, and faces extremely high error rates, which seriously threatens the normal operation of systems that rely on memory to store data.

[0044] In a strong radiation environment, when the memory based on triple-mode redundant voting is storing data, external data is transmitted to the memory through the SPI interface at a specific clock frequency, such as 10MHz. The data first reaches the TMR chip. The power management module in the TMR chip ensures that a stable 1.8V operating voltage is provided for the entire storage process, which is not affected by power supply fluctuations caused by radiation. Then, the data is simultaneously transmitted to the SI pins of three SPI NOR FLASH chips through the TMR chip.

[0045] When high-energy particle radiation hits the memory during data writing, it may interfere with the data transmission line or the internal circuit of the SPI NOR FLASH chip. However, since the three SPI NOR FLASH chips work independently, even if one chip is briefly disturbed during the writing process, as long as the interference does not cause the three chips to fail at the same time, the other two chips can still write data normally, and the normal result is output after the three-choice logic voting of the TMR chip.

[0046] When data needs to be read, the system sends a read instruction to the memory. After the TMR chip receives the instruction, it enables the output of the three SPI NOR FLASH chips at the same time. The three SPI NOR FLASH chips output the stored data to the TMR chip through the SO0, SO1, and SO2 pins respectively. The signal processing and voting module in the TMR chip preprocesses these data signals, including level conversion, filtering, and other operations to improve the signal quality. In a strong radiation environment, during the data reading process, if a SPI NOR FLASH chip is previously irradiated by high-energy particles, some of its stored data bits are flipped, such as from "0" to "1". When the three data signals reach the TMR chip, the voting logic of the TMR chip will compare the three data bit by bit. The voting logic of the TMR chip will find that the data of the affected chip is different from the other two data. According to the principle of majority of identical results, the correct data is determined and the correct data after correction is output. In this way, the bit flip problem caused by high-energy particle radiation is effectively overcome, ensuring the accuracy of the output data.

[0047] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and descriptions are only preferred examples of the present invention and are not intended to limit the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A memory based on triple-module redundant voting, characterized in that: include: A triple-mode redundant chip, used to receive storage unit signals and perform triple-mode redundant voting; The storage unit includes three storage chips, which are used to receive and store external data, and output the stored data to the triple-module redundant chip when the data needs to be read.

2. A memory based on triple-module redundant voting according to claim 1, characterized in that: The triple-module redundant chip also includes a power management module, which is used to provide an operating voltage for the memory and perform power management.

3. A memory based on triple-module redundant voting according to claim 1, characterized in that: The memory chip is connected to an external circuit via an independent chip enable control signal.

4. A memory based on triple-module redundancy voting according to claim 3, characterized in that: The storage chip is a SPI NOR FLASH single chip, which is equipped with a data input pin and a data output pin. The SPI NOR FLASH single chip receives and stores external data through the data input pin, and outputs the stored data to a triple-mode redundant chip through the data output pin.

5. A memory based on triple-module redundancy voting according to claim 4, characterized in that: The SPI NORFLASH single-chip storage capacity is 128Mb.

6. The memory based on triple-module redundant voting according to claim 1, characterized in that: The memory is packaged in a three-dimensional stack.

7. The memory based on triple-module redundancy voting according to claim 1, characterized in that: The memory is interconnected by laser scribing on the sides.

8. A memory manufacturing method based on triple-module redundant voting, characterized in that: The following steps are involved: Stacking the triple-mode redundant chip and the storage unit to obtain a stacked structure; Performing a potting operation on the stacked structure to obtain a potting module; Cut the encapsulated module to obtain a cut module; Performing a gold electroplating process on the cut modules to obtain gold electroplated modules; The electroplated gold module is laser-etched to obtain a finished memory product based on triple-module redundant voting.

9. The memory manufacturing method based on triple-module redundant voting according to claim 8, characterized in that: The step performs a potting operation on the stacked structure to obtain a potting module in a vacuum environment.

10. The memory manufacturing method based on triple-module redundant voting according to claim 8, characterized in that: The step of subjecting the cut module to a gold electroplating process to obtain a gold electroplated module comprises: Cleaning the surface of the cut module to obtain a module to be plated; Performing chemical nickel plating on the module to be plated to obtain a nickel-layered module; The nickel layer base module is electroplated with gold to obtain an electroplated gold module.

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