Etching processing method and semiconductor device processed by same
By using multi-film structure and step-by-step etching method in semiconductor preparation, the problem of poor etching uniformity is solved, layer1 residual amount and bottom layer2 damage are reduced, and the etching uniformity of the overall structure is improved.
Patent Information
- Application Number
- CN202411878172.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-19
- Publication Date
- 2025-04-25
AI Technical Summary
During semiconductor preparation, the existing etching process leads to differences in the etching rate of wafer center and edge positions, resulting in poor etching uniformity and accumulated damage to the underlying structure.
The multi-film layer structure of n-group layer2+layer1 is adopted, and the n-step etching method is used to select different etching menus to etch layer1 and layer2 respectively, until multiple developing exposure areas stop when the bottom layer2 is touched.
Effectively reduce the amount of layer1 residue in each step, alleviate the surface damage of the upper layer1 etch uniformity on the bottom layer2, improve the uniformity of the overall structural etching, and reduce the surface damage to the bottom layer2 layer.
Smart Images
Figure CN119890038A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of semiconductor processing, and in particular relates to an etching processing method and a semiconductor device processed by the etching method. Background Art
[0002] In the semiconductor manufacturing process, the etching process refers to the selective removal of unnecessary materials with the help of a photoresist layer (PR layer) to create the desired fine pattern. At present, silicon compound media such as silicon dioxide, silicon nitride and silicon oxynitride have been widely used in the manufacture of integrated circuit chips. The conventional etching process is to form the corresponding etching film layer and etching stop layer, and then perform a one-step etching in the area exposed and developed by the photolithography (i.e., the development exposure area), and directly etch to the final stop layer to obtain the desired etching morphology.
[0003] Among them, there is a key parameter in the etching process, namely uniformity, which is a parameter that measures the etching ability of the etching process on the entire wafer and reflects the degree of uneven etching. Etching is different from exposure. The etching process is mainly a chemical and physical reaction between plasma and the wafer surface, which means that the etching rate depends to a large extent on the rate at which the etching reaction occurs and the rate at which the reaction by-products are discharged.
[0004] Specifically, the entire wafer needs to be exposed to the etching gas during the etching process, and in order to remove by-products, a molecular pump needs to be used to continuously evacuate the gas. Due to the different structural distributions in the etching chamber, it is difficult to make every corner of the entire wafer exactly the same, which often leads to a certain difference in the etching rate between the center and edge of the wafer. Due to the unevenness of the wafer surface during the etching process, the uniformity is poor when etching to the stop layer, and this poor uniformity will continue to accumulate during the etching process, causing damage to the underlying structure.
[0005] Combination Figure 1 , Figure 2 and Figure 3 As shown, in the single-group film layer structure of the existing wafer etching structure, the upper layer is a sacrificial layer with a standard thickness of x; the lower layer is a termination layer with a standard thickness of y. Figure 1 , Figure 2 and Figure 3 The following are the state diagrams of the existing wafer etching structure before etching, during etching, and after etching. In the etching process, the poor uniformity of the upper sacrificial layer will cause a certain amount of upper sacrificial layer residue to remain at the position with slower etching speed (such as the edge of the wafer) when it contacts the lower stop layer at the position with faster etching speed (such as the middle of the wafer). If the upper sacrificial layer at the edge position is over-etched, the surface of the lower stop layer at the middle position will be damaged simultaneously. Figure 3As shown in the figure, at the position with faster etching speed, the lower stop layer forms damage with depth h1. Moreover, the surface damage of the lower stop layer is positively correlated with the uniformity of the upper layer. When the etching rates at the edge and middle of the wafer are determined, there is a stable difference in the etching depth between the middle and edge positions. As the etching time increases, the difference accumulates continuously, and finally at the interface between the upper sacrificial layer and the lower stop layer, it directly leads to an increase in the surface damage of the lower stop layer. This bottom layer damage and poor uniformity have a great impact on subsequent processes. Summary of the invention
[0006] The purpose of the present invention is to provide an etching processing method and a semiconductor device processed therefrom, aiming to improve etching uniformity. The present invention is implemented by the following scheme:
[0007] In one aspect of the present invention, there is provided an etching method for etching a plurality of grooves on a semiconductor etching structure, comprising:
[0008] S1, forming an etching structure: forming a plurality of film layer structures of n groups of lower layer layer2 + upper layer layer1 on a substrate in a stacked manner, n≥2, the film layer materials of layer1 and layer2 are different, and forming a PR layer and a plurality of developing and exposure areas on the plurality of film layer structures;
[0009] S2, configuring an etching menu: the etching menu includes an etching menu R1 in which the etching selection ratio layer1 / layer2 is greater than 1 and an etching menu R2 in which the etching selection ratio layer2 / layer1 is greater than 1;
[0010] S3, step-by-step etching process: etching the plurality of developed and exposed areas from top to bottom, and selecting etching menu R1 and etching menu R2 for etching layer 1 and layer 2 respectively, until the plurality of etching grooves corresponding to the plurality of developed and exposed areas all touch the bottom layer layer 2, and then stopping the etching operation.
[0011] As a preferred technical solution, during the step-by-step etching process, the change trend of the optical signal intensity is used to monitor in real time whether the multiple development and exposure areas have touched the end point of the currently etched layer. When it is monitored that the currently etched layer at a predetermined number of the development and exposure areas has reached the etching end point, the current etching menu is continued to be used for over-etching for a preset time, and then another etching menu is switched to perform etching.
[0012] As a preferred technical solution, according to the regional characteristics of the etching rate differences, the multiple development and exposure areas are divided into s areas according to their locations; by monitoring the optical signal intensity of the development and exposure areas in the s areas, a comprehensive judgment is made as to whether the development and exposure areas have reached the etching end point of the current etched layer; s is less than the number of development and exposure areas.
[0013] As a preferred technical solution, based on the regional characteristics of the etching rate differences, the multiple development and exposure areas are divided into first-type areas and second-type areas according to their locations; the etching rate of the etching menu R1 for the first-type areas is E1, and the etching rate for the second-type areas is E2, E1>E2; the etching rate of the etching menu R2 for the first-type areas is F1, and the etching rate for the second-type areas is F2, F1<F2.
[0014] As a preferred technical solution, according to the regional characteristics of the etching rate differences, the multiple development and exposure areas are divided into first-category areas and second-category areas according to their locations; the etching rate of the etching menu R1 for the first-category areas is E1, and the etching rate for the first-category areas is E2, E1>E2; the etching rate of the etching menu R2 for the first-category areas is F1, and the etching rate for the first-category areas is F2, F1>F2, n≥3.
[0015] As a preferred technical solution, one of the first and second types of areas is an area within a radius r1 on the wafer, and the other of the first and second types of areas is an area between a radius r1 and a radius r on the wafer, where r is the wafer radius and r1<r.
[0016] As a preferred technical solution, the items of the etching menu include: etching gas type, etching upper electrode power, etching lower electrode power, etching pressure range, physical bombardment gas type and flow rate, chamber and electrode temperature; the etching menu R1 makes the etching selection ratio layer1 / layer2 greater than 1 by selecting the specific types and parameters of the items; the etching menu R2 makes the etching selection ratio layer2 / layer1 greater than 1 by selecting the specific types and parameters of the items.
[0017] As a preferred technical solution, the materials of layer 1 and layer 2 are different and are respectively selected from the following materials: silicon oxide compounds, silicon nitrogen compounds, aluminum oxide compounds, and titanium oxide compounds.
[0018] As a preferred technical solution, the etching gas type is selected from CF-based gases, the etching upper electrode power is selected in the range of 20-1000W, the etching lower electrode power is selected in the range of 1-800W, the etching pressure range is selected in the range of 5mt-200mt, the physical bombardment gas is Ar and the flow rate is selected in the range of 5sccm-200sccm, and the cavity and electrode temperatures are controlled between 10-80°C.
[0019] Another aspect of the present invention provides a semiconductor device, wherein the semiconductor device is manufactured by the etching method described above.
[0020] The etching processing method and the semiconductor device processed by the present invention have the beneficial effect that: through n groups of layer2+layer1 multi-layer structure, and using n-step etching method instead of single-step etching, the layer1 residue in each step can be effectively reduced, wherein the layer2 etching step added in each step can alleviate the surface damage of the bottom layer2, i.e., the termination layer, caused by the uniformity of the upper layer1 etching. The present invention effectively improves the uniformity of the etching of the overall structure, and at the same time effectively reduces the surface damage to the bottom layer2, i.e., the termination layer, and within the range allowed by the process and controllable cost, the larger the value of n, the better the effect. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 This is a state diagram of the existing wafer etching structure before etching.
[0022] Figure 2 This is a state diagram of the existing wafer etching structure during etching.
[0023] Figure 3 This is a diagram of the state of the existing wafer etching structure after etching.
[0024] Figure 4 This is a main flow chart of the etching processing method provided by an embodiment of the present invention.
[0025] Figure 5 A schematic diagram of state switching in each processing link of the etching processing method provided in an embodiment of the present invention.
[0026] Figure 6 In the etching processing method provided by the embodiment of the present invention, the optical signal intensity variation trend is used to monitor in real time whether the currently etched layer in the developing and exposing area reaches the etching endpoint and to switch the optical signal curve graph corresponding to the etching menu.
[0027] Figure 7 A schematic diagram of forming multiple film layer structures and PR layer development and exposure areas on a substrate in an etching processing method provided in an embodiment of the present invention.
[0028] Figure 8 A schematic diagram of a state in which the first layer 1 is etched using the etching menu R1 and an etching endpoint is detected in the etching processing method provided in an embodiment of the present invention.
[0029] Fig. 9 A schematic diagram of the state after etching the first layer 1 using the etching menu R1 and then performing over-etching after the etching endpoint is detected in the etching processing method provided in the embodiment of the present invention.
[0030] Fig.10A schematic diagram of a state in which the first layer 2 is etched using the etching menu R2 and the etching endpoint is detected in the etching processing method provided in an embodiment of the present invention.
[0031] Fig.11 A schematic diagram of the state after etching the first layer 2 using the etching menu R2 and then performing over-etching after the etching endpoint is detected in the etching processing method provided in the embodiment of the present invention.
[0032] Fig.12 A schematic diagram of the state of etching the last layer 1 and reaching the bottom layer layer 2, i.e., the stop layer, using the etching menu R1 in the etching processing method provided in the embodiment of the present invention.
[0033] Fig.13 A schematic diagram showing a comparison between the etching method provided in an embodiment of the present invention after etching is completed and the etching method in the prior art after etching is completed. DETAILED DESCRIPTION
[0034] The technical solutions of the embodiments of the present invention are explained and described below in conjunction with the drawings of the embodiments of the present invention, but the following embodiments are only preferred embodiments of the present invention, not all of them. In the description of the present invention, the terms "first" and "second" are only used for the purpose of distinction in the description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more, unless otherwise clearly defined.
[0035] The specific implementation modes of the present invention are described in detail below with reference to the accompanying drawings. Under the premise that there is no conflict between them, the technical features of each specific implementation mode can be inherited and used interchangeably.
[0036] like Figure 4 As shown, as a basic implementation method, the etching processing method provided in this embodiment includes the following steps S1-S3.
[0037] S1: forming n groups of film layer structures of lower layer layer2 + upper layer layer1 on a substrate in a stacked manner, forming a PR layer and a plurality of developing and exposure areas of the PR layer on the multiple film layer structures, n≥2; that is, the multiple film layer structures include at least two groups of double-layer structures, each of which has layer2 located at the lower layer and layer1 located at the upper layer;
[0038] Among them, if the thickness x of the sacrificial layer of the single-group membrane layer structure in the prior art is taken as a reference, the thickness of layer1 in this embodiment is preferably selected as x1=x / n; similarly, if the thickness y of the termination layer of the single-group membrane layer structure in the prior art is taken as a reference, the thickness of layer2 in this embodiment is preferably selected as x2=y / n; of course, the situation that x1*n is greater than or even less than x is not excluded, and the situation that x2*n is greater than or even less than y is not excluded; the definition of the single-group membrane layer structure and the related thicknesses x and y described here can be found in the relevant introduction in the background technology.
[0039] S2: configuring an etching menu, the etching menu comprising: an etching menu R1 with an etching selection ratio layer1 / layer2 greater than 1 and an etching menu R2 with an etching selection ratio layer2 / layer1 greater than 1; that is, etching menu R1 is more conducive to etching layer1, and etching menu R2 is more conducive to etching layer2.
[0040] Among them, the items of the etching menu include: etching gas type, etching upper electrode power, etching lower electrode power, etching pressure range, physical bombardment gas type and flow, cavity and electrode temperature; the etching menu R1 makes the etching selection ratio layer1 / layer2 greater than 1 by selecting the specific types and parameters of the items; the etching menu R2 makes the etching selection ratio layer2 / layer1 greater than 1 by selecting the specific types and parameters of the items.
[0041] S3, step-by-step etching process: etching the plurality of the developed and exposed areas from top to bottom, and selecting etching menu R1 and etching menu R2 for etching layer 1 and layer 2 respectively, until the plurality of etching grooves corresponding to the plurality of developed and exposed areas all touch the bottom layer 2, then stop the etching operation. Figure 5 As shown, the above embodiment changes the single-group film layer structure of a termination layer of thickness y plus a sacrificial layer of thickness x in the prior art into a multi-group film layer structure of n (layer2+layer1) that can be etched in steps; when etching the multi-group film layer structure, for different film layers to be etched (layer1 and layer2 respectively), an etching menu with a relatively high etching selection for the corresponding film layer is selected, and n cycles are performed in this way, which can effectively reduce the layer1 residue in each step, and the added layer2 etching step in each step can alleviate the surface damage of the bottom layer 2, i.e., the termination layer, caused by the etching uniformity of the upper layer 1, and effectively improve the etching uniformity of the overall structure, and within the range permitted by the process and controllable cost, the larger the value of n, the better the effect.
[0042] Combination Figure 6As shown, during the step-by-step etching process, the change trend of the optical signal intensity is used to monitor in real time whether the multiple developing and exposing areas have touched the end point of the layer currently being etched. When it is monitored that the currently etched layer at a predetermined number of the developing and exposing areas has reached the etching end point, the current etching menu is continued to be used for over-etching for a preset time, and then another etching menu is switched to perform etching. The preset time can be specifically set according to the specific material and thickness of the film layer and the current etching menu. This is mainly done because, under the current etching menu, some developing and exposing areas must reach the etching end point first. When some developing and exposing areas reach the etching end point first, the current etching menu is continued to be used for over-etching for a preset time, so that the currently etched layers in all the developing and exposing areas reach the etching end point.
[0043] During the etching process, the wafer often exhibits different etching rates in different regions, that is, the wafer etching rate has significant regional characteristics. Based on this, according to the regional characteristics of the etching rate difference, the multiple developing and exposing areas are divided into s areas according to their locations; by optically monitoring the optical signal intensity of the developing and exposing areas in the s areas, it is comprehensively judged whether the developing and exposing areas have reached the etching end point of the current etched layer; s is less than the number of developing and exposing areas.
[0044] For example, the wafer can be divided into a central area and s-1 annular areas from the center to the outside, or the wafer can be divided into s sector-shaped areas; during the etching process, the divided areas are optically monitored to comprehensively judge whether the developing and exposing areas have reached the etching end point of the current etched layer. The comprehensive judgment includes: when more than half of the developing and exposing areas in at least one divided area reach the etching end point of the current etched layer, it is judged that a predetermined number of developing and exposing areas have reached the etching end point, and at this time, the over-etching operation of the preset time is performed.
[0045] By pre-dividing the wafer into s regions, the etching characteristics of a certain type of wafer on a certain type of etching equipment can be summarized; for example, through regional division and analysis of optical monitoring data, it is found that there is an obvious difference in etching characteristics between the center and edge of the wafer, or that there is an obvious difference in etching characteristics between the left and right sides of the wafer; the divided areas can be reduced by summarizing the rules.
[0046] As a specific implementation method, according to the regional characteristics of etching rate differences, the locations of multiple developing and exposing areas on the wafer are divided into a first type of area and a second type of area; by monitoring the preset characteristic developing and exposing areas in the first type of area and the second type of area, it is confirmed whether the current etched layer in the developing and exposing area has reached the etching end point. Specifically, for example Figure 5 The developing and exposure area on the relatively left side is the characteristic developing and exposure area of the first type of area. Figure 5 The developing and exposure area on the right side of the image is used as the characteristic developing and exposure area of the second type of area; by monitoring the representative characteristic developing and exposure area, it can represent whether the current etched layer of the developing and exposure area of a certain type of area has reached the etching end point. This method can greatly reduce the cost of optical monitoring without affecting the overall monitoring accuracy.
[0047] As a specific implementation, in this embodiment, one of the first type of area and the second type of area is the area within the radius r1 on the wafer, and the other of the first type of area and the second type of area is the area between the radius r1 and the radius r on the wafer, r is the radius of the wafer, r1<r; that is, the first type of area is the central area of the wafer, and the second type of area is the edge area of the wafer.
[0048] Combination Figure 7 As shown, as a specific implementation, three groups of double-layer structures are stacked on the substrate, that is, a plurality of film layer structures of 3*(layer2+layer1) are formed. Based on the etching processing method described above, the etching steps are specifically described as follows:
[0049] Combination Figure 6 and Figure 8 As shown, the etching menu R1 is first used to etch the top layer 1, and the change trend of the optical signal intensity is monitored in real time. When it is monitored that the top layer 1 of the developing and exposure area on the left side reaches the etching end point, the optical signal intensity jumps downward due to the switching of the layer materials. At this time, the etching menu R1 is used to perform over-etching for a preset time. The state after over-etching is shown in FIG. Fig. 9 As shown;
[0050] Then, the etching menu is switched to etching menu R2, and the top layer layer 2 is started to be etched. The change trend of the optical signal intensity is also monitored in real time. At this time, when the top layer layer 2 relative to the left development exposure area reaches the etching end point, see Fig.10 As shown, at this time, because of the switching of layer materials, the optical signal intensity jumps upward. Next, the etching menu R2 is used to perform over-etching for a preset time. The state after over-etching is as follows Fig.11 As shown; wherein, since this step is to etch using the etching menu R2 which is more favorable to layer2, during the over-etching process, the etching speed of the under-etched layer2 relative to the right side of the development and exposure area is faster than the etching speed of the second layer layer1 relative to the left side of the development and exposure area, so that the height difference between the two development and exposure areas is shortened;
[0051] In this cycle, the lower the layer, the smaller the difference between the left development and exposure area and the right development and exposure area. Fig.12 shown.
[0052] In this embodiment, the substrate can be a variety of materials such as SiC substrate and Si material. The materials of layer1 and layer2 are different and are selected from the following materials respectively: silicon oxide compounds, silicon nitrogen compounds, aluminum oxide compounds, and titanium oxide compounds. In addition, in each item of the etching menu, the etching gas type is selected from CF-based gas, the etching upper electrode power is selected in the range of 20-1000W, the etching lower electrode power is selected in the range of 1-800W, the etching pressure range is selected in the range of 5mt-200mt, the physical bombardment gas is selected as Ar and the flow rate is selected in the range of 5sccm-200sccm, and the chamber and electrode temperature are controlled between 10-80°C. The etching menu R1 makes the etching selection ratio layer1 / layer2 greater than 1 by selecting the specific types and parameters of the menu items; the etching menu R2 makes the etching selection ratio layer2 / layer1 greater than 1 by selecting the specific types and parameters of the items.
[0053] Next, combining the parameters of a single film layer structure of layer 2 with a thickness of y and layer 1 with a thickness of x in the prior art and the relevant parameters of the technical solution of this embodiment, the following inferences are made on the beneficial effects of this embodiment:
[0054] 1. Assume that the selectivity of layer1 / layer2 of etching menu R1 is P1, the etching rate in the middle position of the wafer (i.e., the first type of area) is E1, and the etching rate at the edge position (i.e., the second type of area) is E2; the selectivity of layer2 / layer1 of etching menu R2 is Q1, the etching rate in the middle position is F1, and the etching rate at the edge position is F2.
[0055] 2. Assume that the thickness of layer 1 of the single-step etching of a single-group film layer structure in the prior art is x, the thickness of layer 2 is y, and x / y=m; the thickness of layer 1 of the step-by-step etching in this embodiment is x1, the thickness of layer 1 is x2, x1 / x2=m, and x1=x / n.
[0056] 3. Assume that the surface damage amount of the termination layer of the single-step etching of a single-group film layer structure in the prior art, that is, layer2 with a thickness of y, is h1; suppose that the surface damage amounts of the 1st to nth layers layer2 etched step by step from top to bottom in this embodiment are a1, a2, ...an, respectively, and the surface damage amounts of the 2nd to nth layers layer1 etched step by step from top to bottom are b1, b2, ...bn-1, respectively; among them, the top layer layer1 has no surface damage.
[0057] 4. The reasoning process of the effect that can be achieved by implementing the n-step etching method is as follows:
[0058] Set E1>E2
[0059] but
[0060] If F1>F2
[0061]
[0062] …
[0063]
[0064] It can be deduced that h1=na1. When h1 is fixed, n is inversely proportional to a1, that is, the larger n is, the smaller a1 is. n The smaller.
[0065] If F1<F2
[0066] but
[0067]
[0068] …
[0069]
[0070] It can be inferred that a n <a1,h1=na1, the larger n is, the larger a n The smaller.
[0071] As can be seen from the above, when F1<F2, an obvious effect can be achieved when n≥2; in addition, even if F1>F2, the effect is not very obvious when n=2, but the effect can be seen when n≥3.
[0072] This embodiment also provides a semiconductor device, which is manufactured by the etching method described above. Specifically, the semiconductor device can be a MOSFET, an IGBT or other device.
[0073] The etching processing method and the semiconductor device processed by the present invention can effectively reduce the layer1 residue in each step by using n groups of layer2+layer1 multi-layer structures and adopting n-step etching method instead of single-step etching, wherein the layer2 etching step added in each step can alleviate the surface damage of the bottom layer2, i.e., the termination layer, caused by the uniformity of etching the upper layer1. The present invention effectively improves the uniformity of etching of the overall structure, and at the same time effectively reduces the surface damage to the bottom layer2, i.e., the termination layer, and within the range allowed by the process and controllable cost, the larger the value of n, the better the effect.
[0074] See also Fig.13 As shown, the etching effect of the solution of this embodiment is obviously better than that of the prior art.
[0075] The above disclosure is only the preferred embodiment of the present application, which certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.
Claims
1. An etching method for etching a plurality of grooves on a semiconductor etching structure, characterized in that: include: S1, forming an etching structure: forming a plurality of film layer structures of n groups of lower layer layer2 + upper layer layer1 on a substrate in a stacked manner, n≥2, the film layer materials of layer1 and layer2 are different, and forming a PR layer and a plurality of developing and exposure areas on the plurality of film layer structures; S2, configuring an etching menu: the etching menu includes an etching menu R1 in which the etching selection ratio layer1 / layer2 is greater than 1 and an etching menu R2 in which the etching selection ratio layer2 / layer1 is greater than 1; S3, step-by-step etching process: etching the plurality of developed and exposed areas from top to bottom, and selecting etching menu R1 and etching menu R2 for etching layer 1 and layer 2 respectively, until the plurality of etching grooves corresponding to the plurality of developed and exposed areas all touch the bottom layer layer 2, and then stopping the etching operation.
2. The etching method according to claim 1, characterized in that: During the step-by-step etching process, the change trend of the optical signal intensity is used to monitor in real time whether the multiple developing and exposure areas have reached the end point of the currently etched layer. When it is monitored that the currently etched layer at a predetermined number of the developing and exposure areas has reached the etching end point, the current etching menu is continued to be used for over-etching for a preset time, and then another etching menu is switched to perform etching.
3. The etching method according to claim 2, characterized in that: According to the regional characteristics of the etching rate difference, the plurality of developing and exposing areas are divided into s areas according to their locations; by monitoring the optical signal intensity of the developing and exposing areas in the s areas, it is comprehensively determined whether the developing and exposing areas have reached the etching end point of the currently etched layer; s is less than the number of development exposure areas.
4. The etching method according to claim 2, characterized in that: According to the regional characteristics of the etching rate differences, the multiple development and exposure areas are divided into first-type areas and second-type areas according to their locations; the etching rate of the etching menu R1 for the first-type areas is E1, and the etching rate for the second-type areas is E2, E1>E2; the etching rate of the etching menu R2 for the first-type areas is F1, and the etching rate for the second-type areas is F2, F1<F2.
5. The etching method according to claim 2, characterized in that: According to the regional characteristics of the difference in etching rate, the multiple development and exposure areas are divided into first-category areas and second-category areas according to their locations; the etching rate of the etching menu R1 for the first-category areas is E1, and the etching rate of the first-category areas is E2, E1>E2; the etching rate of the etching menu R2 for the first-category areas is F1, and the etching rate of the first-category areas is F2, F1>F2, n≥3.
6. The etching method according to any one of claims 4 to 5, characterized in that: One of the first type of area and the second type of area is an area within a radius r1 on the wafer, and the other of the first type of area and the second type of area is an area between a radius r1 and a radius r on the wafer, where r is the wafer radius, and r1<r.
7. The etching method according to claim 1, characterized in that: The items of the etching menu include: etching gas type, etching upper electrode power, etching lower electrode power, etching pressure range, physical bombardment gas type and flow rate, chamber and electrode temperature; the etching menu R1 makes the etching selection ratio layer1 / layer2 greater than 1 by selecting the specific types and parameters of the items; the etching menu R2 makes the etching selection ratio layer2 / layer1 greater than 1 by selecting the specific types and parameters of the items.
8. The etching method according to claim 7, characterized in that: The materials of layer 1 and layer 2 are different and are respectively selected from the following materials: silicon oxide compounds, silicon nitrogen compounds, aluminum oxide compounds, and titanium oxide compounds.
9. The etching method according to claim 8, characterized in that: The etching gas type is selected from CF-based gases, the etching upper electrode power is selected in the range of 20-1000W, the etching lower electrode power is selected in the range of 1-800W, the etching pressure range is selected in the range of 5mt-200mt, the physical bombardment gas is selected as Ar and the flow rate is selected in the range of 5sccm-200sccm, and the cavity and electrode temperatures are controlled between 10-80°C.
10. A semiconductor device, characterized in that: The semiconductor device is manufactured by the etching method according to any one of claims 1 to 9.